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author Alex W. Jackson <alex.w.jackson@gmail.com>2014-09-18 01:07:22 +0000
committer Alex W. Jackson <alex.w.jackson@gmail.com>2014-09-18 01:07:22 +0000
commitace8c59d1afb538933892681e0a2408c8466cf3f (patch)
treeee702115a0c5c240d445dc12586f80833fdbeaf6
parent5dbedfbf1867e962a1e25fd551860d59bbc47663 (diff)
Memory system and Namco improvements: [Alex Jackson]
Explicit regions in address maps (AM_REGION) are now looked up relative to the device rather than as siblings when in an internal address map (similar to devices and shared pointers) Besides being more orthogonal than before, this allows internal ROMs of MCUs and similar devices to be hooked up in a nicer and more foolproof way. Updated the m37710 and m5074x (m6502 derivative) to take advantage of this. Divided the M37702/M37710 into specific models, with each model having its own internal address map containing the correct amounts of internal RAM and ROM. M37702 MCUs found on various Namco PCBs are now all unique devices and have their respective internal ROMs loaded as device ROMs. (nw) Also did some spring (fall) cleaning in addrmap.c/memory.c/dimemory.c m_devbase (the base device used for tagmap lookup when late-binding handlers and finding memory regions and shares) is now a reference rather than a pointer, since we know what it is when the address_map_entry is constructed and it doesn't change (it depends solely on whether it's an entry in an MCFG-provided address map or an internal one) And for the same reason, there's now only one m_devbase per address_map_entry rather than individual copies for read/write/setoffset/sharedptr. Removed mysterious unused address_map_entry member "m_region_string", along with a silly assert probably left over from when Aaron was replacing AM_BASE with AM_SHARE years ago. Added a comment noting that "make sure all devices exist" in device_memory_interface::interface_validity_check() actually does nothing, like the proverbial goggles. The reason there's just a comment and not a fix is I haven't figured out how to fix it yet (is it possible to extract the original device tag that was given to a proto-delegate? Sorry, the template hell in devdelegate.h and lib/util/delegate.h makes me want to run screaming like a little girl)
-rw-r--r--.gitattributes2
-rw-r--r--src/emu/addrmap.c187
-rw-r--r--src/emu/addrmap.h205
-rw-r--r--src/emu/cpu/m37710/m37710.c57
-rw-r--r--src/emu/cpu/m37710/m37710.h33
-rw-r--r--src/emu/cpu/m6502/m5074x.c8
-rw-r--r--src/emu/debug/debugcmd.c6
-rw-r--r--src/emu/dimemory.c9
-rw-r--r--src/emu/memory.c46
-rw-r--r--src/mame/drivers/globalfr.c2
-rw-r--r--src/mame/drivers/namcofl.c17
-rw-r--r--src/mame/drivers/namcona1.c89
-rw-r--r--src/mame/drivers/namconb1.c52
-rw-r--r--src/mame/drivers/namcos11.c80
-rw-r--r--src/mame/drivers/namcos22.c95
-rw-r--r--src/mame/machine/namcomcu.c102
-rw-r--r--src/mame/machine/namcomcu.h61
-rw-r--r--src/mame/mame.mak1
-rw-r--r--src/mess/drivers/apple2gs.c14
19 files changed, 469 insertions, 597 deletions
diff --git a/.gitattributes b/.gitattributes
index acdfeef8d10..12731c76680 100644
--- a/.gitattributes
+++ b/.gitattributes
@@ -6970,6 +6970,8 @@ src/mame/machine/namco_settings.c svneol=native#text/plain
src/mame/machine/namco_settings.h svneol=native#text/plain
src/mame/machine/namcoio.c svneol=native#text/plain
src/mame/machine/namcoio.h svneol=native#text/plain
+src/mame/machine/namcomcu.c svneol=native#text/plain
+src/mame/machine/namcomcu.h svneol=native#text/plain
src/mame/machine/namcond1.c svneol=native#text/plain
src/mame/machine/namcos1.c svneol=native#text/plain
src/mame/machine/namcos2.c svneol=native#text/plain
diff --git a/src/emu/addrmap.c b/src/emu/addrmap.c
index c8cf9717a6b..bd3417adf3a 100644
--- a/src/emu/addrmap.c
+++ b/src/emu/addrmap.c
@@ -19,15 +19,15 @@
// address_map_entry - constructor
//-------------------------------------------------
-address_map_entry::address_map_entry(address_map &map, offs_t start, offs_t end)
+address_map_entry::address_map_entry(device_t &device, address_map &map, offs_t start, offs_t end)
: m_next(NULL),
m_map(map),
+ m_devbase(device),
m_addrstart((map.m_globalmask == 0) ? start : start & map.m_globalmask),
m_addrend((map.m_globalmask == 0) ? end : end & map.m_globalmask),
m_addrmirror(0),
m_addrmask(0),
- m_sharebase(NULL),
- m_sharetag(NULL),
+ m_share(NULL),
m_region(NULL),
m_rgnoffs(0),
m_memory(NULL),
@@ -52,95 +52,11 @@ void address_map_entry::set_mask(offs_t _mask)
//-------------------------------------------------
-// set_read_port - set up a handler for reading
-// an I/O port
-//-------------------------------------------------
-
-void address_map_entry::set_read_port(device_t &device, const char *tag)
-{
- m_read.m_type = AMH_PORT;
- m_read.m_tag = tag;
- m_read.m_devbase = &device;
-}
-
-
-//-------------------------------------------------
-// set_write_port - set up a handler for writing
-// an I/O port
-//-------------------------------------------------
-
-void address_map_entry::set_write_port(device_t &device, const char *tag)
-{
- m_write.m_type = AMH_PORT;
- m_write.m_tag = tag;
- m_write.m_devbase = &device;
-}
-
-
-//-------------------------------------------------
-// set_readwrite_port - set up a handler for
-// reading and writing an I/O port
-//-------------------------------------------------
-
-void address_map_entry::set_readwrite_port(device_t &device, const char *tag)
-{
- m_read.m_type = AMH_PORT;
- m_read.m_tag = tag;
- m_read.m_devbase = &device;
- m_write.m_type = AMH_PORT;
- m_write.m_tag = tag;
- m_write.m_devbase = &device;
-}
-
-
-//-------------------------------------------------
-// set_read_bank - set up a handler for reading
-// from a memory bank
-//-------------------------------------------------
-
-void address_map_entry::set_read_bank(device_t &device, const char *tag)
-{
- m_read.m_type = AMH_BANK;
- m_read.m_tag = tag;
- m_read.m_devbase = &device;
-}
-
-
-//-------------------------------------------------
-// set_write_bank - set up a handler for writing
-// to a memory bank
-//-------------------------------------------------
-
-void address_map_entry::set_write_bank(device_t &device, const char *tag)
-{
- m_write.m_type = AMH_BANK;
- m_write.m_tag = tag;
- m_write.m_devbase = &device;
-}
-
-
-//-------------------------------------------------
-// set_readwrite_bank - set up a handler for
-// reading and writing to a memory bank
-//-------------------------------------------------
-
-void address_map_entry::set_readwrite_bank(device_t &device, const char *tag)
-{
- m_read.m_type = AMH_BANK;
- m_read.m_tag = tag;
- m_read.m_devbase = &device;
- m_write.m_type = AMH_BANK;
- m_write.m_tag = tag;
- m_write.m_devbase = &device;
-}
-
-
-//-------------------------------------------------
// set_submap - set up a handler for
// retrieve a submap from a device
//-------------------------------------------------
-void address_map_entry::set_submap(device_t &device, const char *tag, address_map_delegate func, int bits, UINT64 mask)
+void address_map_entry::set_submap(const char *tag, address_map_delegate func, int bits, UINT64 mask)
{
if(!bits)
bits = m_map.m_databits;
@@ -149,11 +65,9 @@ void address_map_entry::set_submap(device_t &device, const char *tag, address_ma
m_read.m_type = AMH_DEVICE_SUBMAP;
m_read.m_tag = tag;
- m_read.m_devbase = &device;
m_read.m_mask = mask;
m_write.m_type = AMH_DEVICE_SUBMAP;
m_write.m_tag = tag;
- m_write.m_devbase = &device;
m_write.m_mask = mask;
m_submap_delegate = func;
m_submap_bits = bits;
@@ -165,7 +79,7 @@ void address_map_entry::set_submap(device_t &device, const char *tag, address_ma
// 8-bit read/write handlers
//-------------------------------------------------
-void address_map_entry::internal_set_handler(device_t &device, read8_delegate func, UINT64 unitmask)
+void address_map_entry::internal_set_handler(read8_delegate func, UINT64 unitmask)
{
assert(!func.isnull());
assert(unitmask_is_appropriate(8, unitmask, func.name()));
@@ -173,12 +87,11 @@ void address_map_entry::internal_set_handler(device_t &device, read8_delegate fu
m_read.m_bits = 8;
m_read.m_mask = unitmask;
m_read.m_name = func.name();
- m_read.m_devbase = &device;
m_rproto8 = func;
}
-void address_map_entry::internal_set_handler(device_t &device, write8_delegate func, UINT64 unitmask)
+void address_map_entry::internal_set_handler(write8_delegate func, UINT64 unitmask)
{
assert(!func.isnull());
assert(unitmask_is_appropriate(8, unitmask, func.name()));
@@ -186,15 +99,14 @@ void address_map_entry::internal_set_handler(device_t &device, write8_delegate f
m_write.m_bits = 8;
m_write.m_mask = unitmask;
m_write.m_name = func.name();
- m_write.m_devbase = &device;
m_wproto8 = func;
}
-void address_map_entry::internal_set_handler(device_t &device, read8_delegate rfunc, write8_delegate wfunc, UINT64 unitmask)
+void address_map_entry::internal_set_handler(read8_delegate rfunc, write8_delegate wfunc, UINT64 unitmask)
{
- internal_set_handler(device, rfunc, unitmask);
- internal_set_handler(device, wfunc, unitmask);
+ internal_set_handler(rfunc, unitmask);
+ internal_set_handler(wfunc, unitmask);
}
@@ -203,7 +115,7 @@ void address_map_entry::internal_set_handler(device_t &device, read8_delegate rf
// 16-bit read/write handlers
//-------------------------------------------------
-void address_map_entry::internal_set_handler(device_t &device, read16_delegate func, UINT64 unitmask)
+void address_map_entry::internal_set_handler(read16_delegate func, UINT64 unitmask)
{
assert(!func.isnull());
assert(unitmask_is_appropriate(16, unitmask, func.name()));
@@ -211,12 +123,11 @@ void address_map_entry::internal_set_handler(device_t &device, read16_delegate f
m_read.m_bits = 16;
m_read.m_mask = unitmask;
m_read.m_name = func.name();
- m_read.m_devbase = &device;
m_rproto16 = func;
}
-void address_map_entry::internal_set_handler(device_t &device, write16_delegate func, UINT64 unitmask)
+void address_map_entry::internal_set_handler(write16_delegate func, UINT64 unitmask)
{
assert(!func.isnull());
assert(unitmask_is_appropriate(16, unitmask, func.name()));
@@ -224,15 +135,14 @@ void address_map_entry::internal_set_handler(device_t &device, write16_delegate
m_write.m_bits = 16;
m_write.m_mask = unitmask;
m_write.m_name = func.name();
- m_write.m_devbase = &device;
m_wproto16 = func;
}
-void address_map_entry::internal_set_handler(device_t &device, read16_delegate rfunc, write16_delegate wfunc, UINT64 unitmask)
+void address_map_entry::internal_set_handler(read16_delegate rfunc, write16_delegate wfunc, UINT64 unitmask)
{
- internal_set_handler(device, rfunc, unitmask);
- internal_set_handler(device, wfunc, unitmask);
+ internal_set_handler(rfunc, unitmask);
+ internal_set_handler(wfunc, unitmask);
}
@@ -241,7 +151,7 @@ void address_map_entry::internal_set_handler(device_t &device, read16_delegate r
// 32-bit read/write handlers
//-------------------------------------------------
-void address_map_entry::internal_set_handler(device_t &device, read32_delegate func, UINT64 unitmask)
+void address_map_entry::internal_set_handler(read32_delegate func, UINT64 unitmask)
{
assert(!func.isnull());
assert(unitmask_is_appropriate(32, unitmask, func.name()));
@@ -249,12 +159,11 @@ void address_map_entry::internal_set_handler(device_t &device, read32_delegate f
m_read.m_bits = 32;
m_read.m_mask = unitmask;
m_read.m_name = func.name();
- m_read.m_devbase = &device;
m_rproto32 = func;
}
-void address_map_entry::internal_set_handler(device_t &device, write32_delegate func, UINT64 unitmask)
+void address_map_entry::internal_set_handler(write32_delegate func, UINT64 unitmask)
{
assert(!func.isnull());
assert(unitmask_is_appropriate(32, unitmask, func.name()));
@@ -262,15 +171,14 @@ void address_map_entry::internal_set_handler(device_t &device, write32_delegate
m_write.m_bits = 32;
m_write.m_mask = unitmask;
m_write.m_name = func.name();
- m_write.m_devbase = &device;
m_wproto32 = func;
}
-void address_map_entry::internal_set_handler(device_t &device, read32_delegate rfunc, write32_delegate wfunc, UINT64 unitmask)
+void address_map_entry::internal_set_handler(read32_delegate rfunc, write32_delegate wfunc, UINT64 unitmask)
{
- internal_set_handler(device, rfunc, unitmask);
- internal_set_handler(device, wfunc, unitmask);
+ internal_set_handler(rfunc, unitmask);
+ internal_set_handler(wfunc, unitmask);
}
@@ -279,7 +187,7 @@ void address_map_entry::internal_set_handler(device_t &device, read32_delegate r
// 64-bit read/write handlers
//-------------------------------------------------
-void address_map_entry::internal_set_handler(device_t &device, read64_delegate func, UINT64 unitmask)
+void address_map_entry::internal_set_handler(read64_delegate func, UINT64 unitmask)
{
assert(!func.isnull());
assert(unitmask_is_appropriate(64, unitmask, func.name()));
@@ -287,12 +195,11 @@ void address_map_entry::internal_set_handler(device_t &device, read64_delegate f
m_read.m_bits = 64;
m_read.m_mask = 0;
m_read.m_name = func.name();
- m_read.m_devbase = &device;
m_rproto64 = func;
}
-void address_map_entry::internal_set_handler(device_t &device, write64_delegate func, UINT64 unitmask)
+void address_map_entry::internal_set_handler(write64_delegate func, UINT64 unitmask)
{
assert(!func.isnull());
assert(unitmask_is_appropriate(64, unitmask, func.name()));
@@ -300,15 +207,14 @@ void address_map_entry::internal_set_handler(device_t &device, write64_delegate
m_write.m_bits = 64;
m_write.m_mask = 0;
m_write.m_name = func.name();
- m_write.m_devbase = &device;
m_wproto64 = func;
}
-void address_map_entry::internal_set_handler(device_t &device, read64_delegate rfunc, write64_delegate wfunc, UINT64 unitmask)
+void address_map_entry::internal_set_handler(read64_delegate rfunc, write64_delegate wfunc, UINT64 unitmask)
{
- internal_set_handler(device, rfunc, unitmask);
- internal_set_handler(device, wfunc, unitmask);
+ internal_set_handler(rfunc, unitmask);
+ internal_set_handler(wfunc, unitmask);
}
@@ -316,14 +222,13 @@ void address_map_entry::internal_set_handler(device_t &device, read64_delegate r
// set_handler - handler setter for setoffset
//-------------------------------------------------
-void address_map_entry::set_handler(device_t &device, setoffset_delegate func)
+void address_map_entry::set_handler(setoffset_delegate func)
{
assert(!func.isnull());
m_setoffsethd.m_type = AMH_DEVICE_DELEGATE;
m_setoffsethd.m_bits = 0;
m_setoffsethd.m_mask = 0;
m_setoffsethd.m_name = func.name();
- m_setoffsethd.m_devbase = &device;
m_soproto = func;
}
@@ -368,8 +273,8 @@ bool address_map_entry::unitmask_is_appropriate(UINT8 width, UINT64 unitmask, co
// address_map_entry8 - constructor
//-------------------------------------------------
-address_map_entry8::address_map_entry8(address_map &map, offs_t start, offs_t end)
- : address_map_entry(map, start, end)
+address_map_entry8::address_map_entry8(device_t &device, address_map &map, offs_t start, offs_t end)
+ : address_map_entry(device, map, start, end)
{
}
@@ -378,8 +283,8 @@ address_map_entry8::address_map_entry8(address_map &map, offs_t start, offs_t en
// address_map_entry16 - constructor
//-------------------------------------------------
-address_map_entry16::address_map_entry16(address_map &map, offs_t start, offs_t end)
- : address_map_entry(map, start, end)
+address_map_entry16::address_map_entry16(device_t &device, address_map &map, offs_t start, offs_t end)
+ : address_map_entry(device, map, start, end)
{
}
@@ -388,8 +293,8 @@ address_map_entry16::address_map_entry16(address_map &map, offs_t start, offs_t
// address_map_entry32 - constructor
//-------------------------------------------------
-address_map_entry32::address_map_entry32(address_map &map, offs_t start, offs_t end)
- : address_map_entry(map, start, end)
+address_map_entry32::address_map_entry32(device_t &device, address_map &map, offs_t start, offs_t end)
+ : address_map_entry(device, map, start, end)
{
}
@@ -398,8 +303,8 @@ address_map_entry32::address_map_entry32(address_map &map, offs_t start, offs_t
// address_map_entry64 - constructor
//-------------------------------------------------
-address_map_entry64::address_map_entry64(address_map &map, offs_t start, offs_t end)
- : address_map_entry(map, start, end)
+address_map_entry64::address_map_entry64(device_t &device, address_map &map, offs_t start, offs_t end)
+ : address_map_entry(device, map, start, end)
{
}
@@ -478,21 +383,21 @@ address_map::address_map(const address_space &space, offs_t start, offs_t end, i
address_map_entry *e;
switch(m_databits) {
case 8:
- e = add(start, end, (address_map_entry8 *)NULL);
+ e = add(device, start, end, (address_map_entry8 *)NULL);
break;
case 16:
- e = add(start, end, (address_map_entry16 *)NULL);
+ e = add(device, start, end, (address_map_entry16 *)NULL);
break;
case 32:
- e = add(start, end, (address_map_entry32 *)NULL);
+ e = add(device, start, end, (address_map_entry32 *)NULL);
break;
case 64:
- e = add(start, end, (address_map_entry64 *)NULL);
+ e = add(device, start, end, (address_map_entry64 *)NULL);
break;
default:
throw emu_fatalerror("Trying to dynamically map a device on a space with a corrupt databits width");
}
- e->set_submap(device, DEVICE_SELF, submap_delegate, bits, unitmask);
+ e->set_submap(DEVICE_SELF, submap_delegate, bits, unitmask);
}
@@ -539,33 +444,33 @@ void address_map::set_global_mask(offs_t mask)
// add - add a new entry of the appropriate type
//-------------------------------------------------
-address_map_entry8 *address_map::add(offs_t start, offs_t end, address_map_entry8 *ptr)
+address_map_entry8 *address_map::add(device_t &device, offs_t start, offs_t end, address_map_entry8 *ptr)
{
- ptr = global_alloc(address_map_entry8(*this, start, end));
+ ptr = global_alloc(address_map_entry8(device, *this, start, end));
m_entrylist.append(*ptr);
return ptr;
}
-address_map_entry16 *address_map::add(offs_t start, offs_t end, address_map_entry16 *ptr)
+address_map_entry16 *address_map::add(device_t &device, offs_t start, offs_t end, address_map_entry16 *ptr)
{
- ptr = global_alloc(address_map_entry16(*this, start, end));
+ ptr = global_alloc(address_map_entry16(device, *this, start, end));
m_entrylist.append(*ptr);
return ptr;
}
-address_map_entry32 *address_map::add(offs_t start, offs_t end, address_map_entry32 *ptr)
+address_map_entry32 *address_map::add(device_t &device, offs_t start, offs_t end, address_map_entry32 *ptr)
{
- ptr = global_alloc(address_map_entry32(*this, start, end));
+ ptr = global_alloc(address_map_entry32(device, *this, start, end));
m_entrylist.append(*ptr);
return ptr;
}
-address_map_entry64 *address_map::add(offs_t start, offs_t end, address_map_entry64 *ptr)
+address_map_entry64 *address_map::add(device_t &device, offs_t start, offs_t end, address_map_entry64 *ptr)
{
- ptr = global_alloc(address_map_entry64(*this, start, end));
+ ptr = global_alloc(address_map_entry64(device, *this, start, end));
m_entrylist.append(*ptr);
return ptr;
}
diff --git a/src/emu/addrmap.h b/src/emu/addrmap.h
index f5b34456698..97e92cd309f 100644
--- a/src/emu/addrmap.h
+++ b/src/emu/addrmap.h
@@ -52,14 +52,12 @@ public:
m_bits(0),
m_mask(0),
m_name(NULL),
- m_devbase(NULL),
m_tag(NULL) { }
map_handler_type m_type; // type of the handler
UINT8 m_bits; // width of the handler in bits, or 0 for default
UINT64 m_mask; // mask for which lanes apply
const char * m_name; // name of the handler
- device_t * m_devbase; // pointer to "base" device
const char * m_tag; // tag for I/O ports and banks
};
@@ -72,7 +70,7 @@ class address_map_entry
{
public:
// construction/destruction
- address_map_entry(address_map &map, offs_t start, offs_t end);
+ address_map_entry(device_t &device, address_map &map, offs_t start, offs_t end);
// getters
address_map_entry *next() const { return m_next; }
@@ -82,31 +80,31 @@ public:
void set_read_type(map_handler_type _type) { m_read.m_type = _type; }
void set_write_type(map_handler_type _type) { m_write.m_type = _type; }
void set_region(const char *tag, offs_t offset) { m_region = tag; m_rgnoffs = offset; }
- void set_share(device_t &device, const char *tag) { assert(m_sharetag == NULL); m_sharebase = &device; m_sharetag = tag; }
+ void set_share(const char *tag) { m_share = tag; }
// mask setting
void set_mask(offs_t _mask);
// I/O port configuration
- void set_read_port(device_t &device, const char *tag);
- void set_write_port(device_t &device, const char *tag);
- void set_readwrite_port(device_t &device, const char *tag);
+ void set_read_port(const char *tag) { m_read.m_type = AMH_PORT; m_read.m_tag = tag; }
+ void set_write_port(const char *tag) { m_write.m_type = AMH_PORT; m_write.m_tag = tag; }
+ void set_readwrite_port(const char *tag) { set_read_port(tag); set_write_port(tag); }
// memory bank configuration
- void set_read_bank(device_t &device, const char *tag);
- void set_write_bank(device_t &device, const char *tag);
- void set_readwrite_bank(device_t &device, const char *tag);
+ void set_read_bank(const char *tag) { m_read.m_type = AMH_BANK; m_read.m_tag = tag; }
+ void set_write_bank(const char *tag) { m_write.m_type = AMH_BANK; m_write.m_tag = tag; }
+ void set_readwrite_bank(const char *tag) { set_read_bank(tag); set_write_bank(tag); }
// set offset handler (only one version, since there is no data width to consider)
- void set_handler(device_t &device, setoffset_delegate func);
+ void set_handler(setoffset_delegate func);
// submap referencing
- void set_submap(device_t &device, const char *tag, address_map_delegate func, int bits, UINT64 mask);
+ void set_submap(const char *tag, address_map_delegate func, int bits, UINT64 mask);
// public state
address_map_entry * m_next; // pointer to the next entry
address_map & m_map; // reference to our owning map
- astring m_region_string; // string used to hold derived names
+ device_t & m_devbase; // reference to "base" device for tag lookups
// basic information
offs_t m_addrstart; // start address
@@ -116,8 +114,7 @@ public:
map_handler_data m_read; // data for read handler
map_handler_data m_write; // data for write handler
map_handler_data m_setoffsethd; // data for setoffset handler
- device_t * m_sharebase; // pointer to the base device for the share tag
- const char * m_sharetag; // tag of a shared memory block
+ const char * m_share; // tag of a shared memory block
const char * m_region; // tag of region containing the memory backing this entry
offs_t m_rgnoffs; // offset within the region
@@ -131,7 +128,7 @@ public:
write32_delegate m_wproto32; // 32-bit write proto-delegate
write64_delegate m_wproto64; // 64-bit write proto-delegate
- setoffset_delegate m_soproto; // set offset proto-delegate
+ setoffset_delegate m_soproto; // set offset proto-delegate
address_map_delegate m_submap_delegate;
int m_submap_bits;
@@ -144,24 +141,24 @@ public:
protected:
// internal handler setters for 8-bit functions
- void internal_set_handler(device_t &device, read8_delegate func, UINT64 mask);
- void internal_set_handler(device_t &device, write8_delegate func, UINT64 mask);
- void internal_set_handler(device_t &device, read8_delegate rfunc, write8_delegate wfunc, UINT64 mask);
+ void internal_set_handler(read8_delegate func, UINT64 mask);
+ void internal_set_handler(write8_delegate func, UINT64 mask);
+ void internal_set_handler(read8_delegate rfunc, write8_delegate wfunc, UINT64 mask);
// internal handler setters for 16-bit functions
- void internal_set_handler(device_t &device, read16_delegate func, UINT64 mask);
- void internal_set_handler(device_t &device, write16_delegate func, UINT64 mask);
- void internal_set_handler(device_t &device, read16_delegate rfunc, write16_delegate wfunc, UINT64 mask);
+ void internal_set_handler(read16_delegate func, UINT64 mask);
+ void internal_set_handler(write16_delegate func, UINT64 mask);
+ void internal_set_handler(read16_delegate rfunc, write16_delegate wfunc, UINT64 mask);
// internal handler setters for 32-bit functions
- void internal_set_handler(device_t &device, read32_delegate func, UINT64 mask);
- void internal_set_handler(device_t &device, write32_delegate func, UINT64 mask);
- void internal_set_handler(device_t &device, read32_delegate rfunc, write32_delegate wfunc, UINT64 mask);
+ void internal_set_handler(read32_delegate func, UINT64 mask);
+ void internal_set_handler(write32_delegate func, UINT64 mask);
+ void internal_set_handler(read32_delegate rfunc, write32_delegate wfunc, UINT64 mask);
// internal handler setters for 64-bit functions
- void internal_set_handler(device_t &device, read64_delegate func, UINT64 mask);
- void internal_set_handler(device_t &device, write64_delegate func, UINT64 mask);
- void internal_set_handler(device_t &device, read64_delegate rfunc, write64_delegate wfunc, UINT64 mask);
+ void internal_set_handler(read64_delegate func, UINT64 mask);
+ void internal_set_handler(write64_delegate func, UINT64 mask);
+ void internal_set_handler(read64_delegate rfunc, write64_delegate wfunc, UINT64 mask);
private:
// helper functions
@@ -175,12 +172,12 @@ private:
class address_map_entry8 : public address_map_entry
{
public:
- address_map_entry8(address_map &map, offs_t start, offs_t end);
+ address_map_entry8(device_t &device, address_map &map, offs_t start, offs_t end);
// native-size handlers
- void set_handler(device_t &device, read8_delegate func) { internal_set_handler(device, func, 0); }
- void set_handler(device_t &device, write8_delegate func) { internal_set_handler(device, func, 0); }
- void set_handler(device_t &device, read8_delegate rfunc, write8_delegate wfunc) { internal_set_handler(device, rfunc, wfunc, 0); }
+ void set_handler(read8_delegate func) { internal_set_handler(func, 0); }
+ void set_handler(write8_delegate func) { internal_set_handler(func, 0); }
+ void set_handler(read8_delegate rfunc, write8_delegate wfunc) { internal_set_handler(rfunc, wfunc, 0); }
};
@@ -190,17 +187,17 @@ public:
class address_map_entry16 : public address_map_entry
{
public:
- address_map_entry16(address_map &map, offs_t start, offs_t end);
+ address_map_entry16(device_t &device, address_map &map, offs_t start, offs_t end);
// native-size handlers
- void set_handler(device_t &device, read16_delegate func) { internal_set_handler(device, func, 0); }
- void set_handler(device_t &device, write16_delegate func) { internal_set_handler(device, func, 0); }
- void set_handler(device_t &device, read16_delegate rfunc, write16_delegate wfunc) { internal_set_handler(device, rfunc, wfunc, 0); }
+ void set_handler(read16_delegate func) { internal_set_handler(func, 0); }
+ void set_handler(write16_delegate func) { internal_set_handler(func, 0); }
+ void set_handler(read16_delegate rfunc, write16_delegate wfunc) { internal_set_handler(rfunc, wfunc, 0); }
// 8-bit handlers
- void set_handler(device_t &device, read8_delegate func, UINT16 mask) { internal_set_handler(device, func, mask); }
- void set_handler(device_t &device, write8_delegate func, UINT16 mask) { internal_set_handler(device, func, mask); }
- void set_handler(device_t &device, read8_delegate rfunc, write8_delegate wfunc, UINT16 mask) { internal_set_handler(device, rfunc, wfunc, mask); }
+ void set_handler(read8_delegate func, UINT16 mask) { internal_set_handler(func, mask); }
+ void set_handler(write8_delegate func, UINT16 mask) { internal_set_handler(func, mask); }
+ void set_handler(read8_delegate rfunc, write8_delegate wfunc, UINT16 mask) { internal_set_handler(rfunc, wfunc, mask); }
};
@@ -210,22 +207,22 @@ public:
class address_map_entry32 : public address_map_entry
{
public:
- address_map_entry32(address_map &map, offs_t start, offs_t end);
+ address_map_entry32(device_t &device, address_map &map, offs_t start, offs_t end);
// native-size handlers
- void set_handler(device_t &device, read32_delegate func) { internal_set_handler(device, func, 0); }
- void set_handler(device_t &device, write32_delegate func) { internal_set_handler(device, func, 0); }
- void set_handler(device_t &device, read32_delegate rfunc, write32_delegate wfunc) { internal_set_handler(device, rfunc, wfunc, 0); }
+ void set_handler(read32_delegate func) { internal_set_handler(func, 0); }
+ void set_handler(write32_delegate func) { internal_set_handler(func, 0); }
+ void set_handler(read32_delegate rfunc, write32_delegate wfunc) { internal_set_handler(rfunc, wfunc, 0); }
// 16-bit handlers
- void set_handler(device_t &device, read16_delegate func, UINT32 mask) { internal_set_handler(device, func, mask); }
- void set_handler(device_t &device, write16_delegate func, UINT32 mask) { internal_set_handler(device, func, mask); }
- void set_handler(device_t &device, read16_delegate rfunc, write16_delegate wfunc, UINT32 mask) { internal_set_handler(device, rfunc, wfunc, mask); }
+ void set_handler(read16_delegate func, UINT32 mask) { internal_set_handler(func, mask); }
+ void set_handler(write16_delegate func, UINT32 mask) { internal_set_handler(func, mask); }
+ void set_handler(read16_delegate rfunc, write16_delegate wfunc, UINT32 mask) { internal_set_handler(rfunc, wfunc, mask); }
// 8-bit handlers
- void set_handler(device_t &device, read8_delegate func, UINT32 mask) { internal_set_handler(device, func, mask); }
- void set_handler(device_t &device, write8_delegate func, UINT32 mask) { internal_set_handler(device, func, mask); }
- void set_handler(device_t &device, read8_delegate rfunc, write8_delegate wfunc, UINT32 mask) { internal_set_handler(device, rfunc, wfunc, mask); }
+ void set_handler(read8_delegate func, UINT32 mask) { internal_set_handler(func, mask); }
+ void set_handler(write8_delegate func, UINT32 mask) { internal_set_handler(func, mask); }
+ void set_handler(read8_delegate rfunc, write8_delegate wfunc, UINT32 mask) { internal_set_handler(rfunc, wfunc, mask); }
};
@@ -235,27 +232,27 @@ public:
class address_map_entry64 : public address_map_entry
{
public:
- address_map_entry64(address_map &map, offs_t start, offs_t end);
+ address_map_entry64(device_t &device, address_map &map, offs_t start, offs_t end);
// native-size handlers
- void set_handler(device_t &device, read64_delegate func) { internal_set_handler(device, func, 0); }
- void set_handler(device_t &device, write64_delegate func) { internal_set_handler(device, func, 0); }
- void set_handler(device_t &device, read64_delegate rfunc, write64_delegate wfunc) { internal_set_handler(device, rfunc, wfunc, 0); }
+ void set_handler(read64_delegate func) { internal_set_handler(func, 0); }
+ void set_handler(write64_delegate func) { internal_set_handler(func, 0); }
+ void set_handler(read64_delegate rfunc, write64_delegate wfunc) { internal_set_handler(rfunc, wfunc, 0); }
// 32-bit handlers
- void set_handler(device_t &device, read32_delegate func, UINT64 mask) { internal_set_handler(device, func, mask); }
- void set_handler(device_t &device, write32_delegate func, UINT64 mask) { internal_set_handler(device, func, mask); }
- void set_handler(device_t &device, read32_delegate rfunc, write32_delegate wfunc, UINT64 mask) { internal_set_handler(device, rfunc, wfunc, mask); }
+ void set_handler(read32_delegate func, UINT64 mask) { internal_set_handler(func, mask); }
+ void set_handler(write32_delegate func, UINT64 mask) { internal_set_handler(func, mask); }
+ void set_handler(read32_delegate rfunc, write32_delegate wfunc, UINT64 mask) { internal_set_handler(rfunc, wfunc, mask); }
// 16-bit handlers
- void set_handler(device_t &device, read16_delegate func, UINT64 mask) { internal_set_handler(device, func, mask); }
- void set_handler(device_t &device, write16_delegate func, UINT64 mask) { internal_set_handler(device, func, mask); }
- void set_handler(device_t &device, read16_delegate rfunc, write16_delegate wfunc, UINT64 mask) { internal_set_handler(device, rfunc, wfunc, mask); }
+ void set_handler(read16_delegate func, UINT64 mask) { internal_set_handler(func, mask); }
+ void set_handler(write16_delegate func, UINT64 mask) { internal_set_handler(func, mask); }
+ void set_handler(read16_delegate rfunc, write16_delegate wfunc, UINT64 mask) { internal_set_handler(rfunc, wfunc, mask); }
// 8-bit handlers
- void set_handler(device_t &device, read8_delegate func, UINT64 mask) { internal_set_handler(device, func, mask); }
- void set_handler(device_t &device, write8_delegate func, UINT64 mask) { internal_set_handler(device, func, mask); }
- void set_handler(device_t &device, read8_delegate rfunc, write8_delegate wfunc, UINT64 mask) { internal_set_handler(device, rfunc, wfunc, mask); }
+ void set_handler(read8_delegate func, UINT64 mask) { internal_set_handler(func, mask); }
+ void set_handler(write8_delegate func, UINT64 mask) { internal_set_handler(func, mask); }
+ void set_handler(read8_delegate rfunc, write8_delegate wfunc, UINT64 mask) { internal_set_handler(rfunc, wfunc, mask); }
};
@@ -279,10 +276,10 @@ public:
void set_unmap_value(UINT8 value) { m_unmapval = value; }
// add a new entry of the given type
- address_map_entry8 *add(offs_t start, offs_t end, address_map_entry8 *ptr);
- address_map_entry16 *add(offs_t start, offs_t end, address_map_entry16 *ptr);
- address_map_entry32 *add(offs_t start, offs_t end, address_map_entry32 *ptr);
- address_map_entry64 *add(offs_t start, offs_t end, address_map_entry64 *ptr);
+ address_map_entry8 *add(device_t &device, offs_t start, offs_t end, address_map_entry8 *ptr);
+ address_map_entry16 *add(device_t &device, offs_t start, offs_t end, address_map_entry16 *ptr);
+ address_map_entry32 *add(device_t &device, offs_t start, offs_t end, address_map_entry32 *ptr);
+ address_map_entry64 *add(device_t &device, offs_t start, offs_t end, address_map_entry64 *ptr);
// public data
address_spacenum m_spacenum; // space number of the map
@@ -353,7 +350,7 @@ void _class :: _name(::address_map &map, device_t &device) \
// address ranges
#define AM_RANGE(_start, _end) \
- curentry = map.add(_start, _end, curentry);
+ curentry = map.add(device, _start, _end, curentry);
#define AM_MASK(_mask) \
curentry->set_mask(_mask);
#define AM_MIRROR(_mirror) \
@@ -361,83 +358,83 @@ void _class :: _name(::address_map &map, device_t &device) \
// driver data reads
#define AM_READ(_handler) \
- curentry->set_handler(device, read_delegate(&drivdata_class::_handler, "driver_data::" #_handler, DEVICE_SELF, (drivdata_class *)0));
+ curentry->set_handler(read_delegate(&drivdata_class::_handler, "driver_data::" #_handler, DEVICE_SELF, (drivdata_class *)0));
#define AM_READ8(_handler, _unitmask) \
- curentry->set_handler(device, read8_delegate(&drivdata_class::_handler, "driver_data::" #_handler, DEVICE_SELF, (drivdata_class *)0), _unitmask);
+ curentry->set_handler(read8_delegate(&drivdata_class::_handler, "driver_data::" #_handler, DEVICE_SELF, (drivdata_class *)0), _unitmask);
#define AM_READ16(_handler, _unitmask) \
- curentry->set_handler(device, read16_delegate(&drivdata_class::_handler, "driver_data::" #_handler, DEVICE_SELF, (drivdata_class *)0), _unitmask);
+ curentry->set_handler(read16_delegate(&drivdata_class::_handler, "driver_data::" #_handler, DEVICE_SELF, (drivdata_class *)0), _unitmask);
#define AM_READ32(_handler, _unitmask) \
- curentry->set_handler(device, read32_delegate(&drivdata_class::_handler, "driver_data::" #_handler, DEVICE_SELF, (drivdata_class *)0), _unitmask);
+ curentry->set_handler(read32_delegate(&drivdata_class::_handler, "driver_data::" #_handler, DEVICE_SELF, (drivdata_class *)0), _unitmask);
// driver data writes
#define AM_WRITE(_handler) \
- curentry->set_handler(device, write_delegate(&drivdata_class::_handler, "driver_data::" #_handler, DEVICE_SELF, (drivdata_class *)0));
+ curentry->set_handler(write_delegate(&drivdata_class::_handler, "driver_data::" #_handler, DEVICE_SELF, (drivdata_class *)0));
#define AM_WRITE8(_handler, _unitmask) \
- curentry->set_handler(device, write8_delegate(&drivdata_class::_handler, "driver_data::" #_handler, DEVICE_SELF, (drivdata_class *)0), _unitmask);
+ curentry->set_handler(write8_delegate(&drivdata_class::_handler, "driver_data::" #_handler, DEVICE_SELF, (drivdata_class *)0), _unitmask);
#define AM_WRITE16(_handler, _unitmask) \
- curentry->set_handler(device, write16_delegate(&drivdata_class::_handler, "driver_data::" #_handler, DEVICE_SELF, (drivdata_class *)0), _unitmask);
+ curentry->set_handler(write16_delegate(&drivdata_class::_handler, "driver_data::" #_handler, DEVICE_SELF, (drivdata_class *)0), _unitmask);
#define AM_WRITE32(_handler, _unitmask) \
- curentry->set_handler(device, write32_delegate(&drivdata_class::_handler, "driver_data::" #_handler, DEVICE_SELF, (drivdata_class *)0), _unitmask);
+ curentry->set_handler(write32_delegate(&drivdata_class::_handler, "driver_data::" #_handler, DEVICE_SELF, (drivdata_class *)0), _unitmask);
// driver data reads/writes
#define AM_READWRITE(_rhandler, _whandler) \
- curentry->set_handler(device, read_delegate(&drivdata_class::_rhandler, "driver_data::" #_rhandler, DEVICE_SELF, (drivdata_class *)0), write_delegate(&drivdata_class::_whandler, "driver_data::" #_whandler, DEVICE_SELF, (drivdata_class *)0));
+ curentry->set_handler(read_delegate(&drivdata_class::_rhandler, "driver_data::" #_rhandler, DEVICE_SELF, (drivdata_class *)0), write_delegate(&drivdata_class::_whandler, "driver_data::" #_whandler, DEVICE_SELF, (drivdata_class *)0));
#define AM_READWRITE8(_rhandler, _whandler, _unitmask) \
- curentry->set_handler(device, read8_delegate(&drivdata_class::_rhandler, "driver_data::" #_rhandler, DEVICE_SELF, (drivdata_class *)0), write8_delegate(&drivdata_class::_whandler, "driver_data::" #_whandler, DEVICE_SELF, (drivdata_class *)0), _unitmask);
+ curentry->set_handler(read8_delegate(&drivdata_class::_rhandler, "driver_data::" #_rhandler, DEVICE_SELF, (drivdata_class *)0), write8_delegate(&drivdata_class::_whandler, "driver_data::" #_whandler, DEVICE_SELF, (drivdata_class *)0), _unitmask);
#define AM_READWRITE16(_rhandler, _whandler, _unitmask) \
- curentry->set_handler(device, read16_delegate(&drivdata_class::_rhandler, "driver_data::" #_rhandler, DEVICE_SELF, (drivdata_class *)0), write16_delegate(&drivdata_class::_whandler, "driver_data::" #_whandler, DEVICE_SELF, (drivdata_class *)0), _unitmask);
+ curentry->set_handler(read16_delegate(&drivdata_class::_rhandler, "driver_data::" #_rhandler, DEVICE_SELF, (drivdata_class *)0), write16_delegate(&drivdata_class::_whandler, "driver_data::" #_whandler, DEVICE_SELF, (drivdata_class *)0), _unitmask);
#define AM_READWRITE32(_rhandler, _whandler, _unitmask) \
- curentry->set_handler(device, read32_delegate(&drivdata_class::_rhandler, "driver_data::" #_rhandler, DEVICE_SELF, (drivdata_class *)0), write32_delegate(&drivdata_class::_whandler, "driver_data::" #_whandler, DEVICE_SELF, (drivdata_class *)0), _unitmask);
+ curentry->set_handler(read32_delegate(&drivdata_class::_rhandler, "driver_data::" #_rhandler, DEVICE_SELF, (drivdata_class *)0), write32_delegate(&drivdata_class::_whandler, "driver_data::" #_whandler, DEVICE_SELF, (drivdata_class *)0), _unitmask);
// driver set offset. Upcast to base class because there are no data width variants,
// and the compiler complains if we don't do it explicitly
#define AM_SETOFFSET(_handler) \
- ((address_map_entry*)curentry)->set_handler(device, setoffset_delegate(&drivdata_class::_handler, "driver_data::" #_handler, DEVICE_SELF, (drivdata_class *)0));
+ ((address_map_entry*)curentry)->set_handler(setoffset_delegate(&drivdata_class::_handler, "driver_data::" #_handler, DEVICE_SELF, (drivdata_class *)0));
// device reads
#define AM_DEVREAD(_tag, _class, _handler) \
- curentry->set_handler(device, read_delegate(&_class::_handler, #_class "::" #_handler, _tag, (_class *)0));
+ curentry->set_handler(read_delegate(&_class::_handler, #_class "::" #_handler, _tag, (_class *)0));
#define AM_DEVREAD8(_tag, _class, _handler, _unitmask) \
- curentry->set_handler(device, read8_delegate(&_class::_handler, #_class "::" #_handler, _tag, (_class *)0), _unitmask);
+ curentry->set_handler(read8_delegate(&_class::_handler, #_class "::" #_handler, _tag, (_class *)0), _unitmask);
#define AM_DEVREAD16(_tag, _class, _handler, _unitmask) \
- curentry->set_handler(device, read16_delegate(&_class::_handler, #_class "::" #_handler, _tag, (_class *)0), _unitmask);
+ curentry->set_handler(read16_delegate(&_class::_handler, #_class "::" #_handler, _tag, (_class *)0), _unitmask);
#define AM_DEVREAD32(_tag, _class, _handler, _unitmask) \
- curentry->set_handler(device, read32_delegate(&_class::_handler, #_class "::" #_handler, _tag, (_class *)0), _unitmask);
+ curentry->set_handler(read32_delegate(&_class::_handler, #_class "::" #_handler, _tag, (_class *)0), _unitmask);
// device writes
#define AM_DEVWRITE(_tag, _class, _handler) \
- curentry->set_handler(device, write_delegate(&_class::_handler, #_class "::" #_handler, _tag, (_class *)0));
+ curentry->set_handler(write_delegate(&_class::_handler, #_class "::" #_handler, _tag, (_class *)0));
#define AM_DEVWRITE8(_tag, _class, _handler, _unitmask) \
- curentry->set_handler(device, write8_delegate(&_class::_handler, #_class "::" #_handler, _tag, (_class *)0), _unitmask);
+ curentry->set_handler(write8_delegate(&_class::_handler, #_class "::" #_handler, _tag, (_class *)0), _unitmask);
#define AM_DEVWRITE16(_tag, _class, _handler, _unitmask) \
- curentry->set_handler(device, write16_delegate(&_class::_handler, #_class "::" #_handler, _tag, (_class *)0), _unitmask);
+ curentry->set_handler(write16_delegate(&_class::_handler, #_class "::" #_handler, _tag, (_class *)0), _unitmask);
#define AM_DEVWRITE32(_tag, _class, _handler, _unitmask) \
- curentry->set_handler(device, write32_delegate(&_class::_handler, #_class "::" #_handler, _tag, (_class *)0), _unitmask);
+ curentry->set_handler(write32_delegate(&_class::_handler, #_class "::" #_handler, _tag, (_class *)0), _unitmask);
// device reads/writes
#define AM_DEVREADWRITE(_tag, _class, _rhandler, _whandler) \
- curentry->set_handler(device, read_delegate(&_class::_rhandler, #_class "::" #_rhandler, _tag, (_class *)0), write_delegate(&_class::_whandler, #_class "::" #_whandler, _tag, (_class *)0));
+ curentry->set_handler(read_delegate(&_class::_rhandler, #_class "::" #_rhandler, _tag, (_class *)0), write_delegate(&_class::_whandler, #_class "::" #_whandler, _tag, (_class *)0));
#define AM_DEVREADWRITE8(_tag, _class, _rhandler, _whandler, _unitmask) \
- curentry->set_handler(device, read8_delegate(&_class::_rhandler, #_class "::" #_rhandler, _tag, (_class *)0), write8_delegate(&_class::_whandler, #_class "::" #_whandler, _tag, (_class *)0), _unitmask);
+ curentry->set_handler(read8_delegate(&_class::_rhandler, #_class "::" #_rhandler, _tag, (_class *)0), write8_delegate(&_class::_whandler, #_class "::" #_whandler, _tag, (_class *)0), _unitmask);
#define AM_DEVREADWRITE16(_tag, _class, _rhandler, _whandler, _unitmask) \
- curentry->set_handler(device, read16_delegate(&_class::_rhandler, #_class "::" #_rhandler, _tag, (_class *)0), write16_delegate(&_class::_whandler, #_class "::" #_whandler, _tag, (_class *)0), _unitmask);
+ curentry->set_handler(read16_delegate(&_class::_rhandler, #_class "::" #_rhandler, _tag, (_class *)0), write16_delegate(&_class::_whandler, #_class "::" #_whandler, _tag, (_class *)0), _unitmask);
#define AM_DEVREADWRITE32(_tag, _class, _rhandler, _whandler, _unitmask) \
- curentry->set_handler(device, read32_delegate(&_class::_rhandler, #_class "::" #_rhandler, _tag, (_class *)0), write32_delegate(&_class::_whandler, #_class "::" #_whandler, _tag, (_class *)0), _unitmask);
+ curentry->set_handler(read32_delegate(&_class::_rhandler, #_class "::" #_rhandler, _tag, (_class *)0), write32_delegate(&_class::_whandler, #_class "::" #_whandler, _tag, (_class *)0), _unitmask);
// device set offset
#define AM_DEVSETOFFSET(_tag, _class, _handler) \
- ((address_map_entry*)curentry)->set_handler(device, setoffset_delegate(&_class::_handler, #_class "::" #_handler, _tag, (_class *)0));
+ ((address_map_entry*)curentry)->set_handler(setoffset_delegate(&_class::_handler, #_class "::" #_handler, _tag, (_class *)0));
// device mapping
#define AM_DEVICE(_tag, _class, _handler) \
- curentry->set_submap(device, _tag, address_map_delegate(&_class::_handler, #_class "::" #_handler, (_class *)0), 0, 0);
+ curentry->set_submap(_tag, address_map_delegate(&_class::_handler, #_class "::" #_handler, (_class *)0), 0, 0);
#define AM_DEVICE8(_tag, _class, _handler, _unitmask) \
- curentry->set_submap(device, _tag, address_map_delegate(&_class::_handler, #_class "::" #_handler, (_class *)0), 8, _unitmask);
+ curentry->set_submap(_tag, address_map_delegate(&_class::_handler, #_class "::" #_handler, (_class *)0), 8, _unitmask);
#define AM_DEVICE16(_tag, _class, _handler, _unitmask) \
- curentry->set_submap(device, _tag, address_map_delegate(&_class::_handler, #_class "::" #_handler, (_class *)0), 16, _unitmask);
+ curentry->set_submap(_tag, address_map_delegate(&_class::_handler, #_class "::" #_handler, (_class *)0), 16, _unitmask);
#define AM_DEVICE32(_tag, _class, _handler, _unitmask) \
- curentry->set_submap(device, _tag, address_map_delegate(&_class::_handler, #_class "::" #_handler, (_class *)0), 32, _unitmask);
+ curentry->set_submap(_tag, address_map_delegate(&_class::_handler, #_class "::" #_handler, (_class *)0), 32, _unitmask);
// special-case accesses
#define AM_ROM \
@@ -466,25 +463,25 @@ void _class :: _name(::address_map &map, device_t &device) \
// port accesses
#define AM_READ_PORT(_tag) \
- curentry->set_read_port(device, _tag);
+ curentry->set_read_port(_tag);
#define AM_WRITE_PORT(_tag) \
- curentry->set_write_port(device, _tag);
+ curentry->set_write_port(_tag);
#define AM_READWRITE_PORT(_tag) \
- curentry->set_readwrite_port(device, _tag);
+ curentry->set_readwrite_port(_tag);
// bank accesses
#define AM_READ_BANK(_tag) \
- curentry->set_read_bank(device, _tag);
+ curentry->set_read_bank(_tag);
#define AM_WRITE_BANK(_tag) \
- curentry->set_write_bank(device, _tag);
+ curentry->set_write_bank(_tag);
#define AM_READWRITE_BANK(_tag) \
- curentry->set_readwrite_bank(device, _tag);
+ curentry->set_readwrite_bank(_tag);
// attributes for accesses
#define AM_REGION(_tag, _offs) \
curentry->set_region(_tag, _offs);
#define AM_SHARE(_tag) \
- curentry->set_share(device, _tag);
+ curentry->set_share(_tag);
// common shortcuts
#define AM_ROMBANK(_bank) AM_READ_BANK(_bank)
diff --git a/src/emu/cpu/m37710/m37710.c b/src/emu/cpu/m37710/m37710.c
index d9baadd6779..c50f09512bc 100644
--- a/src/emu/cpu/m37710/m37710.c
+++ b/src/emu/cpu/m37710/m37710.c
@@ -60,35 +60,66 @@
#define M37710_DEBUG (0) // enables verbose logging for peripherals, etc.
-const device_type M37710 = &device_creator<m37710_cpu_device>;
-const device_type M37702 = &device_creator<m37702_cpu_device>;
+const device_type M37702M2 = &device_creator<m37702m2_device>;
+const device_type M37702S1 = &device_creator<m37702s1_device>;
+const device_type M37710S4 = &device_creator<m37710s4_device>;
-// On-board RAM and peripherals
-static ADDRESS_MAP_START( m37710_internal_map, AS_PROGRAM, 16, m37710_cpu_device )
+// On-board RAM, ROM, and peripherals
+
+// M37702M2: 512 bytes internal RAM, 16K internal mask ROM
+// (M37702E2: same with EPROM instead of mask ROM)
+DEVICE_ADDRESS_MAP_START( map, 16, m37702m2_device )
+ AM_RANGE(0x000000, 0x00007f) AM_READWRITE(m37710_internal_word_r, m37710_internal_word_w)
+ AM_RANGE(0x000080, 0x00027f) AM_RAM
+ AM_RANGE(0x00c000, 0x00ffff) AM_ROM AM_REGION("internal", 0)
+ADDRESS_MAP_END
+
+
+// M37702S1: 512 bytes internal RAM, no internal ROM
+DEVICE_ADDRESS_MAP_START( map, 16, m37702s1_device )
AM_RANGE(0x000000, 0x00007f) AM_READWRITE(m37710_internal_word_r, m37710_internal_word_w)
AM_RANGE(0x000080, 0x00027f) AM_RAM
ADDRESS_MAP_END
-m37710_cpu_device::m37710_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : cpu_device(mconfig, M37710, "M37710", tag, owner, clock, "m37710", __FILE__)
- , m_program_config("program", ENDIANNESS_LITTLE, 16, 24, 0, ADDRESS_MAP_NAME(m37710_internal_map))
+// M37710S4: 2048 bytes internal RAM, no internal ROM
+DEVICE_ADDRESS_MAP_START( map, 16, m37710s4_device )
+ AM_RANGE(0x000000, 0x00007f) AM_READWRITE(m37710_internal_word_r, m37710_internal_word_w)
+ AM_RANGE(0x000080, 0x00087f) AM_RAM
+ADDRESS_MAP_END
+
+// many other combinations of RAM and ROM size exist
+
+
+m37710_cpu_device::m37710_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source, address_map_delegate map_delegate)
+ : cpu_device(mconfig, type, name, tag, owner, clock, shortname, source)
+ , m_program_config("program", ENDIANNESS_LITTLE, 16, 24, 0, map_delegate)
, m_io_config("io", ENDIANNESS_LITTLE, 8, 16, 0)
{
}
-m37710_cpu_device::m37710_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)
- : cpu_device(mconfig, type, name, tag, owner, clock, shortname, source)
- , m_program_config("program", ENDIANNESS_LITTLE, 16, 24, 0, ADDRESS_MAP_NAME(m37710_internal_map))
- , m_io_config("io", ENDIANNESS_LITTLE, 8, 16, 0)
+m37702m2_device::m37702m2_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+ : m37710_cpu_device(mconfig, M37702M2, "M37702M2", tag, owner, clock, "m37702m2", __FILE__, address_map_delegate(FUNC(m37702m2_device::map), this))
+{
+}
+
+
+m37702m2_device::m37702m2_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source)
+ : m37710_cpu_device(mconfig, type, name, tag, owner, clock, shortname, source, address_map_delegate(FUNC(m37702m2_device::map), this))
+{
+}
+
+
+m37702s1_device::m37702s1_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+ : m37710_cpu_device(mconfig, M37702S1, "M37702S1", tag, owner, clock, "m37702s1", __FILE__, address_map_delegate(FUNC(m37702s1_device::map), this))
{
}
-m37702_cpu_device::m37702_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
- : m37710_cpu_device(mconfig, M37702, "M37702", tag, owner, clock, "m37702", __FILE__)
+m37710s4_device::m37710s4_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+ : m37710_cpu_device(mconfig, M37710S4, "M37710S4", tag, owner, clock, "m37710s4", __FILE__, address_map_delegate(FUNC(m37710s4_device::map), this))
{
}
diff --git a/src/emu/cpu/m37710/m37710.h b/src/emu/cpu/m37710/m37710.h
index bcbb6a34315..e2b6e82521a 100644
--- a/src/emu/cpu/m37710/m37710.h
+++ b/src/emu/cpu/m37710/m37710.h
@@ -88,8 +88,7 @@ class m37710_cpu_device : public cpu_device
{
public:
// construction/destruction
- m37710_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
- m37710_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source);
+ m37710_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source, address_map_delegate map_delegate);
DECLARE_READ16_MEMBER( m37710_internal_word_r );
DECLARE_WRITE16_MEMBER( m37710_internal_word_w );
@@ -2005,16 +2004,38 @@ private:
};
-class m37702_cpu_device : public m37710_cpu_device
+class m37702s1_device : public m37710_cpu_device
{
public:
// construction/destruction
- m37702_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ m37702s1_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+protected:
+ DECLARE_ADDRESS_MAP(map, 16);
+};
+
+class m37702m2_device : public m37710_cpu_device
+{
+public:
+ // construction/destruction
+ m37702m2_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ m37702m2_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source);
+protected:
+ DECLARE_ADDRESS_MAP(map, 16);
+};
+
+class m37710s4_device : public m37710_cpu_device
+{
+public:
+ // construction/destruction
+ m37710s4_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+protected:
+ DECLARE_ADDRESS_MAP(map, 16);
};
-extern const device_type M37710;
-extern const device_type M37702;
+extern const device_type M37702M2;
+extern const device_type M37702S1;
+extern const device_type M37710S4;
/* ======================================================================== */
diff --git a/src/emu/cpu/m6502/m5074x.c b/src/emu/cpu/m6502/m5074x.c
index fb82c61a5b0..ed9d02a2174 100644
--- a/src/emu/cpu/m6502/m5074x.c
+++ b/src/emu/cpu/m6502/m5074x.c
@@ -39,7 +39,7 @@ const device_type M50741 = &device_creator<m50741_device>;
//-------------------------------------------------
m5074x_device::m5074x_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, address_map_constructor internal_map, const char *shortname, const char *source) :
m740_device(mconfig, type, name, tag, owner, clock, shortname, source),
- m_program_config("program", ENDIANNESS_LITTLE, 8, 16, 0, internal_map),
+ m_program_config("program", ENDIANNESS_LITTLE, 8, 13, 0, internal_map),
read_p0(*this),
read_p1(*this),
read_p2(*this),
@@ -470,11 +470,10 @@ WRITE8_MEMBER(m5074x_device::tmrirq_w)
/* M50740 - baseline for this familiy */
static ADDRESS_MAP_START( m50740_map, AS_PROGRAM, 8, m50740_device )
- ADDRESS_MAP_GLOBAL_MASK(0x1fff)
AM_RANGE(0x0000, 0x005f) AM_RAM
AM_RANGE(0x00e0, 0x00e9) AM_READWRITE(ports_r, ports_w)
AM_RANGE(0x00f9, 0x00ff) AM_READWRITE(tmrirq_r, tmrirq_w)
- AM_RANGE(0x1400, 0x1fff) AM_ROM AM_REGION(":m50740", 0)
+ AM_RANGE(0x1400, 0x1fff) AM_ROM AM_REGION("internal", 0)
ADDRESS_MAP_END
m50740_device::m50740_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
@@ -489,11 +488,10 @@ m50740_device::m50740_device(const machine_config &mconfig, device_type type, co
/* M50741 - 50740 with a larger internal ROM */
static ADDRESS_MAP_START( m50741_map, AS_PROGRAM, 8, m50741_device )
- ADDRESS_MAP_GLOBAL_MASK(0x1fff)
AM_RANGE(0x0000, 0x005f) AM_RAM
AM_RANGE(0x00e0, 0x00e9) AM_READWRITE(ports_r, ports_w)
AM_RANGE(0x00f9, 0x00ff) AM_READWRITE(tmrirq_r, tmrirq_w)
- AM_RANGE(0x1000, 0x1fff) AM_ROM AM_REGION(":m50741", 0)
+ AM_RANGE(0x1000, 0x1fff) AM_ROM AM_REGION("internal", 0)
ADDRESS_MAP_END
m50741_device::m50741_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
diff --git a/src/emu/debug/debugcmd.c b/src/emu/debug/debugcmd.c
index 6471c2db86f..736a70c2541 100644
--- a/src/emu/debug/debugcmd.c
+++ b/src/emu/debug/debugcmd.c
@@ -1995,14 +1995,14 @@ static void execute_cheatinit(running_machine &machine, int ref, int params, con
{
cheat_region[region_count].offset = space->address_to_byte(entry->m_addrstart) & space->bytemask();
cheat_region[region_count].endoffset = space->address_to_byte(entry->m_addrend) & space->bytemask();
- cheat_region[region_count].share = entry->m_sharetag;
+ cheat_region[region_count].share = entry->m_share;
cheat_region[region_count].disabled = (entry->m_write.m_type == AMH_RAM) ? FALSE : TRUE;
/* disable double share regions */
- if (entry->m_sharetag != NULL)
+ if (entry->m_share != NULL)
for (i = 0; i < region_count; i++)
if (cheat_region[i].share != NULL)
- if (strcmp(cheat_region[i].share, entry->m_sharetag) == 0)
+ if (strcmp(cheat_region[i].share, entry->m_share) == 0)
cheat_region[region_count].disabled = TRUE;
region_count++;
diff --git a/src/emu/dimemory.c b/src/emu/dimemory.c
index 7508243bdfc..77585be99e8 100644
--- a/src/emu/dimemory.c
+++ b/src/emu/dimemory.c
@@ -293,12 +293,12 @@ void device_memory_interface::interface_validity_check(validity_checker &valid)
}
// if this entry references a memory region, validate it
- if (entry->m_region != NULL && entry->m_sharetag == 0)
+ if (entry->m_region != NULL && entry->m_share == 0)
{
// make sure we can resolve the full path to the region
bool found = false;
astring entry_region;
- device().siblingtag(entry_region, entry->m_region);
+ entry->m_devbase.subtag(entry_region, entry->m_region);
// look for the region
device_iterator deviter(device().mconfig().root_device());
@@ -323,6 +323,7 @@ void device_memory_interface::interface_validity_check(validity_checker &valid)
}
// make sure all devices exist
+ // FIXME: This doesn't work! AMH_DEVICE_DELEGATE entries don't even set m_tag, the device tag is inside the proto-delegate
if (entry->m_read.m_type == AMH_DEVICE_DELEGATE && entry->m_read.m_tag != NULL)
{
astring temp(entry->m_read.m_tag);
@@ -346,8 +347,8 @@ void device_memory_interface::interface_validity_check(validity_checker &valid)
valid.validate_tag(entry->m_read.m_tag);
if (entry->m_write.m_type == AMH_BANK)
valid.validate_tag(entry->m_write.m_tag);
- if (entry->m_sharetag != NULL)
- valid.validate_tag(entry->m_sharetag);
+ if (entry->m_share != NULL)
+ valid.validate_tag(entry->m_share);
}
// release the address map
diff --git a/src/emu/memory.c b/src/emu/memory.c
index 367f794c09d..c5ae554674a 100644
--- a/src/emu/memory.c
+++ b/src/emu/memory.c
@@ -1832,11 +1832,11 @@ void address_space::prepare_map()
adjust_addresses(entry->m_bytestart, entry->m_byteend, entry->m_bytemask, entry->m_bytemirror);
// if we have a share entry, add it to our map
- if (entry->m_sharetag != NULL)
+ if (entry->m_share != NULL)
{
// if we can't find it, add it to our map
astring fulltag;
- if (manager().m_sharelist.find(entry->m_sharebase->subtag(fulltag, entry->m_sharetag).cstr()) == NULL)
+ if (manager().m_sharelist.find(entry->m_devbase.subtag(fulltag, entry->m_share).cstr()) == NULL)
{
VPRINTF(("Creating share '%s' of length 0x%X\n", fulltag.cstr(), entry->m_byteend + 1 - entry->m_bytestart));
memory_share *share = global_alloc(memory_share(m_map->m_databits, entry->m_byteend + 1 - entry->m_bytestart, endianness()));
@@ -1856,11 +1856,11 @@ void address_space::prepare_map()
}
// validate adjusted addresses against implicit regions
- if (entry->m_region != NULL && entry->m_sharetag == NULL)
+ if (entry->m_region != NULL && entry->m_share == NULL)
{
// determine full tag
astring fulltag;
- device().siblingtag(fulltag, entry->m_region);
+ entry->m_devbase.subtag(fulltag, entry->m_region);
// find the region
memory_region *region = machine().root_device().memregion(fulltag);
@@ -1877,7 +1877,7 @@ void address_space::prepare_map()
{
// determine full tag
astring fulltag;
- device().siblingtag(fulltag, entry->m_region);
+ entry->m_devbase.subtag(fulltag, entry->m_region);
// set the memory address
entry->m_memory = machine().root_device().memregion(fulltag.cstr())->base() + entry->m_rgnoffs;
@@ -1962,18 +1962,18 @@ void address_space::populate_map_entry(const address_map_entry &entry, read_or_w
if (readorwrite == ROW_READ)
switch (data.m_bits)
{
- case 8: install_read_handler(entry.m_addrstart, entry.m_addrend, entry.m_addrmask, entry.m_addrmirror, read8_delegate(entry.m_rproto8, *entry.m_read.m_devbase), data.m_mask); break;
- case 16: install_read_handler(entry.m_addrstart, entry.m_addrend, entry.m_addrmask, entry.m_addrmirror, read16_delegate(entry.m_rproto16, *entry.m_read.m_devbase), data.m_mask); break;
- case 32: install_read_handler(entry.m_addrstart, entry.m_addrend, entry.m_addrmask, entry.m_addrmirror, read32_delegate(entry.m_rproto32, *entry.m_read.m_devbase), data.m_mask); break;
- case 64: install_read_handler(entry.m_addrstart, entry.m_addrend, entry.m_addrmask, entry.m_addrmirror, read64_delegate(entry.m_rproto64, *entry.m_read.m_devbase), data.m_mask); break;
+ case 8: install_read_handler(entry.m_addrstart, entry.m_addrend, entry.m_addrmask, entry.m_addrmirror, read8_delegate(entry.m_rproto8, entry.m_devbase), data.m_mask); break;
+ case 16: install_read_handler(entry.m_addrstart, entry.m_addrend, entry.m_addrmask, entry.m_addrmirror, read16_delegate(entry.m_rproto16, entry.m_devbase), data.m_mask); break;
+ case 32: install_read_handler(entry.m_addrstart, entry.m_addrend, entry.m_addrmask, entry.m_addrmirror, read32_delegate(entry.m_rproto32, entry.m_devbase), data.m_mask); break;
+ case 64: install_read_handler(entry.m_addrstart, entry.m_addrend, entry.m_addrmask, entry.m_addrmirror, read64_delegate(entry.m_rproto64, entry.m_devbase), data.m_mask); break;
}
else
switch (data.m_bits)
{
- case 8: install_write_handler(entry.m_addrstart, entry.m_addrend, entry.m_addrmask, entry.m_addrmirror, write8_delegate(entry.m_wproto8, *entry.m_write.m_devbase), data.m_mask); break;
- case 16: install_write_handler(entry.m_addrstart, entry.m_addrend, entry.m_addrmask, entry.m_addrmirror, write16_delegate(entry.m_wproto16, *entry.m_write.m_devbase), data.m_mask); break;
- case 32: install_write_handler(entry.m_addrstart, entry.m_addrend, entry.m_addrmask, entry.m_addrmirror, write32_delegate(entry.m_wproto32, *entry.m_write.m_devbase), data.m_mask); break;
- case 64: install_write_handler(entry.m_addrstart, entry.m_addrend, entry.m_addrmask, entry.m_addrmirror, write64_delegate(entry.m_wproto64, *entry.m_write.m_devbase), data.m_mask); break;
+ case 8: install_write_handler(entry.m_addrstart, entry.m_addrend, entry.m_addrmask, entry.m_addrmirror, write8_delegate(entry.m_wproto8, entry.m_devbase), data.m_mask); break;
+ case 16: install_write_handler(entry.m_addrstart, entry.m_addrend, entry.m_addrmask, entry.m_addrmirror, write16_delegate(entry.m_wproto16, entry.m_devbase), data.m_mask); break;
+ case 32: install_write_handler(entry.m_addrstart, entry.m_addrend, entry.m_addrmask, entry.m_addrmirror, write32_delegate(entry.m_wproto32, entry.m_devbase), data.m_mask); break;
+ case 64: install_write_handler(entry.m_addrstart, entry.m_addrend, entry.m_addrmask, entry.m_addrmirror, write64_delegate(entry.m_wproto64, entry.m_devbase), data.m_mask); break;
}
break;
@@ -2001,7 +2001,7 @@ void address_space::populate_map_entry(const address_map_entry &entry, read_or_w
void address_space::populate_map_entry_setoffset(const address_map_entry &entry)
{
install_setoffset_handler(entry.m_addrstart, entry.m_addrend, entry.m_addrmask,
- entry.m_addrmirror, setoffset_delegate(entry.m_soproto, *entry.m_setoffsethd.m_devbase), entry.m_setoffsethd.m_mask);
+ entry.m_addrmirror, setoffset_delegate(entry.m_soproto, entry.m_devbase), entry.m_setoffsethd.m_mask);
}
//-------------------------------------------------
@@ -2151,18 +2151,18 @@ address_map_entry *address_space::block_assign_intersecting(offs_t bytestart, of
for (address_map_entry *entry = m_map->m_entrylist.first(); entry != NULL; entry = entry->next())
{
// if we haven't assigned this block yet, see if we have a mapped shared pointer for it
- if (entry->m_memory == NULL && entry->m_sharetag != NULL)
+ if (entry->m_memory == NULL && entry->m_share != NULL)
{
astring fulltag;
- memory_share *share = manager().m_sharelist.find(entry->m_sharebase->subtag(fulltag, entry->m_sharetag).cstr());
+ memory_share *share = manager().m_sharelist.find(entry->m_devbase.subtag(fulltag, entry->m_share).cstr());
if (share != NULL && share->ptr() != NULL)
{
entry->m_memory = share->ptr();
- VPRINTF(("memory range %08X-%08X -> shared_ptr '%s' [%p]\n", entry->m_addrstart, entry->m_addrend, entry->m_sharetag, entry->m_memory));
+ VPRINTF(("memory range %08X-%08X -> shared_ptr '%s' [%p]\n", entry->m_addrstart, entry->m_addrend, entry->m_share, entry->m_memory));
}
else
{
- VPRINTF(("memory range %08X-%08X -> shared_ptr '%s' but not found\n", entry->m_addrstart, entry->m_addrend, entry->m_sharetag));
+ VPRINTF(("memory range %08X-%08X -> shared_ptr '%s' but not found\n", entry->m_addrstart, entry->m_addrend, entry->m_share));
}
}
@@ -2174,14 +2174,14 @@ address_map_entry *address_space::block_assign_intersecting(offs_t bytestart, of
}
// if we're the first match on a shared pointer, assign it now
- if (entry->m_memory != NULL && entry->m_sharetag != NULL)
+ if (entry->m_memory != NULL && entry->m_share != NULL)
{
astring fulltag;
- memory_share *share = manager().m_sharelist.find(entry->m_sharebase->subtag(fulltag, entry->m_sharetag).cstr());
+ memory_share *share = manager().m_sharelist.find(entry->m_devbase.subtag(fulltag, entry->m_share).cstr());
if (share != NULL && share->ptr() == NULL)
{
share->set_ptr(entry->m_memory);
- VPRINTF(("setting shared_ptr '%s' = %p\n", entry->m_sharetag, entry->m_memory));
+ VPRINTF(("setting shared_ptr '%s' = %p\n", entry->m_share, entry->m_memory));
}
}
@@ -2610,10 +2610,10 @@ void *address_space::find_backing_memory(offs_t addrstart, offs_t addrend)
bool address_space::needs_backing_store(const address_map_entry *entry)
{
// if we are sharing, and we don't have a pointer yet, create one
- if (entry->m_sharetag != NULL)
+ if (entry->m_share != NULL)
{
astring fulltag;
- memory_share *share = manager().m_sharelist.find(entry->m_sharebase->subtag(fulltag, entry->m_sharetag).cstr());
+ memory_share *share = manager().m_sharelist.find(entry->m_devbase.subtag(fulltag, entry->m_share).cstr());
if (share != NULL && share->ptr() == NULL)
return true;
}
diff --git a/src/mame/drivers/globalfr.c b/src/mame/drivers/globalfr.c
index a81a562adb3..007aa1e6063 100644
--- a/src/mame/drivers/globalfr.c
+++ b/src/mame/drivers/globalfr.c
@@ -63,7 +63,7 @@ INPUT_PORTS_END
static MACHINE_CONFIG_START( globalfr, globalfr_state )
/* basic machine hardware */
- MCFG_CPU_ADD("maincpu", M37710, 4000000)
+ MCFG_CPU_ADD("maincpu", M37702S1, 4000000)
MCFG_CPU_PROGRAM_MAP(globalfr_map)
MCFG_S16LF01_ADD("vfd",0)
MCFG_DEFAULT_LAYOUT(layout_globalfr)
diff --git a/src/mame/drivers/namcofl.c b/src/mame/drivers/namcofl.c
index 0f0b0192c5c..14e5f5188cc 100644
--- a/src/mame/drivers/namcofl.c
+++ b/src/mame/drivers/namcofl.c
@@ -158,8 +158,8 @@ OSC3: 48.384MHz
#include "emu.h"
#include "includes/namcoic.h"
#include "cpu/i960/i960.h"
-#include "cpu/m37710/m37710.h"
#include "sound/c352.h"
+#include "machine/namcomcu.h"
#include "machine/nvram.h"
#include "namcofl.lh"
#include "includes/namcofl.h"
@@ -324,7 +324,6 @@ READ8_MEMBER(namcofl_state::dac0_r){ return 0xff; }
static ADDRESS_MAP_START( namcoc75_am, AS_PROGRAM, 16, namcofl_state )
AM_RANGE(0x002000, 0x002fff) AM_DEVREADWRITE("c352", c352_device, read, write)
AM_RANGE(0x004000, 0x00bfff) AM_RAM_WRITE(mcu_shared_w) AM_SHARE("shareram")
- AM_RANGE(0x00c000, 0x00ffff) AM_ROM AM_REGION("c75", 0)
AM_RANGE(0x200000, 0x27ffff) AM_ROM AM_REGION("c75data", 0)
ADDRESS_MAP_END
@@ -582,7 +581,7 @@ static MACHINE_CONFIG_START( namcofl, namcofl_state )
MCFG_CPU_ADD("maincpu", I960, 20000000) // i80960KA-20 == 20 MHz part
MCFG_CPU_PROGRAM_MAP(namcofl_mem)
- MCFG_CPU_ADD("mcu", M37702, 48384000/3)
+ MCFG_CPU_ADD("mcu", NAMCO_C75, 48384000/3)
MCFG_CPU_PROGRAM_MAP(namcoc75_am)
MCFG_CPU_IO_MAP(namcoc75_io)
/* TODO: irq generation for these */
@@ -629,9 +628,6 @@ ROM_START( speedrcr )
ROM_LOAD32_BYTE("se1_dat2.15a", 0x000002, 0x080000, CRC(2a29abbb) SHA1(945419ed61e9a656a340214a63a01818396fbe98) )
ROM_LOAD32_BYTE("se1_dat3.16a", 0x000003, 0x080000, CRC(49849aff) SHA1(b7c7eea1d56304e40e996ee998c971313ff03614) )
- ROM_REGION16_LE( 0x4000, "c75", 0 ) // C75 program
- ROM_LOAD( "c75.bin", 0, 0x4000, CRC(42f539a5) SHA1(3103e5a0a2867620309fd4fe478a2be0effbeff8) )
-
ROM_REGION16_LE( 0x80000, "c75data", 0 ) // C75 data
ROM_LOAD("se1_spr.21l", 0x000000, 0x80000, CRC(850a27ac) SHA1(7d5db840ec67659a1f2e69a62cdb03ce6ee0b47b) )
@@ -681,9 +677,6 @@ ROM_START( finalapr )
ROM_REGION32_LE( 0x200000, "data", ROMREGION_ERASEFF ) // Data
- ROM_REGION16_LE( 0x4000, "c75", 0 ) // C75 program
- ROM_LOAD( "c75.bin", 0, 0x4000, CRC(42f539a5) SHA1(3103e5a0a2867620309fd4fe478a2be0effbeff8) )
-
ROM_REGION16_LE( 0x80000, "c75data", 0 ) // C75 data
ROM_LOAD("flr1spr.21l", 0x000000, 0x20000, CRC(69bb0f5e) SHA1(6831d618de42a165e508ad37db594d3aa290c530) )
@@ -723,9 +716,6 @@ ROM_START( finalapro )
ROM_REGION32_LE( 0x200000, "data", ROMREGION_ERASEFF ) // Data
- ROM_REGION16_LE( 0x4000, "c75", 0 ) // C75 program
- ROM_LOAD( "c75.bin", 0, 0x4000, CRC(42f539a5) SHA1(3103e5a0a2867620309fd4fe478a2be0effbeff8) )
-
ROM_REGION16_LE( 0x80000, "c75data", 0 ) // C75 data
ROM_LOAD("flr1spr.21l", 0x000000, 0x20000, CRC(69bb0f5e) SHA1(6831d618de42a165e508ad37db594d3aa290c530) )
@@ -766,9 +756,6 @@ ROM_START( finalaprj )
ROM_REGION32_LE( 0x200000, "data", ROMREGION_ERASEFF ) // Data
- ROM_REGION16_LE( 0x4000, "c75", 0 ) // C75 program
- ROM_LOAD( "c75.bin", 0, 0x4000, CRC(42f539a5) SHA1(3103e5a0a2867620309fd4fe478a2be0effbeff8) )
-
ROM_REGION16_LE( 0x80000, "c75data", 0 ) // C75 data
ROM_LOAD("flr1spr.21l", 0x000000, 0x20000, CRC(69bb0f5e) SHA1(6831d618de42a165e508ad37db594d3aa290c530) )
diff --git a/src/mame/drivers/namcona1.c b/src/mame/drivers/namcona1.c
index 078042258bd..84dbf5085e4 100644
--- a/src/mame/drivers/namcona1.c
+++ b/src/mame/drivers/namcona1.c
@@ -166,7 +166,7 @@ Notes:
#include "emu.h"
#include "cpu/m68000/m68000.h"
#include "includes/namcona1.h"
-#include "cpu/m37710/m37710.h"
+#include "machine/namcomcu.h"
#define MASTER_CLOCK XTAL_50_113MHz
@@ -612,7 +612,6 @@ static ADDRESS_MAP_START( namcona1_mcu_map, AS_PROGRAM, 16, namcona1_state )
AM_RANGE(0x001000, 0x001fff) AM_READWRITE(snd_r, snd_w) // C140-alike sound chip
AM_RANGE(0x002000, 0x002fff) AM_READWRITE(na1mcu_shared_r, na1mcu_shared_w) // mirror of first page of shared work RAM
AM_RANGE(0x003000, 0x00afff) AM_RAM // there is a 32k RAM chip according to CGFM
- AM_RANGE(0x00c000, 0x00ffff) AM_ROM AM_REGION("mcu", 0) // internal ROM BIOS
AM_RANGE(0x200000, 0x27ffff) AM_READWRITE(na1mcu_shared_r, na1mcu_shared_w) // shared work RAM
ADDRESS_MAP_END
@@ -928,7 +927,7 @@ static MACHINE_CONFIG_START( namcona1, namcona1_state )
MCFG_CPU_ADD("maincpu", M68000, MASTER_CLOCK/4)
MCFG_CPU_PROGRAM_MAP(namcona1_main_map)
- MCFG_CPU_ADD("mcu", M37702, MASTER_CLOCK/4)
+ MCFG_CPU_ADD("mcu", NAMCO_C69, MASTER_CLOCK/4)
MCFG_CPU_PROGRAM_MAP(namcona1_mcu_map)
MCFG_CPU_IO_MAP( namcona1_mcu_io_map)
@@ -974,6 +973,10 @@ static MACHINE_CONFIG_DERIVED( namcona2, namcona1 )
/* basic machine hardware */
MCFG_CPU_MODIFY("maincpu")
MCFG_CPU_PROGRAM_MAP(namcona2_main_map)
+
+ MCFG_CPU_REPLACE("mcu", NAMCO_C70, MASTER_CLOCK/4)
+ MCFG_CPU_PROGRAM_MAP(namcona1_mcu_map)
+ MCFG_CPU_IO_MAP( namcona1_mcu_io_map)
MACHINE_CONFIG_END
@@ -1002,10 +1005,6 @@ ROM_START( bkrtmaq )
ROM_LOAD16_BYTE( "mq1-ma0u.bin", 0x000000, 0x100000, CRC(23442ac0) SHA1(fac706f24045d51a2712f51530967140ea8e875f) )
ROM_LOAD16_BYTE( "mq1-ma1l.bin", 0x200001, 0x100000, CRC(fe82205f) SHA1(860cc7a96ae3f848ce594077c1362e4e22a36908) )
ROM_LOAD16_BYTE( "mq1-ma1u.bin", 0x200000, 0x100000, CRC(0cdb6bd0) SHA1(b8b398477c9654e96921110fb30c754240183897) )
-
- /* M37702 BIOS - labeled as Namco custom C69 */
- ROM_REGION16_LE( 0x4000, "mcu", 0 )
- ROM_LOAD( "c69.bin", 0x000000, 0x004000, CRC(349134d9) SHA1(61a4981fc2716c228b6121fedcbf1ed6f34dc2de) )
ROM_END
ROM_START( cgangpzl )
@@ -1016,10 +1015,6 @@ ROM_START( cgangpzl )
ROM_REGION16_BE( 0x800000, "maskrom", ROMREGION_ERASE00 )
/* no mask roms */
- /* M37702 BIOS - labeled as Namco custom C69 */
- ROM_REGION16_LE( 0x4000, "mcu", 0 )
- ROM_LOAD( "c69.bin", 0x000000, 0x004000, CRC(349134d9) SHA1(61a4981fc2716c228b6121fedcbf1ed6f34dc2de) )
-
ROM_REGION( 0x0800, "eeprom", 0 ) // default eeprom, otherwise game would lock up on 1st boot
ROM_LOAD( "eeprom_cgangpzl", 0x0000, 0x0800, CRC(5f8dfe9e) SHA1(81cc9cdbd8b5d6092a292309f78e3037233078f9) )
ROM_END
@@ -1032,10 +1027,6 @@ ROM_START( cgangpzlj )
ROM_REGION16_BE( 0x800000, "maskrom", ROMREGION_ERASE00 )
/* no mask roms */
- /* M37702 BIOS - labeled as Namco custom C69 */
- ROM_REGION16_LE( 0x4000, "mcu", 0 )
- ROM_LOAD( "c69.bin", 0x000000, 0x004000, CRC(349134d9) SHA1(61a4981fc2716c228b6121fedcbf1ed6f34dc2de) )
-
ROM_REGION( 0x0800, "eeprom", 0 ) // default eeprom, otherwise game would lock up on 1st boot
ROM_LOAD( "eeprom_cgangpzlj", 0x0000, 0x0800, CRC(ef5ddff2) SHA1(ea3f8e4da119e27c27f66f169bbf19bc37499048) )
ROM_END
@@ -1049,10 +1040,6 @@ ROM_START( emeraldaj ) /* NA-1 Game PCB, parent is NA-2 version listed below */
ROM_REGION16_BE( 0x800000, "maskrom", ROMREGION_ERASE00 )
/* no mask roms */
-
- /* M37702 BIOS - labeled as Namco custom C69 */
- ROM_REGION16_LE( 0x4000, "mcu", 0 )
- ROM_LOAD( "c69.bin", 0x000000, 0x004000, CRC(349134d9) SHA1(61a4981fc2716c228b6121fedcbf1ed6f34dc2de) )
ROM_END
ROM_START( emeraldaja ) /* NA-1 Game PCB, parent is NA-2 version listed below */
@@ -1064,10 +1051,6 @@ ROM_START( emeraldaja ) /* NA-1 Game PCB, parent is NA-2 version listed below */
ROM_REGION16_BE( 0x800000, "maskrom", ROMREGION_ERASE00 )
/* no mask roms */
-
- /* M37702 BIOS - labeled as Namco custom C69 */
- ROM_REGION16_LE( 0x4000, "mcu", 0 )
- ROM_LOAD( "c69.bin", 0x000000, 0x004000, CRC(349134d9) SHA1(61a4981fc2716c228b6121fedcbf1ed6f34dc2de) )
ROM_END
ROM_START( exvania )
@@ -1081,10 +1064,6 @@ ROM_START( exvania )
ROM_LOAD16_BYTE( "ex1-ma1l.3c", 0x200001, 0x100000, CRC(e4bba6ed) SHA1(6483ef91e5a5b8ddd13a3d889936c39829fa50d6) )
ROM_LOAD16_BYTE( "ex1-ma1u.3f", 0x200000, 0x100000, CRC(04e7c4b0) SHA1(78180d96cd1fae583617d4d227ed4ee24f2f9e29) )
- /* M37702 BIOS - labeled as Namco custom C69 */
- ROM_REGION16_LE( 0x4000, "mcu", 0 )
- ROM_LOAD( "c69.bin", 0x000000, 0x004000, CRC(349134d9) SHA1(61a4981fc2716c228b6121fedcbf1ed6f34dc2de) )
-
ROM_REGION( 0x0800, "eeprom", 0 ) // default eeprom, otherwise game would lock up on 1st boot
ROM_LOAD( "eeprom", 0x0000, 0x0800, CRC(0f46389d) SHA1(5706a46b02a667f5bddaa3842bb009ea07d23603) )
ROM_END
@@ -1100,10 +1079,6 @@ ROM_START( exvaniaj )
ROM_LOAD16_BYTE( "ex1-ma1l.3c", 0x200001, 0x100000, CRC(e4bba6ed) SHA1(6483ef91e5a5b8ddd13a3d889936c39829fa50d6) )
ROM_LOAD16_BYTE( "ex1-ma1u.3f", 0x200000, 0x100000, CRC(04e7c4b0) SHA1(78180d96cd1fae583617d4d227ed4ee24f2f9e29) )
- /* M37702 BIOS - labeled as Namco custom C69 */
- ROM_REGION16_LE( 0x4000, "mcu", 0 )
- ROM_LOAD( "c69.bin", 0x000000, 0x004000, CRC(349134d9) SHA1(61a4981fc2716c228b6121fedcbf1ed6f34dc2de) )
-
ROM_REGION( 0x0800, "eeprom", 0 ) // default eeprom, otherwise game would lock up on 1st boot
ROM_LOAD( "eeprom", 0x0000, 0x0800, CRC(0f46389d) SHA1(5706a46b02a667f5bddaa3842bb009ea07d23603) )
ROM_END
@@ -1120,10 +1095,6 @@ ROM_START( fghtatck )
ROM_LOAD16_BYTE( "fa1-ma0u.bin", 0x000000, 0x100000, CRC(1d0135bd) SHA1(2a7f8d09c213629a68376ce0379be61b37711d0a) )
ROM_LOAD16_BYTE( "fa1-ma1l.bin", 0x200001, 0x100000, CRC(c4adf0a2) SHA1(4cc7adc68b1db7e725a973b31d52720bd7dc1140) )
ROM_LOAD16_BYTE( "fa1-ma1u.bin", 0x200000, 0x100000, CRC(900297be) SHA1(57bb2078ff104c6f631c67219f80f8ede5ddbd09) )
-
- /* M37702 BIOS - labeled as Namco custom C69 */
- ROM_REGION16_LE( 0x4000, "mcu", 0 )
- ROM_LOAD( "c69.bin", 0x000000, 0x004000, CRC(349134d9) SHA1(61a4981fc2716c228b6121fedcbf1ed6f34dc2de) )
ROM_END
ROM_START( fa )
@@ -1138,10 +1109,6 @@ ROM_START( fa )
ROM_LOAD16_BYTE( "fa1-ma0u.bin", 0x000000, 0x100000, CRC(1d0135bd) SHA1(2a7f8d09c213629a68376ce0379be61b37711d0a) )
ROM_LOAD16_BYTE( "fa1-ma1l.bin", 0x200001, 0x100000, CRC(c4adf0a2) SHA1(4cc7adc68b1db7e725a973b31d52720bd7dc1140) )
ROM_LOAD16_BYTE( "fa1-ma1u.bin", 0x200000, 0x100000, CRC(900297be) SHA1(57bb2078ff104c6f631c67219f80f8ede5ddbd09) )
-
- /* M37702 BIOS - labeled as Namco custom C69 */
- ROM_REGION16_LE( 0x4000, "mcu", 0 )
- ROM_LOAD( "c69.bin", 0x000000, 0x004000, CRC(349134d9) SHA1(61a4981fc2716c228b6121fedcbf1ed6f34dc2de) )
ROM_END
ROM_START( swcourt )
@@ -1156,10 +1123,6 @@ ROM_START( swcourt )
ROM_LOAD16_BYTE( "sc1-ma0u.bin", 0x000000, 0x100000, CRC(31e76a45) SHA1(5c278c167c1025c648ce2da2c3764645e96dcd55) )
ROM_LOAD16_BYTE( "sc1-ma1l.bin", 0x200001, 0x100000, CRC(8ba3a4ec) SHA1(f881e7b4728f388d18450ba85e13e233071fbc88) )
ROM_LOAD16_BYTE( "sc1-ma1u.bin", 0x200000, 0x100000, CRC(252dc4b7) SHA1(f1be6bd045495c7a0ecd97f01d1dc8ad341fecfd) )
-
- /* M37702 BIOS - labeled as Namco custom C69 */
- ROM_REGION16_LE( 0x4000, "mcu", 0 )
- ROM_LOAD( "c69.bin", 0x000000, 0x004000, CRC(349134d9) SHA1(61a4981fc2716c228b6121fedcbf1ed6f34dc2de) )
ROM_END
ROM_START( swcourtj )
@@ -1174,10 +1137,6 @@ ROM_START( swcourtj )
ROM_LOAD16_BYTE( "sc1-ma0u.bin", 0x000000, 0x100000, CRC(31e76a45) SHA1(5c278c167c1025c648ce2da2c3764645e96dcd55) )
ROM_LOAD16_BYTE( "sc1-ma1l.bin", 0x200001, 0x100000, CRC(8ba3a4ec) SHA1(f881e7b4728f388d18450ba85e13e233071fbc88) )
ROM_LOAD16_BYTE( "sc1-ma1u.bin", 0x200000, 0x100000, CRC(252dc4b7) SHA1(f1be6bd045495c7a0ecd97f01d1dc8ad341fecfd) )
-
- /* M37702 BIOS - labeled as Namco custom C69 */
- ROM_REGION16_LE( 0x4000, "mcu", 0 )
- ROM_LOAD( "c69.bin", 0x000000, 0x004000, CRC(349134d9) SHA1(61a4981fc2716c228b6121fedcbf1ed6f34dc2de) )
ROM_END
ROM_START( tinklpit )
@@ -1194,10 +1153,6 @@ ROM_START( tinklpit )
ROM_LOAD16_BYTE( "tk1-ma1u.bin", 0x200000, 0x100000, CRC(54b77816) SHA1(9341d07858623e1920eaae7b2b90126c7057297e) )
ROM_LOAD16_BYTE( "tk1-ma2l.bin", 0x400001, 0x100000, CRC(087311d2) SHA1(6fe50f9e08551e57d15a15b01e3822a6cb7c8352) )
ROM_LOAD16_BYTE( "tk1-ma2u.bin", 0x400000, 0x100000, CRC(5ce20c2c) SHA1(7eaff21714bae44f8b21b6db98f055e04bfbae18) )
-
- /* M37702 BIOS - labeled as Namco custom C69 */
- ROM_REGION16_LE( 0x4000, "mcu", 0 )
- ROM_LOAD( "c69.bin", 0x000000, 0x004000, CRC(349134d9) SHA1(61a4981fc2716c228b6121fedcbf1ed6f34dc2de) )
ROM_END
@@ -1215,10 +1170,6 @@ ROM_START( emeralda ) /* NA-2 Game PCB, clones are NA-1 based; see games listed
ROM_REGION16_BE( 0x800000, "maskrom", ROMREGION_ERASE00 )
/* no mask roms */
-
- /* M37702 BIOS - labeled as Namco custom C70 */
- ROM_REGION16_LE( 0x4000, "mcu", 0 )
- ROM_LOAD( "c70.bin", 0x000000, 0x004000, CRC(b4015f23) SHA1(7ce91eda76e86b5cab625e2b67c463b7d143832e) )
ROM_END
ROM_START( knckhead )
@@ -1237,10 +1188,6 @@ ROM_START( knckhead )
ROM_LOAD16_BYTE( "kh1-ma2u.4f", 0x400000, 0x100000, CRC(17fe8c3d) SHA1(88c45076477725faa5f8a23512e65a40385bb27d) )
ROM_LOAD16_BYTE( "kh1-ma3l.5c", 0x600001, 0x100000, CRC(ad9a7807) SHA1(c40f18a68306e76acd89ccb3fc82b8106556912e) )
ROM_LOAD16_BYTE( "kh1-ma3u.5f", 0x600000, 0x100000, CRC(efeb768d) SHA1(15d016244549f3ea0d19f5cfb04bcebd65ac6134) )
-
- /* M37702 BIOS - labeled as Namco custom C70 */
- ROM_REGION16_LE( 0x4000, "mcu", 0 )
- ROM_LOAD( "c70.bin", 0x000000, 0x004000, CRC(b4015f23) SHA1(7ce91eda76e86b5cab625e2b67c463b7d143832e) )
ROM_END
ROM_START( knckheadj )
@@ -1259,10 +1206,6 @@ ROM_START( knckheadj )
ROM_LOAD16_BYTE( "kh1-ma2u.4f", 0x400000, 0x100000, CRC(17fe8c3d) SHA1(88c45076477725faa5f8a23512e65a40385bb27d) )
ROM_LOAD16_BYTE( "kh1-ma3l.5c", 0x600001, 0x100000, CRC(ad9a7807) SHA1(c40f18a68306e76acd89ccb3fc82b8106556912e) )
ROM_LOAD16_BYTE( "kh1-ma3u.5f", 0x600000, 0x100000, CRC(efeb768d) SHA1(15d016244549f3ea0d19f5cfb04bcebd65ac6134) )
-
- /* M37702 BIOS - labeled as Namco custom C70 */
- ROM_REGION16_LE( 0x4000, "mcu", 0 )
- ROM_LOAD( "c70.bin", 0x000000, 0x004000, CRC(b4015f23) SHA1(7ce91eda76e86b5cab625e2b67c463b7d143832e) )
ROM_END
ROM_START( knckheadjp ) /* Older or possible prototype. Doesn't show rom test at boot up */
@@ -1282,10 +1225,6 @@ ROM_START( knckheadjp ) /* Older or possible prototype. Doesn't show rom test at
ROM_LOAD16_BYTE( "kh1-ma3l.5c", 0x600001, 0x100000, CRC(ad9a7807) SHA1(c40f18a68306e76acd89ccb3fc82b8106556912e) )
ROM_LOAD16_BYTE( "kh1-ma3u.5f", 0x600000, 0x100000, CRC(efeb768d) SHA1(15d016244549f3ea0d19f5cfb04bcebd65ac6134) )
- /* M37702 BIOS - labeled as Namco custom C70 */
- ROM_REGION16_LE( 0x4000, "mcu", 0 )
- ROM_LOAD( "c70.bin", 0x000000, 0x004000, CRC(b4015f23) SHA1(7ce91eda76e86b5cab625e2b67c463b7d143832e) )
-
ROM_REGION( 0x0800, "eeprom", 0 ) // default eeprom, otherwise game would lock up on 1st boot
ROM_LOAD( "eeprom", 0x0000, 0x0800, CRC(98875a23) SHA1(2256cd231587351a0768faaedafbd1f80e3fd7c4) )
ROM_END
@@ -1306,10 +1245,6 @@ ROM_START( numanath )
ROM_LOAD16_BYTE( "nm1-ma2u.bin", 0x400000, 0x100000, CRC(03a3f204) SHA1(9cb0422c8ecc819d0cc8a65c29a228369d78d986) )
ROM_LOAD16_BYTE( "nm1-ma3l.bin", 0x600001, 0x100000, CRC(42a539e9) SHA1(1c53a5a031648891ab7a37cf026c979404ce9589) )
ROM_LOAD16_BYTE( "nm1-ma3u.bin", 0x600000, 0x100000, CRC(f79e2112) SHA1(8bb8639a9d3a5d3ac5c9bb78e72b3d76582a9c25) )
-
- /* M37702 BIOS - labeled as Namco custom C70 */
- ROM_REGION16_LE( 0x4000, "mcu", 0 )
- ROM_LOAD( "c70.bin", 0x000000, 0x004000, CRC(b4015f23) SHA1(7ce91eda76e86b5cab625e2b67c463b7d143832e) )
ROM_END
ROM_START( numanathj )
@@ -1328,10 +1263,6 @@ ROM_START( numanathj )
ROM_LOAD16_BYTE( "nm1-ma2u.bin", 0x400000, 0x100000, CRC(03a3f204) SHA1(9cb0422c8ecc819d0cc8a65c29a228369d78d986) )
ROM_LOAD16_BYTE( "nm1-ma3l.bin", 0x600001, 0x100000, CRC(42a539e9) SHA1(1c53a5a031648891ab7a37cf026c979404ce9589) )
ROM_LOAD16_BYTE( "nm1-ma3u.bin", 0x600000, 0x100000, CRC(f79e2112) SHA1(8bb8639a9d3a5d3ac5c9bb78e72b3d76582a9c25) )
-
- /* M37702 BIOS - labeled as Namco custom C70 */
- ROM_REGION16_LE( 0x4000, "mcu", 0 )
- ROM_LOAD( "c70.bin", 0x000000, 0x004000, CRC(b4015f23) SHA1(7ce91eda76e86b5cab625e2b67c463b7d143832e) )
ROM_END
ROM_START( quiztou )
@@ -1351,10 +1282,6 @@ ROM_START( quiztou )
ROM_LOAD16_BYTE( "qt1ma3l.5c", 0x600001, 0x100000, CRC(aa9dc6ff) SHA1(c738f8c59bb5245874576c5bcf88c7138fa9a147) )
ROM_LOAD16_BYTE( "qt1ma3u.5f", 0x600000, 0x100000, CRC(14a5a163) SHA1(1107f50e491bedeb4ab7ac3f32cfe47727274ba9) )
- /* M37702 BIOS - labeled as Namco custom C70 */
- ROM_REGION16_LE( 0x4000, "mcu", 0 )
- ROM_LOAD( "c70.bin", 0x000000, 0x004000, CRC(b4015f23) SHA1(7ce91eda76e86b5cab625e2b67c463b7d143832e) )
-
ROM_REGION( 0x0800, "eeprom", 0 ) // default eeprom, otherwise game would lock up on 1st boot
ROM_LOAD( "eeprom", 0x0000, 0x0800, CRC(57a478a6) SHA1(b6d66610690f2fdf6643b2de91e2345d15d839b1) )
ROM_END
@@ -1369,10 +1296,6 @@ ROM_START( xday2 )
ROM_LOAD16_BYTE( "xds1-dat1.8b", 0x000000, 0x200000, CRC(d250b7e8) SHA1(b99251ae8e25fae062d33e74ff800ab43fb308a2) )
ROM_LOAD16_BYTE( "xds1-dat2.4c", 0x400001, 0x200000, CRC(99d72a08) SHA1(4615b43b9a81240ffee8b0f021037f554f4f1f24) )
ROM_LOAD16_BYTE( "xds1-dat3.8c", 0x400000, 0x200000, CRC(8980acc4) SHA1(ecd94a3d3a38923e8e322cd8863671af26e30812) )
-
- /* M37702 BIOS - labeled as Namco custom C70 */
- ROM_REGION16_LE( 0x4000, "mcu", 0 )
- ROM_LOAD( "c70.bin", 0x000000, 0x004000, CRC(b4015f23) SHA1(7ce91eda76e86b5cab625e2b67c463b7d143832e) )
ROM_END
// NA-1 (C69 MCU)
diff --git a/src/mame/drivers/namconb1.c b/src/mame/drivers/namconb1.c
index 7e9f23ffd96..44dcac461e7 100644
--- a/src/mame/drivers/namconb1.c
+++ b/src/mame/drivers/namconb1.c
@@ -273,8 +273,8 @@ GFX: Custom 145 ( 80 pin PQFP)
#include "cpu/m68000/m68000.h"
#include "includes/namconb1.h"
#include "includes/namcoic.h"
+#include "machine/namcomcu.h"
#include "sound/c352.h"
-#include "cpu/m37710/m37710.h"
#define MASTER_CLOCK XTAL_48_384MHz
@@ -717,7 +717,6 @@ WRITE16_MEMBER(namconb1_state::nbmcu_shared_w)
static ADDRESS_MAP_START( namcoc75_am, AS_PROGRAM, 16, namconb1_state )
AM_RANGE(0x002000, 0x002fff) AM_DEVREADWRITE("c352", c352_device, read, write)
AM_RANGE(0x004000, 0x00bfff) AM_RAM_WRITE(nbmcu_shared_w) AM_SHARE("namconb_share")
- AM_RANGE(0x00c000, 0x00ffff) AM_ROM AM_REGION("c75", 0)
AM_RANGE(0x200000, 0x27ffff) AM_ROM AM_REGION("c75data", 0)
ADDRESS_MAP_END
@@ -1099,7 +1098,7 @@ static MACHINE_CONFIG_START( namconb1, namconb1_state )
MCFG_CPU_ADD("maincpu", M68EC020, MASTER_CLOCK/2)
MCFG_CPU_PROGRAM_MAP(namconb1_am)
- MCFG_CPU_ADD("mcu", M37702, MASTER_CLOCK/3)
+ MCFG_CPU_ADD("mcu", NAMCO_C75, MASTER_CLOCK/3)
MCFG_CPU_PROGRAM_MAP(namcoc75_am)
MCFG_CPU_IO_MAP(namcoc75_io)
@@ -1136,7 +1135,7 @@ static MACHINE_CONFIG_START( namconb2, namconb1_state )
MCFG_CPU_ADD("maincpu", M68EC020, MASTER_CLOCK/2)
MCFG_CPU_PROGRAM_MAP(namconb2_am)
- MCFG_CPU_ADD("mcu", M37702, MASTER_CLOCK/3)
+ MCFG_CPU_ADD("mcu", NAMCO_C75, MASTER_CLOCK/3)
MCFG_CPU_PROGRAM_MAP(namcoc75_am)
MCFG_CPU_IO_MAP(namcoc75_io)
@@ -1177,9 +1176,6 @@ ROM_START( ptblank ) /* World set using 4Mb sound data rom (verified) */
ROM_LOAD32_WORD( "gn2_mprlb.15b", 0x00002, 0x80000, CRC(fe2d9425) SHA1(51b166a629cbb522720d63720558816b496b6b76) )
ROM_LOAD32_WORD( "gn2_mprub.13b", 0x00000, 0x80000, CRC(3bf4985a) SHA1(f559e0d5f55d23d886fe61bd7d5ca556acc7f87c) )
- ROM_REGION16_LE( 0x4000, "c75", 0 ) /* C75 program */
- ROM_LOAD( "c75.bin", 0, 0x4000, CRC(42f539a5) SHA1(3103e5a0a2867620309fd4fe478a2be0effbeff8) )
-
ROM_REGION16_LE( 0x80000, "c75data", 0 ) /* sound data - JP1 jumper selectable between 1Mb (27C1024) or 4Mb (27C4096) either rom is correct */
// ROM_LOAD( "gn1_spr0.5b", 0, 0x20000, CRC(6836ba38) SHA1(6ea17ea4bbb59be108e8887acd7871409580732f) ) /* 1Megabit, same data as the 4Mb rom at 0x00000-0x1ffff */
ROM_LOAD( "gn1-spr0.5b", 0, 0x80000, CRC(71773811) SHA1(e482784d9b9ebf8c2e4a2a3f6f6c4dc8304d2251) ) /* 4Megabit, same data at 0x00000-0x1ffff, 0x20000-0x7ffff is 0xff filled */
@@ -1211,9 +1207,6 @@ ROM_START( gunbuletw ) /* World set using 4Mb sound data rom (verified) */
ROM_LOAD32_WORD( "gn3_mprlb.15b", 0x00002, 0x80000, CRC(9260fce5) SHA1(064579be1ac90e04082a8b403c6adf35dbb46a7e) )
ROM_LOAD32_WORD( "gn3_mprub.13b", 0x00000, 0x80000, CRC(6c1ac697) SHA1(7b52b5ef8154a5d741ac24673f3e6bbfa246a494) )
- ROM_REGION16_LE( 0x4000, "c75", 0 ) /* C75 program */
- ROM_LOAD( "c75.bin", 0, 0x4000, CRC(42f539a5) SHA1(3103e5a0a2867620309fd4fe478a2be0effbeff8) )
-
ROM_REGION16_LE( 0x80000, "c75data", 0 ) /* sound data - JP1 jumper selectable between 1Mb (27C1024) or 4Mb (27C4096) either rom is correct */
// ROM_LOAD( "gn1_spr0.5b", 0, 0x20000, CRC(6836ba38) SHA1(6ea17ea4bbb59be108e8887acd7871409580732f) ) /* 1Megabit, same data as the 4Mb rom at 0x00000-0x1ffff */
ROM_LOAD( "gn1-spr0.5b", 0, 0x80000, CRC(71773811) SHA1(e482784d9b9ebf8c2e4a2a3f6f6c4dc8304d2251) ) /* 4Megabit, same data at 0x00000-0x1ffff, 0x20000-0x7ffff is 0xff filled */
@@ -1245,9 +1238,6 @@ ROM_START( gunbuletj ) /* Japanese set using 1Mb sound data rom (verified) */
ROM_LOAD32_WORD( "gn1_mprl.15b", 0x00002, 0x80000, CRC(f99e309e) SHA1(3fe0ddf756e6849f8effc7672456cbe32f65c98a) )
ROM_LOAD32_WORD( "gn1_mpru.13b", 0x00000, 0x80000, CRC(72a4db07) SHA1(8c5e1e51cd961b311d03f7b21f36a5bd5e8e9104) )
- ROM_REGION16_LE( 0x4000, "c75", 0 ) /* C75 program */
- ROM_LOAD( "c75.bin", 0, 0x4000, CRC(42f539a5) SHA1(3103e5a0a2867620309fd4fe478a2be0effbeff8) )
-
ROM_REGION16_LE( 0x80000, "c75data", 0 ) /* sound data - JP1 jumper selectable between 1Mb (27C1024) or 4Mb (27C4096) either rom is correct */
ROM_LOAD( "gn1_spr0.5b", 0, 0x20000, CRC(6836ba38) SHA1(6ea17ea4bbb59be108e8887acd7871409580732f) ) /* 1Megabit, same data as the 4Mb rom at 0x00000-0x1ffff */
// ROM_LOAD( "gn1-spr0.5b", 0, 0x80000, CRC(71773811) SHA1(e482784d9b9ebf8c2e4a2a3f6f6c4dc8304d2251) ) /* 4Megabit, same data at 0x00000-0x1ffff, 0x20000-0x7ffff is 0xff filled */
@@ -1279,9 +1269,6 @@ ROM_START( nebulray )
ROM_LOAD32_WORD( "nr2_mprl.15b", 0x00002, 0x80000, CRC(0431b6d4) SHA1(54c96e8ac9e753956c31bdef79d390f1c20e10ff) )
ROM_LOAD32_WORD( "nr2_mpru.13b", 0x00000, 0x80000, CRC(049b97cb) SHA1(0e344b29a4d4bdc854fa9849589772df2eeb0a05) )
- ROM_REGION16_LE( 0x4000, "c75", 0 ) /* C75 program */
- ROM_LOAD( "c75.bin", 0, 0x4000, CRC(42f539a5) SHA1(3103e5a0a2867620309fd4fe478a2be0effbeff8) )
-
ROM_REGION16_LE( 0x80000, "c75data", 0 ) /* sound data */
ROM_LOAD( "nr1-spr0", 0, 0x20000, CRC(1cc2b44b) SHA1(161f4ed39fabe89d7ee1d539f8b9f08cd0ff3111) )
@@ -1316,9 +1303,6 @@ ROM_START( nebulrayj )
ROM_LOAD32_WORD( "nr1_mprl.15b", 0x00002, 0x80000, CRC(fae5f62c) SHA1(143d716abbc834aac6270db3bbb89ec71ea3804d) )
ROM_LOAD32_WORD( "nr1_mpru.13b", 0x00000, 0x80000, CRC(42ef71f9) SHA1(20e3cb63e1fde293c60c404b378d901d635c4b79) )
- ROM_REGION16_LE( 0x4000, "c75", 0 ) /* C75 program */
- ROM_LOAD( "c75.bin", 0, 0x4000, CRC(42f539a5) SHA1(3103e5a0a2867620309fd4fe478a2be0effbeff8) )
-
ROM_REGION16_LE( 0x80000, "c75data", 0 ) /* sound data */
ROM_LOAD( "nr1-spr0", 0, 0x20000, CRC(1cc2b44b) SHA1(161f4ed39fabe89d7ee1d539f8b9f08cd0ff3111) )
@@ -1353,9 +1337,6 @@ ROM_START( gslgr94u )
ROM_LOAD32_WORD( "gse2mprl.15b", 0x00002, 0x80000, CRC(a514349c) SHA1(1f7ec81cd6193410d2f01e6f0f84878561fc8035) )
ROM_LOAD32_WORD( "gse2mpru.13b", 0x00000, 0x80000, CRC(b6afd238) SHA1(438a3411ac8ce3d22d5da8c0800738cb8d2994a9) )
- ROM_REGION16_LE( 0x4000, "c75", 0 ) /* C75 program */
- ROM_LOAD( "c75.bin", 0, 0x4000, CRC(42f539a5) SHA1(3103e5a0a2867620309fd4fe478a2be0effbeff8) )
-
ROM_REGION16_LE( 0x80000, "c75data", 0 ) /* sound data */
ROM_LOAD( "gse2spr0.bin", 0, 0x20000, CRC(17e87cfc) SHA1(9cbeadb6dfcb736e8c80eab344f70fc2f58469d6) )
@@ -1381,9 +1362,6 @@ ROM_START( gslgr94j )
ROM_LOAD32_WORD( "gs41mprl.15b", 0x00002, 0x80000, CRC(5759bdb5) SHA1(a0fb332c484e168369a69cd9dd8ea72e5f4565df) )
ROM_LOAD32_WORD( "gs41mpru.13b", 0x00000, 0x80000, CRC(78bde1e7) SHA1(911d33897f03c59c6505f5f755d80471ff019812) )
- ROM_REGION16_LE( 0x4000, "c75", 0 ) /* C75 program */
- ROM_LOAD( "c75.bin", 0, 0x4000, CRC(42f539a5) SHA1(3103e5a0a2867620309fd4fe478a2be0effbeff8) )
-
ROM_REGION16_LE( 0x80000, "c75data", 0 ) /* sound data */
ROM_LOAD( "gs41spr0.5b", 0, 0x80000, CRC(3e2b6d55) SHA1(f6a1ecaee3a9a7a535850084e469aa7f873f301e) )
@@ -1536,9 +1514,6 @@ ROM_START( gslugrsj )
ROM_LOAD32_WORD( "gs1mprl.15b", 0x00002, 0x80000, CRC(1e6c3626) SHA1(56abe21884fd87df10996db19c49ce14214d4b73) )
ROM_LOAD32_WORD( "gs1mpru.13b", 0x00000, 0x80000, CRC(ef355179) SHA1(0ab0ef4301a318681bb5827d35734a0732b35484) )
- ROM_REGION16_LE( 0x4000, "c75", 0 ) /* C75 program */
- ROM_LOAD( "c75.bin", 0, 0x4000, CRC(42f539a5) SHA1(3103e5a0a2867620309fd4fe478a2be0effbeff8) )
-
ROM_REGION16_LE( 0x80000, "c75data", 0 ) /* sound data */
ROM_LOAD( "gs1spr0.5b", 0, 0x80000, CRC(561ea20f) SHA1(adac6b77effc3a82079a9b228bafca0fcef72ba5) )
@@ -1564,9 +1539,6 @@ ROM_START( sws95 )
ROM_LOAD32_WORD( "ss51mprl.bin", 0x00002, 0x80000, CRC(c9e0107d) SHA1(0f10582416023a86ea1ef2679f3f06016c086e08) )
ROM_LOAD32_WORD( "ss51mpru.bin", 0x00000, 0x80000, CRC(0d93d261) SHA1(5edef26e2c86dbc09727d910af92747d022e4fed) )
- ROM_REGION16_LE( 0x4000, "c75", 0 ) /* C75 program */
- ROM_LOAD( "c75.bin", 0, 0x4000, CRC(42f539a5) SHA1(3103e5a0a2867620309fd4fe478a2be0effbeff8) )
-
ROM_REGION16_LE( 0x80000, "c75data", 0 ) /* sound data */
ROM_LOAD( "ss51spr0.bin", 0, 0x80000, CRC(71cb12f5) SHA1(6e13bd16a5ba14d6e47a21875db3663ada3c06a5) )
@@ -1593,9 +1565,6 @@ ROM_START( sws96 )
ROM_LOAD32_WORD( "ss61mprl.bin", 0x00002, 0x80000, CRC(06f55e73) SHA1(6be26f8a2ef600bf07c580f210d7b265ac464002) )
ROM_LOAD32_WORD( "ss61mpru.bin", 0x00000, 0x80000, CRC(0abdbb83) SHA1(67e8b712291f9bcf2c3a52fbc451fad54679cab8) )
- ROM_REGION16_LE( 0x4000, "c75", 0 ) /* C75 program */
- ROM_LOAD( "c75.bin", 0, 0x4000, CRC(42f539a5) SHA1(3103e5a0a2867620309fd4fe478a2be0effbeff8) )
-
ROM_REGION16_LE( 0x80000, "c75data", 0 ) /* sound data */
ROM_LOAD( "ss61spr0.bin", 0, 0x80000, CRC(71cb12f5) SHA1(6e13bd16a5ba14d6e47a21875db3663ada3c06a5) )
@@ -1621,9 +1590,6 @@ ROM_START( sws97 )
ROM_LOAD32_WORD( "ss71mprl.bin", 0x00002, 0x80000, CRC(bd60b50e) SHA1(9e00bacd506182ab2af2c0efdd5cc401b3e46485) )
ROM_LOAD32_WORD( "ss71mpru.bin", 0x00000, 0x80000, CRC(3444f5a8) SHA1(8d0f35b3ba8f65dbc67c3b2d273833227a8b8b2a) )
- ROM_REGION16_LE( 0x4000, "c75", 0 ) /* C75 program */
- ROM_LOAD( "c75.bin", 0, 0x4000, CRC(42f539a5) SHA1(3103e5a0a2867620309fd4fe478a2be0effbeff8) )
-
ROM_REGION16_LE( 0x80000, "c75data", 0 ) /* sound data */
ROM_LOAD( "ss71spr0.bin", 0, 0x80000, CRC(71cb12f5) SHA1(6e13bd16a5ba14d6e47a21875db3663ada3c06a5) )
@@ -1649,9 +1615,6 @@ ROM_START( vshoot )
ROM_LOAD32_WORD( "vsj1mprl.15b", 0x00002, 0x80000, CRC(83a60d92) SHA1(c3db0c79f772a79418914353a3d6ecc4883ea54e) )
ROM_LOAD32_WORD( "vsj1mpru.13b", 0x00000, 0x80000, CRC(c63eb92d) SHA1(f93bd4b91daee645677955020dc8df14dc9bfd27) )
- ROM_REGION16_LE( 0x4000, "c75", 0 ) /* C75 program */
- ROM_LOAD( "c75.bin", 0, 0x4000, CRC(42f539a5) SHA1(3103e5a0a2867620309fd4fe478a2be0effbeff8) )
-
ROM_REGION16_LE( 0x80000, "c75data", 0 ) /* sound data */
ROM_LOAD( "vsj1spr0.5b", 0, 0x80000, CRC(b0c71aa6) SHA1(a94fae02b46a645ff728d2f98827c85ff155892b) )
@@ -1837,9 +1800,6 @@ ROM_START( outfxies )
ROM_LOAD32_WORD( "ou2_mprl.11c", 0x00002, 0x80000, CRC(f414a32e) SHA1(9733ab087cfde1b8fb5b676d8a2eb5325ebdbb56) )
ROM_LOAD32_WORD( "ou2_mpru.11d", 0x00000, 0x80000, CRC(ab5083fb) SHA1(cb2e7a4838c2b80057edb83ea63116bccb1394d3) )
- ROM_REGION( 0x4000, "c75", 0 ) /* C75 program */
- ROM_LOAD( "c75.bin", 0, 0x4000, CRC(42f539a5) SHA1(3103e5a0a2867620309fd4fe478a2be0effbeff8) )
-
ROM_REGION16_LE( 0x80000, "c75data", 0 ) /* sound data */
ROM_LOAD( "ou1spr0.5b", 0, 0x80000, CRC(60cee566) SHA1(2f3b96793816d90011586e0f9f71c58b636b6d4c) )
@@ -1882,9 +1842,6 @@ ROM_START( outfxiesj )
ROM_LOAD32_WORD( "ou1_mprl.11c", 0x00002, 0x80000, CRC(d3b9e530) SHA1(3f5fe5eea817a23dfe42e76f32912ce94d4c49c9) )
ROM_LOAD32_WORD( "ou1_mpru.11d", 0x00000, 0x80000, CRC(d98308fb) SHA1(fdefeebf56464a20e3aaefd88df4eee9f7b5c4f3) )
- ROM_REGION( 0x4000, "c75", 0 ) /* C75 program */
- ROM_LOAD( "c75.bin", 0, 0x4000, CRC(42f539a5) SHA1(3103e5a0a2867620309fd4fe478a2be0effbeff8) )
-
ROM_REGION16_LE( 0x80000, "c75data", 0 ) /* sound data */
ROM_LOAD( "ou1spr0.5b", 0, 0x80000, CRC(60cee566) SHA1(2f3b96793816d90011586e0f9f71c58b636b6d4c) )
@@ -1928,9 +1885,6 @@ ROM_START( machbrkr )
ROM_LOAD32_WORD( "mb1_mprl.11c", 0x00002, 0x80000, CRC(86cf0644) SHA1(07eeadda1d94c9be2f882edb6f2eb0b98292e500) )
ROM_LOAD32_WORD( "mb1_mpru.11d", 0x00000, 0x80000, CRC(fb1ff916) SHA1(e0ba96c1f26a60f87d8050e582e164d91e132183) )
- ROM_REGION( 0x4000, "c75", 0 ) /* C75 program */
- ROM_LOAD( "c75.bin", 0, 0x4000, CRC(42f539a5) SHA1(3103e5a0a2867620309fd4fe478a2be0effbeff8) )
-
ROM_REGION16_LE( 0x80000, "c75data", 0 ) /* sound data */
ROM_LOAD( "mb1_spr0.5b", 0, 0x80000, CRC(d10f6272) SHA1(cb99e06e050dbf86998ea51ef2ca130b2acfb2f6) )
diff --git a/src/mame/drivers/namcos11.c b/src/mame/drivers/namcos11.c
index 0e2dd8933bb..f1413c555f4 100644
--- a/src/mame/drivers/namcos11.c
+++ b/src/mame/drivers/namcos11.c
@@ -271,9 +271,9 @@ Notes:
#include "emu.h"
#include "cpu/psx/psx.h"
-#include "cpu/m37710/m37710.h"
#include "video/psx.h"
#include "machine/at28c16.h"
+#include "machine/namcomcu.h"
#include "machine/ns11prot.h"
#include "sound/c352.h"
@@ -466,7 +466,6 @@ ADDRESS_MAP_START( c76_map, AS_PROGRAM, 16, namcos11_state )
AM_RANGE(0x001004, 0x001005) AM_READ_PORT("PLAYER1")
AM_RANGE(0x001006, 0x001007) AM_READ_PORT("PLAYER2")
AM_RANGE(0x004000, 0x00bfff) AM_RAM AM_SHARE("sharedram")
- AM_RANGE(0x00c000, 0x00ffff) AM_ROM AM_REGION("c76", 0x40000)
AM_RANGE(0x080000, 0x0fffff) AM_ROM AM_REGION("c76", 0)
AM_RANGE(0x200000, 0x27ffff) AM_ROM AM_REGION("c76", 0)
AM_RANGE(0x280000, 0x2fffff) AM_ROM AM_REGION("c76", 0)
@@ -558,7 +557,7 @@ static MACHINE_CONFIG_START( coh110, namcos11_state )
MCFG_RAM_DEFAULT_SIZE("4M")
/* basic machine hardware */
- MCFG_CPU_ADD("c76", M37702, 16934400)
+ MCFG_CPU_ADD("c76", NAMCO_C76, 16934400)
MCFG_CPU_PROGRAM_MAP(c76_map)
MCFG_CPU_IO_MAP(c76_io_map)
/* TODO: irq generation for these */
@@ -1028,9 +1027,8 @@ ROM_START( danceyes )
ROM_LOAD16_BYTE( "dc1rom3l.ic1", 0x0c00000, 0x200000, CRC(a76bcd4c) SHA1(817abdc43158b7aaac329c3ea17782277acb36a4) )
ROM_LOAD16_BYTE( "dc1rom3u.ic9", 0x0c00001, 0x200000, CRC(1405d123) SHA1(3d7be5558358740f5a0a3a3022543cf5aca4cf24) )
- ROM_REGION16_LE( 0x100000, "c76", 0 ) /* sound data and MCU BIOS */
+ ROM_REGION16_LE( 0x80000, "c76", 0 ) /* sound data */
ROM_LOAD( "dc1sprog.6d", 0x0000000, 0x040000, CRC(96cd7788) SHA1(68a5a53a5fc50e2b6b684c99d27d81e3a8c56287) )
- ROM_LOAD( "c76.bin", 0x040000, 0x004000, CRC(399faac7) SHA1(ceb184ef0486caf715dd997101999785f67a40b8) )
ROM_REGION( 0x1000000, "c352", 0 ) /* samples */
ROM_LOAD( "dc1wave.8k", 0x000000, 0x400000, CRC(8ba0f6a7) SHA1(e9868debd808e92b196d1baeeeae9c4855356a01) )
@@ -1054,9 +1052,8 @@ ROM_START( danceyesj )
ROM_LOAD16_BYTE( "dc1rom3l.ic1", 0x0c00000, 0x200000, CRC(a76bcd4c) SHA1(817abdc43158b7aaac329c3ea17782277acb36a4) )
ROM_LOAD16_BYTE( "dc1rom3u.ic9", 0x0c00001, 0x200000, CRC(1405d123) SHA1(3d7be5558358740f5a0a3a3022543cf5aca4cf24) )
- ROM_REGION16_LE( 0x100000, "c76", 0 ) /* sound data and MCU BIOS */
+ ROM_REGION16_LE( 0x80000, "c76", 0 ) /* sound data */
ROM_LOAD( "dc1sprog.6d", 0x0000000, 0x040000, CRC(96cd7788) SHA1(68a5a53a5fc50e2b6b684c99d27d81e3a8c56287) )
- ROM_LOAD( "c76.bin", 0x040000, 0x004000, CRC(399faac7) SHA1(ceb184ef0486caf715dd997101999785f67a40b8) )
ROM_REGION( 0x1000000, "c352", 0 ) /* samples */
ROM_LOAD( "dc1wave.8k", 0x000000, 0x400000, CRC(8ba0f6a7) SHA1(e9868debd808e92b196d1baeeeae9c4855356a01) )
@@ -1080,9 +1077,8 @@ ROM_START( dunkmnia )
ROM_LOAD16_BYTE( "dm1rom1u.ic8", 0x0400001, 0x200000, CRC(01e905d3) SHA1(430b2ae0c67265b6acc8aa4dd50f6144929993f8) )
ROM_CONTINUE( 0x0400001, 0x200000 ) /* first & second half identical */
- ROM_REGION16_LE( 0x100000, "c76", 0 ) /* sound data and MCU BIOS */
+ ROM_REGION16_LE( 0x80000, "c76", 0 ) /* sound data */
ROM_LOAD( "dm1sprog.6d", 0x0000000, 0x040000, CRC(de1cbc78) SHA1(855ebece1841f50ae324d7d6b8b18ab6f657d28e) )
- ROM_LOAD( "c76.bin", 0x040000, 0x004000, CRC(399faac7) SHA1(ceb184ef0486caf715dd997101999785f67a40b8) )
ROM_REGION( 0x1000000, "c352", 0 ) /* samples */
ROM_LOAD( "dm1wave.8k", 0x000000, 0x400000, CRC(4891d53e) SHA1(a1fee060e94d3219174b5974517f4fd3be32aaa5) )
@@ -1106,9 +1102,8 @@ ROM_START( dunkmniajc )
ROM_LOAD16_BYTE( "dm1rom1u.ic8", 0x0400001, 0x200000, CRC(01e905d3) SHA1(430b2ae0c67265b6acc8aa4dd50f6144929993f8) )
ROM_CONTINUE( 0x0400001, 0x200000 ) /* first & second half identical */
- ROM_REGION16_LE( 0x100000, "c76", 0 ) /* sound data and MCU BIOS */
+ ROM_REGION16_LE( 0x80000, "c76", 0 ) /* sound data and MCU BIOS */
ROM_LOAD( "dm1sprog.6d", 0x0000000, 0x040000, CRC(de1cbc78) SHA1(855ebece1841f50ae324d7d6b8b18ab6f657d28e) )
- ROM_LOAD( "c76.bin", 0x040000, 0x004000, CRC(399faac7) SHA1(ceb184ef0486caf715dd997101999785f67a40b8) )
ROM_REGION( 0x1000000, "c352", 0 ) /* samples */
ROM_LOAD( "dm1wave.8k", 0x800000, 0x400000, CRC(4891d53e) SHA1(a1fee060e94d3219174b5974517f4fd3be32aaa5) )
@@ -1125,9 +1120,8 @@ ROM_START( myangel3 )
ROM_LOAD16_BYTE( "kqt1prg1l.ic3", 0x1000000, 0x800000, CRC(298d8eeb) SHA1(c421b1bdd5fd46c026a41e2cec47cafd1a69d33d) )
ROM_LOAD16_BYTE( "kqt1prg1u.ic6", 0x1000001, 0x800000, CRC(911783db) SHA1(1005fc9b38e212844e397150a6f98f43ad88d4b9) )
- ROM_REGION16_LE( 0x100000, "c76", 0 ) /* sound data and MCU BIOS */
+ ROM_REGION16_LE( 0x80000, "c76", 0 ) /* sound data */
ROM_LOAD( "kqt1sprog.7e", 0x0000000, 0x040000, CRC(bb1888a6) SHA1(4db07738079725413cdba7eb75252ee71ae50a66) )
- ROM_LOAD( "c76.bin", 0x040000, 0x004000, CRC(399faac7) SHA1(ceb184ef0486caf715dd997101999785f67a40b8) )
ROM_REGION( 0x1000000, "c352", 0 ) /* samples */
ROM_LOAD( "kqt1wave.8k", 0x000000, 0x400000, CRC(92ca8e4f) SHA1(48d6bdfcc5de1c280afa36c3f0dd6d4177771355) )
@@ -1143,9 +1137,8 @@ ROM_START( pocketrc )
ROM_LOAD16_BYTE( "pkr1rom0l.ic5", 0x000000, 0x200000, CRC(6c9b074c) SHA1(885f342bd178e4146e1f75259206f6625c0b3c18) )
ROM_LOAD16_BYTE( "pkr1rom0u.ic6", 0x000001, 0x200000, CRC(a55c0906) SHA1(3b6abfa877f88a4d96222d98af02498b0c777af6) )
- ROM_REGION16_LE( 0x100000, "c76", 0 ) /* sound data and MCU BIOS */
+ ROM_REGION16_LE( 0x80000, "c76", 0 ) /* sound data */
ROM_LOAD( "pkr1verb.6d", 0x000000, 0x040000, CRC(9bf08992) SHA1(fca7943f7bcf0ee758fa63fbdef8f7456b9e46cb) )
- ROM_LOAD( "c76.bin", 0x040000, 0x004000, CRC(399faac7) SHA1(ceb184ef0486caf715dd997101999785f67a40b8) )
ROM_REGION( 0x1000000, "c352", 0 ) /* samples */
ROM_LOAD( "pkr1wave.8k", 0x000000, 0x400000, CRC(72517c46) SHA1(d0dcc750fe8eca9e965e7c366ac39a42ffd76557) )
@@ -1167,9 +1160,8 @@ ROM_START( primglex )
ROM_LOAD16_BYTE( "pg1rom1l.ic8", 0x0400001, 0x200000, CRC(59b5a71c) SHA1(ddc1f0a5488466166c21fd0c84ab2b4cf04316bf) )
ROM_CONTINUE( 0x0400001, 0x200000 ) /* first & second half identical */
- ROM_REGION16_LE( 0x100000, "c76", 0 ) /* sound data and MCU BIOS */
+ ROM_REGION16_LE( 0x80000, "c76", 0 ) /* sound data */
ROM_LOAD( "pg1sprog.6d", 0x0000000, 0x040000, CRC(e7c3396d) SHA1(12bbb8ebcaab1b40462a12917dd9b58bd9ab8663) )
- ROM_LOAD( "c76.bin", 0x040000, 0x004000, CRC(399faac7) SHA1(ceb184ef0486caf715dd997101999785f67a40b8) )
ROM_REGION( 0x1000000, "c352", 0 ) /* samples */
ROM_LOAD( "pg1wave.8k", 0x0000000, 0x400000, CRC(fc9ad9eb) SHA1(ce5bb2288ed8cf1348825c39423cbb99d9324b9c) )
@@ -1187,9 +1179,8 @@ ROM_START( ptblank2ua )
ROM_LOAD16_BYTE( "gnb1prg0l.ic2", 0x000000, 0x800000, CRC(78746037) SHA1(d130ca1153a730e3c967945248f00662f9fab304) )
ROM_LOAD16_BYTE( "gnb1prg0u.ic5", 0x000001, 0x800000, CRC(697d3279) SHA1(40302780f7494d9413888b2d1da38bd14a9a444f) )
- ROM_REGION16_LE( 0x100000, "c76", 0 ) /* sound data and MCU BIOS */
+ ROM_REGION16_LE( 0x80000, "c76", 0 ) /* sound data */
ROM_LOAD( "gnb1vera.6d", 0x0000000, 0x040000, CRC(6461ae77) SHA1(1377b716a69ef9d4d2e48083d23f22bd5c103c00) )
- ROM_LOAD( "c76.bin", 0x040000, 0x004000, CRC(399faac7) SHA1(ceb184ef0486caf715dd997101999785f67a40b8) )
ROM_REGION( 0x1000000, "c352", 0 ) /* samples */
ROM_LOAD( "gnb1wave.8k", 0x0000000, 0x400000, CRC(4e19d9d6) SHA1(0a92c987536999a789663a30c787950ab6995128) )
@@ -1213,9 +1204,8 @@ ROM_START( souledge )
ROM_LOAD16_BYTE( "so1rom3u.ic1", 0x0c00000, 0x200000, CRC(f11bd521) SHA1(baf936dec58cebfeef1c74f95e455b2fe74eb982) )
ROM_LOAD16_BYTE( "so1rom3l.ic9", 0x0c00001, 0x200000, CRC(84465bcc) SHA1(d8be888d41cfe194c3a1853d9146d3a74ef7bab1) )
- ROM_REGION16_LE( 0x100000, "c76", 0 ) /* sound data and MCU BIOS */
+ ROM_REGION16_LE( 0x80000, "c76", 0 ) /* sound data */
ROM_LOAD( "so1sprogc.6d", 0x0000000, 0x040000, CRC(2bbc118c) SHA1(4168a9aa525f1f0ce6cf6e14cfe4c118c4c0d773) )
- ROM_LOAD( "c76.bin", 0x040000, 0x004000, CRC(399faac7) SHA1(ceb184ef0486caf715dd997101999785f67a40b8) )
ROM_REGION( 0x1000000, "c352", 0 ) /* samples */
ROM_LOAD( "so1wave.8k", 0x000000, 0x400000, CRC(0e68836b) SHA1(c392b370a807803c7ab060105861253e1b407f49) )
@@ -1239,9 +1229,8 @@ ROM_START( souledgeuc )
ROM_LOAD16_BYTE( "so1rom3u.ic1", 0x0c00000, 0x200000, CRC(f11bd521) SHA1(baf936dec58cebfeef1c74f95e455b2fe74eb982) )
ROM_LOAD16_BYTE( "so1rom3l.ic9", 0x0c00001, 0x200000, CRC(84465bcc) SHA1(d8be888d41cfe194c3a1853d9146d3a74ef7bab1) )
- ROM_REGION16_LE( 0x100000, "c76", 0 ) /* sound data and MCU BIOS */
+ ROM_REGION16_LE( 0x80000, "c76", 0 ) /* sound data */
ROM_LOAD( "so1sprogc.6d", 0x0000000, 0x040000, CRC(2bbc118c) SHA1(4168a9aa525f1f0ce6cf6e14cfe4c118c4c0d773) )
- ROM_LOAD( "c76.bin", 0x040000, 0x004000, CRC(399faac7) SHA1(ceb184ef0486caf715dd997101999785f67a40b8) )
ROM_REGION( 0x1000000, "c352", 0 ) /* samples */
ROM_LOAD( "so1wave.8k", 0x000000, 0x400000, CRC(0e68836b) SHA1(c392b370a807803c7ab060105861253e1b407f49) )
@@ -1265,9 +1254,8 @@ ROM_START( souledgeua )
ROM_LOAD16_BYTE( "so1rom3u.ic1", 0x0c00000, 0x200000, CRC(f11bd521) SHA1(baf936dec58cebfeef1c74f95e455b2fe74eb982) )
ROM_LOAD16_BYTE( "so1rom3l.ic9", 0x0c00001, 0x200000, CRC(84465bcc) SHA1(d8be888d41cfe194c3a1853d9146d3a74ef7bab1) )
- ROM_REGION16_LE( 0x100000, "c76", 0 ) /* sound data and MCU BIOS */
+ ROM_REGION16_LE( 0x80000, "c76", 0 ) /* sound data */
ROM_LOAD( "so1sprog.6d", 0x0000000, 0x040000, CRC(f6f682b7) SHA1(a64e19be3f6e630b8c34f34b46b95aadfabd3f63) )
- ROM_LOAD( "c76.bin", 0x040000, 0x004000, CRC(399faac7) SHA1(ceb184ef0486caf715dd997101999785f67a40b8) )
ROM_REGION( 0x1000000, "c352", 0 ) /* samples */
ROM_LOAD( "so1wave.8k", 0x800000, 0x400000, CRC(0e68836b) SHA1(c392b370a807803c7ab060105861253e1b407f49) )
@@ -1290,9 +1278,8 @@ ROM_START( souledgeaa )
ROM_LOAD16_BYTE( "so1rom3u.ic1", 0x0c00000, 0x200000, CRC(f11bd521) SHA1(baf936dec58cebfeef1c74f95e455b2fe74eb982) )
ROM_LOAD16_BYTE( "so1rom3l.ic9", 0x0c00001, 0x200000, CRC(84465bcc) SHA1(d8be888d41cfe194c3a1853d9146d3a74ef7bab1) )
- ROM_REGION16_LE( 0x100000, "c76", 0 ) /* sound data and MCU BIOS */
+ ROM_REGION16_LE( 0x80000, "c76", 0 ) /* sound data */
ROM_LOAD( "so1sprog.6d", 0x0000000, 0x040000, CRC(f6f682b7) SHA1(a64e19be3f6e630b8c34f34b46b95aadfabd3f63) )
- ROM_LOAD( "c76.bin", 0x040000, 0x004000, CRC(399faac7) SHA1(ceb184ef0486caf715dd997101999785f67a40b8) )
ROM_REGION( 0x1000000, "c352", 0 ) /* samples */
ROM_LOAD( "so1wave.8k", 0x000000, 0x400000, CRC(0e68836b) SHA1(c392b370a807803c7ab060105861253e1b407f49) )
@@ -1316,9 +1303,8 @@ ROM_START( souledgeja )
ROM_LOAD16_BYTE( "so1rom3u.ic1", 0x0c00000, 0x200000, CRC(f11bd521) SHA1(baf936dec58cebfeef1c74f95e455b2fe74eb982) )
ROM_LOAD16_BYTE( "so1rom3l.ic9", 0x0c00001, 0x200000, CRC(84465bcc) SHA1(d8be888d41cfe194c3a1853d9146d3a74ef7bab1) )
- ROM_REGION16_LE( 0x100000, "c76", 0 ) /* sound data and MCU BIOS */
+ ROM_REGION16_LE( 0x80000, "c76", 0 ) /* sound data */
ROM_LOAD( "so1sprog.6d", 0x0000000, 0x040000, CRC(f6f682b7) SHA1(a64e19be3f6e630b8c34f34b46b95aadfabd3f63) )
- ROM_LOAD( "c76.bin", 0x040000, 0x004000, CRC(399faac7) SHA1(ceb184ef0486caf715dd997101999785f67a40b8) )
ROM_REGION( 0x1000000, "c352", 0 ) /* samples */
ROM_LOAD( "so1wave.8k", 0x000000, 0x400000, CRC(0e68836b) SHA1(c392b370a807803c7ab060105861253e1b407f49) )
@@ -1330,9 +1316,8 @@ ROM_START( starswep )
ROM_LOAD( "stp1vera.1j", 0x0000000, 0x200000, CRC(ef83e126) SHA1(f721b43358cedad0f28af5d2b292b44043fd47a0) )
ROM_LOAD( "stp1vera.1l", 0x0200000, 0x200000, CRC(0ee7fe1e) SHA1(8c2f5b0e7b49dbe0e8105bf55c493acd46a4f59d) )
- ROM_REGION16_LE( 0x100000, "c76", 0 ) /* sound data and MCU BIOS */
+ ROM_REGION16_LE( 0x80000, "c76", 0 ) /* sound data */
ROM_LOAD( "stp1sprog.7e", 0x0000000, 0x040000, CRC(08aaaf6a) SHA1(51c913a39ff7c154aef8bb10139cc8b92eb4756a) )
- ROM_LOAD( "c76.bin", 0x040000, 0x004000, CRC(399faac7) SHA1(ceb184ef0486caf715dd997101999785f67a40b8) )
ROM_REGION( 0x1000000, "c352", 0 ) /* samples */
ROM_LOAD( "stp1wave.8k", 0x000000, 0x400000, CRC(18f30e92) SHA1(b3819455856298527a7224495f541145aecf23dd) )
@@ -1354,9 +1339,8 @@ ROM_START( tekken )
ROM_LOAD16_BYTE( "te1rom2l.ic4", 0x0800000, 0x200000, CRC(41d77846) SHA1(eeab049135c02a255899fe37e225c1111b2fbb7d) )
ROM_LOAD16_BYTE( "te1rom2u.ic7", 0x0800001, 0x200000, CRC(a678987e) SHA1(c62c00ce5cf4d001723c999b2bc3dbb90283def1) )
- ROM_REGION16_LE( 0x100000, "c76", 0 ) /* sound data and MCU BIOS */
+ ROM_REGION16_LE( 0x80000, "c76", 0 ) /* sound data */
ROM_LOAD( "te1sprog.6d", 0x0000000, 0x040000, CRC(849587e9) SHA1(94c6a757b24758a866a41bd8acd46aa46844f74b) )
- ROM_LOAD( "c76.bin", 0x040000, 0x004000, CRC(399faac7) SHA1(ceb184ef0486caf715dd997101999785f67a40b8) )
ROM_REGION( 0x1000000, "c352", 0 ) /* samples */
ROM_LOAD( "te1wave.8k", 0x0000000, 0x200000, CRC(fce6c57a) SHA1(7fb8c69452c92c59a940a2b69d0d73ef7aefcb82) )
@@ -1377,9 +1361,8 @@ ROM_START( tekkenac )
ROM_LOAD16_BYTE( "te1rom2l.ic4", 0x0800000, 0x200000, CRC(41d77846) SHA1(eeab049135c02a255899fe37e225c1111b2fbb7d) )
ROM_LOAD16_BYTE( "te1rom2u.ic7", 0x0800001, 0x200000, CRC(a678987e) SHA1(c62c00ce5cf4d001723c999b2bc3dbb90283def1) )
- ROM_REGION16_LE( 0x100000, "c76", 0 ) /* sound data and MCU BIOS */
+ ROM_REGION16_LE( 0x80000, "c76", 0 ) /* sound data */
ROM_LOAD( "te1sprog.6d", 0x0000000, 0x040000, CRC(849587e9) SHA1(94c6a757b24758a866a41bd8acd46aa46844f74b) )
- ROM_LOAD( "c76.bin", 0x040000, 0x004000, CRC(399faac7) SHA1(ceb184ef0486caf715dd997101999785f67a40b8) )
ROM_REGION( 0x1000000, "c352", 0 ) /* samples */
ROM_LOAD( "te1wave.8k", 0x0000000, 0x200000, CRC(fce6c57a) SHA1(7fb8c69452c92c59a940a2b69d0d73ef7aefcb82) )
@@ -1400,9 +1383,8 @@ ROM_START( tekkenab )
ROM_LOAD16_BYTE( "te1rom2l.ic4", 0x0800000, 0x200000, CRC(41d77846) SHA1(eeab049135c02a255899fe37e225c1111b2fbb7d) )
ROM_LOAD16_BYTE( "te1rom2u.ic7", 0x0800001, 0x200000, CRC(a678987e) SHA1(c62c00ce5cf4d001723c999b2bc3dbb90283def1) )
- ROM_REGION16_LE( 0x100000, "c76", 0 ) /* sound data and MCU BIOS */
+ ROM_REGION16_LE( 0x80000, "c76", 0 ) /* sound data */
ROM_LOAD( "te1sprog.6d", 0x0000000, 0x040000, CRC(849587e9) SHA1(94c6a757b24758a866a41bd8acd46aa46844f74b) )
- ROM_LOAD( "c76.bin", 0x040000, 0x004000, CRC(399faac7) SHA1(ceb184ef0486caf715dd997101999785f67a40b8) )
ROM_REGION( 0x1000000, "c352", 0 ) /* samples */
ROM_LOAD( "te1wave.8k", 0x0000000, 0x200000, CRC(fce6c57a) SHA1(7fb8c69452c92c59a940a2b69d0d73ef7aefcb82) )
@@ -1423,9 +1405,8 @@ ROM_START( tekkenjb )
ROM_LOAD16_BYTE( "te1rom2l.ic4", 0x0800000, 0x200000, CRC(41d77846) SHA1(eeab049135c02a255899fe37e225c1111b2fbb7d) )
ROM_LOAD16_BYTE( "te1rom2u.ic7", 0x0800001, 0x200000, CRC(a678987e) SHA1(c62c00ce5cf4d001723c999b2bc3dbb90283def1) )
- ROM_REGION16_LE( 0x100000, "c76", 0 ) /* sound data and MCU BIOS */
+ ROM_REGION16_LE( 0x80000, "c76", 0 ) /* sound data */
ROM_LOAD( "te1sprog.6d", 0x0000000, 0x040000, CRC(849587e9) SHA1(94c6a757b24758a866a41bd8acd46aa46844f74b) )
- ROM_LOAD( "c76.bin", 0x040000, 0x004000, CRC(399faac7) SHA1(ceb184ef0486caf715dd997101999785f67a40b8) )
ROM_REGION( 0x1000000, "c352", 0 ) /* samples */
ROM_LOAD( "te1wave.8k", 0x0000000, 0x200000, CRC(fce6c57a) SHA1(7fb8c69452c92c59a940a2b69d0d73ef7aefcb82) )
@@ -1448,9 +1429,8 @@ ROM_START( tekken2 )
ROM_LOAD16_BYTE( "tes1rom3l.ic9", 0x0c00000, 0x200000, CRC(d5ac0f18) SHA1(342d063f7974bd1f90b5ca4832dfa4fbc9605453) )
ROM_LOAD16_BYTE( "tes1rom3u.ic1", 0x0c00001, 0x200000, CRC(44ed509d) SHA1(27e26aaf5ce72ab686f3f05743b1d91b5334b4e0) )
- ROM_REGION16_LE( 0x100000, "c76", 0 ) /* sound data and MCU BIOS */
+ ROM_REGION16_LE( 0x80000, "c76", 0 ) /* sound data */
ROM_LOAD( "tes1sprog.6d", 0x0000000, 0x040000, CRC(af18759f) SHA1(aabd7d1384925781d37f860605a5d4622e0fc2e4) )
- ROM_LOAD( "c76.bin", 0x040000, 0x004000, CRC(399faac7) SHA1(ceb184ef0486caf715dd997101999785f67a40b8) )
ROM_REGION( 0x1000000, "c352", 0 ) /* samples */
ROM_LOAD( "tes1wave.8k", 0x800000, 0x400000, CRC(34a34eab) SHA1(8e83a579abdcd419dc5cff8aa4c1d7e6c3add773) )
@@ -1473,9 +1453,8 @@ ROM_START( tekken2ub )
ROM_LOAD16_BYTE( "tes1rom3l.ic9", 0x0c00000, 0x200000, CRC(d5ac0f18) SHA1(342d063f7974bd1f90b5ca4832dfa4fbc9605453) )
ROM_LOAD16_BYTE( "tes1rom3u.ic1", 0x0c00001, 0x200000, CRC(44ed509d) SHA1(27e26aaf5ce72ab686f3f05743b1d91b5334b4e0) )
- ROM_REGION16_LE( 0x100000, "c76", 0 ) /* sound data and MCU BIOS */
+ ROM_REGION16_LE( 0x80000, "c76", 0 ) /* sound data */
ROM_LOAD( "tes1sprog.6d", 0x0000000, 0x040000, CRC(af18759f) SHA1(aabd7d1384925781d37f860605a5d4622e0fc2e4) )
- ROM_LOAD( "c76.bin", 0x040000, 0x004000, CRC(399faac7) SHA1(ceb184ef0486caf715dd997101999785f67a40b8) )
ROM_REGION( 0x1000000, "c352", 0 ) /* samples */
ROM_LOAD( "tes1wave.8k", 0x800000, 0x400000, CRC(34a34eab) SHA1(8e83a579abdcd419dc5cff8aa4c1d7e6c3add773) )
@@ -1498,9 +1477,8 @@ ROM_START( tekken2ab )
ROM_LOAD16_BYTE( "tes1rom3l.ic9", 0x0c00000, 0x200000, CRC(d5ac0f18) SHA1(342d063f7974bd1f90b5ca4832dfa4fbc9605453) )
ROM_LOAD16_BYTE( "tes1rom3u.ic1", 0x0c00001, 0x200000, CRC(44ed509d) SHA1(27e26aaf5ce72ab686f3f05743b1d91b5334b4e0) )
- ROM_REGION16_LE( 0x100000, "c76", 0 ) /* sound data and MCU BIOS */
+ ROM_REGION16_LE( 0x80000, "c76", 0 ) /* sound data */
ROM_LOAD( "tes1sprog.6d", 0x0000000, 0x040000, CRC(af18759f) SHA1(aabd7d1384925781d37f860605a5d4622e0fc2e4) )
- ROM_LOAD( "c76.bin", 0x040000, 0x004000, CRC(399faac7) SHA1(ceb184ef0486caf715dd997101999785f67a40b8) )
ROM_REGION( 0x1000000, "c352", 0 ) /* samples */
ROM_LOAD( "tes1wave.8k", 0x800000, 0x400000, CRC(34a34eab) SHA1(8e83a579abdcd419dc5cff8aa4c1d7e6c3add773) )
@@ -1523,9 +1501,8 @@ ROM_START( tekken2aa )
ROM_LOAD16_BYTE( "tes1rom3l.ic9", 0x0c00000, 0x200000, CRC(d5ac0f18) SHA1(342d063f7974bd1f90b5ca4832dfa4fbc9605453) )
ROM_LOAD16_BYTE( "tes1rom3u.ic1", 0x0c00001, 0x200000, CRC(44ed509d) SHA1(27e26aaf5ce72ab686f3f05743b1d91b5334b4e0) )
- ROM_REGION16_LE( 0x100000, "c76", 0 ) /* sound data and MCU BIOS */
+ ROM_REGION16_LE( 0x80000, "c76", 0 ) /* sound data */
ROM_LOAD( "tes1sprog.6d", 0x0000000, 0x040000, CRC(af18759f) SHA1(aabd7d1384925781d37f860605a5d4622e0fc2e4) )
- ROM_LOAD( "c76.bin", 0x040000, 0x004000, CRC(399faac7) SHA1(ceb184ef0486caf715dd997101999785f67a40b8) )
ROM_REGION( 0x1000000, "c352", 0 ) /* samples */
ROM_LOAD( "tes1wave.8k", 0x800000, 0x400000, CRC(34a34eab) SHA1(8e83a579abdcd419dc5cff8aa4c1d7e6c3add773) )
@@ -1548,9 +1525,8 @@ ROM_START( tekken2jc )
ROM_LOAD16_BYTE( "tes1rom3l.ic9", 0x0c00000, 0x200000, CRC(d5ac0f18) SHA1(342d063f7974bd1f90b5ca4832dfa4fbc9605453) )
ROM_LOAD16_BYTE( "tes1rom3u.ic1", 0x0c00001, 0x200000, CRC(44ed509d) SHA1(27e26aaf5ce72ab686f3f05743b1d91b5334b4e0) )
- ROM_REGION16_LE( 0x100000, "c76", 0 ) /* sound data and MCU BIOS */
+ ROM_REGION16_LE( 0x80000, "c76", 0 ) /* sound data */
ROM_LOAD( "tes1sprog.6d", 0x0000000, 0x040000, CRC(af18759f) SHA1(aabd7d1384925781d37f860605a5d4622e0fc2e4) )
- ROM_LOAD( "c76.bin", 0x040000, 0x004000, CRC(399faac7) SHA1(ceb184ef0486caf715dd997101999785f67a40b8) )
ROM_REGION( 0x1000000, "c352", 0 ) /* samples */
ROM_LOAD( "tes1wave.8k", 0x800000, 0x400000, CRC(34a34eab) SHA1(8e83a579abdcd419dc5cff8aa4c1d7e6c3add773) )
@@ -1573,9 +1549,8 @@ ROM_START( tekken2jb )
ROM_LOAD16_BYTE( "tes1rom3l.ic9", 0x0c00000, 0x200000, CRC(d5ac0f18) SHA1(342d063f7974bd1f90b5ca4832dfa4fbc9605453) )
ROM_LOAD16_BYTE( "tes1rom3u.ic1", 0x0c00001, 0x200000, CRC(44ed509d) SHA1(27e26aaf5ce72ab686f3f05743b1d91b5334b4e0) )
- ROM_REGION16_LE( 0x100000, "c76", 0 ) /* sound data and MCU BIOS */
+ ROM_REGION16_LE( 0x80000, "c76", 0 ) /* sound data */
ROM_LOAD( "tes1sprog.6d", 0x0000000, 0x040000, CRC(af18759f) SHA1(aabd7d1384925781d37f860605a5d4622e0fc2e4) )
- ROM_LOAD( "c76.bin", 0x040000, 0x004000, CRC(399faac7) SHA1(ceb184ef0486caf715dd997101999785f67a40b8) )
ROM_REGION( 0x1000000, "c352", 0 ) /* samples */
ROM_LOAD( "tes1wave.8k", 0x800000, 0x400000, CRC(34a34eab) SHA1(8e83a579abdcd419dc5cff8aa4c1d7e6c3add773) )
@@ -1596,9 +1571,8 @@ ROM_START( xevi3dg )
ROM_LOAD16_BYTE( "xv31rom2l.ic4", 0x0800000, 0x200000, CRC(8403a277) SHA1(35193211351494a086d8422e3b0b71a8d3a262a6) )
ROM_LOAD16_BYTE( "xv31rom2u.ic7", 0x0800001, 0x200000, CRC(ecf70432) SHA1(bec128a215e0aef66e9a8707bb0d1eb7b098a356) )
- ROM_REGION16_LE( 0x100000, "c76", 0 ) /* sound data and MCU BIOS */
+ ROM_REGION16_LE( 0x80000, "c76", 0 ) /* sound data */
ROM_LOAD( "xv31sprog.6d", 0x0000000, 0x040000, CRC(e50b856a) SHA1(631da4f60c9ce08387fca26a70481a2fdacf9765) )
- ROM_LOAD( "c76.bin", 0x040000, 0x004000, CRC(399faac7) SHA1(ceb184ef0486caf715dd997101999785f67a40b8) )
ROM_REGION( 0x1000000, "c352", 0 ) /* samples */
ROM_LOAD( "xv31wave.8k", 0x000000, 0x400000, CRC(14f25ddd) SHA1(4981cf1017432ff85b768ec88c36f535df30b783) )
diff --git a/src/mame/drivers/namcos22.c b/src/mame/drivers/namcos22.c
index 13db580cfce..0aeb6dbc7b1 100644
--- a/src/mame/drivers/namcos22.c
+++ b/src/mame/drivers/namcos22.c
@@ -1158,7 +1158,7 @@
#include "includes/namcos22.h"
#include "cpu/m68000/m68000.h"
#include "cpu/tms32025/tms32025.h"
-#include "cpu/m37710/m37710.h"
+#include "machine/namcomcu.h"
#include "sound/c352.h"
#define SS22_MASTER_CLOCK (XTAL_49_152MHz) /* info from Guru */
@@ -2714,7 +2714,6 @@ READ8_MEMBER(namcos22_state::iomcu_port4_s22_r)
static ADDRESS_MAP_START( mcu_s22_program, AS_PROGRAM, 16, namcos22_state )
AM_RANGE(0x002000, 0x002fff) AM_DEVREADWRITE("c352", c352_device, read, write)
AM_RANGE(0x004000, 0x00bfff) AM_READWRITE(s22mcu_shared_r, s22mcu_shared_w )
- AM_RANGE(0x00c000, 0x00ffff) AM_ROM AM_REGION("mcu_c74", 0)
AM_RANGE(0x080000, 0x0fffff) AM_ROM AM_REGION("mcu", 0)
AM_RANGE(0x200000, 0x27ffff) AM_ROM AM_REGION("mcu", 0)
AM_RANGE(0x280000, 0x2fffff) AM_ROM AM_REGION("mcu", 0)
@@ -2723,7 +2722,7 @@ static ADDRESS_MAP_START( mcu_s22_program, AS_PROGRAM, 16, namcos22_state )
ADDRESS_MAP_END
static ADDRESS_MAP_START( iomcu_s22_program, AS_PROGRAM, 16, namcos22_state )
- AM_RANGE(0x00c000, 0x00ffff) AM_ROM AM_REGION("iomcu", 0)
+ // is there any external memory or MMIO on this one?
ADDRESS_MAP_END
static ADDRESS_MAP_START( mcu_s22_io, AS_IO, 8, namcos22_state )
@@ -3762,11 +3761,11 @@ static MACHINE_CONFIG_START( namcos22, namcos22_state )
MCFG_CPU_IO_MAP(slave_dsp_io)
MCFG_TIMER_DRIVER_ADD_SCANLINE("slave_st", namcos22_state, dsp_slave_serial_irq, "screen", 0, 1)
- MCFG_CPU_ADD("mcu", M37702, SS22_MASTER_CLOCK/3) // C74 on the CPU board has no periodic interrupts, it runs entirely off Timer A0
+ MCFG_CPU_ADD("mcu", NAMCO_C74, SS22_MASTER_CLOCK/3) // C74 on the CPU board has no periodic interrupts, it runs entirely off Timer A0
MCFG_CPU_PROGRAM_MAP( mcu_s22_program)
MCFG_CPU_IO_MAP( mcu_s22_io)
- MCFG_CPU_ADD("iomcu", M37702, XTAL_6_144MHz) // 6.144MHz XTAL on I/O board, not sure if it has a divider
+ MCFG_CPU_ADD("iomcu", NAMCO_C74, XTAL_6_144MHz) // 6.144MHz XTAL on I/O board, not sure if it has a divider
MCFG_CPU_PROGRAM_MAP( iomcu_s22_program)
MCFG_CPU_IO_MAP( iomcu_s22_io)
@@ -3813,7 +3812,7 @@ static MACHINE_CONFIG_START( namcos22s, namcos22_state )
MCFG_CPU_IO_MAP(slave_dsp_io)
MCFG_TIMER_DRIVER_ADD_SCANLINE("slave_st", namcos22_state, dsp_slave_serial_irq, "screen", 0, 1)
- MCFG_CPU_ADD("mcu", M37710, SS22_MASTER_CLOCK/3)
+ MCFG_CPU_ADD("mcu", M37710S4, SS22_MASTER_CLOCK/3)
MCFG_CPU_PROGRAM_MAP(mcu_program)
MCFG_CPU_IO_MAP(mcu_io)
MCFG_TIMER_DRIVER_ADD_SCANLINE("mcu_st", namcos22_state, mcu_irq, "screen", 0, 1)
@@ -3908,12 +3907,6 @@ ROM_START( ridgerac )
ROM_REGION( 0x10000*2, "slave", 0 ) /* Slave DSP */
ROM_LOAD16_WORD( "c71.bin", 0,0x1000*2, CRC(47c623ab) SHA1(e363ac50f5556f83308d4cc191b455e9b62bcfc8) )
- ROM_REGION16_LE( 0x4000, "iomcu", 0 ) /* I/O MCU BIOS */
- ROM_LOAD( "c74.bin", 0x0000, 0x4000, CRC(a3dce360) SHA1(8f3248b1890abb2e649927240ae46f73bb171e3b) )
-
- ROM_REGION16_LE( 0x4000, "mcu_c74", 0 ) /* SUB/SOUND MCU BIOS */
- ROM_LOAD( "c74.bin", 0x0000, 0x4000, CRC(a3dce360) SHA1(8f3248b1890abb2e649927240ae46f73bb171e3b) )
-
ROM_REGION16_LE( 0x80000, "mcu", 0 ) /* sound data */
ROM_LOAD( "rr1data.6r", 0, 0x080000, CRC(18f5f748) SHA1(e0d149a66de36156edd9b55f604c9a9801aaefa8) )
@@ -3960,12 +3953,6 @@ ROM_START( ridgeracb )
ROM_REGION( 0x10000*2, "slave", 0 ) /* Slave DSP */
ROM_LOAD16_WORD( "c71.bin", 0,0x1000*2, CRC(47c623ab) SHA1(e363ac50f5556f83308d4cc191b455e9b62bcfc8) )
- ROM_REGION16_LE( 0x4000, "iomcu", 0 ) /* I/O MCU BIOS */
- ROM_LOAD( "c74.bin", 0x0000, 0x4000, CRC(a3dce360) SHA1(8f3248b1890abb2e649927240ae46f73bb171e3b) )
-
- ROM_REGION16_LE( 0x4000, "mcu_c74", 0 ) /* SUB/SOUND MCU BIOS */
- ROM_LOAD( "c74.bin", 0x0000, 0x4000, CRC(a3dce360) SHA1(8f3248b1890abb2e649927240ae46f73bb171e3b) )
-
ROM_REGION16_LE( 0x80000, "mcu", 0 ) /* sound data */
ROM_LOAD( "rr1data.6r", 0, 0x080000, CRC(18f5f748) SHA1(e0d149a66de36156edd9b55f604c9a9801aaefa8) )
@@ -4012,12 +3999,6 @@ ROM_START( ridgeracj )
ROM_REGION( 0x10000*2, "slave", 0 ) /* Slave DSP */
ROM_LOAD16_WORD( "c71.bin", 0,0x1000*2, CRC(47c623ab) SHA1(e363ac50f5556f83308d4cc191b455e9b62bcfc8) )
- ROM_REGION16_LE( 0x4000, "iomcu", 0 ) /* I/O MCU BIOS */
- ROM_LOAD( "c74.bin", 0x0000, 0x4000, CRC(a3dce360) SHA1(8f3248b1890abb2e649927240ae46f73bb171e3b) )
-
- ROM_REGION16_LE( 0x4000, "mcu_c74", 0 ) /* SUB/SOUND MCU BIOS */
- ROM_LOAD( "c74.bin", 0x0000, 0x4000, CRC(a3dce360) SHA1(8f3248b1890abb2e649927240ae46f73bb171e3b) )
-
ROM_REGION16_LE( 0x80000, "mcu", 0 ) /* sound data */
ROM_LOAD( "rr1data.6r", 0, 0x080000, CRC(18f5f748) SHA1(e0d149a66de36156edd9b55f604c9a9801aaefa8) )
@@ -4064,12 +4045,6 @@ ROM_START( ridgerac3 )
ROM_REGION( 0x10000*2, "slave", 0 ) /* Slave DSP */
ROM_LOAD16_WORD( "c71.bin", 0,0x1000*2, CRC(47c623ab) SHA1(e363ac50f5556f83308d4cc191b455e9b62bcfc8) )
- ROM_REGION16_LE( 0x4000, "iomcu", 0 ) /* I/O MCU BIOS */
- ROM_LOAD( "c74.bin", 0x0000, 0x4000, CRC(a3dce360) SHA1(8f3248b1890abb2e649927240ae46f73bb171e3b) )
-
- ROM_REGION16_LE( 0x4000, "mcu_c74", 0 ) /* SUB/SOUND MCU BIOS */
- ROM_LOAD( "c74.bin", 0x0000, 0x4000, CRC(a3dce360) SHA1(8f3248b1890abb2e649927240ae46f73bb171e3b) )
-
ROM_REGION16_LE( 0x80000, "mcu", 0 ) /* sound data */
ROM_LOAD( "rr1data.6r", 0, 0x080000, CRC(18f5f748) SHA1(e0d149a66de36156edd9b55f604c9a9801aaefa8) )
@@ -4116,12 +4091,6 @@ ROM_START( ridgeracf )
ROM_REGION( 0x10000*2, "slave", 0 ) /* Slave DSP */
ROM_LOAD16_WORD( "c71.bin", 0,0x1000*2, CRC(47c623ab) SHA1(e363ac50f5556f83308d4cc191b455e9b62bcfc8) )
- ROM_REGION16_LE( 0x4000, "iomcu", 0 ) /* I/O MCU BIOS */
- ROM_LOAD( "c74.bin", 0x0000, 0x4000, CRC(a3dce360) SHA1(8f3248b1890abb2e649927240ae46f73bb171e3b) )
-
- ROM_REGION16_LE( 0x4000, "mcu_c74", 0 ) /* SUB/SOUND MCU BIOS */
- ROM_LOAD( "c74.bin", 0x0000, 0x4000, CRC(a3dce360) SHA1(8f3248b1890abb2e649927240ae46f73bb171e3b) )
-
ROM_REGION16_LE( 0x80000, "mcu", 0 ) /* sound data */
ROM_LOAD( "rrf1data.6r", 0, 0x080000, CRC(ce3c6ed6) SHA1(23e033364bc967c10c49fd1d5413dda837670633) )
@@ -4170,12 +4139,6 @@ ROM_START( ridgera2 )
ROM_REGION( 0x10000*2, "slave", 0 ) /* Slave DSP */
ROM_LOAD16_WORD( "c71.bin", 0,0x1000*2, CRC(47c623ab) SHA1(e363ac50f5556f83308d4cc191b455e9b62bcfc8) )
- ROM_REGION16_LE( 0x4000, "iomcu", 0 ) /* I/O MCU BIOS */
- ROM_LOAD( "c74.bin", 0x0000, 0x4000, CRC(a3dce360) SHA1(8f3248b1890abb2e649927240ae46f73bb171e3b) )
-
- ROM_REGION16_LE( 0x4000, "mcu_c74", 0 ) /* SUB/SOUND MCU BIOS */
- ROM_LOAD( "c74.bin", 0x0000, 0x4000, CRC(a3dce360) SHA1(8f3248b1890abb2e649927240ae46f73bb171e3b) )
-
ROM_REGION16_LE( 0x80000, "mcu", 0 ) /* sound data */
ROM_LOAD( "rrs1data.6r", 0, 0x080000, CRC(b7063aa8) SHA1(08ff689e8dd529b91eee423c93f084945c6de417) )
@@ -4222,12 +4185,6 @@ ROM_START( ridgera2j )
ROM_REGION( 0x10000*2, "slave", 0 ) /* Slave DSP */
ROM_LOAD16_WORD( "c71.bin", 0,0x1000*2, CRC(47c623ab) SHA1(e363ac50f5556f83308d4cc191b455e9b62bcfc8) )
- ROM_REGION16_LE( 0x4000, "iomcu", 0 ) /* I/O MCU BIOS */
- ROM_LOAD( "c74.bin", 0x0000, 0x4000, CRC(a3dce360) SHA1(8f3248b1890abb2e649927240ae46f73bb171e3b) )
-
- ROM_REGION16_LE( 0x4000, "mcu_c74", 0 ) /* SUB/SOUND MCU BIOS */
- ROM_LOAD( "c74.bin", 0x0000, 0x4000, CRC(a3dce360) SHA1(8f3248b1890abb2e649927240ae46f73bb171e3b) )
-
ROM_REGION16_LE( 0x80000, "mcu", 0 ) /* sound data */
ROM_LOAD( "rrs1data.6r", 0, 0x080000, CRC(b7063aa8) SHA1(08ff689e8dd529b91eee423c93f084945c6de417) )
@@ -4274,12 +4231,6 @@ ROM_START( ridgera2ja )
ROM_REGION( 0x10000*2, "slave", 0 ) /* Slave DSP */
ROM_LOAD16_WORD( "c71.bin", 0,0x1000*2, CRC(47c623ab) SHA1(e363ac50f5556f83308d4cc191b455e9b62bcfc8) )
- ROM_REGION16_LE( 0x4000, "iomcu", 0 ) /* I/O MCU BIOS */
- ROM_LOAD( "c74.bin", 0x0000, 0x4000, CRC(a3dce360) SHA1(8f3248b1890abb2e649927240ae46f73bb171e3b) )
-
- ROM_REGION16_LE( 0x4000, "mcu_c74", 0 ) /* SUB/SOUND MCU BIOS */
- ROM_LOAD( "c74.bin", 0x0000, 0x4000, CRC(a3dce360) SHA1(8f3248b1890abb2e649927240ae46f73bb171e3b) )
-
ROM_REGION16_LE( 0x80000, "mcu", 0 ) /* sound data */
ROM_LOAD( "rrs1data.6r", 0, 0x080000, CRC(b7063aa8) SHA1(08ff689e8dd529b91eee423c93f084945c6de417) )
@@ -4327,12 +4278,6 @@ ROM_START( raveracw )
ROM_REGION( 0x10000*2, "slave", 0 ) /* Slave DSP */
ROM_LOAD16_WORD( "c71.bin", 0,0x1000*2, CRC(47c623ab) SHA1(e363ac50f5556f83308d4cc191b455e9b62bcfc8) )
- ROM_REGION16_LE( 0x4000, "iomcu", 0 ) /* I/O MCU BIOS */
- ROM_LOAD( "c74.bin", 0x0000, 0x4000, CRC(a3dce360) SHA1(8f3248b1890abb2e649927240ae46f73bb171e3b) )
-
- ROM_REGION16_LE( 0x4000, "mcu_c74", 0 ) /* SUB/SOUND MCU BIOS */
- ROM_LOAD( "c74.bin", 0x0000, 0x4000, CRC(a3dce360) SHA1(8f3248b1890abb2e649927240ae46f73bb171e3b) )
-
ROM_REGION16_LE( 0x80000, "mcu", 0 ) /* sound data */
ROM_LOAD( "rv1data.6r", 0, 0x080000, CRC(d358ec20) SHA1(140c513349240417bb546dd2d151f3666b818e91) )
@@ -4392,12 +4337,6 @@ ROM_START( raveracj )
ROM_REGION( 0x10000*2, "slave", 0 ) /* Slave DSP */
ROM_LOAD16_WORD( "c71.bin", 0,0x1000*2, CRC(47c623ab) SHA1(e363ac50f5556f83308d4cc191b455e9b62bcfc8) )
- ROM_REGION16_LE( 0x4000, "iomcu", 0 ) /* I/O MCU BIOS */
- ROM_LOAD( "c74.bin", 0x0000, 0x4000, CRC(a3dce360) SHA1(8f3248b1890abb2e649927240ae46f73bb171e3b) )
-
- ROM_REGION16_LE( 0x4000, "mcu_c74", 0 ) /* SUB/SOUND MCU BIOS */
- ROM_LOAD( "c74.bin", 0x0000, 0x4000, CRC(a3dce360) SHA1(8f3248b1890abb2e649927240ae46f73bb171e3b) )
-
ROM_REGION16_LE( 0x80000, "mcu", 0 ) /* sound data */
ROM_LOAD( "rv1data.6r", 0, 0x080000, CRC(d358ec20) SHA1(140c513349240417bb546dd2d151f3666b818e91) )
@@ -4457,12 +4396,6 @@ ROM_START( raveracja )
ROM_REGION( 0x10000*2, "slave", 0 ) /* Slave DSP */
ROM_LOAD16_WORD( "c71.bin", 0,0x1000*2, CRC(47c623ab) SHA1(e363ac50f5556f83308d4cc191b455e9b62bcfc8) )
- ROM_REGION16_LE( 0x4000, "iomcu", 0 ) /* I/O MCU BIOS */
- ROM_LOAD( "c74.bin", 0x0000, 0x4000, CRC(a3dce360) SHA1(8f3248b1890abb2e649927240ae46f73bb171e3b) )
-
- ROM_REGION16_LE( 0x4000, "mcu_c74", 0 ) /* SUB/SOUND MCU BIOS */
- ROM_LOAD( "c74.bin", 0x0000, 0x4000, CRC(a3dce360) SHA1(8f3248b1890abb2e649927240ae46f73bb171e3b) )
-
ROM_REGION16_LE( 0x80000, "mcu", 0 ) /* sound data */
ROM_LOAD( "rv1data.6r", 0, 0x080000, CRC(d358ec20) SHA1(140c513349240417bb546dd2d151f3666b818e91) )
@@ -4523,12 +4456,6 @@ ROM_START( cybrcomm )
ROM_REGION( 0x10000*2, "slave", 0 ) /* Slave DSP */
ROM_LOAD16_WORD( "c71.bin", 0,0x1000*2, CRC(47c623ab) SHA1(e363ac50f5556f83308d4cc191b455e9b62bcfc8) )
- ROM_REGION16_LE( 0x4000, "iomcu", 0 ) /* I/O MCU BIOS */
- ROM_LOAD( "c74.bin", 0x0000, 0x4000, CRC(a3dce360) SHA1(8f3248b1890abb2e649927240ae46f73bb171e3b) )
-
- ROM_REGION16_LE( 0x4000, "mcu_c74", 0 ) /* SUB/SOUND MCU BIOS */
- ROM_LOAD( "c74.bin", 0x0000, 0x4000, CRC(a3dce360) SHA1(8f3248b1890abb2e649927240ae46f73bb171e3b) )
-
ROM_REGION16_LE( 0x80000, "mcu", 0 ) /* sound data */
ROM_LOAD( "cy1data.6r", 0x00000, 0x20000, CRC(10d0005b) SHA1(10508eeaf74d24a611b44cd3bb12417ceb78904f) )
ROM_RELOAD( 0x20000, 0x20000)
@@ -4589,12 +4516,6 @@ ROM_START( acedrvrw )
ROM_REGION( 0x10000*2, "slave", 0 ) /* Slave DSP */
ROM_LOAD16_WORD( "c71.bin", 0,0x1000*2, CRC(47c623ab) SHA1(e363ac50f5556f83308d4cc191b455e9b62bcfc8) )
- ROM_REGION16_LE( 0x4000, "iomcu", 0 ) /* I/O MCU BIOS */
- ROM_LOAD( "c74.bin", 0x0000, 0x4000, CRC(a3dce360) SHA1(8f3248b1890abb2e649927240ae46f73bb171e3b) )
-
- ROM_REGION16_LE( 0x4000, "mcu_c74", 0 ) /* SUB/SOUND MCU BIOS */
- ROM_LOAD( "c74.bin", 0x0000, 0x4000, CRC(a3dce360) SHA1(8f3248b1890abb2e649927240ae46f73bb171e3b) )
-
ROM_REGION16_LE( 0x80000, "mcu", 0 ) /* sound data */
ROM_LOAD( "ad1data.6r", 0, 0x080000, CRC(82024f74) SHA1(711ab0c4f027716aeab18e3a5d3d06fa82af8007) )
@@ -4642,12 +4563,6 @@ ROM_START( victlapw )
ROM_REGION( 0x10000*2, "slave", 0 ) /* Slave DSP */
ROM_LOAD16_WORD( "c71.bin", 0,0x1000*2, CRC(47c623ab) SHA1(e363ac50f5556f83308d4cc191b455e9b62bcfc8) )
- ROM_REGION16_LE( 0x4000, "iomcu", 0 ) /* I/O MCU BIOS */
- ROM_LOAD( "c74.bin", 0x0000, 0x4000, CRC(a3dce360) SHA1(8f3248b1890abb2e649927240ae46f73bb171e3b) )
-
- ROM_REGION16_LE( 0x4000, "mcu_c74", 0 ) /* SUB/SOUND MCU BIOS */
- ROM_LOAD( "c74.bin", 0x0000, 0x4000, CRC(a3dce360) SHA1(8f3248b1890abb2e649927240ae46f73bb171e3b) )
-
ROM_REGION16_LE( 0x80000, "mcu", 0 ) /* sound data */
ROM_LOAD( "adv1data.6r", 0, 0x080000, CRC(10eecdb4) SHA1(aaedeed166614e6670e765e0d7e4e9eb5f38ad10) )
diff --git a/src/mame/machine/namcomcu.c b/src/mame/machine/namcomcu.c
new file mode 100644
index 00000000000..f6dd0b01ace
--- /dev/null
+++ b/src/mame/machine/namcomcu.c
@@ -0,0 +1,102 @@
+/*
+Mitsubishi M37702 MCUs with Namco custom labels.
+
+Label Used by system(s)
+-------------------------
+C69 NA-1
+C70 NA-2
+C74 System 22
+C75 NB-1, NB-2, System FL
+C76 System 11
+*/
+
+#include "emu.h"
+#include "namcomcu.h"
+
+
+const device_type NAMCO_C69 = &device_creator<namco_c69_device>;
+const device_type NAMCO_C70 = &device_creator<namco_c70_device>;
+const device_type NAMCO_C74 = &device_creator<namco_c74_device>;
+const device_type NAMCO_C75 = &device_creator<namco_c75_device>;
+const device_type NAMCO_C76 = &device_creator<namco_c76_device>;
+
+
+ROM_START( c69 )
+ ROM_REGION16_LE( 0x4000, "internal", 0 )
+ ROM_LOAD( "c69.bin", 0, 0x4000, CRC(349134d9) SHA1(61a4981fc2716c228b6121fedcbf1ed6f34dc2de) )
+ROM_END
+
+
+ROM_START( c70 )
+ ROM_REGION16_LE( 0x4000, "internal", 0 )
+ ROM_LOAD( "c70.bin", 0, 0x4000, CRC(b4015f23) SHA1(7ce91eda76e86b5cab625e2b67c463b7d143832e) )
+ROM_END
+
+
+ROM_START( c74 )
+ ROM_REGION16_LE( 0x4000, "internal", 0 )
+ ROM_LOAD( "c74.bin", 0, 0x4000, CRC(a3dce360) SHA1(8f3248b1890abb2e649927240ae46f73bb171e3b) )
+ROM_END
+
+
+ROM_START( c75 )
+ ROM_REGION16_LE( 0x4000, "internal", 0 )
+ ROM_LOAD( "c75.bin", 0, 0x4000, CRC(42f539a5) SHA1(3103e5a0a2867620309fd4fe478a2be0effbeff8) )
+ROM_END
+
+
+ROM_START( c76 )
+ ROM_REGION16_LE( 0x4000, "internal", 0 )
+ ROM_LOAD( "c76.bin", 0, 0x4000, CRC(399faac7) SHA1(ceb184ef0486caf715dd997101999785f67a40b8) )
+ROM_END
+
+
+namco_c69_device::namco_c69_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+ : m37702m2_device(mconfig, NAMCO_C69, "C69 (M37702)", tag, owner, clock, "namcoc69", __FILE__)
+{
+}
+
+namco_c70_device::namco_c70_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+ : m37702m2_device(mconfig, NAMCO_C70, "C70 (M37702)", tag, owner, clock, "namcoc70", __FILE__)
+{
+}
+
+namco_c74_device::namco_c74_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+ : m37702m2_device(mconfig, NAMCO_C74, "C74 (M37702)", tag, owner, clock, "namcoc74", __FILE__)
+{
+}
+
+namco_c75_device::namco_c75_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+ : m37702m2_device(mconfig, NAMCO_C75, "C75 (M37702)", tag, owner, clock, "namcoc75", __FILE__)
+{
+}
+
+namco_c76_device::namco_c76_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+ : m37702m2_device(mconfig, NAMCO_C76, "C76 (M37702)", tag, owner, clock, "namcoc76", __FILE__)
+{
+}
+
+const rom_entry *namco_c69_device::device_rom_region() const
+{
+ return ROM_NAME(c69);
+}
+
+const rom_entry *namco_c70_device::device_rom_region() const
+{
+ return ROM_NAME(c70);
+}
+
+const rom_entry *namco_c74_device::device_rom_region() const
+{
+ return ROM_NAME(c74);
+}
+
+const rom_entry *namco_c75_device::device_rom_region() const
+{
+ return ROM_NAME(c75);
+}
+
+const rom_entry *namco_c76_device::device_rom_region() const
+{
+ return ROM_NAME(c76);
+}
diff --git a/src/mame/machine/namcomcu.h b/src/mame/machine/namcomcu.h
new file mode 100644
index 00000000000..d19e76702e7
--- /dev/null
+++ b/src/mame/machine/namcomcu.h
@@ -0,0 +1,61 @@
+#pragma once
+
+#ifndef __NAMCOMCU_H__
+#define __NAMCOMCU_H__
+
+#include "cpu/m37710/m37710.h"
+
+
+class namco_c69_device : public m37702m2_device
+{
+public:
+ namco_c69_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+protected:
+ virtual const rom_entry *device_rom_region() const;
+};
+
+
+class namco_c70_device : public m37702m2_device
+{
+public:
+ namco_c70_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+protected:
+ virtual const rom_entry *device_rom_region() const;
+};
+
+
+class namco_c74_device : public m37702m2_device
+{
+public:
+ namco_c74_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+protected:
+ virtual const rom_entry *device_rom_region() const;
+};
+
+
+class namco_c75_device : public m37702m2_device
+{
+public:
+ namco_c75_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+protected:
+ virtual const rom_entry *device_rom_region() const;
+};
+
+
+class namco_c76_device : public m37702m2_device
+{
+public:
+ namco_c76_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+protected:
+ virtual const rom_entry *device_rom_region() const;
+};
+
+
+extern const device_type NAMCO_C69;
+extern const device_type NAMCO_C70;
+extern const device_type NAMCO_C74;
+extern const device_type NAMCO_C75;
+extern const device_type NAMCO_C76;
+
+
+#endif
diff --git a/src/mame/mame.mak b/src/mame/mame.mak
index 56463e04267..2e6b03e85db 100644
--- a/src/mame/mame.mak
+++ b/src/mame/mame.mak
@@ -1517,6 +1517,7 @@ $(MAMEOBJ)/namco.a: \
$(MACHINE)/namco51.o \
$(MACHINE)/namco53.o \
$(MACHINE)/namco62.o \
+ $(MACHINE)/namcomcu.o \
$(AUDIO)/namco52.o \
$(AUDIO)/namco54.o \
$(VIDEO)/c116.o \
diff --git a/src/mess/drivers/apple2gs.c b/src/mess/drivers/apple2gs.c
index 1302c5f7290..aef0f91acd8 100644
--- a/src/mess/drivers/apple2gs.c
+++ b/src/mess/drivers/apple2gs.c
@@ -427,7 +427,7 @@ MACHINE_CONFIG_END
ROM_START(apple2gs)
// M50740/50741 ADB MCU inside the IIgs system unit
- ROM_REGION(0x1000,"m50741",0)
+ ROM_REGION(0x1000,ADBMICRO_TAG":internal",0)
ROM_LOAD( "341s0632-2.bin", 0x000000, 0x001000, CRC(e1c11fb0) SHA1(141d18c36a617ab9dce668445440d34354be0672) )
// i8048 microcontroller inside the IIgs ADB Standard Keyboard
@@ -454,7 +454,7 @@ ROM_START(apple2gs)
ROM_END
ROM_START(apple2gsr3p)
- ROM_REGION(0x1000,"m50741",0)
+ ROM_REGION(0x1000,ADBMICRO_TAG":internal",0)
ROM_LOAD( "341s0632-2.bin", 0x000000, 0x001000, CRC(e1c11fb0) SHA1(141d18c36a617ab9dce668445440d34354be0672) )
ROM_REGION(0x400, "kmcu", 0)
@@ -476,7 +476,7 @@ ROM_START(apple2gsr3p)
ROM_END
ROM_START(apple2gsr3lp)
- ROM_REGION(0x1000,"m50741",0)
+ ROM_REGION(0x1000,ADBMICRO_TAG":internal",0)
ROM_LOAD( "341s0632-2.bin", 0x000000, 0x001000, CRC(e1c11fb0) SHA1(141d18c36a617ab9dce668445440d34354be0672) )
ROM_REGION(0x400, "kmcu", 0)
@@ -498,7 +498,7 @@ ROM_START(apple2gsr3lp)
ROM_END
ROM_START(apple2gsr1)
- ROM_REGION(0xc00,"m50740",0)
+ ROM_REGION(0xc00,ADBMICRO_TAG":internal",0)
ROM_LOAD( "341s0345.bin", 0x000000, 0x000c00, CRC(48cd5779) SHA1(97e421f5247c00a0ca34cd08b6209df573101480) )
ROM_REGION(0x400, "kmcu", 0)
@@ -519,7 +519,7 @@ ROM_START(apple2gsr1)
ROM_END
ROM_START(apple2gsr0)
- ROM_REGION(0xc00,"m50740",0)
+ ROM_REGION(0xc00,ADBMICRO_TAG":internal",0)
ROM_LOAD( "341s0345.bin", 0x000000, 0x000c00, CRC(48cd5779) SHA1(97e421f5247c00a0ca34cd08b6209df573101480) )
ROM_REGION(0x400, "kmcu", 0)
@@ -544,7 +544,7 @@ ROM_START(apple2gsr0)
ROM_END
ROM_START(apple2gsr0p) // 6/19/1986 Cortland prototype
- ROM_REGION(0xc00,"m50740",0)
+ ROM_REGION(0xc00,ADBMICRO_TAG":internal",0)
ROM_LOAD( "341s0345.bin", 0x000000, 0x000c00, CRC(48cd5779) SHA1(97e421f5247c00a0ca34cd08b6209df573101480) )
ROM_REGION(0x400, "kmcu", 0)
@@ -565,7 +565,7 @@ ROM_START(apple2gsr0p) // 6/19/1986 Cortland prototype
ROM_END
ROM_START(apple2gsr0p2) // 3/10/1986 Cortland prototype, boots as "Apple //'ing - Alpha 2.0"
- ROM_REGION(0xc00,"m50740",0)
+ ROM_REGION(0xc00,ADBMICRO_TAG":internal",0)
ROM_LOAD( "341s0345.bin", 0x000000, 0x000c00, CRC(48cd5779) SHA1(97e421f5247c00a0ca34cd08b6209df573101480) )
ROM_REGION(0x400, "kmcu", 0)