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author | 2024-12-01 14:28:12 -0500 | |
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committer | 2024-12-01 14:28:12 -0500 | |
commit | 9f705b3e1c712bedf353e431b60d9deeb88756b6 (patch) | |
tree | d4b0210c0bccdcc4ad43f7f3acbec7d83314f442 | |
parent | a8e1ad4bf4d8b17b99cf42e9b6a98f7d0278800f (diff) |
namco/namcos2.cpp: MCU note
-rw-r--r-- | src/mame/namco/namcos2.cpp | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/src/mame/namco/namcos2.cpp b/src/mame/namco/namcos2.cpp index 881fcdea4a8..8bbfb305a34 100644 --- a/src/mame/namco/namcos2.cpp +++ b/src/mame/namco/namcos2.cpp @@ -110,6 +110,13 @@ which contains: This stream is then combined with the stream from the text plane pixel generator with the highest priority pixel being displayed on screen. +There were two different System II CPU PCBs. 8618961200 uses the C65 I/O MCU +(Hitachi 63705). 8618961803 (the last digit may vary) uses the C68 I/O MCU +(Mitsubishi 37450). Each MCU has a socket for an external EPROM, though the +C68 EPROM is normally unpopulated except on transitional PCBs which used a +stock MCU presumably running in ROMless mode. Some games have been seen with +either MCU type. + Graphics Board details ====================== @@ -547,7 +554,6 @@ C102 - Controls CPU access to ROZ Memory Area. #include "namcos2.h" #include "cpu/m68000/m68000.h" -#include "cpu/m6805/m6805.h" #include "cpu/m6809/m6809.h" #include "machine/nvram.h" #include "sound/ymopm.h" |