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author Angelo Salese <salese_corp_ltd@email.it>2015-03-17 01:45:24 +0100
committer Angelo Salese <salese_corp_ltd@email.it>2015-03-17 01:45:24 +0100
commit4f68f47d3a6fb103da2248d8e87861bcd853f421 (patch)
tree406ed026cff3d7754cc3a8a4c7f88076cad93a0b
parent9b2a16c12faef045602b4eb3cab06fe1e70e0ee4 (diff)
i960: guess, pretty unlikely that cosr opcode uses sine ... (nw)
-rw-r--r--src/emu/cpu/i960/i960.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/emu/cpu/i960/i960.c b/src/emu/cpu/i960/i960.c
index 74666a6671e..8ddd2b6ec3e 100644
--- a/src/emu/cpu/i960/i960.c
+++ b/src/emu/cpu/i960/i960.c
@@ -1436,7 +1436,7 @@ void i960_cpu_device::execute_op(UINT32 opcode)
case 0xd: // cosr
m_icount -= 406;
t1f = get_1_rif(opcode);
- set_rif(opcode, sin(t1f));
+ set_rif(opcode, cos(t1f));
break;
case 0xe: // tanr