diff options
author | 2025-04-13 19:46:44 +0200 | |
---|---|---|
committer | 2025-04-13 20:24:57 +0200 | |
commit | 03bf3b03a5df7a1b645c4fd888cb07f431883727 (patch) | |
tree | fe37f4c83a92b840986497b1dc07ae92ef35e81d | |
parent | 50178bb8a0a0f6b4196b40305724d3b14b373a5c (diff) |
nec/pc9801.cpp: make IDE hack local to pc9801rs
-rw-r--r-- | src/mame/nec/pc9801.cpp | 24 | ||||
-rw-r--r-- | src/mame/nec/pc9801.h | 1 | ||||
-rw-r--r-- | src/mame/nec/pc9821.cpp | 18 |
3 files changed, 29 insertions, 14 deletions
diff --git a/src/mame/nec/pc9801.cpp b/src/mame/nec/pc9801.cpp index 44b32219d03..88d9bdf1e05 100644 --- a/src/mame/nec/pc9801.cpp +++ b/src/mame/nec/pc9801.cpp @@ -81,7 +81,8 @@ - "SYSTEM SHUTDOWN" after BIOS sets up the SDIP values; TODO (PC-9801BX2) - - "SYSTEM SHUTDOWN" at POST, a soft reset fixes it? + - "SYSTEM SHUTDOWN" at POST, SDIP related, soft reset to bypass; + - Accesses $8f0-$8f2 PMC area, shared with 98NOTE machines; - A non-fatal "MEMORY ERROR" is always thrown no matter the RAM size afterwards, related? - unemulated conventional or EMS RAM bank, definitely should have one given the odd minimum RAM size; @@ -457,11 +458,22 @@ void pc9801_state::fdc_2dd_ctrl_w(uint8_t data) m_fdc_2dd->subdevice<floppy_connector>("1")->get_device()->mon_w(data & 8 ? CLEAR_LINE : ASSERT_LINE); } +u8 pc9801vm_state::ide_ctrl_hack_r() +{ + if (!machine().side_effects_disabled()) + { + // HACK: RS IDE driver will try to do 512 to 256 byte sector translations + // MEMSW has no setting for this, is it concealed? + // SDIP based machines don't need this (they will default to 512 bps, shadowed from + // gaiji $ac403 bit 6). + address_space &ram = m_maincpu->space(AS_PROGRAM); + ram.write_byte(0x457, ram.read_byte(0x457) | 0xc0); + } + return m_ide_sel; +} + u8 pc9801vm_state::ide_ctrl_r() { - address_space &ram = m_maincpu->space(AS_PROGRAM); - // this makes the ide driver not do 512 to 256 byte sector translation, the 9821 looks for bit 6 of offset 0xac403 of the kanji ram to set this, the rs unknown - ram.write_byte(0x457, ram.read_byte(0x457) | 0xc0); return m_ide_sel; } @@ -1224,7 +1236,7 @@ void pc9801vm_state::pc9801rs_io(address_map &map) { // map.unmap_value_high(); pc9801ux_io(map); - map(0x0430, 0x0433).rw(FUNC(pc9801vm_state::ide_ctrl_r), FUNC(pc9801vm_state::ide_ctrl_w)).umask16(0x00ff); + map(0x0430, 0x0433).rw(FUNC(pc9801vm_state::ide_ctrl_hack_r), FUNC(pc9801vm_state::ide_ctrl_w)).umask16(0x00ff); map(0x0640, 0x064f).rw(FUNC(pc9801vm_state::ide_cs0_r), FUNC(pc9801vm_state::ide_cs0_w)); map(0x0740, 0x074f).rw(FUNC(pc9801vm_state::ide_cs1_r), FUNC(pc9801vm_state::ide_cs1_w)); map(0x1e8c, 0x1e8f).noprw(); // temp @@ -1259,6 +1271,7 @@ void pc9801us_state::sdip_bank_w(offs_t offset, u8 data) void pc9801us_state::pc9801us_io(address_map &map) { pc9801rs_io(map); + map(0x0430, 0x0433).rw(FUNC(pc9801us_state::ide_ctrl_r), FUNC(pc9801us_state::ide_ctrl_w)).umask16(0x00ff); map(0x841e, 0x841e).rw(FUNC(pc9801us_state::sdip_r<0x0>), FUNC(pc9801us_state::sdip_w<0x0>)); map(0x851e, 0x851e).rw(FUNC(pc9801us_state::sdip_r<0x1>), FUNC(pc9801us_state::sdip_w<0x1>)); map(0x861e, 0x861e).rw(FUNC(pc9801us_state::sdip_r<0x2>), FUNC(pc9801us_state::sdip_w<0x2>)); @@ -2976,6 +2989,7 @@ ROM_START( pc9801bx2 ) ROM_LOAD( "pc98bank7.bin", 0x38000, 0x08000, BAD_DUMP CRC(1bd6537b) SHA1(ff9ee1c976a12b87851635ce8991ac4ad607675b) ) ROM_REGION16_LE( 0x30000, "ipl", ROMREGION_ERASEFF ) + // 0x1a000: setup mode ROM_COPY( "biosrom", 0x20000, 0x10000, 0x8000 ) // ITF ROM ROM_COPY( "biosrom", 0x28000, 0x18000, 0x8000 ) // BIOS ROM ROM_COPY( "biosrom", 0x30000, 0x20000, 0x8000 ) diff --git a/src/mame/nec/pc9801.h b/src/mame/nec/pc9801.h index 5e2c529a203..ae895446003 100644 --- a/src/mame/nec/pc9801.h +++ b/src/mame/nec/pc9801.h @@ -424,6 +424,7 @@ protected: virtual void border_color_w(offs_t offset, u8 data) override; uint8_t ide_ctrl_r(); + uint8_t ide_ctrl_hack_r(); void ide_ctrl_w(uint8_t data); uint16_t ide_cs0_r(offs_t offset, uint16_t mem_mask = ~0); void ide_cs0_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); diff --git a/src/mame/nec/pc9821.cpp b/src/mame/nec/pc9821.cpp index a721e129565..332750036c5 100644 --- a/src/mame/nec/pc9821.cpp +++ b/src/mame/nec/pc9821.cpp @@ -22,23 +22,23 @@ TODO (PC-9821As): TODO (PC-9821Cx3): - "MICON ERROR" at POST, we currently return a ready state in remote control register - to bypass it, is it expected behaviour? + to bypass it, is it expected behaviour? - Hangs normally with "Set the SDIP" message, on soft reset tries to r/w I/Os - $b00-$b03, kanji RAM $a9 and $f0 (mostly bit 5, built-in 27 inches HDD check?) then keeps - looping; + $b00-$b03, kanji RAM $a9 and $f0 (mostly bit 5, built-in 27 inches HDD check?) then keeps + looping; - 0xfa2c8 contains ITF test routines, to access it's supposedly CTRL+CAPS+KANA, - which currently doesn't work. It also never returns a valid processor or CPU clock, - is it a debug side-effect or supposed to be read somehow? + which currently doesn't work. It also never returns a valid processor or CPU clock, + is it a debug side-effect or supposed to be read somehow? - Expects 0xc0000-0xdffff to be r/w at PC=0x104e8, currently failing for inner C-Bus mappings. - Is PCI supposed to overlay the C-Bus section? + Is PCI supposed to overlay the C-Bus section? - Eventually jump off the weeds by taking an invalid irq in timer test; - Reportedly should display a CanBe logo at POST (always blue with white fg?), - at least pc9821cx3 ROM has some VRAM data in first half of BIOS ROM. - Where this is mapped is currently unknown; + at least pc9821cx3 ROM has some VRAM data in first half of BIOS ROM. + Where this is mapped is currently unknown; TODO (PC-9821Xa16/PC-9821Ra20/PC-9821Ra266/PC-9821Ra333): - "MICON ERROR" at POST (processor microcode detection fails, basically down to a more - involved bankswitch with Pentium based machines); + involved bankswitch with Pentium based machines); TODO: (PC-9821Nr15/PC-9821Nr166) - Tests conventional RAM then keeps polling $03c4 (should be base VGA regs read); |