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path: root/src/lib/netlist/examples/cccs.cpp
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* housekeeping: Use proper SPDX ID for CC0 license. Vas Crabb2022-12-231-1/+1
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* netlist: gtrak10 performance and other improvements and fixes (#10032) couriersud2022-07-051-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | - added support parameter FORCE_TRISTATE_LOGIC on mk28000 - add system device SYS_PULSE to generate pulse based on input changes parameters are delay, pulse width, input polarity and output polarity - add USE_SPEED_HACKS define to gtrak10 to enable the use of the above Brings gtrak10 from 18% to 120%. - Improved interlaced video support in fixfreq.cpp Added two interlace modes: progressive and interlaced which can be selected in machine configuration. - more clang format work - rename link to connection - introduced typed aliases. This information may be used later to rewrite netlists. - added a three terminal base device This will allow the analog code to be more easily comparable to literature about MNA (Modal node analysis). BJT code is now a lot better readable. - fix doxygen consistency - added an example for a cmos inverter based on NMOS/PMOS fets. - TRUTHTABLE_START was renamed to TRUTH_TABLE - truth tables are now enclosed in braces - netlists are now enclosed in braces - TRUTHTABLE_END() and NETLIST_END() removed from files - Fixed static solver script - Add file path to includes in nltool
* netlist: Fixed polarity issue in CCCS device [Colin Howell, Couriersud] couriersud2020-05-011-0/+39
Note: This affects all use cases of CCCS. I have changed all uses in MAME.