summaryrefslogtreecommitdiffstatshomepage
path: root/src/devices/cpu/xtensa
Commit message (Collapse)AuthorAgeFilesLines
* Added ATTR_COLD to common lifecycle methods for many files in src/devices. ↵ holub2024-09-271-3/+3
| | | | (#12822)
* xtensa: Clean up PC debug state registration AJR2023-12-121-4/+2
|
* cpu/xtensa: Make helper functions static inlines. Vas Crabb2023-12-116-147/+136
|
* cpu/xtensa.cpp, skeleton/hudson_poems.cpp: Added initial emulation for CPU ↵ mamehaze2023-12-106-306/+2718
| | | | | | | core, and Poems hardware that utilizes it [David Haywood] (#11824) * Xtensa work, alongside Poems hardware improvements to show the core is functional [David Haywood] --------- Co-authored-by: David Haywood <hazemamewip@hotmail.com>
* Merge remote-tracking branch 'mainline/release0261' into HEAD Vas Crabb2023-11-271-1/+1
|\
| * cpu/xtensa: Fixed missing comma in array initialisation. Vas Crabb2023-11-261-1/+1
| |
* | xtensa: Fix disassembly of L32E and S32E offsets AJR2023-11-261-2/+2
|/
* skeleton/hudson_poems.cpp: Create and hook up skeleton Xtensa CPU device AJR2023-11-252-0/+123
|
* xtensad.cpp: Fix decoding of cache instructions AJR2023-11-221-1/+1
|
* unidasm: Add disassembler for Tensilica Xtensa architecture AJR2023-11-222-0/+1195