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* srcclean and manual cleanup Vas Crabb3 days1-2/+0
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* cpu/sharc/compute.hxx: More detailed floating point mulitply and add/sub ↵ Vas Crabb2026-03-133-151/+161
| | | | | | | | | emulation for interpreter. Set MV, MU and MI flags and corresponding sticky flags for multiplication. Flush denormals to zero and set AV flag (and corresponding sticky flag) for dual add/subtract. More detailed NaN handling for both.
* cpu/sharc/compute.hxx: Fixed saturation without resorting to comparisons. Vas Crabb2026-03-101-1/+1
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* cpu/sharc/compute.hxx: Share interpreter code for some single ALU ops and ↵ Vas Crabb2026-03-103-400/+382
| | | | dual multiplier/ALU ops, be stricter about Rn vs Fn.
* cpu/sharc: More detailed emulation of floating point addition, subtraction ↵ Vas Crabb2026-03-101-91/+191
| | | | and COPYSIGN, and some minor optimisation, for interpreter.
* cpu/sharc: More ALU refinements for the interpreter: Vas Crabb2026-03-091-61/+85
| | | | | | * Set AOS on fixed point dual add/subtract overflow. * Handle corner cases better for floating point MIN, MAX and CLIP. * Cleaned up code for floating point COMP.
* cpu/sharc: Better ALU emulation for interpreter: Vas Crabb2026-03-094-391/+468
| | | | | | | | | * Implemented fixed-point ALU overflow sticky flag (AOS). * More accurate implementation of Fn = -Fx, Fn = ABS Fx and Fn = PASS Fx. * Implemented Rn = ABS Rx and Fn = ABS(Fx - Fy). * Sorted computer function declarations and definitions to match order of instruction listings in documentation.
* cpu/sharc: Implemented saturation for ALU dual add/subtract in interpreter. Vas Crabb2026-03-081-18/+13
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* cpu/sharc: Fixed several interpreter issues: Vas Crabb2026-03-084-25/+82
| | | | | | * Fixed carry flag calculation for subtract with carry. * Implemented Rn = Rx + CI and Rn = Rx + CI - 1. * Rn = Rx + 1, Rn = Rx - 1 and Rn = -Rx should saturate the result.
* cpu/sharc/sharcdrc.cpp: Fixed Rn = Rx + CI - 1 ALU operation. Vas Crabb2026-03-081-2/+2
| | | | | Neglected to git add the change after copy/pasting complementary operation above.
* -cpu/sharc: More recompiler improvements: Vas Crabb2026-03-085-202/+216
| | | | | | | | | | | | | | | | | | | | * Implemented fixed point CLIP and add/subtract with carry for recompiler. * Cleaned up and de-duplicated code for setting ASTAT flags on fixed point ALU operationf for recompiler, and fixed AC flag for subract operations. * Optimised generated code for fixed point dual add subtrat, PASS and COMP for recompiler. * Reduced unnecessary ASTAT flag copies for recompiler and added more glue that will be needed for supporting saturating arithmetic. * Cleaned up fixed point COMP code for interpreter. -machine/microtch.cpp: Added the host interface microcontroller to make it easier to look at the program (disabled for now, will be emulated in the future). -video/vrender0.cpp: The inline qualifier implies internal linkage for free functions in C++ - there's no need for static.
* cpu/sharc: Implemented a bit more functionality and fixed bugs: Vas Crabb2026-03-076-298/+503
| | | | | | | | | * Implemented short word sign extension. * Fixed DAG2 (PM) register display in debugger. * Track AF dependencies when analysing instructions. * Log analysed instructions when logging UML code. * Removed misplaced break in cpu/sharc/sharcfe.cpp. * cpu/uml.h: Let C functions take any pointer/reference parameter.
* cpu/sharc/compute.hxx: Fixed my dumb typo. Vas Crabb2026-03-061-1/+1
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* cpu/sharc: Implemented fixed point clip and saturating arithmetic in ↵ Matthew Daniels2026-03-063-47/+67
| | | | | | | interpreter. (#15055) * Corrected logic for generating carry/overflow flags in add-with-carry and subtract-with-borrow operations. * Corrected floating point clip calculation for Fx < 0. * Implemented the LT, LE, GE and GT conditions properly.
* More stuff mostly related to recompiling CPUs: Vas Crabb2026-03-067-132/+149
| | | | | | | | | | | | | | | | cpu/drcbearm64.cpp: Don't set the rounding mode on SETFMOD if it hasn't changed. cpu/e132xs.cpp: Skip more unnecessary flag calculations, use pre-calculated PC for updating G0 in memory when possible, better analysis of pre-calculated PC values when delay slots are involved. cpu/sh: Cleaned up register dependency analysis logging, fixed an instruction analysis bug. cpu/sharc: Disassemble unimplemented instructions executed in recompiled code, include tag in more fatal errors, use throw syntax to make it cleared it's an early out.
* -cpu/powerpc: Fixed floating point comparison flags. Vas Crabb2026-03-022-5/+6
| | | | | | | | | * Fixes various things that were always broken with the C and ARM backends or worked by chance with the x86-64 and i686 back-end. * Also commented out some constexpr for now. -cpu/drcfe.h: Added some helpers. -cpu/sharc/sharcfe.cpp: Don't use memset to clear loop entries.
* Allow recompiling CPU cores to define their own opcode descriptions. Vas Crabb2026-03-026-695/+884
| | | | | | | | | | | | | | The base opcode description now only has the parts that are used by the base recompiler front-end. CPU cores are free to define their own extensions as they see fit without being limited to pre-defined fields. The base recompiler front-end is now a template, eliminating the virtual member functions. It no longer has any dependencies on libemu, which paves the way to decoupling the recompiler front-ends and allowing the instruction analysis to be tested without the rest of the emulator. Also added a compile-time option to disable ASTAT flag update elision in the SHARC recompiler, and fixed some recompiler front-end bugs.
* cpu/sharc: Hooked up flag outputs for the recompiler, push out flag latch ↵ Vas Crabb2026-02-263-118/+257
| | | | state when switching from input to output.
* kaneko/kaneko_grap2.cpp: Don't split initialisation between files; ↵ Vas Crabb2026-02-261-1/+1
| | | | cpu/sharc: Fixed build.
* cpu/sharc: Hooked up flag pin outputs for the interpreter. (#15020) Matthew Daniels2026-02-263-1/+16
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* -cpu/sharc: Disabled stalling DMA with recompiler for now. Vas Crabb2026-02-201-0/+2
| | | | | | | | | * Current implementation gets confused, breaking Thrill Drive on Hornet. -sega/model2.cpp: Marked Daytona games as having imperfect controls. * The games are playable with analog controls, but the pedal ranges are less than ideal, so it can have a warning for now.
* cpu/sharc: Pause DMA when stalled with recompiler to match interpreter. Vas Crabb2026-02-192-7/+24
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* cpu/sharc: Better sync on input changes across scheduling domains. Vas Crabb2026-02-192-28/+84
| | | | | konami/hornet.cpp: Enabled SHARC recompiler for NBA Play By Play, Teraburst and Thrill Drive G family games.
* cpu/sharc: Better ASTAT handling: Vas Crabb2026-02-184-205/+167
| | | | | | | | * Flag pin bits are unaffected by push/pop status. * Only flags set to input follow inputs on flag pins. * Implemented ASTAT write for recompiler. * Show ASTAT value in debugger when recompiler is enabled. * Also don't allocated DRC cache when recompiler is disabled.
* cpu/sharc: Overhauled loop stack handling. Vas Crabb2026-02-165-113/+214
| | | | | | | | | * Always access top-of-stack through pseudo-registers. * Better behaviour when stack is empty or full. * Implemented more read/write top-of-stack and explicit push/pop operations. * Try to get loop stack into a consistent state after loading a saved state.
* cpu/sharc/sharc.cpp: Implemented a bit more channel 6 DMA. Vas Crabb2026-02-161-27/+26
| | | | Fixes changing settings in Pilot Kids service mode menus.
* cpu/sharc/sharcdrc.cpp: Get past DSP program crash in Midnight Run. Vas Crabb2026-02-161-0/+1
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* cpu/sharc: Overhauled PC stack implementation: Vas Crabb2026-02-165-117/+275
| | | | | | | | | | | * Always access top-of-stack through the pseudo-register value. * Better behaviour when PC stack is empty. * Implemented effects of writing to PCSTKP. * Mask PC stack values to 24 bits. * Try to get PC stack into a consistent state after loading a saved state. * Also fixed loops with initial counter value of zero (should iterate 2^32 times).
* -cpu/sharc: Improved status stack handling a little. Vas Crabb2026-02-153-109/+152
| | | | | | | | * Also actually implemented ASTAT/MODE1 save/restore for recompiler. -cpu/drcbearm64.cpp: Identify more valid bit mask immediates (saves an instruction and a temporary register, e.g. when clearing a small contiguous field in an integer).
* cpu/sharc: Improved reset conditions, prevent program from writing read-only ↵ Vas Crabb2026-02-155-64/+68
| | | | STKY bits (should fix MT07295).
* Revert "cpu/sharc: Overhauled stack handling (should improve stability):" Vas Crabb2026-02-155-664/+376
| | | | | | This reverts commit 874b81d69ff627964c765de543a7cbfdd2a63b0c. This isn't ready.
* cpu/sharc: Overhauled stack handling (should improve stability): Vas Crabb2026-02-155-376/+664
| | | | | | | | | | | | | | | | | | Completely overhauled PC and loop stack handling, Top-of-stack always uses pseudo-registers, explicit push and pop instruction work correctly, various values are masked properly, and the device attempts to get back into a consistent state after loading a saved state. Improved behaviour of reading/writing top-of-stack registers, particularly when stack is empty or full. Also prevent writes from modifying read-only STKY bits, and update state properly on PCSTKP writes. Made some small improvements to status stack handling in interpreter, and actually implemented ASTAT/MODE1 save/restore on status stack in recompiler. Fixed reset state for stacks and a few other things.
* cpu/sharc: Tidied code a bit: Vas Crabb2026-02-146-979/+828
| | | | | | | * Helper functions for getting commonly extracted opcode fields. * More symbolic constants, fewer magic numbers. * More constexpr helper functions, fewer macros, safer macros. * More const local variables.
* cpu/sharc: Allow multiple loops to end on the same instruction. Vas Crabb2026-02-138-624/+582
| | | | | | | | | | | | | This is required by Last Bronx, which has code that de-duplicates the common part of multiple successive loops. It reduces the performance of do-nothing spin loops a bit but not too much - the DRC still has substantially better performance than the interpreter. Unfortunately, this exposes a pre-existing issue with how ASTAT conditions are handled in the SHARC front-end which causes the Midnight Run and Racing Jam DSP programs to crash. Fixing it will require major changes. Use -nodrc for now, I'll probably have to disable to recompiler before the next release until this can be fixed.
* cpu/sharc: Fixed more instructions: Vas Crabb2026-02-115-102/+196
| | | | | | | | | | | | Fixed multiply/average and multiply/absolute for interpreter - the ALU operations produce a floating point result. Implemented move from multiplier register, multiply/average, average, and FDEP with immediate field specification for recompiler. Use a more accurate approach for the absolute value calculation in multiply/average and average rather than hoping the C library does the right thing for the interpreter and recompiler.
* cpu/sharc: Better handling of cache reset at end of block. Vas Crabb2026-02-114-59/+76
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* cpu/sharc: Improved memory access code: Vas Crabb2026-02-114-103/+205
| | | | | | | | | | | | | | | | | | | | | | cpu/sharc/sharcdrc.cpp: Exploit data memory layout to bypass the memory system for both 32-bit and 16-bit SRAM accesses. cpu/sharc/sharcdrc.cpp: Exploit the way the SHARC toolchain lays out executable code and data in SRAM to greatly reduce unnecessary cache flushes. cpu/sharc/sharcdrc.cpp: Implemented Rn = NOT Rx (used by Sega Model 2B games). cpu/sharc/sharcdrc.cpp: Align 32-bit program memory accesses with the most significant bit of the bus (corresponds to interpreter change in 0f368c268c1eabc176af8e5cdf780b5d60e8d9a0 from GitHub #13770). emu/debug/points.cpp: Fixed hang when a watchpoint is hit on a 64-bit wide address space with word addressing. sega/model2.cpp: Enabled SHARC recompiler for Model 2B (can be disabled again before release if too many things are broken).
* konami: Always enable SHARC recompiler before start. Vas Crabb2026-02-061-1/+1
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* sharc: fix validation hap2026-02-051-1/+1
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* cpu/sharc: Cleaned up memory access a bit, use memory_access::specific, ↵ Vas Crabb2026-02-063-108/+133
| | | | added ADSP21060 (larger internal SRAM).
* cpu/sharc: Better align FIX between interpreter and recompiler, pack/unpack ↵ Vas Crabb2026-02-063-86/+156
| | | | recompiler ASTAT for saved states.
* cpu/sharc/sharcdrc.cpp: Fixed copy/paste error. Vas Crabb2026-02-041-1/+1
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* cpu/sharc: Small improvements: Vas Crabb2026-02-044-129/+229
| | | | | | | | | * Implemented bit-accurate RECIPS and RSQRTS in recompiler (fast approximation can be enabled by setting a macro). * Fixed/optimised RECIPS flag calculation for interpreter. * Fixed FIX for negative numbers when MODE1 TRUNC bit it set for interpreter and recompiler (should round towards negative infinity). * Don't regenerate static helpers on cache flush.
* cpu/sharc/sharc.cpp: Added missing DMA members to save states. Vas Crabb2026-02-021-1/+3
| | | | | Members added in 5211a003a57a9ca5bb4b117499f313fd8fca4d32 were not added to save states.
* cpu/sharc/sharc.cpp: Implemented 16-bit IOP write handling. (#14856) Matthew Daniels2026-02-022-6/+37
| | | sega/model2.cpp: Got rid of now-obsolete SHARC 16-bit IOP workaround.
* sharcops_table: include emu.h hap2026-01-301-0/+2
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* Miscellaneous device improvements: Vas Crabb2026-01-225-26/+25
| | | | | | | | * machine/k033906.cpp: Added read side effects check (should fix MT08830). * cpu/tms320c3x: Marked TMS320C31 as parent ROM of TMS320VC33. * cpu/sharc: Cleaned up formatting of 64-bit values and initialisation of opcode dispatch table.
* cpu/sharc/sharcdrc.cpp: Fixed two copy/paste errors. Vas Crabb2026-01-191-2/+2
| | | | | One pre-existing, one introducted in 26cac45f03c20cec397ddd3a75d2c5caff3239e1.
* cpu/sharc: More fixes: Vas Crabb2026-01-192-43/+32
| | | | | | | | | * Fixed SV flag for LSHIFT/ASHIFT in recompiler (interpreter was correct). * Simplified generated code for FEXT with non-immediate bit position/length in recompiler. * Fixed off-scale ASHIFT in recompiler. * Fixed off-scale FEXT with sign extension in interpreter.
* cpu/sharc/sharcdrc.cpp: Handle corner cases for FDEP. Vas Crabb2026-01-171-9/+40
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