| Commit message (Expand) | Author | Age | Files | Lines |
| * | Implemented specific SH3/SH4 chips & pass the required endian into the constr... |  smf- | 2025-04-17 | 1 | -235/+1788 |
| * | misc cpu: no need to check debug enabled flag manually |  hap | 2025-04-11 | 1 | -5/+5 |
| * | diexec: Add callback to allow debugger to break into the middle of wait-type ... |  AJR | 2024-11-17 | 1 | -0/+3 |
| * | cpu/sh: Improved SH7021 SoC emulation. (#11610) [Ryan Holtz, Phil Bennett] |  Phil Bennett | 2023-10-16 | 1 | -324/+412 |
| * | - Removed device_timer, device_timer_id, et al in favor of direct callback me... |  MooglyGuy | 2022-06-04 | 1 | -4/+4 |
| * | src/devices/cpu: Remove #include "debugger.h" where no longer necessary |  AJR | 2022-04-06 | 1 | -1/+0 |
| * | Fix several issues in DC-based HW (#9150) |  Angelo Salese | 2022-01-17 | 1 | -3/+3 |
| * | -Switch to building MAME as C++17. |  Vas Crabb | 2020-11-15 | 1 | -0/+1 |
| * | emumem: A little more speedup. cache and specific change syntax, and are not... |  Olivier Galibert | 2020-05-25 | 1 | -12/+12 |
| * | sh4.cpp: disable timers at reset (nw) |  yz70s | 2020-01-14 | 1 | -0/+14 |
| * | sh2.cpp/sh4.cpp: Don't emit fast RAM accesses when the debugger is enabled [P... |  Philip Bennett | 2019-09-24 | 1 | -45/+48 |
| * | -sh2, sh4, sat_ctrl: Removed MCFG, nw |  mooglyguy | 2018-12-09 | 1 | -10/+1 |
| * | as if millions of this pointers suddenly cried out in terror, and were sudden... |  Vas Crabb | 2018-06-08 | 1 | -6/+6 |
| * | sh4drc: optimize FPU CMP instructions (nw) |  arbee | 2018-05-16 | 1 | -20/+8 |
| * | sh4drc: fix SR damage in new CMP implementations (nw) |  arbee | 2018-05-15 | 1 | -4/+12 |
| * | sh4drc: remove remaining CALLC from FRCHG (nw) |  arbee | 2018-05-15 | 1 | -5/+13 |
| * | sh4drc: optimized some of the previously implemented UML (nw) |  arbee | 2018-05-14 | 1 | -23/+11 |
| * | sh4drc: UML implementations of FSTS, FLOAT, FTRC, FNEG, FABS, FSCHG, and FRCH... |  arbee | 2018-05-14 | 1 | -46/+76 |
| * | sh4drc: UML implementations of FLDI0, FLDI1, FCMP_EQ, and FCMP_GT [R. Belmont] |  arbee | 2018-05-13 | 1 | -28/+54 |
| * | emumem: Rename direct_read_handler to memory_access_cache. Parametrize the t... |  Olivier Galibert | 2018-05-11 | 1 | -8/+38 |
| * | srcclean (nw) |  Vas Crabb | 2018-04-22 | 1 | -8/+8 |
| * | maps: Finish devices/cpu (nw) |  Olivier Galibert | 2018-04-20 | 1 | -21/+24 |
| * | sh4drc: 8 more UML conversions (nw) |  arbee | 2018-04-15 | 1 | -50/+9 |
| * | sh4drc: UML version of FMAC, fixed possible error in previous FPU conversion ... |  arbee | 2018-04-15 | 1 | -67/+67 |
| * | sh4drc: 3 more trivial UML conversions (nw) |  arbee | 2018-04-15 | 1 | -21/+6 |
| * | sh4drc: UML implementations of FADD, FSUB, FMUL, and FDIV. [R. Belmont] |  arbee | 2018-04-14 | 1 | -277/+301 |
| * | Reshuffle some stuff: |  Vas Crabb | 2018-03-28 | 1 | -3/+3 |
| * | don't pass so many naked pointers around (nw) |  Vas Crabb | 2018-03-25 | 1 | -103/+96 |
| * | Blind faith fixed long names for almost all CPUs (nw) |  angelosa | 2018-03-15 | 1 | -4/+4 |
| * | API change: Memory maps are now methods of the owner class [O. Galibert] |  Olivier Galibert | 2018-02-12 | 1 | -5/+5 |
| * | emumem: API change [O. Galibert] |  Olivier Galibert | 2017-11-29 | 1 | -1/+1 |
| * | dvdisasm: Overhaul [O. Galibert] |  Olivier Galibert | 2017-11-26 | 1 | -25/+3 |
| * | srcclean (nw) |  Vas Crabb | 2017-11-26 | 1 | -1/+1 |
| * | SH3/4 drc: reset drc cache |  MetalliC | 2017-11-24 | 1 | -0/+1 |
| * | some SH3/4 recompiler changes that got lost at some point (nw) (#2767) |  David Haywood | 2017-11-01 | 1 | -4/+13 |
| * | srcclean (nw) |  Vas Crabb | 2017-10-22 | 1 | -75/+75 |
| * | fix an error that was preventing dc from booting (my own mistake, was testing... |  David Haywood | 2017-10-17 | 1 | -4/+5 |
| * | Preliminary SH3 / SH4 recompiler [David Haywood] (#2711) |  David Haywood | 2017-10-11 | 1 | -2944/+2110 |
| * | use 'sh' instead of 'superh' |  David Haywood | 2017-10-02 | 1 | -0/+4743 |