| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | mn1880: Tentatively identify some interrupt registers; update notes | 2021-05-01 | 2 | -5/+47 | |
| * | mn1880: Add preliminary CPU emulation | 2021-04-27 | 2 | -56/+2412 | |
| * | mn1860: Finish disassembly | 2021-04-23 | 1 | -8/+10 | |
| * | mn1860: Reassign another pair of opcodes for disassembly | 2021-04-22 | 1 | -4/+4 | |
| * | mn1880d.cpp: Minor documentation fixes | 2021-04-19 | 1 | -2/+2 | |
| * | mn1860: Identify another 2 opcodes in disassembly | 2021-04-19 | 1 | -4/+14 | |
| * | mn1860: Recognize two more opcodes in disassembly | 2021-04-19 | 1 | -4/+10 | |
| * | mn1880d.h: Fix comment | 2021-04-08 | 1 | -1/+1 | |
| * | unidasm: Add preliminary MN1860 disassembler (still missing a few opcodes due... | 2021-04-08 | 2 | -8/+74 | |
| * | New machines marked as NOT_WORKING | 2020-06-04 | 4 | -0/+794 |
