| Commit message (Collapse) | Author | Age | Files | Lines |
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- Enable decoding of a few more reg-type instructions
- Add 0x prefix to unary branch destinations
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0xad should be disassembled as dcinva, not 0xac.
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* cpu/ccpu: Simplify code for right-shifting 12-bit values arithmetically
* konami/3dom2_te.cpp: Fix probable copy-and-paste error
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- Add 'gbt' and 'gbf' debugger commands to step until a true or false conditional branch has been detected.
- Update over 100 of the disassemblers in MAME to output a new STEP_COND flag for all conditional branches. Besides being used for execution of the new 'gbt' and 'gbf' commands, this flag also now helps the debugger 'out' command to properly handle conditional return instructions.
- Remove STEP_OVER from many instructions that aren't actually subroutine calls (e.g. DJNZ on Z80). A 'gni' debugger command (go next instruction) has been added to accommodate some of the misuse.
- Add instruction flag support to several more disassemblers that lacked them entirely (e.g. st62xx)
- Don't pass over delay slots for debugging in ASAP core
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i960dasm: add missing opcodes [SailorSat]
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Disassemblers are now independant classes. Not only the code is
cleaner, but unidasm has access to all the cpu cores again. The
interface to the disassembly method has changed from byte buffers to
objects that give a result to read methods. This also adds support
for lfsr and/or paged PCs.
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instructions. [R. Belmont]
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