| Commit message (Expand) | Author | Age | Files | Lines |
| * | srcclean |  Vas Crabb | 2025-06-25 | 1 | -1/+1 |
| * | i960: Make shli produce identical value to shlo because later models where th... |  AJR | 2025-06-14 | 1 | -4/+16 |
| * | cpu/i960: Reduce padding area size when servicing interrupt (#13667) |  Matthew Daniels | 2025-05-04 | 1 | -1/+1 |
| * | Revert "i960: don't preserve sign bit when shifting integer left (#13507)" |  AJR | 2025-03-21 | 1 | -1/+1 |
| * | i960: don't preserve sign bit when shifting integer left (#13507) |  Matthew Daniels | 2025-03-21 | 1 | -1/+1 |
| * | i960: fix regression with emul opcode |  hap | 2024-12-19 | 1 | -1/+1 |
| * | cpu/i960, cpu/sharc, cpu/sparc, cpu/v60: Use 32x32=64-bit multiply inlines |  AJR | 2024-11-10 | 1 | -1/+1 |
| * | i960: Shift opcode fixes |  AJR | 2023-04-22 | 1 | -5/+10 |
| * | Interrupt callback rationalization |  AJR | 2023-03-11 | 1 | -1/+1 |
| * | dsp56156, i960, scudsp: Simplify some bits of code using util::sext |  AJR | 2022-11-20 | 1 | -10/+2 |
| * | cpu/i960, cpu/sh: Use rotl_32 and rotr_32 for executing rotate instructions |  AJR | 2022-10-29 | 1 | -1/+1 |
| * | src/devices/cpu: Remove #include "debugger.h" where no longer necessary |  AJR | 2022-04-06 | 1 | -1/+0 |
| * | srcclean and manual tidying up in preparation for 0.242 release |  Vas Crabb | 2022-03-27 | 1 | -6/+6 |
| * | cpu/i960: Added cycle count adjustment for dmovt instruction. (#9378) |  Damian Rogers | 2022-03-10 | 1 | -0/+1 |
| * | Added dmovt opcode to i960 cpu (#9341) |  Damian Rogers | 2022-03-04 | 1 | -0/+16 |
| * | Fun with flags: Allows handlers to have user-defined flags set on |  Olivier Galibert | 2021-11-28 | 1 | -26/+41 |
| * | -bus/coco/coco_ram.cpp: fix a rather obvious bug in shift/mask |  Vas Crabb | 2020-06-25 | 1 | -1/+1 |
| * | cpu/i960: Log unimplemented IACs |  Vas Crabb | 2020-06-25 | 1 | -2/+7 |
| * | emumem: A little more speedup. cache and specific change syntax, and are not... |  Olivier Galibert | 2020-05-25 | 1 | -65/+65 |
| * | Add partial support for all IAC messages |  Damian Rogers | 2020-05-06 | 1 | -0/+21 |
| * | use C++ library includes (nw) |  firewave | 2020-01-22 | 1 | -1/+1 |
| * | updated my recent commits to initialize bools with false instead of 0, as sug... |  Ivan Vangelista | 2019-11-28 | 1 | -1/+1 |
| * | i960.cpp: initialized some stuff (nw) |  Ivan Vangelista | 2019-11-26 | 1 | -1/+7 |
| * | i960: implement logr and expr opcodes (for Model2 Power Sled) |  MetalliC | 2019-04-29 | 1 | -0/+12 |
| * | emumem: Rename direct_read_handler to memory_access_cache. Parametrize the t... |  Olivier Galibert | 2018-05-11 | 1 | -8/+8 |
| * | i960: Don't lose register values on read stalling [O. Galibert] |  Olivier Galibert | 2018-04-05 | 1 | -13/+31 |
| * | Reshuffle some stuff: |  Vas Crabb | 2018-03-28 | 1 | -2/+2 |
| * | don't pass so many naked pointers around (nw) |  Vas Crabb | 2018-03-25 | 1 | -2/+2 |
| * | Wrote a preliminary TGPx4 interpreter core [Angelo Salese] |  angelosa | 2018-03-20 | 1 | -6/+25 |
| * | Blind faith fixed long names for almost all CPUs (nw) |  angelosa | 2018-03-15 | 1 | -1/+1 |
| * | srcclean (nw) |  Vas Crabb | 2018-02-25 | 1 | -6/+6 |
| * | i960.cpp: support for burst mode stalling save and restore [Angelo Salese] (#... |  Angelo Salese | 2018-02-13 | 1 | -4/+73 |
| * | emumem: API change [O. Galibert] |  Olivier Galibert | 2017-11-29 | 1 | -1/+1 |
| * | dvdisasm: Overhaul [O. Galibert] |  Olivier Galibert | 2017-11-26 | 1 | -6/+3 |
| * | make device_memory_interface slightly less of a special case, use a typedef t... |  Vas Crabb | 2017-07-10 | 1 | -2/+2 |
| * | dimemory: Lift the cap on the number of address spaces per device [O. Galibert] |  Olivier Galibert | 2017-07-03 | 1 | -0/+8 |
| * | Move static data out of devices into the device types. This is a significant... |  Vas Crabb | 2017-05-14 | 1 | -5/+6 |
| * | namcofl.cpp: killed anonymous timers, moved to configured banking, added save... |  Ivan Vangelista | 2017-04-12 | 1 | -0/+1 |
| * | Self-registering devices prep: |  Vas Crabb | 2017-02-27 | 1 | -1/+1 |
| * | first srcclean pass (nw) |  Vas Crabb | 2016-12-25 | 1 | -8/+8 |
| * | i960: Preliminary support for CALLS instruction and WIP on FAULTx instruction... |  arbee | 2016-12-22 | 1 | -0/+60 |
| * | removed printf (nw) |  arbee | 2016-12-10 | 1 | -1/+0 |
| * | i960: added scanbyte and IP-relative lda opcodes, masked low bits of branch t... |  arbee | 2016-12-10 | 1 | -0/+24 |
| * | Changed disassembler infrastructure to not use char buffers internally |  Nathan Woods | 2016-11-20 | 1 | -2/+2 |
| * | NOTICE (TYPE NAME CONSOLIDATION) |  Miodrag Milanovic | 2016-10-22 | 1 | -91/+91 |
| * | Make sure all cpu's export STATE_GENPCBASE and use safe_pcbase() for everythi... |  smf- | 2016-09-28 | 1 | -0/+1 |
| * | Revert "Make sure all cpu's export STATE_GENPCBASE and use safe_pcbase() for ... |  Lord-Nightmare | 2016-09-27 | 1 | -1/+0 |
| * | Make sure all cpu's export STATE_GENPCBASE and use safe_pcbase() for everythi... |  smf- | 2016-09-27 | 1 | -0/+1 |
| * | Replace strformat, strprintf and strcatprintf with type-safe steam_format and... |  Vas Crabb | 2016-02-28 | 1 | -1/+1 |
| * | Add macros for alignment checking (nw) |  AJR | 2016-01-30 | 1 | -4/+4 |