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* misc cpu: no need to check debug enabled flag manually hap9 days2-3/+3
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* -emu/schedule.cpp: Restore timers expiring at the same time in the order ↵ Vas Crabb11 days2-1/+13
| | | | | | | | | | they were scheduled when loading a saved state. -emu/diexec.cpp: If a shorter input line pulse overlaps a longer pulse, don't shorten the pulse. -cpu/e132xs: Added named input line number constants. -video/sprite.cpp: Got rid of simple_list and fixed_allocator.
* -cpu/uml.cpp: Rewrote the UML simplification code. Vas Crabb12 days1-2/+2
| | | | | | | | | | | | | | | | | | | * Fixed many cases that could cause the upper bits of a register not to cleared following a 32-bit operation. * Added more simplifications. * Allow many simplifications when flag updates are requested. * Fixed various bits of unreachable code. * cpu/drcbearm64.cpp, cpu/drcbex64.cpp: Removed code for special-casing some situations the simplifier can now take care of consistently. -cpu/drcbex64.cpp: Fixed a bug causing some shifts to be treated as a no-op when the destination and source are not the same. -cpu/drcbearm64.cpp, cpu/drcbex64.cpp: Added a special case for comparing something to itself. -cpu/e132xs: Use the CARRY instruction rather than a right shift to set up carry in.
* -cpu/e132xs: Use word addressing for I/O. Vas Crabb14 days5-53/+49
| | | | | | | | | | * There are no byte enable or write strobe signals for I/O, and there's only a single operand size, so word addresses make more sense. * Also changed STBS/STWS to allow any valid signed or unsigned value of the applicable size. This allows vamphalf attract mode to work as well as the storage test. -misc/limenko.cpp: Better input types for spotty.
* cpu/e132xs: Changed STBS and STHS to do an unsigned range check. Vas Crabb2025-04-063-28/+43
| | | | | * Fixes vamphalf storage test. * Also fixed IO3 wake from power down.
* -cpu/e132xs: Fixed I/O for models with 16-bit external bus. Vas Crabb2025-04-066-197/+453
| | | | | | | | | | | | | | | * Only a single I/O access is generated for an I/O word read/write. The upper half just disappears if the pins aren't present. This fixes "phantom" I/O accesses, allowing address maps to be cleaned up a bit. * Reduced I/O address width for models with 16-bit external bus to match hardware. * Made addressing consistent between interpreter and recompiler for I/O double-word accesses. * Implemented power down via internal I/O write for E1-X and later cores (none of the games I tested actually use it). -misc/pasha2.cpp: Enabled the recompiler for Zooty Drum - it gets just as far as the interpreter now.
* cpu/e132xs: Improved comment about model differences. Vas Crabb2025-04-051-21/+40
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* cpu/e132xs: It's rather important to initialise DRC handle pointers. Vas Crabb2025-04-051-0/+1
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* cpu/e132xs: Untangled device types. Vas Crabb2025-04-054-294/+586
| | | | | | | | | | | | | | * Got package option (T, N or B suffix) out of device type. * Enabled 4x PLL clock multiplier for GMS30C2216/GMS30C2232. * Implemented entering power down mode via MCR for E1 and E1-X cores. * Marginally better code generation for a few instructions. * Log available bus/memory configuration options for different cores. * Added post load handler for E1-XS and E1-XSR cores to install SDRAM mode/configuration handlers if necessary. * Improved comment about different Hynix and Hyperstone CPU models. -cpu/drcbearm64.cpp: Don't update flags that aren't requested in a few places.
* -cpu/e132xs: Got rid of "Mission Craft flags" compile time option. Vas Crabb2025-04-043-50/+30
| | | | | | | | | | | | | | | | | | | | | | | * Assume ROL sets the V and C flags the same way as SHL and MOVI clears the V flag. -cpu/drcbex64.cpp: Optimise SUB x,0,y to a NEG instruction (gets down to one instruction from two or three a lot of the time). This had been a TODO comment for ages. -cpu/drcbex86.cpp: Got rid of unnecessary std::function use. This substantially reduces the code size and reduces allocations during code generation. -cpu/drcbearm64.cpp, cpu/drcbex64.cpp, cpu/drcbex86.cpp: Got rid of the intermediate tables in favour of bit switch statements. This improves startup time, reduces code size, and gives the compiler more optimisation opportunities. -cpu/drcbearm64.cpp, cpu/drcbex64.cpp, cpu/drcbex86.cpp: Got rid of asmjit namespace qualifiers left over from when the class declarations were in headers and hence outside the scope of the using namespace statements.
* -cpu/e132xs: Miscellaneous fixes/optimisation: Vas Crabb2025-04-034-248/+307
| | | | | | | | | | | | | | | | | | | | | * Fixed behaviour of delayed branches, trace exceptions, and saved PC calculation for error exceptions in delay slots for the interpreter. All instructions in delay slots, branching instructions that can raise exceptions and tracing shoud now (mis)behave properly for the interpreter, including things the manual says you shouldn't do. * Fixed and optimised flag updates for left shifts for the recompiler. * Optimised ROL instruction for the recompiler and made flag calculation equivalent to the interpreter both with and without the "Missioncraft flags" compile-time option. * Only block interrupts for one instruction following a delayed branch. * Optimised the SOFTWARE instruction a little for the recompiler. * Added more SDRAM configuration logging and cleaned up code a bit. -cpu/drcbearm64.cpp: Apply the change from 7efe37938f9dd6a366e to OR and XOR instructions as well, and fix some cases where a 32-bit logical operation would fail to clear the upper bits of a register. -cpu/drcbex64.cpp: Avoid more conditional branches on conditional MOV.
* -cpu/e132xs: Log bus control and memory control setup. Vas Crabb2025-04-015-36/+150
| | | | -cpu/drcbearm64.cpp: Simplified logic for choosing optimal AND strategy.
* -cpu/e132xs.cpp: Improved exception emulation: Vas Crabb2025-04-015-308/+297
| | | | | | | | | | * Fixed behaviour of exceptions in delay slots, and fixed recompiler not updating ILC and P for some exceptions. * Implemented privilege error exception on setting L in user mode for interpreter. -emu/debug, osd/modules/debugger: Added an option to show exceptionpoints in breakpoints windows.
* cpu/e132xs: Emulate more exceptions, more recompiler optimisation. Vas Crabb2025-03-315-150/+336
| | | | | | | | | | Emulate pointer error exception on load/store and range error exception on store signed byte/half-word. Further optimised code generation for MOV and MOVI. These are very hot, so this alone gains a further 2% performance or so in the dgPIX games. Also some other miscellaneous cleanup.
* -cpu/e132xs: Implemented pointer error exceptions for recompiler. Vas Crabb2025-03-305-462/+428
| | | | | | | | | | * Implemented pointer error exceptions on attempting to use a zero address register (other than SR) in the recompiler. * Also optimised load/store instructions a bit and reduced copy/paste. * Fixed a couple of disassembler issues. -misc/dgpix.cpp: Demoted The X-Files to not working with unemulated protection.
* -cpu/e132xs: General cleanup and usability improvements: Vas Crabb2025-03-298-1318/+444
| | | | | | | | | | | | | | | | | | | | | | | * Aligned the operand field in disassembly. * Calculate results of immediate values against the PC to make position-independent code easier to read without constantly using a calculator (e.g. this shows destinations for call Rd, PC, imm). * Added more symbols to the UML helper to make logged generated code more readable. * Made single-instruction-per-sequence mode configurable rather than a compile-time option. * Got rid of a criminal amount of copy/paste in the disassembler, and got rid of all the deprecated strcpy calls. * Got rid of some duplicated constants, changed some constants from macros to enumerated values or constexpr globals. * Reduced the amound of stuff in headers that doesn't need to be there. -cpu/drcbex64.cpp: Don't construct std::function objects during code generation - they require allocation. -eolith/eolith.cpp: Turned single-instruction-per-sequence mode on for now until someone works out why turning it off causes Raccoon World to generate so much code it's unplayably slow.
* cpu/e132xs: More recompiler optimisation: Vas Crabb2025-03-284-1123/+1248
| | | | | | | | | | | | | | * Optimised double word shifts. * Optimised the most common PC-relative operations to treat PC as constant when possible, including: - addi PC,imm (long relative branch) - add PC,Rs (computed goto) - sum Rd,PC,imm (calculate PC-relative address) - add Rd,PC (calculate PC-relative address) - ldw.d PC,Rs,imm (PC-relative load) - stw.d PC,Rs,imm (PC-relative store) * Changed template parameters to LlamaCase to make them more visible different to constants/macros.
* cpu/e132xs: More recompiler optimisation: Vas Crabb2025-03-274-299/+137
| | | | | | | | | | * Disabled single-instruction-per-block mode. * Don't bother with delay slot checks where it's unnecessary. * Try to generate a speicalised copy of the delay slot instruction followed by a direct branch of possible. * Use the pre-decoded instruction length for updating the PC. * Specialised versions of the CHK instruction that always or never raise exceptions.
* cpu/e132xs: More fixes and optimisation: Vas Crabb2025-03-276-340/+230
| | | | | | | | | | | | | | | | * Fixed failing to call the debugger instruction hook for the first instruction following an interrupt, exception or trap. * Use UML branches to emulate non-delayed intra-block branches, avoiding the expensive "hash jump". * Re-worked the instruction description code: - Calculate static branch targets for more instructions. - Flag instructions that may cause mode changes. - Don't be so eager to end an instruction sequence. - Removed the local register input/output flags - FP may no be the same when executing the code as when describing instructions. * Fixed interpreter incorrectly setting ILC when an interrupt immediately follows a RET instruction. * Fixed recompiler flag calculation regressions, and optimised a little.
* cpu/e132xs: Fixed some recompiler cycle counts: Vas Crabb2025-03-262-22/+16
| | | | | * Fixed double-counting bug in exception dispatch. * Fixed unsigned comparison of signed values in MUL cycles calculation.
* cpu/e132xs: Made debugging Hyperstone E1 software less painful. Vas Crabb2025-03-264-144/+72
| | | | | * Fixed local register display in debugger (this never worked). * Made disassembler show local register indices.
* cpu/e132xs: Call debugger exception hook for TRAP instructions. Vas Crabb2025-03-264-53/+36
| | | | | Also made cycle counts a bit more consistent between interpreter and recompiler for exceptions and traps.
* cpu/e132xs: Moved interrupt check to the beginning of instruction execution. Vas Crabb2025-03-265-328/+271
| | | | | | | * Fixes interrupts not being serviced while tracing. * Further improves recompiler performance. * Fixes recompiler interrupt check function calling itself recursively. * Also added debugger exception hook calls to interpreter and recompiler.
* -cpu/e132xs: Fixes and optimisations: Vas Crabb2025-03-265-666/+363
| | | | | | | | | | | | | | | | | | | * Fixed XM (index move) instructions failing to update the destination register on range error for interpreter and recompiler. * Fixed double-word stores when the source indicates SR (both stored words are zero) for interpreter and recompiler. * Fixed recompiler failing to set ILC and P on range error and frame error exceptions. * Optimised recompiled code for word size shifts. * Pushed more recompiler logic from run-time to code generation time and simplified delay slot PC check and trace check logic. * Use MOV rather than LOAD where possible in recompiler to improve code generation performance and symbolic memory locatin names in disassembled UML. * Updated TODO list in header comment, reduced copy/paste some more. -cpu/drcbex64.cpp: Avoid some more unnecessary register copies for ROLAND.
* cpu/e132xs: Optimised recompiled FRAME instruction. Vas Crabb2025-03-254-197/+181
| | | | Also added some more constants so there are a few less magic literals.
* cpu/e132xs: Removed leftover block end from a function that no longer ↵ Vas Crabb2025-03-251-2/+0
| | | | generates a standalone block.
* cpu/e132xs, cpu/drcbex64.cpp: More fixes and optimisation: Vas Crabb2025-03-256-404/+381
| | | | | | | | | | | | | | | | | | | | | | | | | | cpu/e132xs: Implemented supervisor and trace modes as recompiler modes. This eliminates or simplifies a lot of run-time checks. In particular, the trace checks on every instruction are not generated when not tracing, and simplified to just checking the P bit when tracing. cpu/e132xs: Optimised code generation for RET, avoid a redundant load when checking for an overflow trap, use the exception parameter for exception codes rather than generating one function for each possible code. Also simplified interpreter code for RET. cpu/e132xs: Implemented SUMS for the recompiler. cpu/e132xs: Implemented privilege check for setting L (interrupt lockout) for recompiler. Not implemented for interpreter. cpu/e132xs: Partially fixed tracing. P flag should be set by all instructions except RET. Trace exceptions are not triggered for branches when using the recompiler. cpu/e132xs: Fixed ILC being set incorrectly for RET. cpu/drcbex64.cpp: Avoid unnecessary expensive operations when a shift operation request the zero and/or sign flags but not the carry flag.
* cpu/e132xs: Don't generate code to handle a delayed branch inline. Vas Crabb2025-03-243-85/+49
| | | | | | | * Also avoid an redundant load when checking if trace is active. * Reduces generated native instruction count by about 24% on x86-64 and gives an overall performance improvement of about 3.5% in -bench scores.
* cpu/e132xs: Fixed IO2 interrupt check in recompiler. Vas Crabb2025-03-231-33/+33
| | | | | Also further reduced conditional branches and logic operations in interrupt check.
* cpu/e132xs: More recompiler optimisation: Vas Crabb2025-03-233-198/+126
| | | | | | | | * Made interrupt check function generate far more compact code (about 85% reduction in number of native instructions on x86-64). * Optimised out-of-cycles check. * Applied prior optimisation for trap/interrupt checks to static exception checks as well (code is still copy/pasted).
* cpu/e132xs: More recompiler fixes: Vas Crabb2025-03-223-176/+168
| | | | | | | | | * Cleaned up and commented code for generating an exception, reducing about nine memory accesses to update SR to two. * Implemented NEGS, and fixed ADDS and SUBS not setting excption handler address. * Optimised code to update Z flag on logic operations to avoid branches. * Reduced copy/paste a bit more.
* cpu/e132xs, cpu/drcbex64.cpp: Recompiler fixes and optimisations: Vas Crabb2025-03-212-1244/+583
| | | | | | | | | | | | | | | | | | | | | | | | cpu/e132xs.cpp: Refactored code generation to improve performance and fixed some issues: * Moved a considerable amound of logic from execution time to code generation time. * Fixed some cases where add/subtract carry was being interpreted incorrectly. * Fixed a case where a load double intruction was incorrectly writing the same register twice. * Use UML flags to generate condition codes for addition/subtraction. * Use UML carry flag for carry-/borrow-in. * Reduced UML register pressure (improves performance for hosts with fewer callee-saved CPU registers). * Moved more logic to helper functions to simplify maintenance. cpu/drcbex64.cpp: Fixed upper bits of UML registers being cleared when used as address offset for LOAD/STORE. cpu/drcbex64.cpp: Don't do expensive zero/sign flag update for shift operations if only carry flag will be used. cpu/drcbex64.cpp: Reduced copy/paste in READ[M]/WRITE[M] generators.
* Some relatively simple recompiler optimisations: Vas Crabb2025-03-201-2/+1
| | | | | | | | | | | | | | | | cpu/drcbex64.cpp: Avoid a lot of unnecessary flag manipulation on shift/rotate operations. Don't calculate flags when not requested. Don't preserve carry in for operations that don't use it as an input. cpu/drcbex64.cpp: Avoid loading CL when ECX can be used. Loading CL doesn't clear the upper bits, so it depends on the previous value of RCX, causing pipeline dependencies. Loading ECX can grab a fresh rename register. cpu/drcbearm64.cpp: Attempt more optimisation on one more load immediate operation. cpu/e132xs: Get rid of a redundant TEST - ROLAND can set the Z flag.
* -More DRC fixes/improvements: Vas Crabb2025-03-202-80/+83
| | | | | | | | | | | | | | | | | | | * cpu/uml.cpp: Handle some more cases where ROLAND can be turned into AND in the simplifier. * cpu/drcbearm.cpp, cpu/drcbex64.cpp: Fixed a number of cases where 4-byte operations wouldn't clear the upper half of the destination (there are plenty more of these caused by the simplifier that will be harder to fix). * cpu/drcbearm64.cpp: Fixed some cases where a conditional MOV could unexpectedly clear the upper bits of the destination. * cpu/drcbex64.cpp: Improved code generation for various arithmetic and logical operations. More AND/OR/XOR/ADD/ADDC operand combinations are optimised. Special cases of ROLAND/ROLINS are optimised. * cpu/drcbex64.cpp: Don't treat operands to FADD/FMUL as commutative. This isn't true when one is a NaN. -cpu/e132xs: Use osd_printf_error for diagnositc output, and make more local variables const.
* cpu/e132xs: Removed workarounds for recompiler backends not clearing upper ↵ Vas Crabb2024-12-301-71/+6
| | | | half of I0-I3 on 32-bit load.
* MAME Testers bugs fixed (#13076) MooglyGuy2024-12-121-0/+1
| | | | | | | | | ----------------------- - 08942: [Gameplay] (misc/vamphalf.cpp) coolmini: Minigames don't work properly/softlock -e132xs: Sign-extend the divisor in DIVS instructions. [Ryan Holtz] Co-authored-by: Ryan Holtz <TheMogMiner>
* Demote tautological-compare to a warning again. Vas Crabb2024-11-271-0/+5
| | | | | | | clang on Windows x86-64 is getting upset about code that is making no assumptions about the relative sizes of uint64_t and long. Also, fixed more #include guards.
* -tools/imgtool/modules: Fixed remaining calss memory access warnings. Vas Crabb2024-11-261-5/+5
| | | | | | | | -tools/imgtool/modules/vzdos.cpp: Fixed function returning floperr_t value as imgtoolerr_t. -devices: Fixed a bunch more #include guards that don't match file paths.
* Added ATTR_COLD to common lifecycle methods for many files in src/devices. ↵ holub2024-09-271-23/+23
| | | | (#12822)
* diexec: remove vestigal execute_input_lines() hap2024-09-182-12/+0
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* -Lua engine: run everything in coroutines. (#11019) Vas Crabb2023-03-251-2/+1
| | | | | | | | | * This lets you use emu.wait(...) directly without mucking around creating coroutines. * Allow emu.wait to accept an attotime argument. * Added a couple more wait helper functions. -emu/profiler.h: Actually use scope-based profiling helpers. * This makes the comment at the top of emu/profile.h less dishonest, and makes it easier to write exception-safe code. * Got rid of some do { ... } while (0) loops that only existed so break could be used like a goto.
* Interrupt callback rationalization AJR2023-03-112-15/+15
| | | | | | | | | | | - Make CPUs pass interrupt return PC as a second argument to standard_irq_callback - Add interrupt return PC to "Stopped at interrupt" message produced by debugger 'gint' command - Add messages to trace logs whenever interrupts are accepted - Attempt to step over interrupt routines for applicable debugger commands - Eliminate standard_irq_callback_member wrapper method - Update many CPU cores to invoke standard_irq_callback at the start of or during interrupt processing, rather than at the end or when the input line changes - Remove IRQ callbacks for some input lines that never cause interrupts - mb88xx, mcs48: Add IRQ callbacks for internal interrupts
* -e132xsfe.cpp: Fixed missing bit mask causing UBSAN warnings. [Ryan Holtz] ↵ MooglyGuy2022-11-151-4/+4
| | | | | (#10550) Co-authored-by: Ryan Holtz <TheMogMiner>
* e132xs: Provide new helper functions for extracting signed 16-bit halves AJR2022-10-252-6/+10
| | | | * eminline.h: Remove mul_16x16 function
* eminline.h: Additions AJR2022-09-251-7/+1
| | | | | | - Add mul_16x16 inline function to perform a signed 16x16-bit multiplication with 32-bit result. This was moved from cpu/e132xs to unite it with the analogous 32x32 operations. - Add rotl_32, rotr_32, rotl_64 and rotr_64 inline functions to perform 32-bit and 64-bit circular shifts in either direction by the specified number of places, modulo 32 or 64. It is anticipated that these will eventually be replaced by standard functions in C++20's <bit> header, and so they have been given similar signatures and semantics (which are also validity-checked). - Remove LSL, LSR, ROL and ROR macros from cpu/arm and cpu/arm7 to ameliorate unnecessary obfuscation.
* e132xs: Cleanups AJR2022-09-201-10/+3
| | | | | - Use count_leading_zeros_32 instead of loop for TESTLZ - Simplify overflow mask calculation for SHL(I)
* e132xs: Cleanups AJR2022-06-142-82/+74
| | | | | | - Add helper functions for double-word register accesses and multiplication - Make 16-bit multiplications signed for EHCMULD and EHCMACD - Correct typo in comments
* - Removed device_timer, device_timer_id, et al in favor of direct callback ↵ MooglyGuy2022-06-041-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | members. (#9788) Primarily, this removes device_t::device_timer, device_t::timer_set, device_t::synchronize, device_t::timer_expired, and device_timer_id. Use of device_timer often resulted in unnecessary trampolining in addition to switch/case overhead on a driver/device level, and additional logic to manage delegated vs. ID-based timers on a core level. In the worst cases, devices were performing a switch/case with only one valid case. device_scheduler::timer_set is marked deprecated as the only remaining direct uses are via the Lua engine and a few drivers that need refactoring anyway. The remaining uses occur via device_scheduler::synchronize. As a middle ground between the extremely short timer_alloc() and the extremely long machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(widget_device::contoso_tick), this)), a helper function in device_t has been added which can be invoked with the following syntax: timer_alloc(FUNC(widget_device::contoso_tick), this) - Additional changes/cleanups performed along the way: - Converted to use logmacro: * src/devices/bus/ieee488/hp9895.cpp * src/devices/bus/ieee488/remote488.cpp * src/devices/bus/isa/hdc.cpp * src/devices/bus/isa/omti8621.cpp * src/devices/bus/isa/sc499.cpp * src/devices/bus/vip/vp550.cpp * src/devices/cpu/i86/i186.cpp * src/devices/cpu/lc8670/lc8670.cpp * src/devices/machine/68230pit.cpp * src/devices/machine/corvushd.cpp * src/devices/machine/ds1994.cpp * src/devices/machine/ticket.cpp * src/mame/audio/pinsnd88.cpp * src/mame/drivers/notetaker.cpp * src/mame/machine/asic65.cpp * src/mame/machine/rmnimbus.cpp * src/mame/machine/victor9k_fdc.cpp * src/mame/video/uv201.cpp - Made usage of m_member prefix consistent: * src/devices/bus/isa/hdc.cpp * src/devices/bus/isa/omti8621.cpp * src/devices/bus/vme/vme_fccpu20.cpp * src/devices/machine/ds1386.cpp * src/devices/machine/i7220.cpp - Spacing consistency pass: * src/devices/bus/isa/hdc.cpp * src/devices/bus/isa/omti8621.cpp * src/devices/bus/thomson/nanoresau.cpp * src/devices/bus/ti99/internal/992board.cpp * src/devices/bus/ti99/internal/genkbd.cpp * src/devices/bus/ti99/internal/joyport/handset.cpp * src/devices/bus/vme/vme_fccpu20.cpp * src/devices/cpu/i86/i186.cpp * src/devices/cpu/lc8670/lc8670.cpp * src/devices/machine/68230pit.cpp * src/devices/machine/cop452.cpp * src/devices/machine/corvushd.cpp * src/devices/machine/hp_dc100_tape.cpp * src/devices/machine/hp_taco.cpp * src/devices/machine/meters.cpp * src/devices/machine/microtch.cpp * src/devices/machine/phi.cpp * src/devices/video/ef9365.cpp * src/devices/video/v9938.cpp * src/mame/drivers/alphaskop41xx.cpp * src/mame/drivers/myb3k.cpp * src/mame/drivers/notetaker.cpp * src/mame/drivers/wpc_an.cpp * src/mame/machine/midikbd.cpp * src/mame/machine/rmnimbus.cpp * src/mame/machine/wpc_lamp.cpp * src/mame/machine/wpc_out.cpp - Removed string-based ioport lookups: * src/devices/bus/ti99/internal/joyport/handset.cpp * src/devices/bus/ti99/internal/joyport/mecmouse.cpp * src/devices/bus/vme/vme_hcpu30.cpp * src/mame/machine/k7659kb.cpp * src/mame/machine/ti85.cpp - Adjustments to grammar/wording in comments * src/devices/bus/sms_ctrl/lphaser.cpp * src/devices/bus/sms_ctrl/sports.cpp * src/devices/bus/snes/event.cpp * src/devices/bus/snes/sa1.cpp * src/devices/bus/thomson/nanoresau.cpp * src/devices/bus/z88/z88.cpp * src/devices/machine/ds1386.cpp * src/devices/machine/vic_pl192.cpp - Favored BIT() macro for single-bit checks * src/devices/bus/ti99/internal/992board.cpp * src/devices/bus/ti99/joyport/handset.cpp * src/mame/drivers/notetaker.cpp * src/mame/machine/wpc_lamp.cpp * src/mame/machine/wpc_out.cpp - Removed C89-style variable declarations when noticed * src/devices/bus/isa/hdc.cpp * src/devices/bus/sms_ctrl/lphaser.cpp * src/devices/bus/ti99/joyport/mecmouse.cpp * src/devices/machine/acorn_vidc.cpp * src/devices/sound/ymz280b.cpp * src/devices/video/vic4567.cpp - Removed FUNCNAME to avoid compiler-specific #define checks in devices * src/devices/bus/vme/vme_fccpu20.cpp * src/devices/bus/vme/vme_hcpu30.cpp * src/devices/machine/68230pit.cpp * src/devices/machine/mc14411.cpp * src/mame/drivers/myb3k.cpp - Removed unecessary member prefixes/suffixes * src/devices/video/ef9340_1.cpp * src/mame/drivers/fuukifg2.cpp * src/mame/drivers/fuukifg3.cpp * src/mame/drivers/intv.cpp * src/mame/drivers/simpsons.cpp * src/mame/drivers/socrates.cpp * src/mame/drivers/special_gambl.cpp * src/mame/drivers/sprint4.cpp * src/mame/drivers/ti990_10.cpp * src/mame/drivers/tubep.cpp * src/mame/drivers/vectrex.cpp * src/mame/drivers/wpc_an.cpp * src/mame/drivers/wpc_dot.cpp * src/mame/drivers/wpc_flip1.cpp * src/mame/drivers/wpc_flip2.cpp * src/mame/machine/z80ne.cpp * src/mame/video/rollerg.cpp - Switched to lower-case hex constants * src/devices/video/ef9365.cpp * src/mame/machine/rmnimbus.cpp - Re-ordered driver overrides and function members * src/mame/drivers/boxer.cpp * src/mame/drivers/eurocom2.cpp * src/mame/drivers/exidy.cpp * src/mame/drivers/gpworld.cpp * src/mame/drivers/h19.cpp * src/mame/drivers/ibmpcjr.cpp * src/mame/drivers/mekd5.cpp * src/mame/drivers/mgolf.cpp * src/mame/drivers/myb3k.cpp * src/mame/drivers/nightmare.cpp * src/mame/drivers/notetaker.cpp * src/mame/drivers/ptcsol.cpp * src/mame/drivers/pwrview.cpp * src/mame/drivers/rabbit.cpp * src/mame/drivers/sitcom.cpp * src/mame/drivers/socrates.cpp * src/mame/drivers/sprint4.cpp * src/mame/drivers/techno.cpp * src/mame/drivers/thayers.cpp * src/mame/drivers/ti990_10.cpp * src/mame/drivers/ti990_4.cpp * src/mame/drivers/tv912.cpp * src/mame/drivers/tv990.cpp * src/mame/drivers/uchroma68.cpp * src/mame/drivers/vk100.cpp * src/mame/drivers/votrhv.cpp * src/mame/drivers/wicat.cpp * src/mame/drivers/wpc_an.cpp * src/mame/includes/abc80.h * src/mame/includes/asterix.h * src/mame/includes/fuukifg2.h * src/mame/includes/fuukifg3.h * src/mame/includes/gunbustr.h * src/mame/includes/intv.h * src/mame/includes/namcona1.h * src/mame/includes/newbrain.h * src/mame/includes/poly.h * src/mame/includes/prof80.h * src/mame/includes/rollerg.h * src/mame/includes/s11.h * src/mame/includes/segahang.h * src/mame/includes/simpsons.h * src/mame/includes/spacefb.h * src/mame/includes/tandy2k.h * src/mame/includes/trucocl.h * src/mame/includes/tubebp.h * src/mame/includes/vidbrain.h * src/mame/includes/wolfpack.h * src/mame/includes/wpc_dot.h - Made capitalization consistent on class members * src/devices/machine/meters.cpp * src/mame/drivers/namcona1.cpp * src/mame/drivers/notetaker.cpp -src/devices/bus/isa/hdc.cpp: * Removed fixed-size std::vector in favor of std::unique_ptr -src/devices/bus/isa/s3virge.cpp: * Moved unusually large (for a header) functions into .cpp from header -src/devices/bus/vip/vp550.cpp * Switched to required_device_array to simplify code paths -src/devices/machine/arm_iomd.cpp * Added initializers to constructor * Favored std::size over fixed static sizes -src/devices/machine/ds1386.cpp * Moved register #defines into header enums -src/devices/machine/mc68901.cpp * Removed unnecessary parameters and emu_timer::enable calls -src/devices/machine/mccs1850.cpp * Removed inline overuse -src/devices/machine/meters.cpp * Removed unused members -src/devices/machine/mos6526.cpp * Removed inline overuse -src/devices/machine/nsc810.cpp * Converted to arrays rather than individually-numbered members -src/devices/machine/pxa255.cpp * Simplified DMA transfer code -src/devices/machine/saa1043.cpp * Removed extraneous members in favor of resolve_all_safe -src/devices/machine/vic_pl192.cpp * Shifted constructors, start-up, and maps to be at the top of the source file -src/devices/machine/z8536.cpp * Removed stray uses of device_timer_id -src/devices/sound/cdp1869.cpp * Removed inline overuse -src/devices/sound/mos7360.cpp * Converted to arrays rather than individually-numbered members -src/emu/device.cpp * Removed ID-based timer_alloc * Removed timer_set * Removed synchronize * Removed timer_expired * Added shorthand timer_alloc to avoid lengthy machine().scheduler().timer_alloc() calls -src/emu/schedule.cpp * Removed now-unused m_id and m_device members -src/mame/audio/alesis.cpp * Added initializers to constructor -src/mame/drivers/alto2.cpp * Removed custom-named driver init in favor of driver_init override * Removed octal constant in favor of more standard hex -src/mame/drivers/astinvad.cpp * Fixed 'kamizake' typo -src/mame/drivers/tm990189.cpp * Removed unnecessary machine reset override -src/mame/drivers/unichamp.cpp * Removed custom-named driver init in favor of driver_init override -src/mame/drivers/votrhv.cpp * Fixed ROM_LOAD macros and region() usage in memory maps -src/mame/machine/victor9k_fdc.cpp * Made bracing style consistent across the file -src/mame/video/gime.cpp * Removed unnecessary void specifiers in function prototypes
* src/devices/cpu: Remove #include "debugger.h" where no longer necessary AJR2022-04-061-2/+0
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* Debugger feature improvements AJR2022-03-271-24/+36
| | | | | | | | - Add 'gbt' and 'gbf' debugger commands to step until a true or false conditional branch has been detected. - Update over 100 of the disassemblers in MAME to output a new STEP_COND flag for all conditional branches. Besides being used for execution of the new 'gbt' and 'gbf' commands, this flag also now helps the debugger 'out' command to properly handle conditional return instructions. - Remove STEP_OVER from many instructions that aren't actually subroutine calls (e.g. DJNZ on Z80). A 'gni' debugger command (go next instruction) has been added to accommodate some of the misuse. - Add instruction flag support to several more disassemblers that lacked them entirely (e.g. st62xx) - Don't pass over delay slots for debugging in ASAP core