summaryrefslogtreecommitdiffstatshomepage
path: root/src/devices/cpu/dsp16
Commit message (Collapse)AuthorAgeFilesLines
* Allow recompiling CPU cores to define their own opcode descriptions. Vas Crabb2026-03-023-64/+126
| | | | | | | | | | | | | | The base opcode description now only has the parts that are used by the base recompiler front-end. CPU cores are free to define their own extensions as they see fit without being limited to pre-defined fields. The base recompiler front-end is now a template, eliminating the virtual member functions. It no longer has any dependencies on libemu, which paves the way to decoupling the recompiler front-ends and allowing the instruction analysis to be tested without the rest of the emulator. Also added a compile-time option to disable ASTAT flag update elision in the SHARC recompiler, and fixed some recompiler front-end bugs.
* cpu/drccache.cpp: Defer allocating to start, allow forcing W^X mode. (#14760) Vas Crabb2026-01-043-4/+15
| | | | | | | | | | | | | | | | | | cpu/drccache.cpp: Added helpers for allocating structures/objects in the cache. cpu/drccache.cpp: Supply desired alignment when allocating cache memory (not fully implemented). cpu/drccache.cpp: Log some statistics on destruction. emu/emuopts.cpp: Added -[no]drc_rwx option to allow forcing W^X mode when writable executable pages are permitted. cpu/mips, cpu/powerpc: Allow DRC cache size to be set externally at configuration time, so systems can override the default. cpu/dspp, cpu/e132xs, cpu/unsp: Don't allocate DRC resources if recompiler is disabled.
* misc cpu: no need to check debug enabled flag manually hap2025-04-111-2/+2
|
* Added ATTR_COLD to common lifecycle methods for many files in src/devices. ↵ holub2024-09-271-6/+6
| | | | (#12822)
* diexec: remove vestigal execute_input_lines() hap2024-09-181-1/+0
|
* nitendo/n8080.cpp: Encapsulated sound boards. Vas Crabb2023-09-101-1/+0
|
* emu/devcb.h: Eliminated the need to call resolve() on callbacks. (#11333) Vas Crabb2023-06-172-22/+2
| | | | | | | | | | | | Read callbacks now need a default return value supplied at construction. Replaced isnull() with isunset() which tells you if the callback wasn't configured rather than whether it isn't safe to call. Enabled validation of device callbacks (it seems it was disabled at some point, probably accidentally). Device callbacks and object finders now implement the same interface for resolution.
* emu/device.h: Removed device (READ|WRITE)_LINE_MEMBER in favor of explicit ↵ MooglyGuy2023-06-012-12/+12
| | | | function signatures. (#11283) [Ryan Holtz]
* Cleaned up logging across the codebase (GitHub #10183). (#11250) [Ryan Holtz] MooglyGuy2023-05-231-1/+0
| | | | | * Converted various logging patterns to use logmacro.h consistently. * Removed redefinitions of LOG_GENERAL. * Use LOGMASKED in more places.
* Interrupt callback rationalization AJR2023-03-111-3/+3
| | | | | | | | | | | - Make CPUs pass interrupt return PC as a second argument to standard_irq_callback - Add interrupt return PC to "Stopped at interrupt" message produced by debugger 'gint' command - Add messages to trace logs whenever interrupts are accepted - Attempt to step over interrupt routines for applicable debugger commands - Eliminate standard_irq_callback_member wrapper method - Update many CPU cores to invoke standard_irq_callback at the start of or during interrupt processing, rather than at the end or when the input line changes - Remove IRQ callbacks for some input lines that never cause interrupts - mb88xx, mcs48: Add IRQ callbacks for internal interrupts
* src/devices/cpu: Remove #include "debugger.h" where no longer necessary AJR2022-04-061-2/+0
|
* Debugger feature improvements AJR2022-03-271-0/+2
| | | | | | | | - Add 'gbt' and 'gbf' debugger commands to step until a true or false conditional branch has been detected. - Update over 100 of the disassemblers in MAME to output a new STEP_COND flag for all conditional branches. Besides being used for execution of the new 'gbt' and 'gbf' commands, this flag also now helps the debugger 'out' command to properly handle conditional return instructions. - Remove STEP_OVER from many instructions that aren't actually subroutine calls (e.g. DJNZ on Z80). A 'gni' debugger command (go next instruction) has been added to accommodate some of the misuse. - Add instruction flag support to several more disassemblers that lacked them entirely (e.g. st62xx) - Don't pass over delay slots for debugging in ASAP core
* Use std::clamp in more source files AJR2021-08-151-1/+1
|
* Eliminate ARRAY_LENGTH template in favor of C++17's std::size AJR2021-02-141-6/+6
| | | | | | | | | | * osdcomm.h: Move definition of EQUIVALENT_ARRAY to coretmpl.h * sharc.cpp, gt64xxx.cpp, ym2413.cpp, gb_lcd.cpp, snes_ppu.cpp: Use STRUCT_MEMBER for save state registration * gio/newport.cpp, megadrive/svp.cpp, nes_ctrl/bcbattle.cpp, arm7.cpp, tms9995.cpp, pckeybrd.cpp, sa1110.cpp, sa1111.cpp, jangou_blitter.cpp, vic4567.cpp: Use std::fill(_n) instead of memset * emucore.h: Remove obsolete typedef
* emumem: Simplify memory management. [O. Galibert] Olivier Galibert2020-11-021-2/+2
| | | | | | | | | | | | | | | | | | | | API impact: - install_ram/rom/writeonly now requires a non-null pointer. If you want automatically managed ram, add it to a memory map, not in machine_start - install_*_bank now requires a memory_bank *, not a string - one can create memory banks outside of memory maps with memory_bank_creator - one can create memory shares outside of memory maps with memory_share_creator Memory maps impact: - ram ranges with overlapping addresses are not shared anymore. Use .share() - ram ranges touching each other are not merged anymore. Stay in your range Extra note: - there is no need to create a bank just to dynamically map some memory/rom. Just use install_rom/ram/writeonly
* validity.cpp: Limit characters allowed in I/O port tags, and check ROMs and ↵ Vas Crabb2020-08-271-3/+3
| | | | I/O ports for devices individually.
* finally retired the READ8/16/32/64 and WRITE8/16/32/64 macros (nw) Ivan Vangelista2020-06-182-9/+9
|
* emumem: A little more speedup. cache and specific change syntax, and are ↵ Olivier Galibert2020-05-254-16/+16
| | | | | | | | | | | | | | | | not pointers anymore [O. Galibert] The last(?) two changes are: - Add a template parameter to everything (theoretically the address space width, in practice a level derived from it to keep as much compatibility between widths as possible) so that the shift size becomes a constant. - Change the syntax of declaring and initializing the caches and specifics so that they're embedded in the owner device. Solves lifetime issues and also removes one indirection (looking up the base dispatch pointer through the cache/specific pointer).
* removed some dummy_space() calls (nw) smf-2020-04-021-6/+6
|
* Make many device_execute_interface functions noexcept, including the ↵ AJR2019-11-091-3/+3
| | | | | | | | "information" overrides. This also covers several time-related functions in attotime, running_machine and emu_timer. (nw) m6805: Calculate min_cycles and max_cycles once at device_start time (Nw) attotime: Add as_khz and as_mhz (nw)
* Make devdelegate more like devcb for configuration. This is a Vas Crabb2019-10-261-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | fundamental change to show device delegates are configured. Device delegates are now aware of the current device during configuration and will resolve string tags relative to it. This means that device delegates need a device to be supplied on construction so they can find the machine configuration object. There's a one-dimensional array helper to make it easier to construct arrays of device delegates with the same owner. (I didn't make an n-dimensional one because I didn't hit a use case, but it would be a simple addition.) There's no more bind_relative_to member - just call resolve() like you would for a devcb. There's also no need to cast nullptr when creating a late bind device delegate. The flip side is that for an overloaded or non-capturing lambda you'll need to cast to the desired type. There is one less conditional branch in the hot path for calls for delegates bound to a function pointer of member function pointer. This comes at the cost of one additional unconditional branch in the hot path for calls to delegates bound to functoids (lambdas, functions that don't take an object reference, other callable objects). This applies to all delegates, not just device delegates. Address spaces will now print an error message if a late bind error is encountered while installing a handler. This will give the range and address range, hopefully making it easier to guess which memory map is faulty. For the simple case of allowing a device_delegate member to be configured, use a member like this: template <typename... T> void set_foo(T &&...args) { m_foo_cb.set(std::forward<T>(args)...); } For a case where different delegates need to be used depending on the function signature, see src/emu/screen.h (the screen update function setters). Device delegates now take a target specification and function pointer. The target may be: * Target omitted, implying the current device being configured. This can only be used during configuration. It will work as long as the current device is not removed/replaced. * A tag string relative to the current device being configured. This can only be used during configuration. It will not be callable until .resolve() is called. It will work as long as the current device is not removed/replaced. * A device finder (required_device/optional_device). The delegate will late bind to the current target of the device finder. It will not be callable until .resolve() is called. It will work properly if the target device is replaced, as long as the device finder's base object isn't removed/replaced. * A reference to an object. It will be callable immediately. It will work as long as the target object is not removed/replaced. The target types and restrictions are pretty similar to what you already have on object finders and devcb, so it shouldn't cause any surprises. Note that dereferencing a device finder will changes the effect. To illustrate this: ... required_device<some_device> m_dev; ... m_dev(*this, "dev") ... // will late bind to "dev" relative to *this // will work if "dev" hasn't been created yet or is replaced later // won't work if *this is removed/replaced // won't be callable until resolve() is called cb1.set(m_dev, FUNC(some_device::w)); ... // will bind to current target of m_dev // will not work if m_dev is not resolved // will not work if "dev" is replaced later // will be callable immediately cb2.set(*m_dev, FUNC(some_device::w)); ... The order of the target and name has been reversed for functoids (lambdas and other callable objects). This allows the NAME macro to be used on lambdas and functoids. For example: foo.set_something(NAME([this] (u8 data) { m_something = data; })); I realise the diagnostic messages get ugly if you use NAME on a large lambda. You can still give a literal name, you just have to place it after the lambda rather than before. This is uglier, but it's intentional. I'm trying to drive developers away from a certain style. While it's nice that you can put half the driver code in the memory map, it detracts from readability. It's hard to visualise the memory range mappings if the memory map functions are punctuated by large lambdas. There's also slightly higher overhead for calling a delegate bound to a functoid. If the code is prettier for trivial lambdas but uglier for non-trivial lambdas in address maps, it will hopefully steer people away from putting non-trivial lambdas in memory maps. There were some devices that were converted from using plain delegates without adding bind_relative_to calls. I fixed some of them (e.g. LaserDisc) but I probably missed some. These will likely crash on unresolved delegate calls. There are some devices that reset delegates at configuration complete or start time, preventing them from being set up during configuration (e.g. src/devices/video/ppu2c0x.cpp and src/devices/machine/68307.cpp). This goes against the design principles of how device delegates should be used, but I didn't change them because I don't trust myself to find all the places they're used. I've definitely broken some stuff with this (I know about asterix), so report issues and bear with me until I get it all fixed.
* -cpu/cop400, dsp16, hmcs40: Removed MCFG macros. [Ryan Holtz] mooglyguy2018-12-161-63/+13
| | | | | | -drivers/advision, cidelsa, hh_cop400, hh_hmcs40, play_2, test_t400, thayers: Removed MACHINE_CONFIG macros. [Ryan Holtz] -machine/alpha8201: Removed MACHINE_CONFIG macros. [Ryan Holtz]
* dsp16: Fixed a couple of typos pointed out by Coverity (nw) Melissa Goad2018-07-241-2/+2
|
* emumem: Rename direct_read_handler to memory_access_cache. Parametrize the ↵ Olivier Galibert2018-05-113-11/+11
| | | | template on more information (data width, endianness) to make it possible to turn it into an handler cache eventually, and not just a memory block cache. Make it capable of large and unaligned accesses. [O. Galibert]
* dsp16: aT = R has no X bit, duh (nw) Vas Crabb2018-05-103-5/+13
|
* dsp16: fix condition mask in disassembler (nw) Vas Crabb2018-05-091-1/+1
| | | | (nw) remove more MCFG macros and make speaker config more explicit
* dsp16: better rnd on negative (nw) Vas Crabb2018-05-091-1/+1
|
* stupid HOLD_LINE (nw) Vas Crabb2018-04-041-0/+4
|
* move some not-directly-emulation-related helpers to lib/util, further ↵ Vas Crabb2018-04-011-1/+1
| | | | extricate emu.h from tools (nw)
* dsp16: bypass memory system for work RAM access when debugger is disabled - ↵ Vas Crabb2018-03-282-42/+53
| | | | gives small performance gain
* Reshuffle some stuff: Vas Crabb2018-03-282-648/+703
| | | | | | * Move around the debugger hooks to get a small but measurable performance increase * Remove emucore from external tools * Improve performance of DSP16 interpreter a little by generating six variants of execution loop
* constexpr, const... (nw) Vas Crabb2018-03-251-1/+1
|
* don't pass so many naked pointers around (nw) Vas Crabb2018-03-252-3/+3
|
* cherry-pick more boilerplate, also missing emu.h inclusions (nw) Vas Crabb2018-03-223-1/+33
|
* trivial stuff (nw) Vas Crabb2018-03-213-3/+8
|
* dsp16: move most core state into DRC cache - keeps a lot of details out of ↵ Vas Crabb2018-03-217-519/+731
| | | | the main header (DRC is still stubbed out) (nw)
* dsp16: fix inconsistency in disassembler (nw) Vas Crabb2018-03-201-2/+2
|
* dsp16: fix disassembler bugs (nw) Vas Crabb2018-03-191-3/+3
| | | | qsound_hle: simplify sample fetch/scale and register writes
* (nw) dsp16: marginal performance improvement by precalculating SIO clock ↵ Vas Crabb2018-03-192-18/+31
| | | | divider preload, also push ILD/OLD on mode change
* second time I've done that (nw) Vas Crabb2018-03-191-1/+1
|
* dsp16: rewrite disassembler - less cluttered output, better handling of ↵ Vas Crabb2018-03-184-443/+636
| | | | ambiguous operations, look-ahead for predicated jumps, live will/won't comments on conditional instructions
* dsp16: start adding recompiler boilerplate (nw) Vas Crabb2018-03-174-1/+971
|
* dsp16: fix some corner cases (nw) Vas Crabb2018-03-172-22/+32
|
* use more constexpr and literal classes in UML to give compiler more ↵ Vas Crabb2018-03-173-25/+25
| | | | optimisation opportunities (nw)
* dsp16: implement remaining instructions for completeness Vas Crabb2018-03-162-43/+123
| | | | qsound_hle: use same sample rate as DSP
* QSound LLE available with a 3-character change Vas Crabb2018-03-161-2/+2
|
* Cycle-accurate DSP16 core (disabled in QSound for performance reasons) Vas Crabb2018-03-153-1414/+2424
|
* dsp16: Improve disassembler - less ambiguous, more like the manual. Vas Crabb2018-03-152-397/+336
|
* emumem: API change [O. Galibert] Olivier Galibert2017-11-292-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * direct_read_data is now a template which takes the address bus shift as a parameter. * address_space::direct<shift>() is now a template method that takes the shift as a parameter and returns a pointer instead of a reference * the address to give to {read|write}_* on address_space or direct_read_data is now the address one wants to access Longer explanation: Up until now, the {read|write}_* methods required the caller to give the byte offset instead of the actual address. That's the same on byte-addressing CPUs, e.g. the ones everyone knows, but it's different on the word/long/quad addressing ones (tms, sharc, etc...) or the bit-addressing one (tms340x0). Changing that required templatizing the direct access interface on the bus addressing granularity, historically called address bus shift. Also, since everybody was taking the address of the reference returned by direct(), and structurally didn't have much choice in the matter, it got changed to return a pointer directly. Longest historical explanation: In a cpu core, the hottest memory access, by far, is the opcode fetching. It's also an access with very good locality (doesn't move much, tends to stay in the same rom/ram zone even when jumping around, tends not to hit handlers), which makes efficient caching worthwhile (as in, 30-50% faster core iirc on something like the 6502, but that was 20 years ago and a number of things changed since then). In fact, opcode fetching was, in the distant past, just an array lookup indexed by pc on an offset pointer, which was updated on branches. It didn't stay that way because more elaborate access is often needed (handlers, banking with instructions crossing a bank...) but it still ends up with a frontend of "if the address is still in the current range read from pointer+address otherwise do the slowpath", e.g. two usually correctly predicted branches plus the read most of the time. Then the >8 bits cpus arrived. That was ok, it just required to do the add to a u8 *, then convert to a u16/u32 * and do the read. At the asm level, it was all identical except for the final read, and read_byte/word/long being separate there was no test (and associated overhead) added in the path. Then the word-addressing CPUs arrived with, iirc, the tms cpus used in atari games. They require, to read from the pointer, to shift the address, either explicitely, or implicitely through indexing a u16 *. There were three possibilities: 1- create a new read_* method for each size and granularity. That amounts to a lot of copy/paste in the end, and functions with identical prototypes so the compiler can't detect you're using the wrong one. 2- put a variable shift in the read path. That was too expensive especially since the most critical cpus are byte-addressing (68000 at the time was the key). Having bit-adressing cpus which means the shift can either be right or left depending on the variable makes things even worse. 3- require the caller to do the shift himself when needed. The last solution was chosen, and starting that day the address was a byte offset and not the real address. Which is, actually, quite surprising when writing a new cpu core or, worse, when using the read/write methods from the driver code. But since then, C++ happened. And, in particular, templates with non-type parameters. Suddendly, solution 1 can be done without the copy/paste and with different types allowing to detect (at runtime, but systematically and at startup) if you got it wrong, while still generating optimal code. So it was time to switch to that solution and makes the address parameter sane again. Especially since it makes mucking in the rest of the memory subsystem code a lot more understandable.
* dvdisasm: Overhaul [O. Galibert] Olivier Galibert2017-11-264-46/+57
| | | | | | | | Disassemblers are now independant classes. Not only the code is cleaner, but unidasm has access to all the cpu cores again. The interface to the disassembly method has changed from byte buffers to objects that give a result to read methods. This also adds support for lfsr and/or paged PCs.