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* Added ATTR_COLD to common lifecycle methods for many files in src/devices. ↵ holub2024-09-271-2/+2
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* cpu/cr16b, cpu/es5510, cpu/ks0164, cpu/mb86235, cpu/sharc, upd7220: Use ↵ AJR2022-11-012-19/+10
| | | | | | util::sext and other bit utility functions * cpu/sharc: Be a bit more paranoid about extreme values of bit6 and len6 (non-DRC)
* cr16b: Fix sign extension of branch displacements in disassembly AJR2022-08-181-5/+5
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* Debugger feature improvements AJR2022-03-271-9/+33
| | | | | | | | - Add 'gbt' and 'gbf' debugger commands to step until a true or false conditional branch has been detected. - Update over 100 of the disassemblers in MAME to output a new STEP_COND flag for all conditional branches. Besides being used for execution of the new 'gbt' and 'gbf' commands, this flag also now helps the debugger 'out' command to properly handle conditional return instructions. - Remove STEP_OVER from many instructions that aren't actually subroutine calls (e.g. DJNZ on Z80). A 'gni' debugger command (go next instruction) has been added to accommodate some of the misuse. - Add instruction flag support to several more disassemblers that lacked them entirely (e.g. st62xx) - Don't pass over delay slots for debugging in ASAP core
* cr16b: Fix disassembler crashing on invalid 0x15E0 opcode AJR2020-12-101-8/+1
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* emumem: A little more speedup. cache and specific change syntax, and are ↵ Olivier Galibert2020-05-252-6/+4
| | | | | | | | | | | | | | | | not pointers anymore [O. Galibert] The last(?) two changes are: - Add a template parameter to everything (theoretically the address space width, in practice a level derived from it to keep as much compatibility between widths as possible) so that the shift size becomes a constant. - Change the syntax of declaring and initializing the caches and specifics so that they're embedded in the owner device. Solves lifetime issues and also removes one indirection (looking up the base dispatch pointer through the cache/specific pointer).
* (nw) please try to ensure #include guards will trip special-casing in dumb ↵ Vas Crabb2019-09-162-2/+2
| | | | preprocessors to reduce filesystem operations
* Enable precompiled header usage in the Visual Studio compiler (#5473) S.Z2019-08-131-0/+1
| | | | | | | | | | * Enable precompiled header usage in the Visual Studio compiler But only for libraries emu frontend precompile dasm optional Also add emu.h include to hpcdasm.cpp * Include emu.h in some disassembler sources to use precompiled headers * Remove debug message
* unidasm: Add address shift for scudsp AJR2019-08-051-1/+1
| | | | cr16bdasm, mcs51dasm: Spacing fixes (nw)
* cr16bdasm: Update (nw) AJR2019-07-062-17/+26
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* Add disassembler and skeleton CPU device for CompactRISC CR16B architecture AJR2019-07-054-0/+1287
vtech_unk1.cpp: Driver moved to glcx.cpp (nw)