diff options
Diffstat (limited to 'src/mame/lsi')
-rw-r--r-- | src/mame/lsi/m3.cpp | 676 | ||||
-rw-r--r-- | src/mame/lsi/octo_kbd.cpp | 257 | ||||
-rw-r--r-- | src/mame/lsi/octo_kbd.h | 34 | ||||
-rw-r--r-- | src/mame/lsi/octopus.cpp | 1036 |
4 files changed, 2003 insertions, 0 deletions
diff --git a/src/mame/lsi/m3.cpp b/src/mame/lsi/m3.cpp new file mode 100644 index 00000000000..4502cab39ac --- /dev/null +++ b/src/mame/lsi/m3.cpp @@ -0,0 +1,676 @@ +// license: BSD-3-Clause +// copyright-holders: Robbbert, Dirk Best +/*************************************************************************** + + LSI M-THREE + + Models: + - M-THREE/100 (SA400, 5.25" single sided) + - M-THREE/110 (SA410, 5.25" single sided) + - M-THREE/150 (SA450, 5.25" double sided) + - M-THREE/160 (SA460, 5.25" double sided) + - M-THREE/200 (SA800, 8" single sided) + - M-THREE/250 (SA850, 8" double sided) [emulated by default] + - M-THREE/320 (SA800, 8" single sided, Winchester 5 MB) + - M-THREE/325 (SA850, 8" double sided, Winchester 5 MB) + - M-THREE/340 (SA800, 8" single sided, Winchester 10 MB) + - M-THREE/345 (SA850, 8" double sided, Winchester 10 MB) + + Hardware: + - MK3880N-IRL (Z80) + - 64 KB RAM + - Z80 CTC + - 2x D8255AC PPI + - D8251A + - MC6845P CRTC + - FD1793 FDC + - XTAL X1 21.??? Mhz (unreadable) + - XTAL X2 16 MHz + - XTAL X3 4.9152 MHz + - Keyboard XTAL 6.1?? MHz (assumed to be 6.144 MHz) + + TODO: + - Initial PC is currently hacked to f000 + - Verify/fix floppy hookup + - Printer interface + - Buzzer + - Map the rest of the keys, verify existing keys + - Switch FDC to 1 MHz for 5.25" drives + + Notes: + - Y to boot from floppy, ESC to enter monitor, any other key to + boot from IDE + +***************************************************************************/ + +#include "emu.h" +#include "cpu/mcs48/mcs48.h" +#include "cpu/z80/z80.h" +#include "machine/z80ctc.h" +#include "machine/i8255.h" +#include "machine/i8251.h" +#include "machine/wd_fdc.h" +#include "video/mc6845.h" +#include "imagedev/floppy.h" +#include "bus/rs232/rs232.h" +#include "emupal.h" +#include "screen.h" +#include "softlist_dev.h" + + +namespace { + + +//************************************************************************** +// TYPE DEFINITIONS +//************************************************************************** + +class m3_state : public driver_device +{ +public: + m3_state(const machine_config &mconfig, device_type type, const char *tag) + : driver_device(mconfig, type, tag), + m_maincpu(*this, "maincpu"), + m_ctc(*this, "ctc"), + m_ppi(*this, "ppi%u", 0U), + m_chargen(*this, "chargen"), + m_vram(*this, "vram"), + m_palette(*this, "palette"), + m_fdc(*this, "fdc"), + m_floppy(*this, "fdc:%u", 0U), + m_kbdmcu(*this, "kbdmcu"), + m_special(*this, "SPECIAL"), + m_keys(*this, "K%02u", 0U) + { } + + void m3(machine_config &config); + +protected: + virtual void machine_start() override ATTR_COLD; + virtual void machine_reset() override ATTR_COLD; + +private: + required_device<z80_device> m_maincpu; + required_device<z80ctc_device> m_ctc; + required_device_array<i8255_device, 2> m_ppi; + required_region_ptr<uint8_t> m_chargen; + required_shared_ptr<uint8_t> m_vram; + required_device<palette_device> m_palette; + required_device<fd1793_device> m_fdc; + required_device_array<floppy_connector, 2> m_floppy; + required_device<i8035_device> m_kbdmcu; + required_ioport m_special; + required_ioport_array<16> m_keys; + + void mem_map(address_map &map) ATTR_COLD; + void io_map(address_map &map) ATTR_COLD; + void kbd_mem_map(address_map &map) ATTR_COLD; + void kbd_io_map(address_map &map) ATTR_COLD; + + int kbd_t0_r(); + int kbd_t1_r(); + uint8_t kbd_p1_r(); + void kbd_p1_w(uint8_t data); + void kbd_p2_w(uint8_t data); + void kbd_data_w(uint8_t data); + int m_kbd_col = 0; + int m_kbd_row = 0; + uint8_t m_kbd_data = 0U; + + void ppi2_pa_w(uint8_t data); + uint8_t ppi2_pb_r(); + + MC6845_UPDATE_ROW(crtc_update_row); + + void fdc_intrq_w(int state); + void fdc_drq_w(int state); + uint8_t fdc_data_r(offs_t offset); + void fdc_data_w(offs_t offset, uint8_t data); + + bool m_nmi_enabled = false; + bool m_nmi_taken = false; +}; + + +//************************************************************************** +// ADDRESS MAPS +//************************************************************************** + +void m3_state::mem_map(address_map &map) +{ + map(0x0000, 0xe7ff).ram(); + map(0xe800, 0xefff).ram().share("vram"); + map(0xf000, 0xffff).rom().region("maincpu", 0); +} + +void m3_state::io_map(address_map &map) +{ + map.unmap_value_high(); + map.global_mask(0xff); + map(0x80, 0x83).rw(m_ctc, FUNC(z80ctc_device::read), FUNC(z80ctc_device::write)); + map(0x84, 0x84).rw("crtc", FUNC(mc6845_device::status_r), FUNC(mc6845_device::address_w)); + map(0x85, 0x85).rw("crtc", FUNC(mc6845_device::register_r), FUNC(mc6845_device::register_w)); + map(0x88, 0x88).rw(m_fdc, FUNC(fd1793_device::status_r), FUNC(fd1793_device::cmd_w)); + map(0x89, 0x89).rw(m_fdc, FUNC(fd1793_device::track_r), FUNC(fd1793_device::track_w)); + map(0x8a, 0x8a).rw(m_fdc, FUNC(fd1793_device::sector_r), FUNC(fd1793_device::sector_w)); + map(0x8b, 0x8b).rw(FUNC(m3_state::fdc_data_r), FUNC(m3_state::fdc_data_w)); + map(0x8c, 0x8d).rw("usart", FUNC(i8251_device::read), FUNC(i8251_device::write)); + map(0x90, 0x93).rw(m_ppi[0], FUNC(i8255_device::read), FUNC(i8255_device::write)); + map(0x94, 0x97).rw(m_ppi[1], FUNC(i8255_device::read), FUNC(i8255_device::write)); +} + +void m3_state::kbd_mem_map(address_map &map) +{ + map(0x000, 0x7ff).rom().mirror(0x800).region("keyboard", 0); +} + +void m3_state::kbd_io_map(address_map &map) +{ + map(0x30, 0x30).mirror(0xf).w(FUNC(m3_state::kbd_data_w)); +} + + +//************************************************************************** +// INPUT DEFINITIONS +//************************************************************************** + +// unmapped keys: +// +// INIT PROG F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 +// INS_CHAR DEL_CHAR INS_LINE DEL_LINE CLEAR_FORE CLEAR_PAGE PROT_MODE BLOCK_MODE +// SEND_LINE SEND_FORE SEND_PAGE PAGE_FWD UP PAGE_BACK LEFT HOME RIGHT +// BREAK SET_TAB DOWN CLEAR_TAB + +static INPUT_PORTS_START( m3 ) + PORT_START("SPECIAL") + PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_CAPSLOCK) PORT_CHAR(UCHAR_MAMEKEY(CAPSLOCK)) // or shift-lock? + PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_LSHIFT) PORT_CODE(KEYCODE_RSHIFT) PORT_CHAR(UCHAR_SHIFT_1) + PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_LCONTROL) PORT_CODE(KEYCODE_RCONTROL) PORT_CHAR(UCHAR_SHIFT_2) + PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD) PORT_CODE(KEYCODE_LALT) PORT_NAME("Repeat") + + PORT_START("K00") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_6) PORT_CHAR('6') PORT_CHAR('&') + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_H) PORT_CHAR('h') PORT_CHAR('H') + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME(": (?)") + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("b4") + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("b3") + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_UNUSED) + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_Y) PORT_CHAR('y') PORT_CHAR('Y') + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("85") + + PORT_START("K01") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_7) PORT_CHAR('7') PORT_CHAR('\'') + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_J) PORT_CHAR('j') PORT_CHAR('J') + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("0f") + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("b2") + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_9_PAD) PORT_CHAR(UCHAR_MAMEKEY(9_PAD)) + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_UNUSED) + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_U) PORT_CHAR('u') PORT_CHAR('U') + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("86") + + PORT_START("K02") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_MINUS) PORT_CHAR('-') PORT_CHAR('=') + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_Z) PORT_CHAR('z') PORT_CHAR('Z') + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("05") + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("96") + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_2_PAD) PORT_CHAR(UCHAR_MAMEKEY(2_PAD)) + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_UNUSED) + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_P) PORT_CHAR('p') PORT_CHAR('P') + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("89") + + PORT_START("K03") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_QUOTE) PORT_CHAR(';') PORT_CHAR('+') + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_X) PORT_CHAR('x') PORT_CHAR('X') + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("2 (?)") + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("95") + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_5_PAD) PORT_CHAR(UCHAR_MAMEKEY(5_PAD)) + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_UNUSED) + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_EQUALS) PORT_CHAR('@') PORT_CHAR('`') + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("8a") + + PORT_START("K04") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_COLON) PORT_CHAR(':') PORT_CHAR('*') + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_C) PORT_CHAR('c') PORT_CHAR('C') + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("11") + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("94") + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_8_PAD) PORT_CHAR(UCHAR_MAMEKEY(8_PAD)) + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_UNUSED) + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_TILDE) PORT_CHAR('^') PORT_CHAR('~') + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("8b") + + PORT_START("K05") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("cd") + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_V) PORT_CHAR('v') PORT_CHAR('V') + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_UNUSED) + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("93") + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_1_PAD) PORT_CHAR(UCHAR_MAMEKEY(1_PAD)) + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_BACKSPACE) PORT_CHAR(8) + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_BACKSLASH) PORT_CHAR('\\') PORT_CHAR('|') // actually ¦ + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("8c") + + PORT_START("K06") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_COMMA) PORT_CHAR(',') PORT_CHAR('<') + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_B) PORT_CHAR('b') PORT_CHAR('B') + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_SPACE) PORT_CHAR(' ') + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("92") + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_4_PAD) PORT_CHAR(UCHAR_MAMEKEY(4_PAD)) + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_TAB) PORT_CHAR(9) + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_OPENBRACE) PORT_CHAR('[') PORT_CHAR('{') + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("8d") + + PORT_START("K07") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_STOP) PORT_CHAR('.') PORT_CHAR('>') + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_N) PORT_CHAR('n') PORT_CHAR('N') + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_BACKSLASH2) PORT_CHAR('_') + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("91") + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_7_PAD) PORT_CHAR(UCHAR_MAMEKEY(7_PAD)) + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_ENTER) PORT_CHAR('\r') + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_UNUSED) + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("8e") + + PORT_START("K08") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_SLASH) PORT_CHAR('/') PORT_CHAR('?') + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_M) PORT_CHAR('m') PORT_CHAR('M') + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_DEL) PORT_CHAR(UCHAR_MAMEKEY(DEL)) + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("90") + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("bc") + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("LF") PORT_CHAR('\n') + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_CLOSEBRACE) PORT_CHAR(']') PORT_CHAR('}') + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("8f") + + PORT_START("K09") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_8) PORT_CHAR('8') PORT_CHAR('(') + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_K) PORT_CHAR('k') PORT_CHAR('K') + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("cd") + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("b1") + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("b0") + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_UNUSED) + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_I) PORT_CHAR('i') PORT_CHAR('I') + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("87") + + PORT_START("K10") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_9) PORT_CHAR('9') PORT_CHAR(')') + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_L) PORT_CHAR('l') PORT_CHAR('L') + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_0) PORT_CHAR('0') + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("97") + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_0_PAD) PORT_CHAR(UCHAR_MAMEKEY(0_PAD)) + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_UNUSED) + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_O) PORT_CHAR('o') PORT_CHAR('O') + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("88") + + PORT_START("K11") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_5) PORT_CHAR('5') PORT_CHAR('%') + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_G) PORT_CHAR('g') PORT_CHAR('G') + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("03") + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("b5") + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_6_PAD) PORT_CHAR(UCHAR_MAMEKEY(6_PAD)) + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_UNUSED) + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_T) PORT_CHAR('t') PORT_CHAR('T') + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("84") + + PORT_START("K12") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_4) PORT_CHAR('4') PORT_CHAR('$') + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_F) PORT_CHAR('f') PORT_CHAR('F') + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("cd") + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("b7") + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("b6") + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_UNUSED) + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_R) PORT_CHAR('r') PORT_CHAR('R') + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("83") + + PORT_START("K13") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_3) PORT_CHAR('3') PORT_CHAR(0xa3) // £ + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_D) PORT_CHAR('d') PORT_CHAR('D') + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("ea") + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("b8") + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_3_PAD) PORT_CHAR(UCHAR_MAMEKEY(3_PAD)) + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_UNUSED) + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_E) PORT_CHAR('e') PORT_CHAR('E') + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("82") + + PORT_START("K14") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_2) PORT_CHAR('2') PORT_CHAR('"') + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_S) PORT_CHAR('s') PORT_CHAR('S') + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("02") + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("ba") + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("b9") + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_UNUSED) + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_W) PORT_CHAR('w') PORT_CHAR('W') + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("81") + + PORT_START("K15") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_1) PORT_CHAR('1') PORT_CHAR('!') + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_A) PORT_CHAR('a') PORT_CHAR('A') + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("c3") + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("bb") + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_COMMA_PAD) PORT_CHAR(UCHAR_MAMEKEY(DEL_PAD)) + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_ESC) PORT_CHAR(UCHAR_MAMEKEY(ESC)) + PORT_BIT(0x40, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_CODE(KEYCODE_Q) PORT_CHAR('q') PORT_CHAR('Q') + PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYBOARD) PORT_NAME("80") +INPUT_PORTS_END + +int m3_state::kbd_t0_r() +{ + // outputs 26 alternating 0 and 1 to i/o port 0x00 when active + return 1; +} + +int m3_state::kbd_t1_r() +{ + // checked right before outputing a new keycode + return 0; +} + +uint8_t m3_state::kbd_p1_r() +{ + uint8_t data = 0; + + // ---4---- key down + // ----3--- repeat + // -----2-- control + // ------1- shift + // -------0 caps-lock, shift-lock? + + data |= BIT(m_keys[m_kbd_col]->read(), m_kbd_row) ? 0x00 : 0x10; + data |= m_special->read(); + + return data; +} + +void m3_state::kbd_p1_w(uint8_t data) +{ + // 765----- row select + + m_kbd_row = data >> 5; +} + +void m3_state::kbd_p2_w(uint8_t data) +{ + // 7654---- column select + // ----3210 unused + + m_kbd_col = data >> 4; +} + +void m3_state::kbd_data_w(uint8_t data) +{ + m_kbd_data = data; + + m_ppi[1]->pc2_w(0); + m_ppi[1]->pc2_w(1); +} + + +//************************************************************************** +// VIDEO EMULATION +//************************************************************************** + +MC6845_UPDATE_ROW( m3_state::crtc_update_row ) +{ + rgb_t const *const pen = m_palette->palette()->entry_list_raw(); + + for (uint16_t x = 0; x < x_count; x++) + { + uint16_t mem = (ma + x) & 0x7ff; + uint8_t chr = m_vram[mem]; + uint8_t gfx = m_chargen[((chr << 4) | ra) & 0x7ff]; + + // invert? + if (BIT(chr, 7)) + gfx ^= 0xff; + + // cursor? + if (x == cursor_x) + gfx ^= 0xff; + + // draw 7 pixels of the character + for (int i = 0; i < 7; i++) + bitmap.pix(y, x * 7 + i) = pen[BIT(gfx, 6 - i)]; + } +} + +static const gfx_layout charlayout = +{ + 7, 10, + RGN_FRAC(1,1), + 1, + { 0 }, + { 1, 2, 3, 4, 5, 6, 7 }, + { 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8, 8*8, 9*8 }, + 8*16 +}; + +static GFXDECODE_START(chars) + GFXDECODE_ENTRY("chargen", 0, charlayout, 0, 1) +GFXDECODE_END + + +//************************************************************************** +// MACHINE EMULATION +//************************************************************************** + +void m3_state::fdc_intrq_w(int state) +{ + if (state) + { + m_maincpu->set_input_line(Z80_INPUT_LINE_WAIT, CLEAR_LINE); + m_nmi_taken = false; + } + + m_ctc->trg1(state); +} + +void m3_state::fdc_drq_w(int state) +{ + if (state) + { + m_maincpu->set_input_line(Z80_INPUT_LINE_WAIT, CLEAR_LINE); + + if (m_nmi_enabled) + { + m_maincpu->pulse_input_line(INPUT_LINE_NMI, attotime::zero); + + m_nmi_enabled = false; + m_nmi_taken = true; + } + } +} + +uint8_t m3_state::fdc_data_r(offs_t offset) +{ + if (m_nmi_taken && m_fdc->drq_r() == 0) + { + m_maincpu->set_input_line(Z80_INPUT_LINE_WAIT, ASSERT_LINE); + m_maincpu->retry_access(); + + return 0; + } + + return m_fdc->data_r(); +} + +void m3_state::fdc_data_w(offs_t offset, uint8_t data) +{ + if (m_nmi_taken && m_fdc->drq_r() == 0) + { + m_maincpu->set_input_line(Z80_INPUT_LINE_WAIT, ASSERT_LINE); + m_maincpu->retry_access(); + } + + m_fdc->data_w(data); +} + +void m3_state::ppi2_pa_w(uint8_t data) +{ + floppy_image_device *floppy = nullptr; + + // 7------- not used? + // -6------ buzzer + // --5----- not used? + // ---4---- nmi enable + // ----3--- unknown + // -----2-- floppy side + // ------10 drive select + + logerror("ppi2_pa_w: %02x\n", data); + + if (!BIT(data, 0) && m_floppy[0]) + floppy = m_floppy[0]->get_device(); + else if (!BIT(data, 1) && m_floppy[1]) + floppy = m_floppy[1]->get_device(); + + m_fdc->set_floppy(floppy); + + if (floppy) + floppy->ss_w(BIT(data, 2)); + + m_nmi_enabled = bool(BIT(~data, 4)); +} + +uint8_t m3_state::ppi2_pb_r() +{ + return m_kbd_data; +} + +void m3_state::machine_start() +{ + // register for save states + save_item(NAME(m_kbd_col)); + save_item(NAME(m_kbd_row)); + save_item(NAME(m_kbd_data)); + save_item(NAME(m_nmi_enabled)); + save_item(NAME(m_nmi_taken)); +} + +void m3_state::machine_reset() +{ + m_maincpu->set_pc(0xf000); + + m_nmi_enabled = false; + m_nmi_taken = false; +} + + +//************************************************************************** +// MACHINE DEFINTIONS +//************************************************************************** + +static const z80_daisy_config daisy_chain[] = +{ + { "ctc" }, + { nullptr } +}; + +static DEVICE_INPUT_DEFAULTS_START( rs232_defaults ) + DEVICE_INPUT_DEFAULTS( "RS232_TXBAUD", 0xff, RS232_BAUD_9600 ) + DEVICE_INPUT_DEFAULTS( "RS232_RXBAUD", 0xff, RS232_BAUD_9600 ) + DEVICE_INPUT_DEFAULTS( "RS232_DATABITS", 0xff, RS232_DATABITS_7 ) + DEVICE_INPUT_DEFAULTS( "RS232_PARITY", 0xff, RS232_PARITY_EVEN ) + DEVICE_INPUT_DEFAULTS( "RS232_STOPBITS", 0xff, RS232_STOPBITS_1 ) +DEVICE_INPUT_DEFAULTS_END + +static void m3_floppies(device_slot_interface &device) +{ + device.option_add("sa400", FLOPPY_525_SSSD_35T); + device.option_add("sa410", FLOPPY_525_SSQD); + device.option_add("sa450", FLOPPY_525_DD); + device.option_add("sa460", FLOPPY_525_QD); + device.option_add("sa800", FLOPPY_8_SSDD); + device.option_add("sa850", FLOPPY_8_DSDD); +} + +void m3_state::m3(machine_config &config) +{ + Z80(config, m_maincpu, 4.9152_MHz_XTAL / 2); + m_maincpu->set_addrmap(AS_PROGRAM, &m3_state::mem_map); + m_maincpu->set_addrmap(AS_IO, &m3_state::io_map); + m_maincpu->set_daisy_config(daisy_chain); + + Z80CTC(config, m_ctc, 0); // unknown clock + m_ctc->intr_callback().set_inputline(m_maincpu, INPUT_LINE_IRQ0); + m_ctc->set_clk<0>(4.9152_MHz_XTAL / 4); + m_ctc->zc_callback<0>().set("usart", FUNC(i8251_device::write_txc)); + m_ctc->zc_callback<0>().append("usart", FUNC(i8251_device::write_rxc)); + + I8255(config, m_ppi[0]); + + I8255(config, m_ppi[1]); + m_ppi[1]->out_pa_callback().set(FUNC(m3_state::ppi2_pa_w)); + m_ppi[1]->in_pb_callback().set(FUNC(m3_state::ppi2_pb_r)); + + i8251_device &usart(I8251(config, "usart", 0)); // unknown clock + usart.txd_handler().set("rs232", FUNC(rs232_port_device::write_txd)); + usart.rts_handler().set("rs232", FUNC(rs232_port_device::write_rts)); + usart.dtr_handler().set("rs232", FUNC(rs232_port_device::write_dtr)); + + rs232_port_device &rs232(RS232_PORT(config, "rs232", default_rs232_devices, nullptr)); + rs232.set_option_device_input_defaults("printer", DEVICE_INPUT_DEFAULTS_NAME(rs232_defaults)); + rs232.rxd_handler().set("usart", FUNC(i8251_device::write_rxd)); + rs232.dsr_handler().set("usart", FUNC(i8251_device::write_dsr)); + rs232.cts_handler().set("usart", FUNC(i8251_device::write_cts)); + + // video hardware + screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER, rgb_t::green())); + screen.set_raw(21'840'000 / 2, 707, 0, 560, 309, 0, 240); // unknown clock, hand-tuned to ~50 fps + screen.set_screen_update("crtc", FUNC(mc6845_device::screen_update)); + + GFXDECODE(config, "gfxdecode", m_palette, chars); + + PALETTE(config, m_palette, palette_device::MONOCHROME); + + mc6845_device &crtc(MC6845(config, "crtc", 21'840'000 / 2 / 7)); // unknown clock + crtc.set_screen("screen"); + crtc.set_show_border_area(false); + crtc.set_char_width(7); + crtc.set_update_row_callback(FUNC(m3_state::crtc_update_row)); + crtc.out_vsync_callback().set(m_ctc, FUNC(z80ctc_device::trg2)); + + // floppy + FD1793(config, m_fdc, 16_MHz_XTAL / 8); + m_fdc->intrq_wr_callback().set(FUNC(m3_state::fdc_intrq_w)); + m_fdc->drq_wr_callback().set(FUNC(m3_state::fdc_drq_w)); + FLOPPY_CONNECTOR(config, "fdc:0", m3_floppies, "sa850", floppy_image_device::default_mfm_floppy_formats); + FLOPPY_CONNECTOR(config, "fdc:1", m3_floppies, "sa850", floppy_image_device::default_mfm_floppy_formats); + + SOFTWARE_LIST(config, "floppy_list").set_original("m3"); + + // keyboard + I8035(config, m_kbdmcu, 6.144_MHz_XTAL); + m_kbdmcu->set_addrmap(AS_PROGRAM, &m3_state::kbd_mem_map); + m_kbdmcu->set_addrmap(AS_IO, &m3_state::kbd_io_map); + m_kbdmcu->p1_in_cb().set(FUNC(m3_state::kbd_p1_r)); + m_kbdmcu->p1_out_cb().set(FUNC(m3_state::kbd_p1_w)); + m_kbdmcu->p2_out_cb().set(FUNC(m3_state::kbd_p2_w)); + m_kbdmcu->t0_in_cb().set(FUNC(m3_state::kbd_t0_r)); + m_kbdmcu->t1_in_cb().set(FUNC(m3_state::kbd_t1_r)); +} + + +//************************************************************************** +// ROM DEFINITIONS +//************************************************************************** + +ROM_START( m3 ) + ROM_REGION(0x1000, "maincpu", 0) + ROM_LOAD("bootstrap_prom_034.bin", 0x0000, 0x0800, CRC(7fdb051e) SHA1(7aa24d4f44b6a0c8f7f647667f4997432c186cac)) + + // Homebrew Monitor ROM, written by Steve Hunt. Uses the socket of the HDD ROM. + ROM_LOAD("monitor_prom_v19_2017-07-05.bin", 0x0800, 0x0800, CRC(0608848f) SHA1(9a82cb49056ff1a1d53ce2bd026537a6914a4847)) + + ROM_REGION(0x800, "chargen", 0) + ROM_LOAD("6845crt_font_prom_033.bin", 0x000, 0x800, CRC(cc29f664) SHA1(4197530d9455d665fd4773f95bb6394f6b056dec)) + + ROM_REGION(0x800, "keyboard", 0) + ROM_LOAD("keyboard_prom_032.bin", 0x000, 0x800, CRC(21548355) SHA1(ee4ce4af9c78474263dd58e0f19e79e5b00926fa)) +ROM_END + + +} // anonymous namespace + + +//************************************************************************** +// SYSTEM DRIVERS +//************************************************************************** + +// YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS +COMP( 1982, m3, 0, 0, m3, m3, m3_state, empty_init, "LSI", "M-THREE", MACHINE_NOT_WORKING | MACHINE_NO_SOUND | MACHINE_SUPPORTS_SAVE ) diff --git a/src/mame/lsi/octo_kbd.cpp b/src/mame/lsi/octo_kbd.cpp new file mode 100644 index 00000000000..16fed619365 --- /dev/null +++ b/src/mame/lsi/octo_kbd.cpp @@ -0,0 +1,257 @@ +// license:BSD-3-Clause +// copyright-holders:Barry Rodewald + +#include "emu.h" +#include "octo_kbd.h" +#include "machine/keyboard.ipp" + + +octopus_keyboard_device::octopus_keyboard_device(const machine_config& mconfig, const char* tag, device_t* owner, uint32_t clock) + : buffered_rs232_device(mconfig, OCTOPUS_KEYBOARD, tag, owner, 0) + , device_matrix_keyboard_interface(mconfig, *this, "LINE0", "LINE1", "LINE2", "LINE3", "LINE4", "LINE5", "LINE6", "LINE7", "LINE8", "LINE9", "LINEA", "LINEB", "LINEC", "LINED", "LINEE", "LINEF") +{ +} + + +void octopus_keyboard_device::received_byte(uint8_t data) +{ + // TODO: figure out received data format (used for Shift Lock and Caps Lock LEDs) + printf("KBD: Received byte %02x\n",data); +} + +void octopus_keyboard_device::key_make(uint8_t row, uint8_t column) +{ + if (row != 0x0eU) + typematic_start(row, column, attotime::from_msec(m_delay), attotime::from_msec(m_repeat)); + else + typematic_restart(attotime::from_msec(m_delay), attotime::from_msec(m_repeat)); + + transmit_byte((row << 3) | column); +} + +void octopus_keyboard_device::key_repeat(uint8_t row, uint8_t column) +{ + transmit_byte((row << 3) | column); +} + +void octopus_keyboard_device::key_break(uint8_t row, uint8_t column) +{ + device_matrix_keyboard_interface::key_break(row, column); + transmit_byte(0x80U | (row << 3) | column); +} + +static INPUT_PORTS_START( octopus_keyboard ) + + // 0x00 + PORT_START("LINE0") + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("J") PORT_CODE(KEYCODE_J) PORT_CHAR('j') PORT_CHAR('J') + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("U") PORT_CODE(KEYCODE_U) PORT_CHAR('u') PORT_CHAR('U') + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("7 \'") PORT_CODE(KEYCODE_7) PORT_CHAR('7') PORT_CHAR('\'') + PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("F8") PORT_CODE(KEYCODE_F8) PORT_CHAR(UCHAR_MAMEKEY(F8)) + PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Space") PORT_CODE(KEYCODE_SPACE) PORT_CHAR(' ') + PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_UNUSED ) + PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_UNUSED ) + PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("N") PORT_CODE(KEYCODE_N) PORT_CHAR('n') PORT_CHAR('N') + + PORT_START("LINE1") + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("S") PORT_CODE(KEYCODE_S) PORT_CHAR('s') PORT_CHAR('S') + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("W") PORT_CODE(KEYCODE_W) PORT_CHAR('w') PORT_CHAR('W') + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("2 \"") PORT_CODE(KEYCODE_2) PORT_CHAR('2') PORT_CHAR('\"') + PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("F3") PORT_CODE(KEYCODE_F3) PORT_CHAR(UCHAR_MAMEKEY(F3)) + PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("F22") //PORT_CODE(KEYCODE_SPACE) + PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("F25") + PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_UNUSED ) + PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Z") PORT_CODE(KEYCODE_Z) PORT_CHAR('z') PORT_CHAR('Z') + + // 0x10 + PORT_START("LINE2") + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("] }") PORT_CODE(KEYCODE_CLOSEBRACE) PORT_CHAR(']') PORT_CHAR('}') + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("[ {") PORT_CODE(KEYCODE_OPENBRACE) PORT_CHAR('[') PORT_CHAR('{') + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("^ ~") PORT_CODE(KEYCODE_TILDE) PORT_CHAR('^') PORT_CHAR('~') + PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("F13") + PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("F30") + PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Left") PORT_CODE(KEYCODE_LEFT) PORT_CHAR(UCHAR_MAMEKEY(LEFT)) + PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("F28") + PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Right Shift") PORT_CODE(KEYCODE_RSHIFT) PORT_CHAR(UCHAR_SHIFT_1) + + PORT_START("LINE3") + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("A") PORT_CODE(KEYCODE_A) PORT_CHAR('a') PORT_CHAR('A') + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Q") PORT_CODE(KEYCODE_Q) PORT_CHAR('q') PORT_CHAR('Q') + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("1 !") PORT_CODE(KEYCODE_1) PORT_CHAR('1') PORT_CHAR('!') + PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("F2") PORT_CODE(KEYCODE_F2) PORT_CHAR(UCHAR_MAMEKEY(F2)) + PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("F23") + PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("F26") + PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_UNUSED ) + PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Left Shift") PORT_CODE(KEYCODE_LSHIFT) + + // 0x20 + PORT_START("LINE4") + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("; +") PORT_CODE(KEYCODE_COLON) PORT_CHAR(';') PORT_CHAR('+') + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("P") PORT_CODE(KEYCODE_P) PORT_CHAR('p') PORT_CHAR('P') + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("0") PORT_CODE(KEYCODE_0) PORT_CHAR('0') + PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("F11") PORT_CODE(KEYCODE_F11) PORT_CHAR(UCHAR_MAMEKEY(F11)) + PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("F31") + PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Right") PORT_CODE(KEYCODE_RIGHT) PORT_CHAR(UCHAR_MAMEKEY(RIGHT)) + PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("F29") + PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME(". >") PORT_CODE(KEYCODE_STOP) PORT_CHAR('.') PORT_CHAR('>') + + PORT_START("LINE5") + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Shift Lock") PORT_CODE(KEYCODE_LALT) + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Cntrl") PORT_CODE(KEYCODE_LCONTROL) PORT_CHAR(UCHAR_SHIFT_2) + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Esc") PORT_CODE(KEYCODE_ESC) PORT_CHAR(27) + PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("F1") PORT_CODE(KEYCODE_F1) PORT_CHAR(UCHAR_MAMEKEY(F1)) + PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("F2") PORT_CODE(KEYCODE_F2) PORT_CHAR(UCHAR_MAMEKEY(F2)) + PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("F24") + PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("F27") + PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Caps Lock") PORT_CODE(KEYCODE_CAPSLOCK) PORT_CHAR(UCHAR_MAMEKEY(CAPSLOCK)) + + // 0x30 + PORT_START("LINE6") + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME(": *") PORT_CODE(KEYCODE_QUOTE) PORT_CHAR(':') PORT_CHAR('*') + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("@ \\") PORT_CODE(KEYCODE_EQUALS) PORT_CHAR('@') PORT_CHAR('`') // keytop shows backslash but it produces tic + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("- =") PORT_CODE(KEYCODE_MINUS) PORT_CHAR('-') PORT_CHAR('=') + PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("F12") PORT_CODE(KEYCODE_F12) PORT_CHAR(UCHAR_MAMEKEY(F12)) + PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Down") PORT_CODE(KEYCODE_DOWN) PORT_CHAR(UCHAR_MAMEKEY(DOWN)) + PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Home") PORT_CODE(KEYCODE_HOME) PORT_CHAR(UCHAR_MAMEKEY(HOME)) + PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Up") PORT_CODE(KEYCODE_UP) PORT_CHAR(UCHAR_MAMEKEY(UP)) + PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("/ ?") PORT_CODE(KEYCODE_SLASH) PORT_CHAR('/') PORT_CHAR('?') + + PORT_START("LINE7") + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("K") PORT_CODE(KEYCODE_K) PORT_CHAR('k') PORT_CHAR('K') + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("I") PORT_CODE(KEYCODE_I) PORT_CHAR('i') PORT_CHAR('I') + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("8 (") PORT_CODE(KEYCODE_8) PORT_CHAR('8') PORT_CHAR('(') + PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("F9") PORT_CODE(KEYCODE_F9) PORT_CHAR(UCHAR_MAMEKEY(F9)) + PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_UNUSED ) + PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_UNUSED ) + PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_UNUSED ) + PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("M") PORT_CODE(KEYCODE_M) PORT_CHAR('m') PORT_CHAR('M') + + // 0x40 + PORT_START("LINE8") + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Line Feed") PORT_CODE(KEYCODE_ENTER_PAD) PORT_CHAR(10) + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Enter") PORT_CODE(KEYCODE_ENTER) PORT_CHAR(13) + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Backspace") PORT_CODE(KEYCODE_BACKSPACE) PORT_CHAR(8) + PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("F15") + PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Numpad 0") PORT_CODE(KEYCODE_0_PAD) + PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Numpad 1") PORT_CODE(KEYCODE_1_PAD) + PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Numpad 4") PORT_CODE(KEYCODE_4_PAD) + PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("F32") + + PORT_START("LINE9") + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("G") PORT_CODE(KEYCODE_G) PORT_CHAR('g') PORT_CHAR('G') + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("T") PORT_CODE(KEYCODE_T) PORT_CHAR('t') PORT_CHAR('T') + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("5 %") PORT_CODE(KEYCODE_5) PORT_CHAR('5') PORT_CHAR('%') + PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("F6") PORT_CODE(KEYCODE_F6) PORT_CHAR(UCHAR_MAMEKEY(F6)) + PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("F19") + PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Numpad 8") PORT_CODE(KEYCODE_8_PAD) + PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_UNUSED ) + PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("V") PORT_CODE(KEYCODE_V) PORT_CHAR('v') PORT_CHAR('V') + + // 0x50 + PORT_START("LINEA") + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_UNUSED ) + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_UNUSED ) + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Tab") PORT_CODE(KEYCODE_TAB) PORT_CHAR(9) + PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("F16") + PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("F17") + PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Numpad 2") PORT_CODE(KEYCODE_2_PAD) + PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Numpad 5") PORT_CODE(KEYCODE_5_PAD) + PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_UNUSED ) + + PORT_START("LINEB") + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("F") PORT_CODE(KEYCODE_F) PORT_CHAR('f') PORT_CHAR('F') + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("R") PORT_CODE(KEYCODE_R) PORT_CHAR('r') PORT_CHAR('R') + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("4 $") PORT_CODE(KEYCODE_4) PORT_CHAR('4') PORT_CHAR('$') + PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("F5") PORT_CODE(KEYCODE_F5) PORT_CHAR(UCHAR_MAMEKEY(F5)) + PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("F20") + PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Numpad 9") PORT_CODE(KEYCODE_9_PAD) + PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_UNUSED ) + PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("C") PORT_CODE(KEYCODE_C) PORT_CHAR('c') PORT_CHAR('C') + + // 0x60 + PORT_START("LINEC") + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Del") PORT_CODE(KEYCODE_DEL) PORT_CHAR(UCHAR_MAMEKEY(DEL)) + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("_") PORT_CHAR('_') + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("\\ |") PORT_CODE(KEYCODE_BACKSLASH) PORT_CHAR('\\') PORT_CHAR('|') + PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("F14") + PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Numpad .") PORT_CODE(KEYCODE_DEL_PAD) + PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Numpad 3") PORT_CODE(KEYCODE_3_PAD) + PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Numpad 6") PORT_CODE(KEYCODE_6_PAD) + PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Rep") + + PORT_START("LINED") + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("D") PORT_CODE(KEYCODE_D) PORT_CHAR('d') PORT_CHAR('D') + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("E") PORT_CODE(KEYCODE_E) PORT_CHAR('e') PORT_CHAR('E') + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("3 \xE2\x82\xA4") PORT_CODE(KEYCODE_3) PORT_CHAR('3') PORT_CHAR(0xA3) + PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("F4") PORT_CODE(KEYCODE_F4) PORT_CHAR(UCHAR_MAMEKEY(F4)) + PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("F21") + PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_UNUSED ) + PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_UNUSED ) + PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("X") PORT_CODE(KEYCODE_X) PORT_CHAR('x') PORT_CHAR('X') + + // 0x70 + PORT_START("LINEE") + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("L") PORT_CODE(KEYCODE_L) PORT_CHAR('l') PORT_CHAR('L') + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("O") PORT_CODE(KEYCODE_O) PORT_CHAR('o') PORT_CHAR('O') + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("9 )") PORT_CODE(KEYCODE_9) PORT_CHAR('9') PORT_CHAR(')') + PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("F10") PORT_CODE(KEYCODE_F10) PORT_CHAR(UCHAR_MAMEKEY(F10)) + PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_UNUSED ) + PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_UNUSED ) + PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_UNUSED ) + PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME(", <") PORT_CODE(KEYCODE_COMMA) PORT_CHAR(',') PORT_CHAR('<') + + PORT_START("LINEF") + PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("H") PORT_CODE(KEYCODE_H) PORT_CHAR('h') PORT_CHAR('H') + PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Y") PORT_CODE(KEYCODE_Y) PORT_CHAR('y') PORT_CHAR('Y') + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("6 &") PORT_CODE(KEYCODE_6) PORT_CHAR('6') PORT_CHAR('&') + PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("F7") PORT_CODE(KEYCODE_F7) PORT_CHAR(UCHAR_MAMEKEY(F7)) + PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("F18") + PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("Numpad 7") PORT_CODE(KEYCODE_7_PAD) + PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_UNUSED ) + PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_KEYBOARD ) PORT_NAME("B") PORT_CODE(KEYCODE_B) PORT_CHAR('b') PORT_CHAR('B') + +INPUT_PORTS_END + +ioport_constructor octopus_keyboard_device::device_input_ports() const +{ + return INPUT_PORTS_NAME(octopus_keyboard); +} + +void octopus_keyboard_device::device_start() +{ + buffered_rs232_device::device_start(); + + save_item(NAME(m_delay)); + save_item(NAME(m_repeat)); + save_item(NAME(m_enabled)); +} + +void octopus_keyboard_device::device_reset() +{ + buffered_rs232_device::device_reset(); + + set_data_frame(1, 8, PARITY_NONE, STOP_BITS_1); + set_rcv_rate(1200); + set_tra_rate(9600); + receive_register_reset(); + transmit_register_reset(); + + m_enabled = 0; + m_delay = 500; // 3*100+200 + m_repeat = 110; // 4^2*5+30 + + stop_processing(); + reset_key_state(); + typematic_stop(); + clear_fifo(); + + output_dcd(0); + output_dsr(0); + output_cts(0); + output_rxd(1); + + start_processing(attotime::from_hz(9600)); +} + + +DEFINE_DEVICE_TYPE(OCTOPUS_KEYBOARD, octopus_keyboard_device, "octopus_kb", "Octopus Keyboard") diff --git a/src/mame/lsi/octo_kbd.h b/src/mame/lsi/octo_kbd.h new file mode 100644 index 00000000000..5a33114fb48 --- /dev/null +++ b/src/mame/lsi/octo_kbd.h @@ -0,0 +1,34 @@ +// license:BSD-3-Clause +// copyright-holders:Barry Rodewald +#ifndef MAME_LSI_OCTO_KBD_H +#define MAME_LSI_OCTO_KBD_H + +#pragma once + +#include "bus/rs232/rs232.h" +#include "machine/keyboard.h" + +class octopus_keyboard_device : public buffered_rs232_device<16U>, protected device_matrix_keyboard_interface<16U> +{ +public: + octopus_keyboard_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + virtual ioport_constructor device_input_ports() const override ATTR_COLD; + +protected: + virtual void device_start() override ATTR_COLD; + virtual void device_reset() override ATTR_COLD; + virtual void key_make(uint8_t row, uint8_t column) override; + virtual void key_repeat(uint8_t row, uint8_t column) override; + virtual void key_break(uint8_t row, uint8_t column) override; + +private: + virtual void received_byte(uint8_t data) override; + + int m_delay = 0; // keypress delay after initial press + int m_repeat = 0; // keypress repeat rate + uint8_t m_enabled = 0; // keyboard enabled? +}; + +DECLARE_DEVICE_TYPE(OCTOPUS_KEYBOARD, octopus_keyboard_device) + +#endif // MAME_LSI_OCTO_KBD_H diff --git a/src/mame/lsi/octopus.cpp b/src/mame/lsi/octopus.cpp new file mode 100644 index 00000000000..52e9ab8e9cd --- /dev/null +++ b/src/mame/lsi/octopus.cpp @@ -0,0 +1,1036 @@ +// license:BSD-3-Clause +// copyright-holders:Barry Rodewald +/*************************************************************************** + +Hilger Analytical AB6089 Mk. 1 (LSI Octopus) + +2013-07-26 Skeleton driver. + +http://computers.mcbx.netne.net/8bit/hilger/index.htm + +Below is an extract from the page: + +The computer has 2 CPUs: Z80 and 8088. Most circuits are dated 1985-1986, display circuitry is made by Signetics. +Mainboard was manufactured by LSI Computers Ltd. under part numbers: 15000SS100 and 15000P4100. All steel parts +of casing are grounded by wires. It's graphics card works in pass-through mode: It takes picture from mainboard's +TTL output and adds image to it, then it puts it to monitor. Its ROM is prepared for hard disk and some type of +network, yet no HDD controller nor network interfaces are present inside - it seems that they were added as +expansion cards. + +UPDATE: It's re-branded LSI Octopus computer, a very well-expandable machine which was designed to "grow with a +company". First stage was a computer which could be used even with TV set. As requirements increased, Octopus +could be equipped with hard disk controller, network adapter, multi-terminal serial port card to act as a terminal +server or even CPU cards to run concurrent systems. There were even tape backup devices for it. Octopus could run +CP/M, MP/M (concurrent - multitasking-like OS, even with terminals), or even MS-DOS - CP/M or MP/M could be used +with Z80 or 8080. There was also LSI ELSIE system, a concurrent DOS. Last British LSI machines were 386 computers +which could be used as servers for Octopus computers. + +Manufacturer Hilger Analytical / LSI Computers Ltd. + +Origin UK +Year of unit 1986? +Year of introduction 1985 +End of production ? +CPU Z80, 8088 +Speed 8MHz (8088) or 6MHz (Z80) +RAM 128kB or 256kB, expandable to 768kB +ROM 16kB (Basic) +Colors: ?? +Sound: Speaker. Beeps :) +OS: CP/M 80 or 86 +MP/M 80 o 86 +Concurrent CP/M +LSI ELSIE +MS-DOS +Text display: SCN2674B CRTC, SCB2675C for attributes +Graphics: ?? (option board, ROM is dumped) + +Media: Two internal 5.25" floppy disk drives, DS DD, 96tpi. +Probably hard disk + +Power supply: +Built-in switching power supply. + +I/O: Serial port +2 parallel ports + +Video TTL Output +Composite video output + +Possible upgrades: Many + +Software accessibility: +Dedicated: Impossible. +CP/M - Good +DOS - Good. + +It won't take XT nor AT keyboard, but pinout is quite similar. UPDATE: I saw a few photos of keyboard. +It's another Z80 computer! It has an EPROM, simple memory and CPU. + +After powering on, it should perform POST writing: + +TESTING... + Main Processor + PROM + DMA Controllers + RAM + Interrupts + Floppy Discs + Hard Disc Controller (optionally - if installed) + +Waiting for hard Disc... (Optionally - if installed) + +Firmware versions: + +SYSTEM 18B (or other) +GRAPHICS 4 (if graphic card installed) + +And probably it should boot or display: + +Insert System Disk. + +Or maybe: + +Nowhere to boot from. + +Load options: + Floppy + Pro Network + Winchester +Enter selection: + +This information was gained by studying boot ROM of the machine. + +It's a very rare computer. It has 2 processors, Z80 and 8088, so it can run both MS-DOS and CP/M. + +****************************************************************************/ + +#include "emu.h" + +#include "cpu/i86/i86.h" +#include "cpu/z80/z80.h" +#include "imagedev/floppy.h" +#include "machine/am9517a.h" +#include "machine/bankdev.h" +#include "machine/clock.h" +#include "machine/i8251.h" +#include "machine/i8255.h" +#include "machine/mc146818.h" +#include "octo_kbd.h" +#include "machine/pic8259.h" +#include "machine/pit8253.h" +#include "machine/ram.h" +#include "machine/wd_fdc.h" +#include "machine/z80sio.h" +#include "sound/spkrdev.h" +#include "video/scn2674.h" + +#include "bus/centronics/ctronics.h" +#include "bus/centronics/comxpl80.h" +#include "bus/centronics/epson_ex800.h" +#include "bus/centronics/epson_lx800.h" +#include "bus/centronics/epson_lx810l.h" +#include "bus/centronics/printer.h" + +#include "screen.h" +#include "softlist_dev.h" +#include "speaker.h" + + +namespace { + +class octopus_state : public driver_device +{ +public: + octopus_state(const machine_config &mconfig, device_type type, const char *tag) : + driver_device(mconfig, type, tag), + m_maincpu(*this, "maincpu"), + m_subcpu(*this, "subcpu"), + m_crtc(*this, "crtc"), + m_vram(*this, "vram", 0x10000, ENDIANNESS_LITTLE), + m_fontram(*this, "fram"), + m_dma1(*this, "dma1"), + m_dma2(*this, "dma2"), + m_pic1(*this, "pic_master"), + m_pic2(*this, "pic_slave"), + m_rtc(*this, "rtc"), + m_fdc(*this, "fdc"), + m_floppy(*this, "fdc:%u", 0U), + m_kb_uart(*this, "keyboard"), + m_pit(*this, "pit"), + m_ppi(*this, "ppi"), + m_speaker(*this, "speaker"), + m_serial(*this, "serial"), + m_parallel(*this, "parallel"), + m_z80_bankdev(*this, "z80_bank"), + m_ram(*this, "ram"), + m_dswa(*this, "DSWA"), + m_current_dma(-1), + m_speaker_active(false), + m_beep_active(false), + m_z80_active(false) + { } + + void octopus(machine_config &config); + +private: + virtual void machine_reset() override ATTR_COLD; + virtual void machine_start() override ATTR_COLD; + virtual void video_start() override ATTR_COLD; + SCN2674_DRAW_CHARACTER_MEMBER(display_pixels); + uint8_t vram_r(offs_t offset); + void vram_w(offs_t offset, uint8_t data); + uint8_t get_slave_ack(offs_t offset); + [[maybe_unused]] void fdc_drq(int state); + uint8_t bank_sel_r(offs_t offset); + void bank_sel_w(offs_t offset, uint8_t data); + uint8_t dma_read(offs_t offset); + void dma_write(offs_t offset, uint8_t data); + void dma_hrq_changed(int state); + uint8_t system_r(offs_t offset); + void system_w(offs_t offset, uint8_t data); + uint8_t cntl_r(); + void cntl_w(uint8_t data); + uint8_t gpo_r(); + void gpo_w(uint8_t data); + uint8_t vidcontrol_r(); + void vidcontrol_w(uint8_t data); + uint8_t z80_io_r(); + void z80_io_w(uint8_t data); + IRQ_CALLBACK_MEMBER(x86_irq_cb); + uint8_t rtc_r(); + void rtc_w(uint8_t data); + uint8_t z80_vector_r(offs_t offset); + void z80_vector_w(offs_t offset, uint8_t data); + uint8_t parallel_r(offs_t offset); + void parallel_w(offs_t offset, uint8_t data); + uint8_t video_latch_r(offs_t offset); + void video_latch_w(offs_t offset, uint8_t data); + + void spk_w(int state); + void spk_freq_w(int state); + void beep_w(int state); + void serial_clock_w(int state); + void parallel_busy_w(int state) { m_printer_busy = state; } + void parallel_slctout_w(int state) { m_printer_slctout = state; } + + void dack0_w(int state) { m_dma1->hack_w(state ? 0 : 1); } // for all unused DMA channel? + void dack1_w(int state) { if(!state) m_current_dma = 1; else if(m_current_dma == 1) m_current_dma = -1; } // HD + void dack2_w(int state) { if(!state) m_current_dma = 2; else if(m_current_dma == 2) m_current_dma = -1; } // RAM refresh + void dack3_w(int state) { m_dma1->hack_w(state ? 0 : 1); } + void dack4_w(int state) { m_dma1->hack_w(state ? 0 : 1); } + void dack5_w(int state) { if(!state) m_current_dma = 5; else if(m_current_dma == 5) m_current_dma = -1; } // Floppy + void dack6_w(int state) { m_dma1->hack_w(state ? 0 : 1); } + void dack7_w(int state) { m_dma1->hack_w(state ? 0 : 1); } + + void octopus_io(address_map &map) ATTR_COLD; + void octopus_mem(address_map &map) ATTR_COLD; + void octopus_sub_io(address_map &map) ATTR_COLD; + void octopus_sub_mem(address_map &map) ATTR_COLD; + void octopus_vram(address_map &map) ATTR_COLD; + + TIMER_CALLBACK_MEMBER(beep_off); + + required_device<cpu_device> m_maincpu; + required_device<cpu_device> m_subcpu; + required_device<scn2674_device> m_crtc; + memory_share_creator<uint8_t> m_vram; + required_shared_ptr<uint8_t> m_fontram; + required_device<am9517a_device> m_dma1; + required_device<am9517a_device> m_dma2; + required_device<pic8259_device> m_pic1; + required_device<pic8259_device> m_pic2; + required_device<mc146818_device> m_rtc; + required_device<fd1793_device> m_fdc; + required_device_array<floppy_connector, 2> m_floppy; + required_device<i8251_device> m_kb_uart; + required_device<pit8253_device> m_pit; + required_device<i8255_device> m_ppi; + required_device<speaker_sound_device> m_speaker; + required_device<z80sio_device> m_serial; + required_device<centronics_device> m_parallel; + required_device<address_map_bank_device> m_z80_bankdev; + required_device<ram_device> m_ram; + required_ioport m_dswa; + + uint8_t m_hd_bank; // HD bank select + uint8_t m_fd_bank; // Floppy bank select + uint8_t m_z80_bank; // Z80 bank / RAM refresh + int8_t m_current_dma; // current DMA channel (-1 for none) + uint8_t m_current_drive; + uint8_t m_cntl; // RTC / FDC control (PPI port B) + uint8_t m_gpo; // General purpose outputs (PPI port C) + uint8_t m_vidctrl; + bool m_speaker_active; + bool m_beep_active; + bool m_speaker_level; + bool m_z80_active; + bool m_rtc_address; + bool m_rtc_data; + uint8_t m_prev_cntl; + uint8_t m_rs232_vector; + uint8_t m_rs422_vector; + bool m_printer_busy; + bool m_printer_slctout; + uint8_t m_char_latch_r; + uint8_t m_attr_latch_r; + uint8_t m_char_latch_w; + uint8_t m_attr_latch_w; + + emu_timer* m_timer_beep; +}; + + +void octopus_state::octopus_mem(address_map &map) +{ + map(0x00000, 0xcffff).rw(m_ram, FUNC(ram_device::read), FUNC(ram_device::write)); + //map(0xd0000, 0xdffff).ram().share("vram"); + map(0xe0000, 0xe3fff).noprw(); + map(0xe4000, 0xe5fff).ram().share("fram"); + map(0xe6000, 0xe7fff).rom().region("chargen", 0); + map(0xe8000, 0xfbfff).noprw(); + map(0xfc000, 0xfffff).rom().region("user1", 0); +} + +void octopus_state::octopus_io(address_map &map) +{ + map.unmap_value_high(); + map(0x00, 0x0f).rw(m_dma1, FUNC(am9517a_device::read), FUNC(am9517a_device::write)); + map(0x10, 0x1f).rw(m_dma2, FUNC(am9517a_device::read), FUNC(am9517a_device::write)); + map(0x20, 0x20).portr("DSWA"); + map(0x21, 0x2f).rw(FUNC(octopus_state::system_r), FUNC(octopus_state::system_w)); + map(0x31, 0x33).rw(FUNC(octopus_state::bank_sel_r), FUNC(octopus_state::bank_sel_w)); + map(0x50, 0x51).rw(m_kb_uart, FUNC(i8251_device::read), FUNC(i8251_device::write)); + // 0x70-73: HD controller + map(0x80, 0x83).rw(m_pit, FUNC(pit8253_device::read), FUNC(pit8253_device::write)); + map(0xa0, 0xa0).rw(m_serial, FUNC(z80sio_device::da_r), FUNC(z80sio_device::da_w)); + map(0xa1, 0xa1).rw(m_serial, FUNC(z80sio_device::ca_r), FUNC(z80sio_device::ca_w)); + map(0xa2, 0xa2).rw(m_serial, FUNC(z80sio_device::db_r), FUNC(z80sio_device::db_w)); + map(0xa3, 0xa3).rw(m_serial, FUNC(z80sio_device::cb_r), FUNC(z80sio_device::cb_w)); + map(0xb0, 0xb1).rw(m_pic1, FUNC(pic8259_device::read), FUNC(pic8259_device::write)); + map(0xb4, 0xb5).rw(m_pic2, FUNC(pic8259_device::read), FUNC(pic8259_device::write)); + map(0xc0, 0xc7).rw(m_crtc, FUNC(scn2674_device::read), FUNC(scn2674_device::write)); + map(0xc8, 0xc8).rw(FUNC(octopus_state::vidcontrol_r), FUNC(octopus_state::vidcontrol_w)); + map(0xc9, 0xca).rw(FUNC(octopus_state::video_latch_r), FUNC(octopus_state::video_latch_w)); + // 0xcf: mode control + map(0xd0, 0xd3).rw(m_fdc, FUNC(fd1793_device::read), FUNC(fd1793_device::write)); + map(0xe0, 0xe4).rw(FUNC(octopus_state::z80_vector_r), FUNC(octopus_state::z80_vector_w)); + map(0xf0, 0xf1).rw(FUNC(octopus_state::parallel_r), FUNC(octopus_state::parallel_w)); + map(0xf8, 0xff).rw(m_ppi, FUNC(i8255_device::read), FUNC(i8255_device::write)); +} + + +void octopus_state::octopus_sub_mem(address_map &map) +{ + map(0x0000, 0xffff).rw(m_z80_bankdev, FUNC(address_map_bank_device::read8), FUNC(address_map_bank_device::write8)); +} + +void octopus_state::octopus_sub_io(address_map &map) +{ + map.unmap_value_high(); + map(0x0000, 0xffff).rw(FUNC(octopus_state::z80_io_r), FUNC(octopus_state::z80_io_w)); +} + +void octopus_state::octopus_vram(address_map &map) +{ + map(0x0000, 0xffff).rw(FUNC(octopus_state::vram_r), FUNC(octopus_state::vram_w)); +} + +/* Input ports */ +static INPUT_PORTS_START( octopus ) + PORT_START("DSWA") + PORT_DIPNAME( 0x03, 0x02, "Number of floppy drives" ) PORT_DIPLOCATION("SWA:1,2") + PORT_DIPSETTING( 0x00, "None" ) + PORT_DIPSETTING( 0x01, "1 Floppy" ) + PORT_DIPSETTING( 0x02, "2 Floppies" ) + PORT_DIPSETTING( 0x03, "Not used" ) + PORT_DIPNAME( 0x04, 0x00, "Quad drives" ) PORT_DIPLOCATION("SWA:3") + PORT_DIPSETTING( 0x00, "Disabled" ) + PORT_DIPSETTING( 0x04, "Enabled" ) + PORT_DIPNAME( 0x38, 0x00, "Winchester drive type" ) PORT_DIPLOCATION("SWA:4,5,6") + PORT_DIPSETTING( 0x00, "None" ) + PORT_DIPSETTING( 0x08, "RO201" ) + PORT_DIPSETTING( 0x10, "RO202" ) + PORT_DIPSETTING( 0x18, "Reserved" ) + PORT_DIPSETTING( 0x20, "RO204" ) + PORT_DIPSETTING( 0x28, "Reserved" ) + PORT_DIPSETTING( 0x30, "RO208" ) + PORT_DIPSETTING( 0x38, "Reserved" ) + PORT_DIPNAME( 0x40, 0x00, DEF_STR( Unused ) ) PORT_DIPLOCATION("SWA:7") + PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x40, DEF_STR( On ) ) + PORT_DIPNAME( 0x80, 0x80, "Colour monitor connected" ) PORT_DIPLOCATION("SWA:8") + PORT_DIPSETTING( 0x00, DEF_STR( No ) ) + PORT_DIPSETTING( 0x80, DEF_STR( Yes ) ) +INPUT_PORTS_END + +TIMER_CALLBACK_MEMBER(octopus_state::beep_off) +{ + m_beep_active = false; +} + +void octopus_state::vram_w(offs_t offset, uint8_t data) +{ + m_vram[offset] = m_char_latch_w; + m_vram[offset+0x1000] = m_attr_latch_w; +} + +uint8_t octopus_state::vram_r(offs_t offset) +{ + m_char_latch_r = m_vram[offset]; + m_attr_latch_r = m_vram[offset+0x1000]; + return m_vram[offset]; +} + +void octopus_state::fdc_drq(int state) +{ + // TODO +} + +uint8_t octopus_state::bank_sel_r(offs_t offset) +{ + switch(offset) + { + case 0: + return m_hd_bank; + case 1: + return m_fd_bank; + case 2: + return m_z80_bank; + } + return 0xff; +} + +void octopus_state::bank_sel_w(offs_t offset, uint8_t data) +{ + switch(offset) + { + case 0: + m_hd_bank = data; + logerror("HD bank = %i\n",data); + break; + case 1: + m_fd_bank = data; + logerror("Floppy bank = %i\n",data); + break; + case 2: + m_z80_bank = data; + m_z80_bankdev->set_bank(m_z80_bank & 0x0f); + logerror("Z80/RAM bank = %i\n",data); + break; + } +} + +// System control +// 0x20: read: System type, write: Z80 NMI +// 0x21: read: bit5=SLCTOUT from parallel interface, bit6=option board parity fail, bit7=main board parity fail +// write: parity fail reset +// ports 0x20 and 0x21 read out the DIP switch configuration (the firmware function to get system config simply does IN AX,20h) +// 0x28: write: Z80 enable +void octopus_state::system_w(offs_t offset, uint8_t data) +{ + logerror("SYS: System control offset %i data %02x\n",offset+1,data); + switch(offset) + { + case 7: // enable Z80, halt 8088 + m_subcpu->set_input_line(INPUT_LINE_HALT, CLEAR_LINE); + m_maincpu->set_input_line(INPUT_LINE_HALT, ASSERT_LINE); + m_z80_active = true; + break; + } +} + +uint8_t octopus_state::system_r(offs_t offset) +{ + uint8_t val = 0x00; + switch(offset) + { + case 0: + val = 0x1f; + if(m_printer_slctout) + val |= 0x20; + return val; // do bits 0-4 mean anything? Language DIPs? + } + + return 0xff; +} + +// Any I/O cycle relinquishes control of the bus +uint8_t octopus_state::z80_io_r() +{ + z80_io_w(0); + return 0x00; +} + +void octopus_state::z80_io_w(uint8_t data) +{ + m_subcpu->set_input_line(INPUT_LINE_HALT, ASSERT_LINE); + m_maincpu->set_input_line(INPUT_LINE_HALT, CLEAR_LINE); + m_z80_active = false; +} + +// Z80 vector for RS232 and RS422 +uint8_t octopus_state::z80_vector_r(offs_t offset) +{ + switch(offset) + { + case 0: + return m_rs232_vector; + case 4: + return m_rs422_vector; + default: + return 0xff; + } + return 0xff; +} + +void octopus_state::z80_vector_w(offs_t offset, uint8_t data) +{ + switch(offset) + { + case 0: + m_rs232_vector = data; + logerror("RS232 vector set to %02x\n",data); + break; + case 4: + m_rs422_vector = data; + logerror("RS422 vector set to %02x\n",data); + break; + default: + logerror("Read invalid vector port 0x%02x\n",0xe0 + offset); + } +} + +// RTC data and I/O - PPI port A +// bits 0-3 of RTC/FDC control go to control lines of the MC146818 +// The technical manual does not mention what is connected to each bit +// This is an educated guess, based on the BIOS code +// bit 0 = ? (Pulsed low after writing to an RTC register) +// bit 1 = PPI Port A strobe? +// bit 2 = Data strobe? +// bit 3 = Address strobe? +uint8_t octopus_state::rtc_r() +{ + uint8_t ret = 0xff; + + if(m_rtc_data) + ret = m_rtc->data_r(); + + return ret; +} + +void octopus_state::rtc_w(uint8_t data) +{ + if(m_rtc_data) + m_rtc->data_w(data); + else if(m_rtc_address) + m_rtc->address_w(data); +} + +// RTC/FDC control - PPI port B +// bits0-3: RTC control lines +// bit4-5: write precomp. +// bit6-7: drive select +uint8_t octopus_state::cntl_r() +{ + return m_cntl; +} + +void octopus_state::cntl_w(uint8_t data) +{ + m_cntl = data; + + if((m_cntl & 0x08) && !(m_prev_cntl & 0x08)) + { + m_rtc_address = true; + m_rtc_data = false; + } + if((data & 0x04) && !(m_prev_cntl & 0x04)) + { + m_rtc_address = false; + m_rtc_data = true; + } + m_ppi->pc4_w(data & 0x02); + m_prev_cntl = m_cntl; + m_current_drive = (data & 0xc0) >> 6; + switch(m_current_drive) + { + case 1: + m_fdc->set_floppy(m_floppy[0]->get_device()); + m_floppy[0]->get_device()->mon_w(0); + break; + case 2: + m_fdc->set_floppy(m_floppy[1]->get_device()); + m_floppy[1]->get_device()->mon_w(0); + break; + } + logerror("Selected floppy drive %i (%02x)\n",m_current_drive,data); +} + +// General Purpose Outputs - PPI port C +// bit 2 - floppy side select +// bit 1 - parallel data I/O (0 = output) +// bit 0 - parallel control I/O (0 = output) +uint8_t octopus_state::gpo_r() +{ + return m_gpo; +} + +void octopus_state::gpo_w(uint8_t data) +{ + m_gpo = data; + switch(m_current_drive) + { + case 1: + m_floppy[0]->get_device()->ss_w((data & 0x04) >> 2); + break; + case 2: + m_floppy[1]->get_device()->ss_w((data & 0x04) >> 2); + break; + default: + logerror("Attempted to set side on unknown drive %i\n",m_current_drive); + } +} + +// Video control register +// bit 0 - video dot clock - 0=17.6MHz, 1=16MHz +// bit 2 - floppy DDEN line +// bit 3 - floppy FCLOCK line - 0=1MHz, 1=2MHz +// bits 4-5 - character width - 0=10 dots, 1=6 dots, 2=8 dots, 3=9 dots +// bit 6 - cursor mode (colour only) - 0=inverse cursor, 1=white cursor (normal) +// bit 7 - 1=monochrome mode, 0=colour mode +// Is bit 7 writable, or just mirrors DIP switch setting? Tech manual is unclear. +uint8_t octopus_state::vidcontrol_r() +{ + return m_vidctrl; +} + +void octopus_state::vidcontrol_w(uint8_t data) +{ + m_fdc->dden_w(BIT(data, 2)); + m_fdc->set_unscaled_clock(16_MHz_XTAL / (BIT(data, 3) ? 16 : 8)); + + if (((m_vidctrl ^ data) & 0x31) != 0) + { + unsigned dots = 4 + ((data & 0x30) >> 3); + if ((data & 0x30) == 0) + dots = 10; + else if ((data & 0x30) == 0x30) + dots = 9; + + auto dotclk = BIT(data, 0) ? 16_MHz_XTAL : 17.6_MHz_XTAL; + + m_crtc->set_character_width(dots); + m_crtc->set_unscaled_clock(dotclk / dots); + } + + m_vidctrl = data; +} + +// Sound hardware +// Sound level provided by i8253 timer 2 +// Enabled by /DTR signal from i8251 +// 100ms beep triggered by pulsing /CTS signal low on i8251 +void octopus_state::spk_w(int state) +{ + m_speaker_active = !state; + m_speaker->level_w(((m_speaker_active || m_beep_active) && m_speaker_level) ? 1 : 0); +} + +void octopus_state::spk_freq_w(int state) +{ + m_speaker_level = state; + m_speaker->level_w(((m_speaker_active || m_beep_active) && m_speaker_level) ? 1 : 0); +} + +void octopus_state::beep_w(int state) +{ + if(!state) // active low + { + m_beep_active = true; + m_speaker->level_w(((m_speaker_active || m_beep_active) && m_speaker_level) ? 1 : 0); + m_timer_beep->adjust(attotime::from_msec(100)); + } +} + +void octopus_state::serial_clock_w(int state) +{ + m_serial->rxca_w(state); + m_serial->txca_w(state); +} + +// Parallel Centronics port +// 0xf0 : data +// 0xf1 : control +// bit 2 = INIT? On boot, bits 0 and 1 are set high, bit 2 is set low then high again, all other bits are set low +// can generate interrupts - tech manual suggests that Strobe, Init, Ack, and Busy can trigger an interrupt (IRQ14) +uint8_t octopus_state::parallel_r(offs_t offset) +{ + switch(offset) + { + case 0: + return 0; + case 1: + return m_printer_busy ? 0x01 : 0x00; // correct? Tech manual doesn't explain which bit is which + } + return 0xff; +} + +void octopus_state::parallel_w(offs_t offset, uint8_t data) +{ + switch(offset) + { + case 0: // data + if(!(m_gpo & 0x02)) // parallel data direction + { + m_parallel->write_data0(BIT(data,0)); + m_parallel->write_data1(BIT(data,1)); + m_parallel->write_data2(BIT(data,2)); + m_parallel->write_data3(BIT(data,3)); + m_parallel->write_data4(BIT(data,4)); + m_parallel->write_data5(BIT(data,5)); + m_parallel->write_data6(BIT(data,6)); + m_parallel->write_data7(BIT(data,7)); + } + break; + case 1: // control (bit order unknown?) + if(!(m_gpo & 0x01)) // parallel control direction + { + m_parallel->write_init(BIT(data,2)); + m_pic2->ir6_w(!BIT(data,2)); + } + break; + } +} + +uint8_t octopus_state::dma_read(offs_t offset) +{ + uint8_t byte; + address_space& prog_space = m_maincpu->space(AS_PROGRAM); // get the right address space + if(m_current_dma == -1) + return 0; + byte = prog_space.read_byte((m_fd_bank << 16) + offset); + return byte; +} + +void octopus_state::dma_write(offs_t offset, uint8_t data) +{ + address_space& prog_space = m_maincpu->space(AS_PROGRAM); // get the right address space + if(m_current_dma == -1) + return; + prog_space.write_byte((m_fd_bank << 16) + offset, data); +} + +void octopus_state::dma_hrq_changed(int state) +{ + m_maincpu->set_input_line(INPUT_LINE_HALT, state ? ASSERT_LINE : CLEAR_LINE); + + /* Assert HLDA */ + m_dma2->hack_w(state); +} + +// Any interrupt will also give bus control back to the 8088 +IRQ_CALLBACK_MEMBER(octopus_state::x86_irq_cb) +{ + uint8_t vector; + m_subcpu->set_input_line(INPUT_LINE_HALT, ASSERT_LINE); + m_maincpu->set_input_line(INPUT_LINE_HALT, CLEAR_LINE); + m_z80_active = false; + vector = m_pic1->inta_cb(device,irqline); + if(vector == 0x61) // if we have hit a serial comms IRQ, then also have the Z80SIO/2 acknowledge the interrupt + vector = m_serial->m1_r(); + return vector; +} + +void octopus_state::machine_start() +{ + m_timer_beep = timer_alloc(FUNC(octopus_state::beep_off), this); + m_vidctrl = 0xff; + + // install RAM + m_maincpu->space(AS_PROGRAM).install_ram(0x0000,m_ram->size()-1,m_ram->pointer()); + m_maincpu->space(AS_PROGRAM).nop_readwrite(m_ram->size(),0xcffff); +} + +void octopus_state::machine_reset() +{ + m_subcpu->set_input_line(INPUT_LINE_HALT, ASSERT_LINE); // halt Z80 to start with + m_maincpu->set_input_line(INPUT_LINE_HALT, CLEAR_LINE); + m_z80_active = false; + m_current_dma = -1; + m_current_drive = 0; + m_rtc_address = true; + m_rtc_data = false; + m_kb_uart->write_dsr(1); // DSR is used to determine if a keyboard is connected? If DSR is high, then the CHAR_OUT BIOS function will not output to the screen. +} + +void octopus_state::video_start() +{ +} + +uint8_t octopus_state::video_latch_r(offs_t offset) +{ + if(offset & 0x01) + return m_attr_latch_r; + else + return m_char_latch_r; +} + +void octopus_state::video_latch_w(offs_t offset, uint8_t data) +{ + if(offset & 0x01) + m_attr_latch_w = data; + else + m_char_latch_w = data; +} + +SCN2674_DRAW_CHARACTER_MEMBER(octopus_state::display_pixels) +{ + // Attributes: + // - common bits + // b7 : blink + // b3 : underline + // - Monochrome + // b6 : GP1 (general purpose) + // b5 : reverse video + // b4 : GP2 (general purpose) + // b2 : High intensity + // b1 : Grey background + // b0 : Blank (TODO) + // - Colour + // b6,5,4 : background colour (RGB) + // b2,1,0 : foreground colour (RGB) + if(!lg) + { + uint8_t tile = m_vram[address & 0x0fff]; + uint8_t attr = m_vram[(address & 0x0fff) + 0x1000]; + uint8_t data = m_fontram[(tile * 16) + linecount]; + rgb_t fg,bg; + if(m_dswa->read() & 0x80) // monochrome or colour mode is selected by switch 8 of system DIP switches + { + // colour (is the background at half intensity?) + bg.set_r((attr & 0x40) ? 0x7f : 0x00); + bg.set_g((attr & 0x20) ? 0x7f : 0x00); + bg.set_b((attr & 0x10) ? 0x7f : 0x00); + fg.set_r((attr & 0x04) ? 0xff : 0x00); + fg.set_g((attr & 0x02) ? 0xff : 0x00); + fg.set_b((attr & 0x01) ? 0xff : 0x00); + } + else + { + // monochrome + if(attr & 0x02) + fg = 0xffffff; + else + fg = 0x7f7f7f; + if(attr & 0x04) + bg = 0x7f7f7f; + else + bg = 0x000000; + + if(attr & 0x20) // reverse video + data = ~data; + } + if(ul && (attr & 0x08)) + data = 0xff; + if(blink && (attr & 0x80)) + data = 0x00; + if(cursor && !blink) + { + bool inverse = true; + + if(!(m_dswa->read() & 0x80)) // not available in monochrome mode + inverse = false; + if(m_vidctrl & 0x40) // not enabled + inverse = false; + if(inverse) + data = ~data; + else + data = 0xff; + } + for (int z=0;z<8;z++) + bitmap.pix(y,x + z) = BIT(data,z) ? fg : bg; + } +} + +uint8_t octopus_state::get_slave_ack(offs_t offset) +{ + if (offset==7) + return m_pic2->acknowledge(); + + return 0x00; +} + +static void octopus_floppies(device_slot_interface &device) +{ + device.option_add("525dd", FLOPPY_525_DD); +} + +static void keyboard(device_slot_interface &device) +{ + device.option_add("octopus", OCTOPUS_KEYBOARD); +} + +void octopus_centronics_devices(device_slot_interface &device) +{ + device.option_add("pl80", COMX_PL80); + device.option_add("ex800", EPSON_EX800); + device.option_add("lx800", EPSON_LX800); + device.option_add("lx810l", EPSON_LX810L); + device.option_add("ap2000", EPSON_AP2000); + device.option_add("printer", CENTRONICS_PRINTER); +} + +void octopus_state::octopus(machine_config &config) +{ + /* basic machine hardware */ + I8088(config, m_maincpu, 24_MHz_XTAL / 3); // 8MHz + m_maincpu->set_addrmap(AS_PROGRAM, &octopus_state::octopus_mem); + m_maincpu->set_addrmap(AS_IO, &octopus_state::octopus_io); + m_maincpu->set_irq_acknowledge_callback(FUNC(octopus_state::x86_irq_cb)); + + Z80(config, m_subcpu, 24_MHz_XTAL / 4); // 6MHz + m_subcpu->set_addrmap(AS_PROGRAM, &octopus_state::octopus_sub_mem); + m_subcpu->set_addrmap(AS_IO, &octopus_state::octopus_sub_io); + + AM9517A(config, m_dma1, 24_MHz_XTAL / 6); // 4MHz + m_dma1->out_hreq_callback().set(m_dma2, FUNC(am9517a_device::dreq0_w)); + m_dma1->in_memr_callback().set(FUNC(octopus_state::dma_read)); + m_dma1->out_memw_callback().set(FUNC(octopus_state::dma_write)); + //m_dma1->in_ior_callback<0>().set_nop(); + //m_dma1->in_ior_callback<1>().set_nop(); // HDC + //m_dma1->in_ior_callback<2>().set_nop(); // RAM Refresh + //m_dma1->in_ior_callback<3>().set_nop(); + //m_dma1->out_iow_callback<0>().set_nop(); + //m_dma1->out_iow_callback<1>().set_nop(); // HDC + //m_dma1->out_iow_callback<2>().set_nop(); // RAM Refresh + //m_dma1->out_iow_callback<3>().set_nop(); + m_dma1->out_dack_callback<0>().set(FUNC(octopus_state::dack0_w)); + m_dma1->out_dack_callback<1>().set(FUNC(octopus_state::dack1_w)); + m_dma1->out_dack_callback<2>().set(FUNC(octopus_state::dack2_w)); + m_dma1->out_dack_callback<3>().set(FUNC(octopus_state::dack3_w)); + + AM9517A(config, m_dma2, 24_MHz_XTAL / 6); // 4MHz + m_dma2->out_hreq_callback().set(FUNC(octopus_state::dma_hrq_changed)); + m_dma2->in_memr_callback().set(FUNC(octopus_state::dma_read)); + m_dma2->out_memw_callback().set(FUNC(octopus_state::dma_write)); + //m_dma2->in_ior_callback<0>().set_nop(); + m_dma2->in_ior_callback<1>().set(m_fdc, FUNC(fd1793_device::data_r)); // FDC + //m_dma2->in_ior_callback<2>().set_nop(); + //m_dma2->in_ior_callback<3>().set_nop(); + //m_dma2->out_iow_callback<0>().set_nop(); + m_dma2->out_iow_callback<1>().set(m_fdc, FUNC(fd1793_device::data_w)); // FDC + //m_dma2->out_iow_callback<2>().set_nop(); + //m_dma2->out_iow_callback<3>().set_nop(); + m_dma2->out_dack_callback<0>().set(FUNC(octopus_state::dack4_w)); + m_dma2->out_dack_callback<1>().set(FUNC(octopus_state::dack5_w)); + m_dma2->out_dack_callback<2>().set(FUNC(octopus_state::dack6_w)); + m_dma2->out_dack_callback<3>().set(FUNC(octopus_state::dack7_w)); + + PIC8259(config, m_pic1, 0); + m_pic1->out_int_callback().set_inputline(m_maincpu, 0); + m_pic1->in_sp_callback().set_constant(1); + m_pic1->read_slave_ack_callback().set(FUNC(octopus_state::get_slave_ack)); + + PIC8259(config, m_pic2, 0); + m_pic2->out_int_callback().set(m_pic1, FUNC(pic8259_device::ir7_w)); + m_pic2->in_sp_callback().set_constant(0); + + // RTC (MC146818 via i8255 PPI) + I8255(config, m_ppi); + m_ppi->in_pa_callback().set(FUNC(octopus_state::rtc_r)); + m_ppi->in_pb_callback().set(FUNC(octopus_state::cntl_r)); + m_ppi->in_pc_callback().set(FUNC(octopus_state::gpo_r)); + m_ppi->out_pa_callback().set(FUNC(octopus_state::rtc_w)); + m_ppi->out_pb_callback().set(FUNC(octopus_state::cntl_w)); + m_ppi->out_pc_callback().set(FUNC(octopus_state::gpo_w)); + + MC146818(config, m_rtc, 32.768_kHz_XTAL); + m_rtc->irq().set(m_pic2, FUNC(pic8259_device::ir2_w)); + + // Keyboard UART + I8251(config, m_kb_uart, 0); + m_kb_uart->rxrdy_handler().set("pic_slave", FUNC(pic8259_device::ir4_w)); + m_kb_uart->dtr_handler().set(FUNC(octopus_state::spk_w)); + m_kb_uart->rts_handler().set(FUNC(octopus_state::beep_w)); + rs232_port_device &keyboard_port(RS232_PORT(config, "keyboard_port", keyboard, "octopus")); + keyboard_port.rxd_handler().set(m_kb_uart, FUNC(i8251_device::write_rxd)); + clock_device &keyboard_clock_rx(CLOCK(config, "keyboard_clock_rx", 9600 * 64)); + keyboard_clock_rx.signal_handler().set(m_kb_uart, FUNC(i8251_device::write_rxc)); + clock_device &keyboard_clock_tx(CLOCK(config, "keyboard_clock_tx", 1200 * 64)); + keyboard_clock_tx.signal_handler().set(m_kb_uart, FUNC(i8251_device::write_txc)); + + FD1793(config, m_fdc, 16_MHz_XTAL / 8); + m_fdc->intrq_wr_callback().set(m_pic1, FUNC(pic8259_device::ir5_w)); + m_fdc->drq_wr_callback().set(m_dma2, FUNC(am9517a_device::dreq1_w)); + FLOPPY_CONNECTOR(config, m_floppy[0], octopus_floppies, "525dd", floppy_image_device::default_mfm_floppy_formats); + FLOPPY_CONNECTOR(config, m_floppy[1], octopus_floppies, "525dd", floppy_image_device::default_mfm_floppy_formats); + SOFTWARE_LIST(config, "fd_list").set_original("octopus"); + + PIT8253(config, m_pit, 0); + m_pit->set_clk<0>(4.9152_MHz_XTAL / 2); // DART channel A + m_pit->out_handler<0>().set(FUNC(octopus_state::serial_clock_w)); // being able to write both Rx and Tx clocks at one time would be nice + m_pit->set_clk<1>(4.9152_MHz_XTAL / 2); // DART channel B + m_pit->out_handler<1>().set(m_serial, FUNC(z80sio_device::rxtxcb_w)); + m_pit->set_clk<2>(4.9152_MHz_XTAL / 2); // speaker frequency + m_pit->out_handler<2>().set(FUNC(octopus_state::spk_freq_w)); + + SPEAKER(config, "mono").front_center(); + SPEAKER_SOUND(config, m_speaker).add_route(ALL_OUTPUTS, "mono", 0.50); + + Z80SIO(config, m_serial, 16_MHz_XTAL / 4); // clock rate not mentioned in tech manual + m_serial->out_int_callback().set(m_pic1, FUNC(pic8259_device::ir1_w)); + m_serial->out_txda_callback().set("serial_a", FUNC(rs232_port_device::write_txd)); + m_serial->out_txdb_callback().set("serial_b", FUNC(rs232_port_device::write_txd)); + m_serial->out_rtsa_callback().set("serial_a", FUNC(rs232_port_device::write_rts)); + m_serial->out_rtsb_callback().set("serial_b", FUNC(rs232_port_device::write_rts)); + + rs232_port_device &serial_a(RS232_PORT(config, "serial_a", default_rs232_devices, nullptr)); + serial_a.rxd_handler().set(m_serial, FUNC(z80sio_device::rxa_w)); + serial_a.cts_handler().set(m_serial, FUNC(z80sio_device::ctsa_w)).invert(); + //serial_a.ri_handler().set(m_serial, FUNC(z80sio_device::ria_w)).invert(); + rs232_port_device &serial_b(RS232_PORT(config, "serial_b", default_rs232_devices, nullptr)); + serial_b.rxd_handler().set(m_serial, FUNC(z80sio_device::rxb_w)); + serial_b.cts_handler().set(m_serial, FUNC(z80sio_device::ctsb_w)).invert(); + //serial_b.ri_handler().set(m_serial, FUNC(z80sio_device::rib_w)).invert(); + + CENTRONICS(config, m_parallel, octopus_centronics_devices, "printer"); + m_parallel->busy_handler().set(FUNC(octopus_state::parallel_busy_w)); + m_parallel->select_handler().set(FUNC(octopus_state::parallel_slctout_w)); + // TODO: Winchester HD controller (Xebec/SASI compatible? uses TTL logic) + + /* video hardware */ + screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER)); + screen.set_raw(16_MHz_XTAL, 918, 0, 729, 350, 0, 325); + //screen.set_raw(17.6_MHz_XTAL, 1008, 0, 792, 348, 0, 319); + screen.set_screen_update("crtc", FUNC(scn2674_device::screen_update)); + + SCN2674(config, m_crtc, 16_MHz_XTAL / 9); // dot clock and character width are both selectable + m_crtc->intr_callback().set("pic_slave", FUNC(pic8259_device::ir0_w)); + m_crtc->set_character_width(9); + m_crtc->set_display_callback(FUNC(octopus_state::display_pixels)); + m_crtc->set_addrmap(0, &octopus_state::octopus_vram); + m_crtc->set_screen("screen"); + + ADDRESS_MAP_BANK(config, m_z80_bankdev).set_map(&octopus_state::octopus_mem).set_options(ENDIANNESS_LITTLE, 8, 32, 0x10000); + + RAM(config, "ram").set_default_size("256K").set_extra_options("128K,512K,768K"); +} + +/* ROM definition */ +ROM_START( octopus ) + ROM_REGION( 0x4000, "user1", 0 ) + ROM_LOAD( "octopus_main_prom", 0x0000, 0x4000, CRC(b5b4518d) SHA1(41b8729c4c9074914fd4ea181c8b6d4805ee2b93) ) + + // This rom was on the graphics card (yes, it has slots) + ROM_REGION( 0x2000, "chargen", 0 ) + ROM_LOAD( "octopus_gfx_card", 0x0000, 0x2000, CRC(b2386534) SHA1(5e3c4682afb4eb222e48a7203269a16d26911836) ) +ROM_END + +} // anonymous namespace + + +/* Driver */ + +// YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS +COMP( 1986, octopus, 0, 0, octopus, octopus, octopus_state, empty_init, "Digital Microsystems", "LSI Octopus", MACHINE_NOT_WORKING) |