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Diffstat (limited to 'src/lib/netlist/devices/nld_7473.cpp')
-rw-r--r--src/lib/netlist/devices/nld_7473.cpp225
1 files changed, 100 insertions, 125 deletions
diff --git a/src/lib/netlist/devices/nld_7473.cpp b/src/lib/netlist/devices/nld_7473.cpp
index 5c75115c970..d5b859859a4 100644
--- a/src/lib/netlist/devices/nld_7473.cpp
+++ b/src/lib/netlist/devices/nld_7473.cpp
@@ -1,25 +1,73 @@
-// license:GPL-2.0+
+// license:BSD-3-Clause
// copyright-holders:Couriersud
/*
- * nld_7473.c
+ * nld_7473.cpp
+ *
+ * 7473: Dual Master-Slave J-K Flip-Flops with Clear and Complementary Outputs
+ * 7473A: Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Clear and Complementary Outputs
+ *
+ * +----------+
+ * 1CLK |1 ++ 14| 1J
+ * 1CLRQ |2 13| 1QQ
+ * 1K |3 12| 1Q
+ * VCC |4 7473 11| GND
+ * 2CLK |5 10| 2K
+ * 2CLRQ |6 9| 2Q
+ * 2J |7 8| 2QQ
+ * +----------+
+ *
+ *
+ * Function table 73
+ *
+ * +-----+-----+-----+---++---+-----+
+ * | CLRQ| CLK | J | K || Q | QQ |
+ * +=====+=====+=====+===++===+=====+
+ * | 0 | X | X | X || 0 | 1 |
+ * | 1 | * | 0 | 0 || Q0| Q0Q |
+ * | 1 | * | 1 | 0 || 1 | 0 |
+ * | 1 | * | 0 | 1 || 0 | 1 |
+ * | 1 | * | 1 | 1 || TOGGLE |
+ * +-----+-----+-----+---++---+-----+
+ * _
+ * * = _| |_
+ *
+ * This is positive triggered, J and K
+ * are latched during clock high and
+ * transferred when CLK falls.
+ *
+ * Function table 73A
+ *
+ * +-----+-----+-----+---++---+-----+
+ * | CLRQ| CLK | J | K || Q | QQ |
+ * +=====+=====+=====+===++===+=====+
+ * | 0 | X | X | X || 0 | 1 |
+ * | 1 | F | 0 | 0 || Q0| Q0Q |
+ * | 1 | F | 1 | 0 || 1 | 0 |
+ * | 1 | F | 0 | 1 || 0 | 1 |
+ * | 1 | F | 1 | 1 || TOGGLE |
+ * | 1 | 1 | X | X || Q0| Q0Q |
+ * +-----+-----+-----+---++---+-----+
+ *
+ * THe 73A is negative triggered.
+ *
+ * Naming conventions follow Texas instruments datasheet
+ *
+ * FIXME: Currently, only the 73 is implemented.
+ * The 73A uses the same model.
*
*/
-#include "nld_7473.h"
-#include "netlist/nl_base.h"
-#include "nlid_system.h"
+#include "nl_base.h"
+
+namespace netlist::devices {
-namespace netlist
-{
- namespace devices
- {
NETLIB_OBJECT(7473)
{
NETLIB_CONSTRUCTOR(7473)
- , m_CLK(*this, "CLK")
- , m_J(*this, "J")
- , m_K(*this, "K")
- , m_CLRQ(*this, "CLRQ")
+ , m_CLK(*this, "CLK", NETLIB_DELEGATE(inputs))
+ , m_J(*this, "J", NETLIB_DELEGATE(inputs))
+ , m_K(*this, "K", NETLIB_DELEGATE(inputs))
+ , m_CLRQ(*this, "CLRQ", NETLIB_DELEGATE(inputs))
, m_last_CLK(*this, "m_last_CLK", 0)
, m_q(*this, "m_q", 0)
, m_Q(*this, "Q")
@@ -28,10 +76,44 @@ namespace netlist
{
}
- NETLIB_RESETI();
- NETLIB_UPDATEI();
+ private:
+ NETLIB_RESETI()
+ {
+ m_last_CLK = 0;
+ }
+
+ NETLIB_HANDLERI(inputs)
+ {
+ const auto JK = (m_J() << 1) | m_K();
+
+ if (m_CLRQ())
+ {
+ if (!m_CLK() && m_last_CLK)
+ {
+ switch (JK)
+ {
+ case 1: // (!m_J) & m_K))
+ m_q = 0;
+ break;
+ case 2: // (m_J) & !m_K))
+ m_q = 1;
+ break;
+ case 3: // (m_J) & m_K))
+ m_q ^= 1;
+ break;
+ default:
+ case 0:
+ break;
+ }
+ }
+ }
+
+ m_last_CLK = m_CLK();
+
+ m_Q.push(m_q, NLTIME_FROM_NS(20)); // FIXME: timing
+ m_QQ.push(m_q ^ 1, NLTIME_FROM_NS(20)); // FIXME: timing
+ }
- public:
logic_input_t m_CLK;
logic_input_t m_J;
logic_input_t m_K;
@@ -45,116 +127,9 @@ namespace netlist
nld_power_pins m_power_pins;
};
- NETLIB_OBJECT_DERIVED(7473A, 7473)
- {
- public:
- NETLIB_CONSTRUCTOR_DERIVED(7473A, 7473) { }
-
- };
-
- NETLIB_OBJECT(7473_dip)
- {
- NETLIB_CONSTRUCTOR(7473_dip)
- , m_A(*this, "A")
- , m_B(*this, "B")
- {
- register_subalias("1", m_A.m_CLK);
- register_subalias("2", m_A.m_CLRQ);
- register_subalias("3", m_A.m_K);
- register_subalias("4", "A.VCC");
- register_subalias("5", m_B.m_CLK);
- register_subalias("6", m_B.m_CLRQ);
- register_subalias("7", m_B.m_J);
-
- register_subalias("8", m_B.m_QQ);
- register_subalias("9", m_B.m_Q);
- register_subalias("10", m_B.m_K);
- register_subalias("11", "A.GND");
- register_subalias("12", m_B.m_Q);
- register_subalias("13", m_A.m_QQ);
- register_subalias("14", m_A.m_J);
-
- connect("A.GND", "B.GND");
- connect("A.VCC", "B.VCC");
- }
-
- private:
- NETLIB_SUB(7473) m_A;
- NETLIB_SUB(7473) m_B;
- };
-
- NETLIB_OBJECT(7473A_dip)
- {
- NETLIB_CONSTRUCTOR(7473A_dip)
- , m_A(*this, "A")
- , m_B(*this, "B")
- {
- register_subalias("1", m_A.m_CLK);
- register_subalias("2", m_A.m_CLRQ);
- register_subalias("3", m_A.m_K);
- register_subalias("4", "A.VCC");
- register_subalias("5", m_B.m_CLK);
- register_subalias("6", m_B.m_CLRQ);
- register_subalias("7", m_B.m_J);
-
- register_subalias("8", m_B.m_QQ);
- register_subalias("9", m_B.m_Q);
- register_subalias("10", m_B.m_K);
- register_subalias("11", "A.GND");
- register_subalias("12", m_B.m_Q);
- register_subalias("13", m_A.m_QQ);
- register_subalias("14", m_A.m_J);
-
- connect("A.GND", "B.GND");
- connect("A.VCC", "B.VCC");
- }
-
- private:
- NETLIB_SUB(7473A) m_A;
- NETLIB_SUB(7473A) m_B;
- };
-
- NETLIB_RESET(7473)
- {
- m_last_CLK = 0;
- }
-
- NETLIB_UPDATE(7473)
- {
- const auto JK = (m_J() << 1) | m_K();
-
- if (m_CLRQ())
- {
- if (!m_CLK() && m_last_CLK)
- {
- switch (JK)
- {
- case 1: // (!m_J) & m_K))
- m_q = 0;
- break;
- case 2: // (m_J) & !m_K))
- m_q = 1;
- break;
- case 3: // (m_J) & m_K))
- m_q ^= 1;
- break;
- default:
- case 0:
- break;
- }
- }
- }
-
- m_last_CLK = m_CLK();
-
- m_Q.push(m_q, NLTIME_FROM_NS(20)); // FIXME: timing
- m_QQ.push(m_q ^ 1, NLTIME_FROM_NS(20)); // FIXME: timing
- }
+ using NETLIB_NAME(7473A) = NETLIB_NAME(7473);
NETLIB_DEVICE_IMPL(7473, "TTL_7473", "+CLK,+J,+K,+CLRQ,@VCC,@GND")
NETLIB_DEVICE_IMPL(7473A, "TTL_7473A", "+CLK,+J,+K,+CLRQ,@VCC,@GND")
- NETLIB_DEVICE_IMPL(7473_dip, "TTL_7473_DIP", "")
- NETLIB_DEVICE_IMPL(7473A_dip, "TTL_7473A_DIP", "")
- } //namespace devices
-} // namespace netlist
+} // namespace netlist::devices