diff options
Diffstat (limited to 'src/emu')
| -rw-r--r-- | src/emu/cpu/m68000/m68kcpu.c | 28 | ||||
| -rw-r--r-- | src/emu/cpu/m68000/m68kmmu.h | 78 | ||||
| -rw-r--r-- | src/emu/cpu/v810/v810.c | 12 | ||||
| -rw-r--r-- | src/emu/machine/68681.c | 10 | ||||
| -rw-r--r-- | src/emu/machine/8237dma.c | 10 | ||||
| -rw-r--r-- | src/emu/machine/mc146818.c | 14 | ||||
| -rw-r--r-- | src/emu/video.c | 8 | ||||
| -rw-r--r-- | src/emu/video.h | 20 |
8 files changed, 90 insertions, 90 deletions
diff --git a/src/emu/cpu/m68000/m68kcpu.c b/src/emu/cpu/m68000/m68kcpu.c index 47318b40ffc..2415fa271bc 100644 --- a/src/emu/cpu/m68000/m68kcpu.c +++ b/src/emu/cpu/m68000/m68kcpu.c @@ -567,12 +567,12 @@ static CPU_TRANSLATE( m68k ) { // FIXME: mmu_tmp_sr will be overwritten in pmmu_translate_addr_with_fc UINT16 mmu_tmp_sr = m68k->mmu_tmp_sr; -// UINT32 va=*address; +// UINT32 va=*address; *address = pmmu_translate_addr_with_fc(m68k, *address, 4, 1); if ((m68k->mmu_tmp_sr & M68K_MMU_SR_INVALID) != 0) { -// logerror("cpu_translate_m68k failed with mmu_sr=%04x va=%08x pa=%08x\n",m68k->mmu_tmp_sr,va ,*address); +// logerror("cpu_translate_m68k failed with mmu_sr=%04x va=%08x pa=%08x\n",m68k->mmu_tmp_sr,va ,*address); *address = 0; } @@ -633,8 +633,8 @@ static CPU_EXECUTE( m68k ) debugger_instruction_hook(device, REG_PC); // FIXME: remove this -// void apollo_debug_instruction(running_device *device); -// apollo_debug_instruction(device); +// void apollo_debug_instruction(running_device *device); +// apollo_debug_instruction(device); /* Record previous program counter */ REG_PPC = REG_PC; @@ -672,12 +672,12 @@ static CPU_EXECUTE( m68k ) { UINT32 sr; -// const char * disassemble(m68ki_cpu_core *m68k, offs_t pc); -// logerror( -// "PMMU: pc=%08x sp=%08x va=%08x bus error: %s\n", -// REG_PPC, REG_A[7], m68k->mmu_tmp_buserror_address, -// (m68k->mmu_tmp_buserror_address == REG_PPC) ? "-" -// : disassemble(m68k, REG_PPC)); +// const char * disassemble(m68ki_cpu_core *m68k, offs_t pc); +// logerror( +// "PMMU: pc=%08x sp=%08x va=%08x bus error: %s\n", +// REG_PPC, REG_A[7], m68k->mmu_tmp_buserror_address, +// (m68k->mmu_tmp_buserror_address == REG_PPC) ? "-" +// : disassemble(m68k, REG_PPC)); m68k->mmu_tmp_buserror_occurred = 0; @@ -686,8 +686,8 @@ static CPU_EXECUTE( m68k ) { if (REG_DA[i] != tmp_dar[i]) { -// logerror("PMMU: pc=%08x sp=%08x bus error: fixed %s[%d]: %08x -> %08x\n", -// REG_PPC, REG_A[7], i < 8 ? "D" : "A", i & 7, REG_DA[i], tmp_dar[i]); +// logerror("PMMU: pc=%08x sp=%08x bus error: fixed %s[%d]: %08x -> %08x\n", +// REG_PPC, REG_A[7], i < 8 ? "D" : "A", i & 7, REG_DA[i], tmp_dar[i]); REG_DA[i] = tmp_dar[i]; } } @@ -700,11 +700,11 @@ static CPU_EXECUTE( m68k ) { /* Note: This is implemented for 68000 only! */ m68ki_stack_frame_buserr(m68k, sr); - } + } else if (m68k->mmu_tmp_buserror_address == REG_PPC) { m68ki_stack_frame_1010(m68k, sr, EXCEPTION_BUS_ERROR, REG_PPC, m68k->mmu_tmp_buserror_address); - } + } else { m68ki_stack_frame_1011(m68k, sr, EXCEPTION_BUS_ERROR, REG_PPC, m68k->mmu_tmp_buserror_address); diff --git a/src/emu/cpu/m68000/m68kmmu.h b/src/emu/cpu/m68000/m68kmmu.h index dc60651a890..741e8547871 100644 --- a/src/emu/cpu/m68000/m68kmmu.h +++ b/src/emu/cpu/m68000/m68kmmu.h @@ -110,10 +110,10 @@ void pmmu_atc_add(m68ki_cpu_core *m68k, UINT32 logical, UINT32 physical, int fc) { int i, found; - // get page size (i.e. # of bits to ignore); is 10 for Apollo - int ps = (m68k->mmu_tc >> 20) & 0xf; - // Note: exact emulation would use (logical >> ps) << (ps-8) - UINT32 atc_tag = M68K_MMU_ATC_VALID | ((fc &7) << 24)| logical >> ps; + // get page size (i.e. # of bits to ignore); is 10 for Apollo + int ps = (m68k->mmu_tc >> 20) & 0xf; + // Note: exact emulation would use (logical >> ps) << (ps-8) + UINT32 atc_tag = M68K_MMU_ATC_VALID | ((fc &7) << 24)| logical >> ps; // first see if this is already in the cache for (i = 0; i < MMU_ATC_ENTRIES; i++) @@ -191,7 +191,7 @@ INLINE UINT32 get_dt2_table_entry(m68ki_cpu_core *m68k, UINT32 tptr, UINT8 ptest // set used and modified m68k->program->write_dword( tptr, tbl_entry | M68K_MMU_DF_USED | M68K_MMU_DF_MODIFIED); } - else if (!(tbl_entry & M68K_MMU_DF_USED)) + else if (!(tbl_entry & M68K_MMU_DF_USED)) { m68k->program->write_dword( tptr, tbl_entry | M68K_MMU_DF_USED); } @@ -214,7 +214,7 @@ INLINE UINT32 get_dt3_table_entry(m68ki_cpu_core *m68k, UINT32 tptr, UINT8 ptest { // set modified m68k->program->write_dword( tptr, tbl_entry2 | M68K_MMU_DF_USED | M68K_MMU_DF_MODIFIED); - } + } else if (!(tbl_entry2 & M68K_MMU_DF_USED)) { m68k->program->write_dword( tptr, tbl_entry2 | M68K_MMU_DF_USED); @@ -236,8 +236,8 @@ INLINE UINT32 get_dt3_table_entry(m68ki_cpu_core *m68k, UINT32 tptr, UINT8 ptest UINT32 atc_tag; // int verbose = 0; -// static UINT32 pmmu_access_count = 0; -// static UINT32 pmmu_atc_count = 0; +// static UINT32 pmmu_access_count = 0; +// static UINT32 pmmu_atc_count = 0; resolved = 0; addr_out = addr_in; @@ -255,19 +255,19 @@ INLINE UINT32 get_dt3_table_entry(m68ki_cpu_core *m68k, UINT32 tptr, UINT8 ptest UINT32 address_mask = ((m68k->mmu_tt0 << 8) & 0xff000000) ^ 0xff000000; if ((addr_in & address_mask) == address_base) { -// logerror("PMMU: pc=%x TT0 fc=%x addr_in=%08x address_mask=%08x address_base=%08x\n", m68k->ppc, fc, addr_in, address_mask, address_base); +// logerror("PMMU: pc=%x TT0 fc=%x addr_in=%08x address_mask=%08x address_base=%08x\n", m68k->ppc, fc, addr_in, address_mask, address_base); return addr_in; } } -// if ((++pmmu_access_count % 10000000) == 0) { -// logerror("pmmu_translate_addr_with_fc: atc usage = %d%%\n", pmmu_atc_count*100/pmmu_access_count); -// pmmu_atc_count = pmmu_access_count = 0; -// } +// if ((++pmmu_access_count % 10000000) == 0) { +// logerror("pmmu_translate_addr_with_fc: atc usage = %d%%\n", pmmu_atc_count*100/pmmu_access_count); +// pmmu_atc_count = pmmu_access_count = 0; +// } - // get page size (i.e. # of bits to ignore); ps is 10 or 12 for Apollo, 8 otherwise - ps = (m68k->mmu_tc >> 20) & 0xf; - atc_tag = M68K_MMU_ATC_VALID | ((fc &7) << 24) | addr_in >> ps; + // get page size (i.e. # of bits to ignore); ps is 10 or 12 for Apollo, 8 otherwise + ps = (m68k->mmu_tc >> 20) & 0xf; + atc_tag = M68K_MMU_ATC_VALID | ((fc &7) << 24) | addr_in >> ps; // first see if this is already in the ATC for (i = 0; i < MMU_ATC_ENTRIES; i++) @@ -290,7 +290,7 @@ INLINE UINT32 get_dt3_table_entry(m68ki_cpu_core *m68k, UINT32 tptr, UINT8 ptest } addr_out = (m68k->mmu_atc_data[i]<<8) | (addr_in & ~(~0 << ps)); // logerror("ATC[%2d] hit: log %08x -> phys %08x pc=%08x fc=%d\n", i, addr_in, addr_out, REG_PPC, fc); -// pmmu_atc_count++; +// pmmu_atc_count++; return addr_out; } } @@ -308,14 +308,14 @@ INLINE UINT32 get_dt3_table_entry(m68ki_cpu_core *m68k, UINT32 tptr, UINT8 ptest root_limit = m68k->mmu_crp_limit; } - // get initial shift (# of top bits to ignore) - is = (m68k->mmu_tc >> 16) & 0xf; - ps = (m68k->mmu_tc >> 20) & 0xf; - abits = (m68k->mmu_tc >> 12) & 0xf; - bbits = (m68k->mmu_tc >> 8) & 0xf; - cbits = (m68k->mmu_tc >> 4) & 0xf; + // get initial shift (# of top bits to ignore) + is = (m68k->mmu_tc >> 16) & 0xf; + ps = (m68k->mmu_tc >> 20) & 0xf; + abits = (m68k->mmu_tc >> 12) & 0xf; + bbits = (m68k->mmu_tc >> 8) & 0xf; + cbits = (m68k->mmu_tc >> 4) & 0xf; -// logerror("PMMU: tcr %08x limit %08x aptr %08x is %x abits %d bbits %d cbits %d\n", m68k->mmu_tc, root_limit, root_aptr, is, abits, bbits, cbits); +// logerror("PMMU: tcr %08x limit %08x aptr %08x is %x abits %d bbits %d cbits %d\n", m68k->mmu_tc, root_limit, root_aptr, is, abits, bbits, cbits); // get table A offset tofs = (addr_in<<is)>>(32-abits); @@ -330,7 +330,7 @@ INLINE UINT32 get_dt3_table_entry(m68ki_cpu_core *m68k, UINT32 tptr, UINT8 ptest case M68K_MMU_DF_DT1: // page descriptor, will cause direct mapping addr_out = tptr + addr_in; -// logerror("PMMU: PC=%x root mode %d (addr_in %08x -> %08x)\n", m68k->ppc, M68K_MMU_DF_DT1, addr_in, addr_out); +// logerror("PMMU: PC=%x root mode %d (addr_in %08x -> %08x)\n", m68k->ppc, M68K_MMU_DF_DT1, addr_in, addr_out); return addr_out; case M68K_MMU_DF_DT2: // valid 4 byte descriptors @@ -504,11 +504,11 @@ INLINE UINT32 get_dt3_table_entry(m68ki_cpu_core *m68k, UINT32 tptr, UINT8 ptest { UINT32 addr_out = pmmu_translate_addr_with_fc(m68k, addr_in, m68k->mmu_tmp_fc, 0); -// if (m68k->mmu_tmp_buserror_occurred > 0) { -// logerror("PMMU: pc=%08x sp=%08x va=%08x pa=%08x - invalid Table mode for level=%d (buserror %d)\n", -// REG_PPC, REG_A[7], addr_in, addr_out, m68k->mmu_tmp_sr & M68K_MMU_SR_LEVEL_3, -// m68k->mmu_tmp_buserror_occurred); -// } +// if (m68k->mmu_tmp_buserror_occurred > 0) { +// logerror("PMMU: pc=%08x sp=%08x va=%08x pa=%08x - invalid Table mode for level=%d (buserror %d)\n", +// REG_PPC, REG_A[7], addr_in, addr_out, m68k->mmu_tmp_sr & M68K_MMU_SR_LEVEL_3, +// m68k->mmu_tmp_buserror_occurred); +// } return addr_out; } @@ -599,8 +599,8 @@ void m68881_mmu_ops(m68ki_cpu_core *m68k) p_addr = pmmu_translate_addr_with_fc(m68k, v_addr, fc, 1); m68k->mmu_sr = m68k->mmu_tmp_sr; -// logerror("PMMU: pc=%08x sp=%08x va=%08x pa=%08x PTEST fc=%x level=%x mmu_sr=%04x\n", -// m68k->ppc, REG_A[7], v_addr, p_addr, fc, (modes >> 10) & 0x07, m68k->mmu_sr); +// logerror("PMMU: pc=%08x sp=%08x va=%08x pa=%08x PTEST fc=%x level=%x mmu_sr=%04x\n", +// m68k->ppc, REG_A[7], v_addr, p_addr, fc, (modes >> 10) & 0x07, m68k->mmu_sr); if (modes & 0x100) { @@ -621,25 +621,25 @@ void m68881_mmu_ops(m68ki_cpu_core *m68k) { case 0x02: // transparent translation register 0 WRITE_EA_32(m68k, ea, m68k->mmu_tt0); -// logerror("PMMU: pc=%x PMOVE from mmu_tt0=%08x\n", m68k->ppc, m68k->mmu_tt0); +// logerror("PMMU: pc=%x PMOVE from mmu_tt0=%08x\n", m68k->ppc, m68k->mmu_tt0); break; case 0x03: // transparent translation register 1 WRITE_EA_32(m68k, ea, m68k->mmu_tt1); -// logerror("PMMU: pc=%x PMOVE from mmu_tt1=%08x\n", m68k->ppc, m68k->mmu_tt1); +// logerror("PMMU: pc=%x PMOVE from mmu_tt1=%08x\n", m68k->ppc, m68k->mmu_tt1); break; case 0x10: // translation control register WRITE_EA_32(m68k, ea, m68k->mmu_tc); -// logerror("PMMU: pc=%x PMOVE from mmu_tc=%08x\n", m68k->ppc, m68k->mmu_tc); +// logerror("PMMU: pc=%x PMOVE from mmu_tc=%08x\n", m68k->ppc, m68k->mmu_tc); break; case 0x12: // supervisor root pointer WRITE_EA_64(m68k, ea, (UINT64)m68k->mmu_srp_limit<<32 | (UINT64)m68k->mmu_srp_aptr); -// logerror("PMMU: pc=%x PMOVE from SRP limit = %08x, aptr = %08x\n", REG_PPC, m68k->mmu_srp_limit, m68k->mmu_srp_aptr); +// logerror("PMMU: pc=%x PMOVE from SRP limit = %08x, aptr = %08x\n", REG_PPC, m68k->mmu_srp_limit, m68k->mmu_srp_aptr); break; case 0x13: // CPU root pointer WRITE_EA_64(m68k, ea, (UINT64)m68k->mmu_crp_limit<<32 | (UINT64)m68k->mmu_crp_aptr); -// logerror("PMMU: pc=%x PMOVE from CRP limit = %08x, aptr = %08x\n", REG_PPC, m68k->mmu_crp_limit, m68k->mmu_crp_aptr); +// logerror("PMMU: pc=%x PMOVE from CRP limit = %08x, aptr = %08x\n", REG_PPC, m68k->mmu_crp_limit, m68k->mmu_crp_aptr); break; default: @@ -699,7 +699,7 @@ void m68881_mmu_ops(m68ki_cpu_core *m68k) temp64 = READ_EA_64(m68k, ea); m68k->mmu_srp_limit = (temp64>>32) & 0xffffffff; m68k->mmu_srp_aptr = temp64 & 0xffffffff; -// logerror("PMMU: SRP limit = %08x aptr = %08x\n", m68k->mmu_srp_limit, m68k->mmu_srp_aptr); +// logerror("PMMU: SRP limit = %08x aptr = %08x\n", m68k->mmu_srp_limit, m68k->mmu_srp_aptr); if (!(modes & 0x100)) { pmmu_atc_flush(m68k); @@ -710,7 +710,7 @@ void m68881_mmu_ops(m68ki_cpu_core *m68k) temp64 = READ_EA_64(m68k, ea); m68k->mmu_crp_limit = (temp64>>32) & 0xffffffff; m68k->mmu_crp_aptr = temp64 & 0xffffffff; -// logerror("PMMU: CRP limit = %08x aptr = %08x\n", m68k->mmu_crp_limit, m68k->mmu_crp_aptr); +// logerror("PMMU: CRP limit = %08x aptr = %08x\n", m68k->mmu_crp_limit, m68k->mmu_crp_aptr); if (!(modes & 0x100)) { pmmu_atc_flush(m68k); diff --git a/src/emu/cpu/v810/v810.c b/src/emu/cpu/v810/v810.c index 5f6a58813bf..161832b7dfa 100644 --- a/src/emu/cpu/v810/v810.c +++ b/src/emu/cpu/v810/v810.c @@ -36,7 +36,7 @@ struct _v810_state direct_read_data *direct; address_space *io; UINT32 PPC; - int icount; + int icount; }; INLINE v810_state *get_safe_token(running_device *device) @@ -1048,18 +1048,18 @@ static void take_interrupt(v810_state *cpustate) { cpustate->EIPC = cpustate->PC; cpustate->EIPSW = cpustate->PSW; - + cpustate->PC = 0xfffffe00 | (cpustate->irq_line << 4); cpustate->ECR = 0xfe00 | (cpustate->irq_line << 4); - + UINT8 num = cpustate->irq_line + 1; if (num==0x10) num=0x0f; - + cpustate->PSW &= 0xfff0ffff; // clear interrupt level SET_EP(1); - SET_ID(1); + SET_ID(1); cpustate->PSW |= num << 16; - + cpustate->icount-= clkIF; } diff --git a/src/emu/machine/68681.c b/src/emu/machine/68681.c index a2e0daeb2bc..8f649081c3f 100644 --- a/src/emu/machine/68681.c +++ b/src/emu/machine/68681.c @@ -243,12 +243,12 @@ static TIMER_CALLBACK( duart_timer_callback ) duart68681->ISR |= INT_COUNTER_READY; duart68681_update_interrupts(duart68681); -// if ((duart68681->OPCR & 0x0c)== 0x04) { -// duart68681->OPR ^= 0x08; -// if (duart68681->duart_config->output_port_write) -// duart68681->duart_config->output_port_write(duart68681->device, duart68681->OPR ^ 0xff); +// if ((duart68681->OPCR & 0x0c)== 0x04) { +// duart68681->OPR ^= 0x08; +// if (duart68681->duart_config->output_port_write) +// duart68681->duart_config->output_port_write(duart68681->device, duart68681->OPR ^ 0xff); // -// } +// } }; static void duart68681_write_MR(duart68681_state *duart68681, int ch, UINT8 data) diff --git a/src/emu/machine/8237dma.c b/src/emu/machine/8237dma.c index 9875d82bff6..f58a4f0ad35 100644 --- a/src/emu/machine/8237dma.c +++ b/src/emu/machine/8237dma.c @@ -448,9 +448,9 @@ void i8237_device::i8237_timerproc() case DMA8237_S11: /* Output A8-A15 */ -// logerror("###### dma8237_timerproc %s: from %04x count=%x to %04x count=%x\n", tag(), -// m_chan[0].m_address, m_chan[0].m_count, -// m_chan[1].m_address, m_chan[1].m_count); +// logerror("###### dma8237_timerproc %s: from %04x count=%x to %04x count=%x\n", tag(), +// m_chan[0].m_address, m_chan[0].m_count, +// m_chan[1].m_address, m_chan[1].m_count); // FIXME: this will copy bytes correct, but not 16 bit words m_temporary_data = devcb_call_read8(&m_in_memr_func, m_chan[0].m_address); @@ -473,7 +473,7 @@ void i8237_device::i8237_timerproc() m_status |= 3; // set TC for channel 0 and 1 m_drq &= ~3; // clear drq for channel 0 and 1 - // logerror("!!! dma8237_timerproc DMA8237_S11 %s: m_drq=%x m_command=%x\n", tag(), m_drq, m_command); + // logerror("!!! dma8237_timerproc DMA8237_S11 %s: m_drq=%x m_command=%x\n", tag(), m_drq, m_command); } break; } @@ -540,7 +540,7 @@ WRITE8_DEVICE_HANDLER_TRAMPOLINE(i8237, i8237_w) { offset &= 0x0F; -// logerror("i8237_w: offset = %02x, data = %02x\n", offset, data ); +// logerror("i8237_w: offset = %02x, data = %02x\n", offset, data ); switch(offset) { case 0: diff --git a/src/emu/machine/mc146818.c b/src/emu/machine/mc146818.c index d916d3ea0d4..5e6127111dc 100644 --- a/src/emu/machine/mc146818.c +++ b/src/emu/machine/mc146818.c @@ -394,9 +394,9 @@ void mc146818_device::set_base_datetime() // temporary hack to go back 20 year (e.g. from 2010 -> 1990) // current_time.year -= 20; -// logerror("mc146818_set_base_datetime %02d/%02d/%02d %02d:%02d:%02d\n", -// current_time.year % 100, current_time.month + 1, current_time.mday, -// current_time.hour,current_time.minute, current_time.second); +// logerror("mc146818_set_base_datetime %02d/%02d/%02d %02d:%02d:%02d\n", +// current_time.year % 100, current_time.month + 1, current_time.mday, +// current_time.hour,current_time.minute, current_time.second); if (HOURS_24 || (current_time.hour < 12)) m_data[4] = dec_2_local(current_time.hour); @@ -445,10 +445,10 @@ READ8_MEMBER( mc146818_device::read ) break; case 0xc: -// if(m_updated) /* the clock has been updated */ -// data = 0x10; -// else -// data = 0x00; +// if(m_updated) /* the clock has been updated */ +// data = 0x10; +// else +// data = 0x00; // the unused bits b0 ... b3 are always read as 0 data = m_data[m_index % MC146818_DATA_SIZE] & 0xf0; // read 0x0c will clear all IRQ flags in register 0x0c diff --git a/src/emu/video.c b/src/emu/video.c index 17d106780e8..4cbbe45d0a3 100644 --- a/src/emu/video.c +++ b/src/emu/video.c @@ -210,8 +210,8 @@ void video_manager::set_frameskip(int frameskip) //------------------------------------------------- -// frame_update - handle frameskipping and UI, -// plus updating the screen during normal +// frame_update - handle frameskipping and UI, +// plus updating the screen during normal // operations //------------------------------------------------- @@ -280,7 +280,7 @@ void video_manager::frame_update(bool debug) //------------------------------------------------- -// speed_text - print the text to be displayed +// speed_text - print the text to be displayed // into a string buffer //------------------------------------------------- @@ -449,7 +449,7 @@ void video_manager::begin_recording(const char *name, movie_format format) mame_printf_error("Error creating AVI: %s\n", avi_error_string(avierr)); } } - + // start up a MNG recording else if (format == MF_MNG) { diff --git a/src/emu/video.h b/src/emu/video.h index 9e7c188f32b..e55ab612e74 100644 --- a/src/emu/video.h +++ b/src/emu/video.h @@ -73,7 +73,7 @@ typedef struct _avi_file avi_file; class video_manager { friend class screen_device; - + public: // movie format options enum movie_format @@ -84,7 +84,7 @@ public: // construction/destruction video_manager(running_machine &machine); - + // getters bool skip_this_frame() const { return m_skipping_this_frame; } int speed_factor() const { return m_speed; } @@ -99,17 +99,17 @@ public: void set_throttled(bool throttled = true) { m_throttle = throttled; } void set_fastforward(bool ffwd = true) { m_fastforward = ffwd; } - // render a frame + // render a frame void frame_update(bool debug = false); - + // current speed helpers astring &speed_text(astring &string); double speed_percent() const { return m_speed_percent; } - // snapshots + // snapshots void save_snapshot(screen_device *screen, mame_file &file); void save_active_screen_snapshots(); - + // movies void begin_recording(const char *name, movie_format format = MF_AVI); void end_recording(); @@ -121,12 +121,12 @@ private: void exit(); static TIMER_CALLBACK( screenless_update_callback ); void postload(); - + // effective value helpers int effective_autoframeskip() const; int effective_frameskip() const; bool effective_throttle() const; - + // speed and throttling helpers int original_speed_setting() const; bool finish_screen_updates(); @@ -143,7 +143,7 @@ private: // internal state running_machine & m_machine; // reference to our machine - + // screenless systems emu_timer * m_screenless_frame_timer; // timer to signal VBLANK start @@ -192,7 +192,7 @@ private: attotime m_movie_frame_period; // period of a single movie frame attotime m_movie_next_frame_time; // time of next frame UINT32 m_movie_frame; // current movie frame number - + static const UINT8 s_skiptable[FRAMESKIP_LEVELS][FRAMESKIP_LEVELS]; static const attoseconds_t SUBSECONDS_PER_SPEED_UPDATE = ATTOSECONDS_PER_SECOND / 4; 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