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-rw-r--r--src/emu/cpu/i386/i386op16.c4
-rw-r--r--src/emu/cpu/i386/i386op32.c2
-rw-r--r--src/emu/cpu/m68000/m68k_in.c2
-rw-r--r--src/emu/cpu/m68000/m68kcpu.c2
-rw-r--r--src/emu/cpu/m68000/m68kdasm.c10
-rw-r--r--src/emu/cpu/m68000/m68kmmu.h34
-rw-r--r--src/emu/cpu/mips/mips3com.c4
-rw-r--r--src/emu/cpu/mips/mips3com.h2
-rw-r--r--src/emu/machine/8237dma.c2
-rw-r--r--src/emu/machine/8237dma.h4
-rw-r--r--src/emu/machine/8257dma.h2
-rw-r--r--src/emu/machine/z80dma.h18
-rw-r--r--src/emu/sound/sn76496.c20
13 files changed, 53 insertions, 53 deletions
diff --git a/src/emu/cpu/i386/i386op16.c b/src/emu/cpu/i386/i386op16.c
index 3a2ace40c41..24f2680ece8 100644
--- a/src/emu/cpu/i386/i386op16.c
+++ b/src/emu/cpu/i386/i386op16.c
@@ -1144,12 +1144,12 @@ static void I386OP(enter16)(i386_state *cpustate) // Opcode 0xc8
UINT8 x;
UINT16 frameptr;
PUSH16(cpustate,REG16(BP));
-
+
if(!STACK_32BIT)
frameptr = REG16(SP);
else
frameptr = REG32(ESP);
-
+
if(level > 0)
{
for(x=1;x<level-1;x++)
diff --git a/src/emu/cpu/i386/i386op32.c b/src/emu/cpu/i386/i386op32.c
index 9bffe14ccdf..35de63673f0 100644
--- a/src/emu/cpu/i386/i386op32.c
+++ b/src/emu/cpu/i386/i386op32.c
@@ -1009,7 +1009,7 @@ static void I386OP(enter32)(i386_state *cpustate) // Opcode 0xc8
frameptr = REG16(SP);
else
frameptr = REG32(ESP);
-
+
if(level > 0)
{
for(x=1;x<level-1;x++)
diff --git a/src/emu/cpu/m68000/m68k_in.c b/src/emu/cpu/m68000/m68k_in.c
index 21e2f060bea..7f00707dab1 100644
--- a/src/emu/cpu/m68000/m68k_in.c
+++ b/src/emu/cpu/m68000/m68k_in.c
@@ -262,7 +262,7 @@ M68KMAKE_OPCODE_HANDLER_HEADER
#include "mame.h"
extern void m68040_fpu_op0(m68ki_cpu_core *m68k);
extern void m68040_fpu_op1(m68ki_cpu_core *m68k);
-extern void m68881_mmu_ops(m68ki_cpu_core *m68k);
+extern void m68881_mmu_ops(m68ki_cpu_core *m68k);
/* ======================================================================== */
/* ========================= INSTRUCTION HANDLERS ========================= */
diff --git a/src/emu/cpu/m68000/m68kcpu.c b/src/emu/cpu/m68000/m68kcpu.c
index 814afb0bd1d..e1d294a5afc 100644
--- a/src/emu/cpu/m68000/m68kcpu.c
+++ b/src/emu/cpu/m68000/m68kcpu.c
@@ -42,7 +42,7 @@ static const char copyright_notice[] =
extern void m68040_fpu_op0(m68ki_cpu_core *m68k);
extern void m68040_fpu_op1(m68ki_cpu_core *m68k);
-extern void m68881_mmu_ops(m68ki_cpu_core *m68k);
+extern void m68881_mmu_ops(m68ki_cpu_core *m68k);
/* ======================================================================== */
/* ================================= DATA ================================= */
diff --git a/src/emu/cpu/m68000/m68kdasm.c b/src/emu/cpu/m68000/m68kdasm.c
index a3c112983f6..9a49fedd978 100644
--- a/src/emu/cpu/m68000/m68kdasm.c
+++ b/src/emu/cpu/m68000/m68kdasm.c
@@ -233,7 +233,7 @@ static const char *const g_mmuregs[8] =
static const char *const g_mmucond[16] =
{
- "bs", "bc", "ls", "lc", "ss", "sc", "as", "ac",
+ "bs", "bc", "ls", "lc", "ss", "sc", "as", "ac",
"ws", "wc", "is", "ic", "gs", "gc", "cs", "cc"
};
@@ -3139,14 +3139,14 @@ static void d68851_pbcc16(void)
{
UINT32 temp_pc = g_cpu_pc;
- sprintf(g_dasm_str, "pb%s %x", g_mmucond[g_cpu_ir&0xf], temp_pc + make_int_16(read_imm_16()));
+ sprintf(g_dasm_str, "pb%s %x", g_mmucond[g_cpu_ir&0xf], temp_pc + make_int_16(read_imm_16()));
}
static void d68851_pbcc32(void)
{
UINT32 temp_pc = g_cpu_pc;
- sprintf(g_dasm_str, "pb%s %x", g_mmucond[g_cpu_ir&0xf], temp_pc + make_int_32(read_imm_32()));
+ sprintf(g_dasm_str, "pb%s %x", g_mmucond[g_cpu_ir&0xf], temp_pc + make_int_32(read_imm_32()));
}
static void d68851_pdbcc(void)
@@ -3154,7 +3154,7 @@ static void d68851_pdbcc(void)
UINT32 temp_pc = g_cpu_pc;
UINT16 modes = read_imm_16();
- sprintf(g_dasm_str, "pb%s %x", g_mmucond[modes&0xf], temp_pc + make_int_16(read_imm_16()));
+ sprintf(g_dasm_str, "pb%s %x", g_mmucond[modes&0xf], temp_pc + make_int_16(read_imm_16()));
}
// PScc: 0000000000xxxxxx
@@ -3485,7 +3485,7 @@ static const opcode_struct g_opcode_info[] =
{d68000_unlk , 0xfff8, 0x4e58, 0x000},
{d68020_unpk_rr , 0xf1f8, 0x8180, 0x000},
{d68020_unpk_mm , 0xf1f8, 0x8188, 0x000},
- {d68851_p000 , 0xffc0, 0xf000, 0x000},
+ {d68851_p000 , 0xffc0, 0xf000, 0x000},
{d68851_pbcc16 , 0xffc0, 0xf080, 0x000},
{d68851_pbcc32 , 0xffc0, 0xf0c0, 0x000},
{d68851_pdbcc , 0xfff8, 0xf048, 0x000},
diff --git a/src/emu/cpu/m68000/m68kmmu.h b/src/emu/cpu/m68000/m68kmmu.h
index 3476202ca1b..3d23b5ff38b 100644
--- a/src/emu/cpu/m68000/m68kmmu.h
+++ b/src/emu/cpu/m68000/m68kmmu.h
@@ -37,7 +37,7 @@ INLINE UINT32 pmmu_translate_addr(m68ki_cpu_core *m68k, UINT32 addr_in)
bbits = (m68k->mmu_tc>>8)&0xf;
cbits = (m68k->mmu_tc>>4)&0xf;
-// logerror("PMMU: tcr %08x limit %08x aptr %08x is %x abits %d bbits %d cbits %d\n", m68k->mmu_tc, root_limit, root_aptr, is, abits, bbits, cbits);
+// logerror("PMMU: tcr %08x limit %08x aptr %08x is %x abits %d bbits %d cbits %d\n", m68k->mmu_tc, root_limit, root_aptr, is, abits, bbits, cbits);
// get table A offset
tofs = (addr_in<<is)>>(32-abits);
@@ -52,19 +52,19 @@ INLINE UINT32 pmmu_translate_addr(m68ki_cpu_core *m68k, UINT32 addr_in)
case 2: // valid 4 byte descriptors
tofs *= 4;
-// logerror("PMMU: reading table A entry at %08x\n", tofs + (root_aptr & 0xfffffffc));
+// logerror("PMMU: reading table A entry at %08x\n", tofs + (root_aptr & 0xfffffffc));
tbl_entry = memory_read_dword_32be(m68k->program, tofs + (root_aptr & 0xfffffffc));
tamode = tbl_entry & 3;
-// logerror("PMMU: addr %08x entry %08x mode %x tofs %x\n", addr_in, tbl_entry, tamode, tofs);
+// logerror("PMMU: addr %08x entry %08x mode %x tofs %x\n", addr_in, tbl_entry, tamode, tofs);
break;
case 3: // valid 8 byte descriptors
tofs *= 8;
-// logerror("PMMU: reading table A entries at %08x\n", tofs + (root_aptr & 0xfffffffc));
+// logerror("PMMU: reading table A entries at %08x\n", tofs + (root_aptr & 0xfffffffc));
tbl_entry2 = memory_read_dword_32be(m68k->program, tofs + (root_aptr & 0xfffffffc));
tbl_entry = memory_read_dword_32be(m68k->program, tofs + (root_aptr & 0xfffffffc)+4);
tamode = tbl_entry2 & 3;
-// logerror("PMMU: addr %08x entry %08x entry2 %08x mode %x tofs %x\n", addr_in, tbl_entry, tbl_entry2, tamode, tofs);
+// logerror("PMMU: addr %08x entry %08x entry2 %08x mode %x tofs %x\n", addr_in, tbl_entry, tbl_entry2, tamode, tofs);
break;
}
@@ -81,19 +81,19 @@ INLINE UINT32 pmmu_translate_addr(m68ki_cpu_core *m68k, UINT32 addr_in)
case 2: // 4-byte table B descriptor
tofs *= 4;
-// logerror("PMMU: reading table B entry at %08x\n", tofs + tptr);
+// logerror("PMMU: reading table B entry at %08x\n", tofs + tptr);
tbl_entry = memory_read_dword_32be(m68k->program, tofs + tptr);
tbmode = tbl_entry & 3;
-// logerror("PMMU: addr %08x entry %08x mode %x tofs %x\n", addr_in, tbl_entry, tbmode, tofs);
+// logerror("PMMU: addr %08x entry %08x mode %x tofs %x\n", addr_in, tbl_entry, tbmode, tofs);
break;
case 3: // 8-byte table B descriptor
tofs *= 8;
-// logerror("PMMU: reading table B entries at %08x\n", tofs + tptr);
+// logerror("PMMU: reading table B entries at %08x\n", tofs + tptr);
tbl_entry2 = memory_read_dword_32be(m68k->program, tofs + tptr);
tbl_entry = memory_read_dword_32be(m68k->program, tofs + tptr + 4);
tbmode = tbl_entry2 & 3;
-// logerror("PMMU: addr %08x entry %08x entry2 %08x mode %x tofs %x\n", addr_in, tbl_entry, tbl_entry2, tbmode, tofs);
+// logerror("PMMU: addr %08x entry %08x entry2 %08x mode %x tofs %x\n", addr_in, tbl_entry, tbl_entry2, tbmode, tofs);
break;
case 1: // early termination descriptor
@@ -120,19 +120,19 @@ INLINE UINT32 pmmu_translate_addr(m68ki_cpu_core *m68k, UINT32 addr_in)
case 2: // 4-byte table C descriptor
tofs *= 4;
-// logerror("PMMU: reading table C entry at %08x\n", tofs + tptr);
+// logerror("PMMU: reading table C entry at %08x\n", tofs + tptr);
tbl_entry = memory_read_dword_32be(m68k->program, tofs + tptr);
tcmode = tbl_entry & 3;
-// logerror("PMMU: addr %08x entry %08x mode %x tofs %x\n", addr_in, tbl_entry, tbmode, tofs);
+// logerror("PMMU: addr %08x entry %08x mode %x tofs %x\n", addr_in, tbl_entry, tbmode, tofs);
break;
case 3: // 8-byte table C descriptor
tofs *= 8;
-// logerror("PMMU: reading table C entries at %08x\n", tofs + tptr);
+// logerror("PMMU: reading table C entries at %08x\n", tofs + tptr);
tbl_entry2 = memory_read_dword_32be(m68k->program, tofs + tptr);
tbl_entry = memory_read_dword_32be(m68k->program, tofs + tptr + 4);
tcmode = tbl_entry2 & 3;
-// logerror("PMMU: addr %08x entry %08x entry2 %08x mode %x tofs %x\n", addr_in, tbl_entry, tbl_entry2, tbmode, tofs);
+// logerror("PMMU: addr %08x entry %08x entry2 %08x mode %x tofs %x\n", addr_in, tbl_entry, tbl_entry2, tbmode, tofs);
break;
case 1: // termination descriptor
@@ -166,13 +166,13 @@ INLINE UINT32 pmmu_translate_addr(m68ki_cpu_core *m68k, UINT32 addr_in)
}
-// logerror("PMMU: [%08x] => [%08x]\n", addr_in, addr_out);
+// logerror("PMMU: [%08x] => [%08x]\n", addr_in, addr_out);
return addr_out;
}
/*
- m68881_mmu_ops: COP 0 MMU opcode handling
+ m68881_mmu_ops: COP 0 MMU opcode handling
*/
@@ -183,7 +183,7 @@ void m68881_mmu_ops(m68ki_cpu_core *m68k)
UINT64 temp64;
// catch the 2 "weird" encodings up front (PBcc)
- if ((m68k->ir & 0xffc0) == 0xf0c0)
+ if ((m68k->ir & 0xffc0) == 0xf0c0)
{
logerror("680x0: unhandled PBcc\n");
return;
@@ -316,5 +316,5 @@ void m68881_mmu_ops(m68ki_cpu_core *m68k)
break;
}
}
-}
+}
diff --git a/src/emu/cpu/mips/mips3com.c b/src/emu/cpu/mips/mips3com.c
index 14827413048..61ecb3d4dd8 100644
--- a/src/emu/cpu/mips/mips3com.c
+++ b/src/emu/cpu/mips/mips3com.c
@@ -86,11 +86,11 @@ void mips3com_init(mips3_state *mips, mips3_flavor flavor, int bigendian, const
mips->icache_size = config->icache;
mips->dcache_size = config->dcache;
mips->system_clock = config->system_clock;
-
+
/* configure flavor-specific parameters */
mips->pfnmask = 0x00ffffff;
mips->tlbentries = MIPS3_MAX_TLB_ENTRIES;
-
+
/* VR4300 and VR5432 have 4 fewer PFN bits, and only 32 TLB entries */
if (flavor == MIPS3_TYPE_VR4300)
{
diff --git a/src/emu/cpu/mips/mips3com.h b/src/emu/cpu/mips/mips3com.h
index d69c64bb019..db7c1c4fefa 100644
--- a/src/emu/cpu/mips/mips3com.h
+++ b/src/emu/cpu/mips/mips3com.h
@@ -204,7 +204,7 @@ struct _mips3_state
UINT64 count_zero_time;
UINT32 compare_armed;
emu_timer * compare_int_timer;
-
+
/* derived info based on flavor */
UINT32 pfnmask;
UINT8 tlbentries;
diff --git a/src/emu/machine/8237dma.c b/src/emu/machine/8237dma.c
index a7f590fe875..d1d0e38c93d 100644
--- a/src/emu/machine/8237dma.c
+++ b/src/emu/machine/8237dma.c
@@ -214,7 +214,7 @@ INLINE void dma8237_advance( const device_config *device )
static void set_dack(i8237_t *i8237, int channel)
{
int i;
-
+
for (i = 0; i < 4; i++)
{
int state = (i == channel) ^ !BIT(i8237->command, 7);
diff --git a/src/emu/machine/8237dma.h b/src/emu/machine/8237dma.h
index 7df951079c6..acfab84cd75 100644
--- a/src/emu/machine/8237dma.h
+++ b/src/emu/machine/8237dma.h
@@ -11,12 +11,12 @@
_I/OW 2 | | 39 A6
_MEMR 3 | | 38 A5
_MEMW 4 | | 37 A4
- 5 | | 36 _EOP
+ 5 | | 36 _EOP
READY 6 | | 35 A3
HLDA 7 | | 34 A2
ADSTB 8 | | 33 A1
AEN 9 | | 32 A0
- HRQ 10 | 8237 | 31 Vcc
+ HRQ 10 | 8237 | 31 Vcc
_CS 11 | | 30 DB0
CLK 12 | | 29 DB1
RESET 13 | | 28 DB2
diff --git a/src/emu/machine/8257dma.h b/src/emu/machine/8257dma.h
index 111d85077fb..a71701d0a4d 100644
--- a/src/emu/machine/8257dma.h
+++ b/src/emu/machine/8257dma.h
@@ -16,7 +16,7 @@
HLDA 7 | | 34 A2
ADSTB 8 | | 33 A1
AEN 9 | | 32 A0
- HRQ 10 | 8257 | 31 Vcc
+ HRQ 10 | 8257 | 31 Vcc
_CS 11 | | 30 D0
CLK 12 | | 29 D1
RESET 13 | | 28 D2
diff --git a/src/emu/machine/z80dma.h b/src/emu/machine/z80dma.h
index c67c22bb4e3..00e984b5fba 100644
--- a/src/emu/machine/z80dma.h
+++ b/src/emu/machine/z80dma.h
@@ -7,16 +7,16 @@
****************************************************************************
_____ _____
- A5 1 |* \_/ | 40 A6
- A4 2 | | 39 A7
- A3 3 | | 38 IEI
- A2 4 | | 37 _INT/_PULSE
- A1 5 | | 36 IEO
- A0 6 | | 35 D0
- CLK 7 | | 34 D1
- _WR 8 | | 33 D2
+ A5 1 |* \_/ | 40 A6
+ A4 2 | | 39 A7
+ A3 3 | | 38 IEI
+ A2 4 | | 37 _INT/_PULSE
+ A1 5 | | 36 IEO
+ A0 6 | | 35 D0
+ CLK 7 | | 34 D1
+ _WR 8 | | 33 D2
_RD 9 | | 32 D3
- _IORQ 10 | Z8410 | 31 D4
+ _IORQ 10 | Z8410 | 31 D4
+5V 11 | | 30 GND
_MREQ 12 | | 29 D5
_BAO 13 | | 28 D6
diff --git a/src/emu/sound/sn76496.c b/src/emu/sound/sn76496.c
index ed17e66403c..3451d8e05d4 100644
--- a/src/emu/sound/sn76496.c
+++ b/src/emu/sound/sn76496.c
@@ -35,7 +35,7 @@
different noise LFSR patttern: taps on bits A and E, output on E
It uses a 15-bit ring buffer for periodic noise/arbitrary duty cycle.
(all this chip's info needs to be verified)
-
+
28/03/2005 : Sebastien Chevalier
Update th SN76496Write func, according to SN76489 doc found on SMSPower.
- On write with 0x80 set to 0, when LastRegister is other then TONE,
@@ -48,22 +48,22 @@
28/04/2009 : Lord Nightmare
Add READY line readback; cleaned up struct a bit. Cleaned up comments.
Add more TODOs. Fixed some unsaved savestate related stuff.
-
+
04/11/2009 : Lord Nightmare
Changed the way that the invert works (it now selects between XOR and XNOR
for the taps), and added R->OldNoise to simulate the extra 0 that is always
output before the noise LFSR contents are after an LFSR reset.
This fixes SN76489/A to match chips. Added SN94624.
-
+
14/11/2009 : Lord Nightmare
Removed STEP mess, vastly simplifying the code. Made output bipolar rather
than always above the 0 line, but disabled that code due to pending issues.
-
+
16/11/2009 : Lord Nightmare
Fix screeching in regulus: When summing together four equal channels, the
size of the max amplitude per channel should be 1/4 of the max range, not
1/3. Added NCR7496.
-
+
18/11/2009 : Lord Nightmare
Modify Init functions to support negating the audio output. The gamegear
psg does this. Change gamegear and sega psgs to use XOR rather than XNOR
@@ -269,10 +269,10 @@ static STREAM_UPDATE( SN76496Update )
R->Count[3] = R->Period[3];
}
/* //bipolar output, doesn't seem to work right with sonic 2 on gamegear at least
- out = (R->Output[0]?R->Volume[0]:(0-R->Volume[0]))
- +(R->Output[1]?R->Volume[1]:(0-R->Volume[1]))
- +(R->Output[2]?R->Volume[2]:(0-R->Volume[2]))
- +(R->Output[3]?R->Volume[3]:(0-R->Volume[3]));
+ out = (R->Output[0]?R->Volume[0]:(0-R->Volume[0]))
+ +(R->Output[1]?R->Volume[1]:(0-R->Volume[1]))
+ +(R->Output[2]?R->Volume[2]:(0-R->Volume[2]))
+ +(R->Output[3]?R->Volume[3]:(0-R->Volume[3]));
*/
if (R->Stereo)
{
@@ -280,7 +280,7 @@ static STREAM_UPDATE( SN76496Update )
+ (((R->StereoMask&0x20)&&R->Output[1])?R->Volume[1]:0)
+ (((R->StereoMask&0x40)&&R->Output[2])?R->Volume[2]:0)
+ (((R->StereoMask&0x80)&&R->Output[3])?R->Volume[3]:0);
-
+
out2 = (((R->StereoMask&0x1)&&R->Output[0])?R->Volume[0]:0)
+ (((R->StereoMask&0x2)&&R->Output[1])?R->Volume[1]:0)
+ (((R->StereoMask&0x4)&&R->Output[2])?R->Volume[2]:0)