diff options
Diffstat (limited to 'src/emu/cpu')
81 files changed, 1170 insertions, 1203 deletions
diff --git a/src/emu/cpu/avr8/avr8.c b/src/emu/cpu/avr8/avr8.c index d0589abfff6..730326fccd0 100644 --- a/src/emu/cpu/avr8/avr8.c +++ b/src/emu/cpu/avr8/avr8.c @@ -633,11 +633,11 @@ avr8_device::avr8_device(const machine_config &mconfig, const char *name, const m_data_config("data", ENDIANNESS_LITTLE, 8, 16, 0, internal_map), m_io_config("io", ENDIANNESS_LITTLE, 8, 4), m_eeprom(NULL), - m_cpu_type(cpu_type), - m_lfuses(0x62), - m_hfuses(0x99), - m_efuses(0xFF), - m_lock_bits(0xFF), + m_cpu_type(cpu_type), + m_lfuses(0x62), + m_hfuses(0x99), + m_efuses(0xFF), + m_lock_bits(0xFF), m_pc(0), m_spi_active(false), m_spi_prescale(0), @@ -649,12 +649,12 @@ avr8_device::avr8_device(const machine_config &mconfig, const char *name, const { // Allocate & setup - for (int t=0; t<=5; t++){ + for (int t=0; t<=5; t++){ m_timer_top[t] = 0; m_timer_increment[t] = 1; m_timer_prescale[t] = 0; m_timer_prescale_count[t] = 0; - } + } } @@ -675,7 +675,7 @@ void avr8_device::static_set_config(device_t &device, const avr8_config &config) void avr8_device::set_low_fuses(const UINT8 byte) { - m_lfuses = byte; + m_lfuses = byte; } //------------------------------------------------- @@ -684,7 +684,7 @@ void avr8_device::set_low_fuses(const UINT8 byte) void avr8_device::set_high_fuses(const UINT8 byte) { - m_hfuses = byte; + m_hfuses = byte; } //------------------------------------------------- @@ -693,7 +693,7 @@ void avr8_device::set_high_fuses(const UINT8 byte) void avr8_device::set_extended_fuses(const UINT8 byte) { - m_efuses = byte; + m_efuses = byte; } //------------------------------------------------- @@ -702,7 +702,7 @@ void avr8_device::set_extended_fuses(const UINT8 byte) void avr8_device::set_lock_bits(const UINT8 byte) { - m_lock_bits = byte; + m_lock_bits = byte; } //------------------------------------------------- @@ -841,26 +841,26 @@ void avr8_device::device_start() void avr8_device::device_reset() { - logerror("AVR low fuse bits: 0x%02X\n", m_lfuses); - logerror("AVR high fuse bits: 0x%02X\n", m_hfuses); - logerror("AVR extended fuse bits: 0x%02X\n", m_efuses); - logerror("AVR lock bits: 0x%02X\n", m_lock_bits); - - switch ((m_hfuses & (BOOTSZ1|BOOTSZ0)) >> 1){ - case 0: m_boot_size = 4096; break; - case 1: m_boot_size = 2048; break; - case 2: m_boot_size = 1024; break; - case 3: m_boot_size = 512; break; - default: break; - } - - if (m_hfuses & BOOTRST){ - m_shifted_pc = 0x0000; - logerror("Booting AVR core from address 0x0000\n"); - } else { - m_shifted_pc = (m_addr_mask + 1) - 2*m_boot_size; - logerror("AVR Boot loader section size: %d words\n", m_boot_size); - } + logerror("AVR low fuse bits: 0x%02X\n", m_lfuses); + logerror("AVR high fuse bits: 0x%02X\n", m_hfuses); + logerror("AVR extended fuse bits: 0x%02X\n", m_efuses); + logerror("AVR lock bits: 0x%02X\n", m_lock_bits); + + switch ((m_hfuses & (BOOTSZ1|BOOTSZ0)) >> 1){ + case 0: m_boot_size = 4096; break; + case 1: m_boot_size = 2048; break; + case 2: m_boot_size = 1024; break; + case 3: m_boot_size = 512; break; + default: break; + } + + if (m_hfuses & BOOTRST){ + m_shifted_pc = 0x0000; + logerror("Booting AVR core from address 0x0000\n"); + } else { + m_shifted_pc = (m_addr_mask + 1) - 2*m_boot_size; + logerror("AVR Boot loader section size: %d words\n", m_boot_size); + } for (int i = 0; i < 0x200; i++) { @@ -871,12 +871,12 @@ void avr8_device::device_reset() m_spi_prescale = 0; m_spi_prescale_count = 0; - for (int t=0; t<=5; t++){ + for (int t=0; t<=5; t++){ m_timer_top[t] = 0; m_timer_increment[t] = 1; m_timer_prescale[t] = 0; m_timer_prescale_count[t] = 0; - } + } m_interrupt_pending = false; m_elapsed_cycles = 0; @@ -1136,31 +1136,31 @@ void avr8_device::timer_tick(int cycles) } } - for (int t=0; t<=5; t++){ - if (m_timer_prescale[t] != 0) - { - m_timer_prescale_count[t]++; - if (m_timer_prescale_count[t] >= m_timer_prescale[t]) - { - switch (t){ - case 0: timer0_tick(); break; - case 1: timer1_tick(); break; - case 2: timer2_tick(); break; - case 3: timer3_tick(); break; - case 4: timer4_tick(); break; - case 5: timer5_tick(); break; - } - m_timer_prescale_count[t] -= m_timer_prescale[t]; - } - } - } + for (int t=0; t<=5; t++){ + if (m_timer_prescale[t] != 0) + { + m_timer_prescale_count[t]++; + if (m_timer_prescale_count[t] >= m_timer_prescale[t]) + { + switch (t){ + case 0: timer0_tick(); break; + case 1: timer1_tick(); break; + case 2: timer2_tick(); break; + case 3: timer3_tick(); break; + case 4: timer4_tick(); break; + case 5: timer5_tick(); break; + } + m_timer_prescale_count[t] -= m_timer_prescale[t]; + } + } + } } } -// UINT8 ocr0[2] = { m_r[AVR8_REGIDX_OCR0A], m_r[AVR8_REGIDX_OCR0B] }; -//TODO UINT8 ocf0[2] = { (1 << AVR8_TIFR0_OCF0A_SHIFT), (1 << AVR8_TIFR4_OCF0B_SHIFT) }; -//TODO UINT8 int0[2] = { AVR8_INTIDX_OCF0A, AVR8_INTIDX_OCF0B }; +// UINT8 ocr0[2] = { m_r[AVR8_REGIDX_OCR0A], m_r[AVR8_REGIDX_OCR0B] }; +//TODO UINT8 ocf0[2] = { (1 << AVR8_TIFR0_OCF0A_SHIFT), (1 << AVR8_TIFR4_OCF0B_SHIFT) }; +//TODO UINT8 int0[2] = { AVR8_INTIDX_OCF0A, AVR8_INTIDX_OCF0B }; #define LOG_TIMER_0 0 #define LOG_TIMER_5 1 @@ -1168,8 +1168,8 @@ void avr8_device::timer_tick(int cycles) void avr8_device::timer0_tick() { #if LOG_TIMER_0 - printf("AVR8_WGM0: %d\n", AVR8_WGM0); - printf("AVR8_TCCR0A_COM0B: %d\n", AVR8_TCCR0A_COM0B); + printf("AVR8_WGM0: %d\n", AVR8_WGM0); + printf("AVR8_TCCR0A_COM0B: %d\n", AVR8_TCCR0A_COM0B); #endif UINT8 count = m_r[AVR8_REGIDX_TCNT0]; @@ -1178,69 +1178,69 @@ void avr8_device::timer0_tick() switch(AVR8_WGM0) { case WGM02_NORMAL: - printf("WGM02_NORMAL: Unimplemented timer#0 waveform generation mode\n"); - break; + printf("WGM02_NORMAL: Unimplemented timer#0 waveform generation mode\n"); + break; case WGM02_PWM_PC: - printf("WGM02_PWM_PC: Unimplemented timer#0 waveform generation mode\n"); - break; + printf("WGM02_PWM_PC: Unimplemented timer#0 waveform generation mode\n"); + break; case WGM02_CTC_CMP: - switch(AVR8_TCCR0A_COM0B){ - case 0: /* Normal Operation */ - if (count == m_timer_top[0]){ - m_timer_top[0] = 0; - } - break; - case 1: /* Toggle OC0B on compare match */ - if (count == m_timer_top[0]){ - m_timer_top[0] = 0; + switch(AVR8_TCCR0A_COM0B){ + case 0: /* Normal Operation */ + if (count == m_timer_top[0]){ + m_timer_top[0] = 0; + } + break; + case 1: /* Toggle OC0B on compare match */ + if (count == m_timer_top[0]){ + m_timer_top[0] = 0; #if LOG_TIMER_0 - printf("[0] Toggle OC0B\n"); + printf("[0] Toggle OC0B\n"); #endif - m_io->write_byte(AVR8_IO_PORTG, m_io->read_byte(AVR8_IO_PORTG) ^ (1 << 5)); - } - break; - case 2: /* Clear OC0B on compare match */ - if (count == m_timer_top[0]){ - m_timer_top[0] = 0; - //Clear OC0B + m_io->write_byte(AVR8_IO_PORTG, m_io->read_byte(AVR8_IO_PORTG) ^ (1 << 5)); + } + break; + case 2: /* Clear OC0B on compare match */ + if (count == m_timer_top[0]){ + m_timer_top[0] = 0; + //Clear OC0B #if LOG_TIMER_0 - printf("[0] Clear OC0B\n"); + printf("[0] Clear OC0B\n"); #endif - m_io->write_byte(AVR8_IO_PORTG, m_io->read_byte(AVR8_IO_PORTG) & ~(1 << 5)); - } - break; - case 3: /* Set OC0B on compare match */ - if (count == m_timer_top[0]){ - m_timer_top[0] = 0; + m_io->write_byte(AVR8_IO_PORTG, m_io->read_byte(AVR8_IO_PORTG) & ~(1 << 5)); + } + break; + case 3: /* Set OC0B on compare match */ + if (count == m_timer_top[0]){ + m_timer_top[0] = 0; #if LOG_TIMER_0 - printf("[0] Set OC0B\n"); + printf("[0] Set OC0B\n"); #endif - m_io->write_byte(AVR8_IO_PORTG, m_io->read_byte(AVR8_IO_PORTG) | (1 << 5)); - } - break; - } - break; + m_io->write_byte(AVR8_IO_PORTG, m_io->read_byte(AVR8_IO_PORTG) | (1 << 5)); + } + break; + } + break; case WGM02_FAST_PWM: - printf("WGM02_FAST_PWM: Unimplemented timer#0 waveform generation mode\n"); - break; + printf("WGM02_FAST_PWM: Unimplemented timer#0 waveform generation mode\n"); + break; case WGM02_PWM_PC_CMP: - printf("WGM02_PWM_PC_CMP: Unimplemented timer#0 waveform generation mode\n"); - break; + printf("WGM02_PWM_PC_CMP: Unimplemented timer#0 waveform generation mode\n"); + break; case WGM02_FAST_PWM_CMP: - printf("WGM02_FAST_PWM_CMP: Unimplemented timer#0 waveform generation mode\n"); - break; + printf("WGM02_FAST_PWM_CMP: Unimplemented timer#0 waveform generation mode\n"); + break; default: verboselog(m_pc, 0, "update_timer0_compare_mode: Unknown waveform generation mode: %02x\n", AVR8_WGM0); break; } - count = count & 0xff; + count = count & 0xff; count += increment; m_r[AVR8_REGIDX_TCNT0] = count & 0xff; @@ -1268,7 +1268,7 @@ void avr8_device::timer0_force_output_compare(int reg) void avr8_device::changed_tccr0b(UINT8 data) { - if (VERBOSE_LEVEL) printf("changed_tccr0b: data=0x%02X\n", data); + if (VERBOSE_LEVEL) printf("changed_tccr0b: data=0x%02X\n", data); UINT8 oldtccr = AVR8_TCCR0B; UINT8 newtccr = data; @@ -1415,57 +1415,57 @@ void avr8_device::timer1_tick() void avr8_device::update_timer_waveform_gen_mode(UINT8 t, UINT8 mode) { - INT32 oc_val = -1, ic_val = -1; - - switch (t){ - case 0: - oc_val = AVR8_OCR0A; - ic_val = -1; - break; - case 1: - oc_val = AVR8_OCR1A; - ic_val = AVR8_ICR1; - break; - case 2: - oc_val = AVR8_OCR2A; - ic_val = -1; - break; - case 3: - oc_val = AVR8_OCR3A; - ic_val = AVR8_ICR3; - break; - case 4: - oc_val = AVR8_OCR4A; - ic_val = AVR8_ICR4; - break; - case 5: - oc_val = AVR8_OCR5A; - ic_val = AVR8_ICR5; - break; - } - - INT32 top_values_02[8] = {0xFF, 0xFF, oc_val, 0xFF, -1, oc_val, -1, oc_val}; //table 20-8 - - INT32 top_values_1345[16] = {0xFFFF, 0x00FF, 0x01FF, 0x03FF, - oc_val, 0x00FF, 0x01FF, 0x03FF, - ic_val, oc_val, ic_val, oc_val, - ic_val, -1, ic_val, oc_val}; //table 17-2 - - switch(t){ - case 0: - case 2: - m_timer_top[t] = top_values_02[mode]; - break; - case 1: - case 3: - case 4: - case 5: - m_timer_top[t] = top_values_1345[mode]; - break; - } - - if (m_timer_top[t] == -1){ - m_timer_top[t] = 0; + INT32 oc_val = -1, ic_val = -1; + + switch (t){ + case 0: + oc_val = AVR8_OCR0A; + ic_val = -1; + break; + case 1: + oc_val = AVR8_OCR1A; + ic_val = AVR8_ICR1; + break; + case 2: + oc_val = AVR8_OCR2A; + ic_val = -1; + break; + case 3: + oc_val = AVR8_OCR3A; + ic_val = AVR8_ICR3; + break; + case 4: + oc_val = AVR8_OCR4A; + ic_val = AVR8_ICR4; + break; + case 5: + oc_val = AVR8_OCR5A; + ic_val = AVR8_ICR5; + break; + } + + INT32 top_values_02[8] = {0xFF, 0xFF, oc_val, 0xFF, -1, oc_val, -1, oc_val}; //table 20-8 + + INT32 top_values_1345[16] = {0xFFFF, 0x00FF, 0x01FF, 0x03FF, + oc_val, 0x00FF, 0x01FF, 0x03FF, + ic_val, oc_val, ic_val, oc_val, + ic_val, -1, ic_val, oc_val}; //table 17-2 + + switch(t){ + case 0: + case 2: + m_timer_top[t] = top_values_02[mode]; + break; + case 1: + case 3: + case 4: + case 5: + m_timer_top[t] = top_values_1345[mode]; + break; + } + + if (m_timer_top[t] == -1){ + m_timer_top[t] = 0; printf("update_timer_waveform_gen_mode: Timer #%d - Unsupported waveform generation type: %d\n", t, mode); } } @@ -1497,7 +1497,7 @@ void avr8_device::update_timer1_input_edge_select() void avr8_device::changed_tccr1b(UINT8 data) { - if (VERBOSE_LEVEL) printf("changed_tccr1b: data=0x%02X\n", data); + if (VERBOSE_LEVEL) printf("changed_tccr1b: data=0x%02X\n", data); UINT8 oldtccr = AVR8_TCCR1B; UINT8 newtccr = data; @@ -1651,7 +1651,7 @@ void avr8_device::timer2_force_output_compare(int reg) void avr8_device::changed_tccr2b(UINT8 data) { - if (VERBOSE_LEVEL) printf("changed_tccr2b: data=0x%02X\n", data); + if (VERBOSE_LEVEL) printf("changed_tccr2b: data=0x%02X\n", data); UINT8 oldtccr = AVR8_TCCR2B; UINT8 newtccr = data; @@ -1711,8 +1711,8 @@ void avr8_device::timer4_tick() //(m_r[AVR8_REGIDX_TCCR1A] & AVR8_TCCR1A_COM1B_MASK) >> AVR8_TCCR1A_COM1B_SHIFT }; UINT16 ocr4[2] = { (m_r[AVR8_REGIDX_OCR4AH] << 8) | m_r[AVR8_REGIDX_OCR4AL], (m_r[AVR8_REGIDX_OCR4BH] << 8) | m_r[AVR8_REGIDX_OCR4BL] }; -//TODO UINT8 ocf4[2] = { (1 << AVR8_TIFR4_OCF4A_SHIFT), (1 << AVR8_TIFR4_OCF4B_SHIFT) }; -//TODO UINT8 int4[2] = { AVR8_INTIDX_OCF4A, AVR8_INTIDX_OCF4B }; +//TODO UINT8 ocf4[2] = { (1 << AVR8_TIFR4_OCF4A_SHIFT), (1 << AVR8_TIFR4_OCF4B_SHIFT) }; +//TODO UINT8 int4[2] = { AVR8_INTIDX_OCF4A, AVR8_INTIDX_OCF4B }; INT32 increment = m_timer_increment[4]; switch(AVR8_WGM4) @@ -1720,38 +1720,38 @@ void avr8_device::timer4_tick() case WGM4_FAST_PWM_8: case WGM4_FAST_PWM_9: case WGM4_FAST_PWM_10: - switch(AVR8_TCCR4A_COM4B){ - case 0: /* Normal Operation */ - break; - case 1: /* TODO */ - break; - case 2: /* Non-inverting mode */ - if (count == m_timer_top[4]){ - //Clear OC0B - printf("[2] Clear OC0B\n"); - m_io->write_byte(AVR8_IO_PORTG, m_io->read_byte(AVR8_IO_PORTG) & ~(1 << 5)); - } else if (count == 0){ - //Set OC0B - printf("[2] Set OC0B\n"); - m_io->write_byte(AVR8_IO_PORTG, m_io->read_byte(AVR8_IO_PORTG) | (1 << 5)); - } - break; - case 3: /* Inverting mode */ - if (count == m_timer_top[4]){ - //Set OC0B - printf("[3] Set OC0B\n"); - m_io->write_byte(AVR8_IO_PORTG, m_io->read_byte(AVR8_IO_PORTG) | (1 << 5)); - } else if (count == 0){ - //Clear OC0B - printf("[3] Clear OC0B\n"); - m_io->write_byte(AVR8_IO_PORTG, m_io->read_byte(AVR8_IO_PORTG) & ~(1 << 5)); - } - break; - } - break; + switch(AVR8_TCCR4A_COM4B){ + case 0: /* Normal Operation */ + break; + case 1: /* TODO */ + break; + case 2: /* Non-inverting mode */ + if (count == m_timer_top[4]){ + //Clear OC0B + printf("[2] Clear OC0B\n"); + m_io->write_byte(AVR8_IO_PORTG, m_io->read_byte(AVR8_IO_PORTG) & ~(1 << 5)); + } else if (count == 0){ + //Set OC0B + printf("[2] Set OC0B\n"); + m_io->write_byte(AVR8_IO_PORTG, m_io->read_byte(AVR8_IO_PORTG) | (1 << 5)); + } + break; + case 3: /* Inverting mode */ + if (count == m_timer_top[4]){ + //Set OC0B + printf("[3] Set OC0B\n"); + m_io->write_byte(AVR8_IO_PORTG, m_io->read_byte(AVR8_IO_PORTG) | (1 << 5)); + } else if (count == 0){ + //Clear OC0B + printf("[3] Clear OC0B\n"); + m_io->write_byte(AVR8_IO_PORTG, m_io->read_byte(AVR8_IO_PORTG) & ~(1 << 5)); + } + break; + } + break; case WGM4_CTC_OCR: - //printf("[T4] tick WGM4_CTC_OCR: %d\n", count); + //printf("[T4] tick WGM4_CTC_OCR: %d\n", count); if (count == 0xffff) { m_r[AVR8_REGIDX_TIFR4] |= AVR8_TIFR4_TOV4_MASK; @@ -1785,15 +1785,15 @@ void avr8_device::timer4_tick() void avr8_device::update_timer_clock_source(UINT8 t, UINT8 clock_select) { - int prescale_values[8] = {0, 1, 8, 64, 256, 1024, -1, -1}; + int prescale_values[8] = {0, 1, 8, 64, 256, 1024, -1, -1}; m_timer_prescale[t] = prescale_values[clock_select]; - if (VERBOSE_LEVEL) printf("update_timer_clock_source: t=%d cs=%d\n", t, clock_select); + if (VERBOSE_LEVEL) printf("update_timer_clock_source: t=%d cs=%d\n", t, clock_select); - if (m_timer_prescale[t] == 0xFFFF){ - printf("[Timer #%d]: update_timer_clock_source: External trigger mode not implemented yet\n", t); - m_timer_prescale[t] = 0; - } + if (m_timer_prescale[t] == 0xFFFF){ + printf("[Timer #%d]: update_timer_clock_source: External trigger mode not implemented yet\n", t); + m_timer_prescale[t] = 0; + } if (m_timer_prescale_count[t] > m_timer_prescale[t]) m_timer_prescale_count[t] = m_timer_prescale[t] - 1; @@ -1801,25 +1801,25 @@ void avr8_device::update_timer_clock_source(UINT8 t, UINT8 clock_select) void avr8_device::changed_tccr3a(UINT8 data) { - //TODO: Implement-me -// AVR8_TCCR3A = data; + //TODO: Implement-me +// AVR8_TCCR3A = data; } void avr8_device::changed_tccr3b(UINT8 data) { - printf("IMPLEMENT-ME: changed_tccr4b: data=0x%02X\n", data); + printf("IMPLEMENT-ME: changed_tccr4b: data=0x%02X\n", data); } void avr8_device::changed_tccr3c(UINT8 data) { -// UINT8 oldtccr = AVR8_TCCR3C; -// UINT8 newtccr = data; -// UINT8 changed = newtccr ^ oldtccr; - printf("IMPLEMENT-ME: changed_tccr3c: data=0x%02X\n", data); +// UINT8 oldtccr = AVR8_TCCR3C; +// UINT8 newtccr = data; +// UINT8 changed = newtccr ^ oldtccr; + printf("IMPLEMENT-ME: changed_tccr3c: data=0x%02X\n", data); -// AVR8_TCCR3C = data; +// AVR8_TCCR3C = data; - //TODO: Implement-me + //TODO: Implement-me } void avr8_device::changed_tccr4a(UINT8 data) @@ -1838,7 +1838,7 @@ void avr8_device::changed_tccr4a(UINT8 data) void avr8_device::changed_tccr4b(UINT8 data) { - printf("changed_tccr4b: data=0x%02X\n", data); + printf("changed_tccr4b: data=0x%02X\n", data); UINT8 oldtccr = AVR8_TCCR4B; UINT8 newtccr = data; @@ -1849,13 +1849,13 @@ void avr8_device::changed_tccr4b(UINT8 data) if(changed & AVR8_TCCR4B_FOC4A_MASK) { // TODO -// timer4_force_output_compare(AVR8_REG_A); +// timer4_force_output_compare(AVR8_REG_A); } if(changed & AVR8_TCCR4B_FOC4B_MASK) { // TODO -// timer4_force_output_compare(AVR8_REG_B); +// timer4_force_output_compare(AVR8_REG_B); } if(changed & AVR8_TCCR4B_WGM4_32_MASK) @@ -1871,13 +1871,13 @@ void avr8_device::changed_tccr4b(UINT8 data) void avr8_device::changed_tccr4c(UINT8 data) { -// UINT8 oldtccr = AVR8_TCCR4C; -// UINT8 newtccr = data; -// UINT8 changed = newtccr ^ oldtccr; +// UINT8 oldtccr = AVR8_TCCR4C; +// UINT8 newtccr = data; +// UINT8 changed = newtccr ^ oldtccr; AVR8_TCCR4C = data; - //TODO: Implement-me + //TODO: Implement-me } /************************************************************************************************/ @@ -1886,8 +1886,8 @@ void avr8_device::changed_tccr4c(UINT8 data) void avr8_device::timer5_tick() { #if LOG_TIMER_5 - printf("AVR8_WGM5: %d\n", AVR8_WGM5); - printf("AVR8_TCCR5A_COM5B: %d\n", AVR8_TCCR5A_COM5B); + printf("AVR8_WGM5: %d\n", AVR8_WGM5); + printf("AVR8_TCCR5A_COM5B: %d\n", AVR8_TCCR5A_COM5B); #endif UINT16 count = (AVR8_TCNT5H << 8) + AVR8_TCNT5L; @@ -1896,64 +1896,64 @@ void avr8_device::timer5_tick() switch(AVR8_WGM5) { case WGM5_NORMAL: - case WGM5_PWM_8_PC: - case WGM5_PWM_9_PC: - case WGM5_PWM_10_PC: + case WGM5_PWM_8_PC: + case WGM5_PWM_9_PC: + case WGM5_PWM_10_PC: // case WGM5_CTC_OCR: - case WGM5_FAST_PWM_8: - case WGM5_FAST_PWM_9: - case WGM5_FAST_PWM_10: - case WGM5_PWM_PFC_ICR: - case WGM5_PWM_PFC_OCR: - case WGM5_PWM_PC_ICR: - case WGM5_PWM_PC_OCR: - case WGM5_CTC_ICR: - case WGM5_FAST_PWM_ICR: - case WGM5_FAST_PWM_OCR: - printf("Unimplemented timer#5 waveform generation mode: WGMM5=0x%02X\n", AVR8_WGM5); - break; + case WGM5_FAST_PWM_8: + case WGM5_FAST_PWM_9: + case WGM5_FAST_PWM_10: + case WGM5_PWM_PFC_ICR: + case WGM5_PWM_PFC_OCR: + case WGM5_PWM_PC_ICR: + case WGM5_PWM_PC_OCR: + case WGM5_CTC_ICR: + case WGM5_FAST_PWM_ICR: + case WGM5_FAST_PWM_OCR: + printf("Unimplemented timer#5 waveform generation mode: WGMM5=0x%02X\n", AVR8_WGM5); + break; case WGM5_CTC_OCR: - //TODO: verify this! Can be very wrong!!! - switch(AVR8_TCCR5A_COM5B){ - case 0: /* Normal Operation */ - if (count == m_timer_top[5]){ - m_timer_top[5] = 0; - } - break; - case 1: /* Toggle OC5B on compare match */ - if (count == m_timer_top[5]){ - m_timer_top[5] = 0; + //TODO: verify this! Can be very wrong!!! + switch(AVR8_TCCR5A_COM5B){ + case 0: /* Normal Operation */ + if (count == m_timer_top[5]){ + m_timer_top[5] = 0; + } + break; + case 1: /* Toggle OC5B on compare match */ + if (count == m_timer_top[5]){ + m_timer_top[5] = 0; #if LOG_TIMER_5 - printf("[5] Toggle OC5B\n"); + printf("[5] Toggle OC5B\n"); #endif - m_io->write_byte(AVR8_IO_PORTL, m_io->read_byte(AVR8_IO_PORTL) ^ (1 << 4)); - } - break; - case 2: /* Clear OC5B on compare match */ - if (count == m_timer_top[5]){ - m_timer_top[5] = 0; - //Clear OC5B + m_io->write_byte(AVR8_IO_PORTL, m_io->read_byte(AVR8_IO_PORTL) ^ (1 << 4)); + } + break; + case 2: /* Clear OC5B on compare match */ + if (count == m_timer_top[5]){ + m_timer_top[5] = 0; + //Clear OC5B #if LOG_TIMER_5 - printf("[5] Clear OC5B\n"); + printf("[5] Clear OC5B\n"); #endif - m_io->write_byte(AVR8_IO_PORTL, m_io->read_byte(AVR8_IO_PORTL) & ~(1 << 4)); - } - break; - case 3: /* Set OC5B on compare match */ - if (count == m_timer_top[5]){ - m_timer_top[5] = 0; + m_io->write_byte(AVR8_IO_PORTL, m_io->read_byte(AVR8_IO_PORTL) & ~(1 << 4)); + } + break; + case 3: /* Set OC5B on compare match */ + if (count == m_timer_top[5]){ + m_timer_top[5] = 0; #if LOG_TIMER_5 - printf("[5] Set OC5B\n"); + printf("[5] Set OC5B\n"); #endif - m_io->write_byte(AVR8_IO_PORTL, m_io->read_byte(AVR8_IO_PORTL) | (1 << 4)); - } - break; - } - break; + m_io->write_byte(AVR8_IO_PORTL, m_io->read_byte(AVR8_IO_PORTL) | (1 << 4)); + } + break; + } + break; default: - printf("Timer #5: Unknown waveform generation mode: %02x\n", AVR8_WGM5); + printf("Timer #5: Unknown waveform generation mode: %02x\n", AVR8_WGM5); break; } @@ -1978,7 +1978,7 @@ void avr8_device::changed_tccr5a(UINT8 data) void avr8_device::changed_tccr5b(UINT8 data) { - printf("changed_tccr5b: data=0x%02X\n", data); + printf("changed_tccr5b: data=0x%02X\n", data); UINT8 oldtccr = AVR8_TCCR5B; UINT8 newtccr = data; @@ -1989,19 +1989,19 @@ void avr8_device::changed_tccr5b(UINT8 data) if(changed & AVR8_TCCR5C_FOC5A_MASK) { // TODO -// timer5_force_output_compare(AVR8_REG_A); +// timer5_force_output_compare(AVR8_REG_A); } if(changed & AVR8_TCCR5C_FOC5B_MASK) { // TODO -// timer5_force_output_compare(AVR8_REG_B); +// timer5_force_output_compare(AVR8_REG_B); } if(changed & AVR8_TCCR5C_FOC5C_MASK) { // TODO -// timer5_force_output_compare(AVR8_REG_C); +// timer5_force_output_compare(AVR8_REG_C); } if(changed & AVR8_TCCR5B_WGM5_32_MASK) @@ -2160,66 +2160,66 @@ WRITE8_MEMBER( avr8_device::regs_w ) break; case AVR8_REGIDX_PORTA: - m_io->write_byte(AVR8_IO_PORTA, data); - m_r[AVR8_REGIDX_PORTA] = data; - break; + m_io->write_byte(AVR8_IO_PORTA, data); + m_r[AVR8_REGIDX_PORTA] = data; + break; case AVR8_REGIDX_PORTB: - m_io->write_byte(AVR8_IO_PORTB, data); - m_r[AVR8_REGIDX_PORTB] = data; - break; + m_io->write_byte(AVR8_IO_PORTB, data); + m_r[AVR8_REGIDX_PORTB] = data; + break; case AVR8_REGIDX_PORTC: - m_io->write_byte(AVR8_IO_PORTC, data); - m_r[AVR8_REGIDX_PORTC] = data; - break; + m_io->write_byte(AVR8_IO_PORTC, data); + m_r[AVR8_REGIDX_PORTC] = data; + break; case AVR8_REGIDX_PORTD: - m_io->write_byte(AVR8_IO_PORTD, data); - m_r[AVR8_REGIDX_PORTD] = data; - break; + m_io->write_byte(AVR8_IO_PORTD, data); + m_r[AVR8_REGIDX_PORTD] = data; + break; case AVR8_REGIDX_PORTE: - m_io->write_byte(AVR8_IO_PORTE, data); - m_r[AVR8_REGIDX_PORTE] = data; - break; + m_io->write_byte(AVR8_IO_PORTE, data); + m_r[AVR8_REGIDX_PORTE] = data; + break; case AVR8_REGIDX_PORTF: - m_io->write_byte(AVR8_IO_PORTF, data); - m_r[AVR8_REGIDX_PORTF] = data; - break; + m_io->write_byte(AVR8_IO_PORTF, data); + m_r[AVR8_REGIDX_PORTF] = data; + break; case AVR8_REGIDX_PORTG: - m_io->write_byte(AVR8_IO_PORTG, data); - m_r[AVR8_REGIDX_PORTG] = data; - break; + m_io->write_byte(AVR8_IO_PORTG, data); + m_r[AVR8_REGIDX_PORTG] = data; + break; case AVR8_REGIDX_PORTH: - m_io->write_byte(AVR8_IO_PORTH, data); - m_r[AVR8_REGIDX_PORTH] = data; - break; + m_io->write_byte(AVR8_IO_PORTH, data); + m_r[AVR8_REGIDX_PORTH] = data; + break; case AVR8_REGIDX_PORTJ: - m_io->write_byte(AVR8_IO_PORTJ, data); - m_r[AVR8_REGIDX_PORTJ] = data; - break; + m_io->write_byte(AVR8_IO_PORTJ, data); + m_r[AVR8_REGIDX_PORTJ] = data; + break; case AVR8_REGIDX_PORTK: - m_io->write_byte(AVR8_IO_PORTK, data); - m_r[AVR8_REGIDX_PORTK] = data; - break; + m_io->write_byte(AVR8_IO_PORTK, data); + m_r[AVR8_REGIDX_PORTK] = data; + break; case AVR8_REGIDX_PORTL: - m_io->write_byte(AVR8_IO_PORTL, data); - m_r[AVR8_REGIDX_PORTL] = data; - break; + m_io->write_byte(AVR8_IO_PORTL, data); + m_r[AVR8_REGIDX_PORTL] = data; + break; case AVR8_REGIDX_DDRA: case AVR8_REGIDX_DDRB: case AVR8_REGIDX_DDRC: case AVR8_REGIDX_DDRD: case AVR8_REGIDX_SREG: - case AVR8_REGIDX_RAMPZ: + case AVR8_REGIDX_RAMPZ: case AVR8_REGIDX_SPH: case AVR8_REGIDX_SPL: m_r[offset] = data; @@ -2287,7 +2287,7 @@ WRITE8_MEMBER( avr8_device::regs_w ) case AVR8_REGIDX_EEARH: case AVR8_REGIDX_EEDR: m_r[offset] = data; - break; + break; case AVR8_REGIDX_EECR: m_r[offset] = data; @@ -2297,17 +2297,17 @@ WRITE8_MEMBER( avr8_device::regs_w ) UINT16 addr = (m_r[AVR8_REGIDX_EEARH] & AVR8_EEARH_MASK) << 8; addr |= m_r[AVR8_REGIDX_EEARL]; m_r[AVR8_REGIDX_EEDR] = m_eeprom[addr]; - if (VERBOSE_LEVEL) printf("EEPROM read @ 0x%04x data = 0x%02x\n", addr, m_eeprom[addr]); + if (VERBOSE_LEVEL) printf("EEPROM read @ 0x%04x data = 0x%02x\n", addr, m_eeprom[addr]); } if ((data & AVR8_EECR_EEPE_MASK) && (data & AVR8_EECR_EEMPE_MASK)) { UINT16 addr = (m_r[AVR8_REGIDX_EEARH] & AVR8_EEARH_MASK) << 8; addr |= m_r[AVR8_REGIDX_EEARL]; m_eeprom[addr] = m_r[AVR8_REGIDX_EEDR]; - if (VERBOSE_LEVEL) printf("EEPROM write @ 0x%04x data = 0x%02x ('%c')\n", addr, m_eeprom[addr], m_eeprom[addr]); + if (VERBOSE_LEVEL) printf("EEPROM write @ 0x%04x data = 0x%02x ('%c')\n", addr, m_eeprom[addr], m_eeprom[addr]); - m_r[offset] = data & ~AVR8_EECR_EEPE_MASK; //indicates that we've finished writing a value to the EEPROM. - //TODO: shouldn't this happen only after a certain dalay? + m_r[offset] = data & ~AVR8_EECR_EEPE_MASK; //indicates that we've finished writing a value to the EEPROM. + //TODO: shouldn't this happen only after a certain dalay? } break; @@ -2338,60 +2338,60 @@ WRITE8_MEMBER( avr8_device::regs_w ) break; } - case AVR8_REGIDX_WDTCSR: + case AVR8_REGIDX_WDTCSR: verboselog(m_pc, 0, "AVR8: WDTCSR = %02x\n", data ); - //TODO: changed_wdtcsr(data); - break; + //TODO: changed_wdtcsr(data); + break; - case AVR8_REGIDX_CLKPR: + case AVR8_REGIDX_CLKPR: verboselog(m_pc, 0, "AVR8: CLKPR = %02x\n", data ); - //TODO: changed_clkpr(data); - break; + //TODO: changed_clkpr(data); + break; - case AVR8_REGIDX_PRR0: + case AVR8_REGIDX_PRR0: verboselog(m_pc, 0, "AVR8: PRR0 = %02x\n", data ); - //TODO: changed_prr0(data); - break; + //TODO: changed_prr0(data); + break; - case AVR8_REGIDX_PRR1: + case AVR8_REGIDX_PRR1: verboselog(m_pc, 0, "AVR8: PRR1 = %02x\n", data ); - //TODO: changed_prr1(data); - break; + //TODO: changed_prr1(data); + break; - case AVR8_REGIDX_OSCCAL: + case AVR8_REGIDX_OSCCAL: verboselog(m_pc, 0, "AVR8: OSCCAL = %02x\n", data ); - //TODO: changed_osccal(data); - break; + //TODO: changed_osccal(data); + break; - case AVR8_REGIDX_PCICR: + case AVR8_REGIDX_PCICR: verboselog(m_pc, 0, "AVR8: PCICR = %02x\n", data ); - //TODO: changed_pcicr(data); - break; + //TODO: changed_pcicr(data); + break; - case AVR8_REGIDX_EICRA: + case AVR8_REGIDX_EICRA: verboselog(m_pc, 0, "AVR8: EICRA = %02x\n", data ); - //TODO: changed_eicra(data); - break; + //TODO: changed_eicra(data); + break; - case AVR8_REGIDX_EICRB: + case AVR8_REGIDX_EICRB: verboselog(m_pc, 0, "AVR8: EICRB = %02x\n", data ); - //TODO: changed_eicrb(data); - break; + //TODO: changed_eicrb(data); + break; - case AVR8_REGIDX_PCMSK0: + case AVR8_REGIDX_PCMSK0: verboselog(m_pc, 0, "AVR8: PCMSK0 = %02x\n", data ); - //TODO: changed_pcmsk0(data); - break; + //TODO: changed_pcmsk0(data); + break; - case AVR8_REGIDX_PCMSK1: + case AVR8_REGIDX_PCMSK1: verboselog(m_pc, 0, "AVR8: PCMSK1 = %02x\n", data ); - //TODO: changed_pcmsk1(data); - break; + //TODO: changed_pcmsk1(data); + break; - case AVR8_REGIDX_PCMSK2: + case AVR8_REGIDX_PCMSK2: verboselog(m_pc, 0, "AVR8: PCMSK2 = %02x\n", data ); - //TODO: changed_pcmsk2(data); - break; + //TODO: changed_pcmsk2(data); + break; case AVR8_REGIDX_TIMSK0: verboselog(m_pc, 0, "AVR8: TIMSK0 = %02x\n", data ); @@ -2442,55 +2442,55 @@ WRITE8_MEMBER( avr8_device::regs_w ) update_interrupt(AVR8_INTIDX_TOV5); break; - case AVR8_REGIDX_XMCRA: + case AVR8_REGIDX_XMCRA: verboselog(m_pc, 0, "AVR8: XMCRA = %02x\n", data ); - //TODO: changed_xmcra(data); - break; + //TODO: changed_xmcra(data); + break; - case AVR8_REGIDX_XMCRB: + case AVR8_REGIDX_XMCRB: verboselog(m_pc, 0, "AVR8: XMCRB = %02x\n", data ); - //TODO: changed_xmcrb(data); - break; + //TODO: changed_xmcrb(data); + break; - case AVR8_REGIDX_ADCL: + case AVR8_REGIDX_ADCL: verboselog(m_pc, 0, "AVR8: ADCL = %02x\n", data ); - //TODO: changed_adcl(data); - break; + //TODO: changed_adcl(data); + break; - case AVR8_REGIDX_ADCH: + case AVR8_REGIDX_ADCH: verboselog(m_pc, 0, "AVR8: ADCH = %02x\n", data ); - //TODO: changed_adch(data); - break; + //TODO: changed_adch(data); + break; - case AVR8_REGIDX_ADCSRA: + case AVR8_REGIDX_ADCSRA: verboselog(m_pc, 0, "AVR8: ADCSRA = %02x\n", data ); - //TODO: changed_adcsra(data); - break; + //TODO: changed_adcsra(data); + break; - case AVR8_REGIDX_ADCSRB: + case AVR8_REGIDX_ADCSRB: verboselog(m_pc, 0, "AVR8: ADCSRB = %02x\n", data ); - //TODO: changed_adcsrb(data); - break; + //TODO: changed_adcsrb(data); + break; - case AVR8_REGIDX_ADMUX: + case AVR8_REGIDX_ADMUX: verboselog(m_pc, 0, "AVR8: ADMUX = %02x\n", data ); - //TODO: changed_admux(data); - break; + //TODO: changed_admux(data); + break; - case AVR8_REGIDX_DIDR0: + case AVR8_REGIDX_DIDR0: verboselog(m_pc, 0, "AVR8: DIDR0 = %02x\n", data ); - //TODO: changed_didr0(data); - break; + //TODO: changed_didr0(data); + break; - case AVR8_REGIDX_DIDR1: + case AVR8_REGIDX_DIDR1: verboselog(m_pc, 0, "AVR8: DIDR1 = %02x\n", data ); - //TODO: changed_didr1(data); - break; + //TODO: changed_didr1(data); + break; - case AVR8_REGIDX_DIDR2: + case AVR8_REGIDX_DIDR2: verboselog(m_pc, 0, "AVR8: DIDR2 = %02x\n", data ); - //TODO: changed_didr2(data); - break; + //TODO: changed_didr2(data); + break; case AVR8_REGIDX_TCCR1A: verboselog(m_pc, 0, "AVR8: TCCR1A = %02x\n", data ); @@ -2577,17 +2577,17 @@ WRITE8_MEMBER( avr8_device::regs_w ) case AVR8_REGIDX_TCCR3A: verboselog(m_pc, 0, "AVR8: TCCR3A = %02x\n", data ); - changed_tccr3a(data); + changed_tccr3a(data); break; case AVR8_REGIDX_TCCR3B: verboselog(m_pc, 0, "AVR8: TCCR3B = %02x\n", data ); - changed_tccr3b(data); + changed_tccr3b(data); break; case AVR8_REGIDX_TCCR3C: verboselog(m_pc, 0, "AVR8: TCCR3C = %02x\n", data ); - changed_tccr3c(data); + changed_tccr3c(data); break; case AVR8_REGIDX_TCNT3L: @@ -2632,17 +2632,17 @@ WRITE8_MEMBER( avr8_device::regs_w ) case AVR8_REGIDX_TCCR4A: verboselog(m_pc, 0, "AVR8: TCCR4A = %02x\n", data ); - changed_tccr4a(data); + changed_tccr4a(data); break; case AVR8_REGIDX_TCCR4B: verboselog(m_pc, 0, "AVR8: TCCR4B = %02x\n", data ); - changed_tccr4b(data); + changed_tccr4b(data); break; case AVR8_REGIDX_TCCR4C: verboselog(m_pc, 0, "AVR8: TCCR4C = %02x\n", data ); - changed_tccr4c(data); + changed_tccr4c(data); break; case AVR8_REGIDX_TCNT4L: @@ -2687,12 +2687,12 @@ WRITE8_MEMBER( avr8_device::regs_w ) case AVR8_REGIDX_TCCR5A: verboselog(m_pc, 0, "AVR8: TCCR5A = %02x\n", data ); - changed_tccr5a(data); + changed_tccr5a(data); break; case AVR8_REGIDX_TCCR5B: verboselog(m_pc, 0, "AVR8: TCCR5B = %02x\n", data ); - changed_tccr5b(data); + changed_tccr5b(data); break; case AVR8_REGIDX_ASSR: @@ -2723,7 +2723,7 @@ WRITE8_MEMBER( avr8_device::regs_w ) case AVR8_REGIDX_TWCR: verboselog(m_pc, 0, "AVR8: TWCR = %02x\n", data ); //TODO: changed_twcr(data); - m_r[AVR8_REGIDX_TWCR] = data; + m_r[AVR8_REGIDX_TWCR] = data; break; case AVR8_REGIDX_TWAMR: @@ -2746,10 +2746,10 @@ WRITE8_MEMBER( avr8_device::regs_w ) //TODO: changed_ucsr0c(data); break; /* - case AVR8_REGIDX_: - verboselog(m_pc, 0, "AVR8: = %02x\n", data ); - //TODO: changed_(data); - break; + case AVR8_REGIDX_: + verboselog(m_pc, 0, "AVR8: = %02x\n", data ); + //TODO: changed_(data); + break; */ default: verboselog(m_pc, 0, "AVR8: Unknown Register Write: %03x = %02x\n", offset, data); @@ -2759,7 +2759,7 @@ WRITE8_MEMBER( avr8_device::regs_w ) READ8_MEMBER( avr8_device::regs_r ) { -// printf("--- READ offset %04x ---\n", offset); +// printf("--- READ offset %04x ---\n", offset); switch( offset ) { @@ -2798,48 +2798,48 @@ READ8_MEMBER( avr8_device::regs_r ) return m_r[offset]; case AVR8_REGIDX_PINA: - // TODO: consider the DDRA - return m_io->read_byte(AVR8_REG_A); + // TODO: consider the DDRA + return m_io->read_byte(AVR8_REG_A); case AVR8_REGIDX_PINB: - // TODO: consider the DDRB - return m_io->read_byte(AVR8_REG_B); + // TODO: consider the DDRB + return m_io->read_byte(AVR8_REG_B); case AVR8_REGIDX_PINC: - // TODO: consider the DDRC - return m_io->read_byte(AVR8_REG_C); + // TODO: consider the DDRC + return m_io->read_byte(AVR8_REG_C); case AVR8_REGIDX_PIND: - // TODO: consider the DDRD - return m_io->read_byte(AVR8_REG_D); + // TODO: consider the DDRD + return m_io->read_byte(AVR8_REG_D); case AVR8_REGIDX_PINE: - // TODO: consider the DDRE - return m_io->read_byte(AVR8_REG_E); + // TODO: consider the DDRE + return m_io->read_byte(AVR8_REG_E); case AVR8_REGIDX_PINF: - // TODO: consider the DDRF - return m_io->read_byte(AVR8_REG_F); + // TODO: consider the DDRF + return m_io->read_byte(AVR8_REG_F); case AVR8_REGIDX_PING: - // TODO: consider the DDRG - return m_io->read_byte(AVR8_REG_G); + // TODO: consider the DDRG + return m_io->read_byte(AVR8_REG_G); case AVR8_REGIDX_PINH: - // TODO: consider the DDRH - return m_io->read_byte(AVR8_REG_H); + // TODO: consider the DDRH + return m_io->read_byte(AVR8_REG_H); case AVR8_REGIDX_PINJ: - // TODO: consider the DDRJ - return m_io->read_byte(AVR8_REG_J); + // TODO: consider the DDRJ + return m_io->read_byte(AVR8_REG_J); case AVR8_REGIDX_PINK: - // TODO: consider the DDRK - return m_io->read_byte(AVR8_REG_K); + // TODO: consider the DDRK + return m_io->read_byte(AVR8_REG_K); case AVR8_REGIDX_PINL: - // TODO: consider the DDRL - return m_io->read_byte(AVR8_REG_L); + // TODO: consider the DDRL + return m_io->read_byte(AVR8_REG_L); case AVR8_REGIDX_PORTA: case AVR8_REGIDX_PORTB: @@ -2868,7 +2868,7 @@ READ8_MEMBER( avr8_device::regs_r ) return m_r[offset]; // EEPROM registers: - case AVR8_REGIDX_EECR: + case AVR8_REGIDX_EECR: case AVR8_REGIDX_EEDR: return m_r[offset]; @@ -2878,7 +2878,7 @@ READ8_MEMBER( avr8_device::regs_r ) case AVR8_REGIDX_GPIOR0: case AVR8_REGIDX_GPIOR1: case AVR8_REGIDX_GPIOR2: -// case AVR8_REGIDX_UCSR0B:/*TODO: needed for Replicator 1 */ +// case AVR8_REGIDX_UCSR0B:/*TODO: needed for Replicator 1 */ case AVR8_REGIDX_SPDR: /*TODO: needed for Replicator 1 */ case AVR8_REGIDX_SPSR: /*TODO: needed for Replicator 1 */ // case AVR8_REGIDX_ADCSRA: /*TODO: needed for Replicator 1 */ @@ -2886,23 +2886,23 @@ READ8_MEMBER( avr8_device::regs_r ) case AVR8_REGIDX_SPL: case AVR8_REGIDX_SPH: case AVR8_REGIDX_SREG: - case AVR8_REGIDX_TIMSK0: - case AVR8_REGIDX_TIMSK1: - case AVR8_REGIDX_TIMSK2: + case AVR8_REGIDX_TIMSK0: + case AVR8_REGIDX_TIMSK1: + case AVR8_REGIDX_TIMSK2: // case AVR8_REGIDX_TIMSK3: /*TODO: needed for Replicator 1 */ - case AVR8_REGIDX_TIMSK4: - case AVR8_REGIDX_TIMSK5: + case AVR8_REGIDX_TIMSK4: + case AVR8_REGIDX_TIMSK5: return m_r[offset]; /* Two-wire registers: */ case AVR8_REGIDX_TWCR: - /*TODO: needed for Replicator 1 - BLOQUEIA PROGRESSO DA EXECUÇÃO DO FIRMWARE no endereço 105EC*/ + /*TODO: needed for Replicator 1 + BLOQUEIA PROGRESSO DA EXECU??O DO FIRMWARE no endere?o 105EC*/ return m_r[offset]; case AVR8_REGIDX_TWSR: - //quick hack: by returning a value != 0x08 we induce an error state that makes the object code jump out of the wait loop and continue execution failing the 2-wire write operation. - //TODO: implement-me! + //quick hack: by returning a value != 0x08 we induce an error state that makes the object code jump out of the wait loop and continue execution failing the 2-wire write operation. + //TODO: implement-me! return 0x00; /*TODO: needed for Replicator 1 */ @@ -3309,12 +3309,12 @@ void avr8_device::execute_run() break; case 0x0007: // ELPM Rd,Z+ pd32 = (m_r[AVR8_REGIDX_RAMPZ] << 16) | ZREG; - m_r[RD5(op)] = m_program->read_byte(pd32); - pd32++; - m_r[AVR8_REGIDX_RAMPZ] = (pd32 >> 16) & 0x00ff; - m_r[31] = (pd32 >> 8) & 0x00ff; + m_r[RD5(op)] = m_program->read_byte(pd32); + pd32++; + m_r[AVR8_REGIDX_RAMPZ] = (pd32 >> 16) & 0x00ff; + m_r[31] = (pd32 >> 8) & 0x00ff; m_r[30] = pd32 & 0x00ff; - opcycles = 3; + opcycles = 3; break; case 0x0009: // LD Rd,Y+ pd = YREG; @@ -3323,7 +3323,7 @@ void avr8_device::execute_run() m_r[29] = (pd >> 8) & 0x00ff; m_r[28] = pd & 0x00ff; opcycles = 2; - break; + break; case 0x000a: // LD Rd,-Y pd = YREG; pd--; @@ -3679,7 +3679,7 @@ void avr8_device::execute_run() case 0x00a0: // WDR //output += sprintf( output, "WDR" ); //unimplemented_opcode(op); //TODO: necessary for emulating the Replicator 1 - //printf("Watchdot Reset!\n"); + //printf("Watchdot Reset!\n"); opcycles = 1; break; case 0x00c0: // LPM diff --git a/src/emu/cpu/avr8/avr8.h b/src/emu/cpu/avr8/avr8.h index 9438813c17c..2a2f2ac3b88 100644 --- a/src/emu/cpu/avr8/avr8.h +++ b/src/emu/cpu/avr8/avr8.h @@ -90,7 +90,7 @@ public: // inline configuration helpers static void static_set_config(device_t &device, const avr8_config &config); - // fuse configs + // fuse configs void set_low_fuses(UINT8 byte); void set_high_fuses(UINT8 byte); void set_extended_fuses(UINT8 byte); @@ -147,15 +147,15 @@ protected: const address_space_config m_io_config; UINT8 *m_eeprom; - // bootloader + // bootloader UINT16 m_boot_size; UINT8 m_cpu_type; - // Fuses - UINT8 m_lfuses; - UINT8 m_hfuses; - UINT8 m_efuses; - UINT8 m_lock_bits; + // Fuses + UINT8 m_lfuses; + UINT8 m_hfuses; + UINT8 m_efuses; + UINT8 m_lock_bits; // CPU registers UINT32 m_pc; @@ -241,8 +241,8 @@ protected: void changed_tccr3a(UINT8 data); void changed_tccr3b(UINT8 data); void changed_tccr3c(UINT8 data); -// void update_ocr3(UINT8 newval, UINT8 reg); -// void timer3_force_output_compare(int reg); +// void update_ocr3(UINT8 newval, UINT8 reg); +// void timer3_force_output_compare(int reg); // timer 4 void timer4_tick(); @@ -256,8 +256,8 @@ protected: void timer5_tick(); void changed_tccr5a(UINT8 data); void changed_tccr5b(UINT8 data); -// void update_ocr5(UINT8 newval, UINT8 reg); -// void timer5_force_output_compare(int reg); +// void update_ocr5(UINT8 newval, UINT8 reg); +// void timer5_force_output_compare(int reg); // address spaces address_space *m_program; @@ -496,24 +496,24 @@ enum AVR8_REGIDX_TCNT0, AVR8_REGIDX_OCR0A, AVR8_REGIDX_OCR0B, - //0x49: Reserved + //0x49: Reserved AVR8_REGIDX_GPIOR1 = 0x4A, AVR8_REGIDX_GPIOR2, AVR8_REGIDX_SPCR, AVR8_REGIDX_SPSR, AVR8_REGIDX_SPDR, - //0x4F: Reserved + //0x4F: Reserved AVR8_REGIDX_ACSR = 0x50, AVR8_REGIDX_OCDR, - //0x52: Reserved + //0x52: Reserved AVR8_REGIDX_SMCR = 0x53, AVR8_REGIDX_MCUSR, AVR8_REGIDX_MCUCR, - //0x56: Reserved + //0x56: Reserved AVR8_REGIDX_SPMCSR = 0x57, - //0x58: Reserved - //0x59: Reserved - //0x5A: Reserved + //0x58: Reserved + //0x59: Reserved + //0x5A: Reserved AVR8_REGIDX_RAMPZ = 0x5B, AVR8_REGIDX_EIND, AVR8_REGIDX_SPL, @@ -522,12 +522,12 @@ enum //-------------------------- AVR8_REGIDX_WDTCSR = 0x60, AVR8_REGIDX_CLKPR, - //0x62: Reserved - //0x63: Reserved + //0x62: Reserved + //0x63: Reserved AVR8_REGIDX_PRR0 = 0x64, AVR8_REGIDX_PRR1, AVR8_REGIDX_OSCCAL, - //0x67: Reserved + //0x67: Reserved AVR8_REGIDX_PCICR = 0x68, AVR8_REGIDX_EICRA, AVR8_REGIDX_EICRB, @@ -542,8 +542,8 @@ enum AVR8_REGIDX_TIMSK5, AVR8_REGIDX_XMCRA, AVR8_REGIDX_XMCRB, - //0x76: Reserved - //0x77: Reserved + //0x76: Reserved + //0x77: Reserved AVR8_REGIDX_ADCL = 0x78, AVR8_REGIDX_ADCH, AVR8_REGIDX_ADCSRA, @@ -555,7 +555,7 @@ enum AVR8_REGIDX_TCCR1A, AVR8_REGIDX_TCCR1B, AVR8_REGIDX_TCCR1C, - //0x83: Reserved + //0x83: Reserved AVR8_REGIDX_TCNT1L = 0x84, AVR8_REGIDX_TCNT1H, AVR8_REGIDX_ICR1L, @@ -566,12 +566,12 @@ enum AVR8_REGIDX_OCR1BH, AVR8_REGIDX_OCR1CL, AVR8_REGIDX_OCR1CH, - //0x8E: Reserved - //0x8F: Reserved + //0x8E: Reserved + //0x8F: Reserved AVR8_REGIDX_TCCR3A = 0x90, AVR8_REGIDX_TCCR3B, AVR8_REGIDX_TCCR3C, - //0x93: Reserved + //0x93: Reserved AVR8_REGIDX_TCNT3L = 0x94, AVR8_REGIDX_TCNT3H, AVR8_REGIDX_ICR3L, @@ -582,12 +582,12 @@ enum AVR8_REGIDX_OCR3BH, AVR8_REGIDX_OCR3CL, AVR8_REGIDX_OCR3CH, - //0x9E: Reserved - //0x9F: Reserved + //0x9E: Reserved + //0x9F: Reserved AVR8_REGIDX_TCCR4A = 0xA0, AVR8_REGIDX_TCCR4B, AVR8_REGIDX_TCCR4C, - //0xA3: Reserved + //0xA3: Reserved AVR8_REGIDX_TCNT4L = 0xA4, AVR8_REGIDX_TCNT4H, AVR8_REGIDX_ICR4L, @@ -598,88 +598,88 @@ enum AVR8_REGIDX_OCR4BH, AVR8_REGIDX_OCR4CL, AVR8_REGIDX_OCR4CH, - //0xAE: Reserved - //0xAF: Reserved + //0xAE: Reserved + //0xAF: Reserved AVR8_REGIDX_TCCR2A = 0xB0, AVR8_REGIDX_TCCR2B, AVR8_REGIDX_TCNT2, AVR8_REGIDX_OCR2A, AVR8_REGIDX_OCR2B, - //0xB5: Reserved + //0xB5: Reserved AVR8_REGIDX_ASSR = 0xB6, - //0xB7: Reserved + //0xB7: Reserved AVR8_REGIDX_TWBR = 0xB8, AVR8_REGIDX_TWSR, AVR8_REGIDX_TWAR, AVR8_REGIDX_TWDR, AVR8_REGIDX_TWCR, AVR8_REGIDX_TWAMR, - //0xBE: Reserved - //0xBF: Reserved + //0xBE: Reserved + //0xBF: Reserved AVR8_REGIDX_UCSR0A = 0xC0, AVR8_REGIDX_UCSR0B, AVR8_REGIDX_UCSR0C, - //0xC3: Reserved + //0xC3: Reserved AVR8_REGIDX_UBRR0L = 0xC4, AVR8_REGIDX_UBRR0H, AVR8_REGIDX_UDR0, - //0xC7: Reserved + //0xC7: Reserved AVR8_REGIDX_UCSR1A = 0xC8, AVR8_REGIDX_UCSR1B, AVR8_REGIDX_UCSR1C, - //0xCB: Reserved + //0xCB: Reserved AVR8_REGIDX_UBRR1L = 0xCC, AVR8_REGIDX_UBRR1H, AVR8_REGIDX_UDR1, - //0xCF: Reserved + //0xCF: Reserved AVR8_REGIDX_UCSR2A = 0xD0, AVR8_REGIDX_UCSR2B, AVR8_REGIDX_UCSR2C, - //0xD3: Reserved + //0xD3: Reserved AVR8_REGIDX_UBRR2L = 0xD4, AVR8_REGIDX_UBRR2H, AVR8_REGIDX_UDR2, - //0xD7: Reserved - //0xD8: Reserved - //0xD9: Reserved - //0xDA: Reserved - //0xDB: Reserved - //0xDC: Reserved - //0xDD: Reserved - //0xDE: Reserved - //0xDF: Reserved - //0xE0: Reserved - //0xE1: Reserved - //0xE2: Reserved - //0xE3: Reserved - //0xE4: Reserved - //0xE5: Reserved - //0xE6: Reserved - //0xE7: Reserved - //0xE8: Reserved - //0xE9: Reserved - //0xEA: Reserved - //0xEB: Reserved - //0xEC: Reserved - //0xED: Reserved - //0xEE: Reserved - //0xEF: Reserved - //0xF0: Reserved - //0xF1: Reserved - //0xF2: Reserved - //0xF3: Reserved - //0xF4: Reserved - //0xF5: Reserved - //0xF6: Reserved - //0xF7: Reserved - //0xF8: Reserved - //0xF9: Reserved - //0xFA: Reserved - //0xFB: Reserved - //0xFC: Reserved - //0xFD: Reserved - //0xFE: Reserved - //0xFF: Reserved + //0xD7: Reserved + //0xD8: Reserved + //0xD9: Reserved + //0xDA: Reserved + //0xDB: Reserved + //0xDC: Reserved + //0xDD: Reserved + //0xDE: Reserved + //0xDF: Reserved + //0xE0: Reserved + //0xE1: Reserved + //0xE2: Reserved + //0xE3: Reserved + //0xE4: Reserved + //0xE5: Reserved + //0xE6: Reserved + //0xE7: Reserved + //0xE8: Reserved + //0xE9: Reserved + //0xEA: Reserved + //0xEB: Reserved + //0xEC: Reserved + //0xED: Reserved + //0xEE: Reserved + //0xEF: Reserved + //0xF0: Reserved + //0xF1: Reserved + //0xF2: Reserved + //0xF3: Reserved + //0xF4: Reserved + //0xF5: Reserved + //0xF6: Reserved + //0xF7: Reserved + //0xF8: Reserved + //0xF9: Reserved + //0xFA: Reserved + //0xFB: Reserved + //0xFC: Reserved + //0xFD: Reserved + //0xFE: Reserved + //0xFF: Reserved AVR8_REGIDX_PINH = 0x100, AVR8_REGIDX_DDRH, AVR8_REGIDX_PORTH, @@ -692,30 +692,30 @@ enum AVR8_REGIDX_PINL, AVR8_REGIDX_DDRL, AVR8_REGIDX_PORTL, - //0x10C: Reserved - //0x10D: Reserved - //0x10E: Reserved - //0x10F: Reserved - //0x110: Reserved - //0x111: Reserved - //0x112: Reserved - //0x113: Reserved - //0x114: Reserved - //0x115: Reserved - //0x116: Reserved - //0x117: Reserved - //0x118: Reserved - //0x119: Reserved - //0x11A: Reserved - //0x11B: Reserved - //0x11C: Reserved - //0x11D: Reserved - //0x11E: Reserved - //0x11F: Reserved + //0x10C: Reserved + //0x10D: Reserved + //0x10E: Reserved + //0x10F: Reserved + //0x110: Reserved + //0x111: Reserved + //0x112: Reserved + //0x113: Reserved + //0x114: Reserved + //0x115: Reserved + //0x116: Reserved + //0x117: Reserved + //0x118: Reserved + //0x119: Reserved + //0x11A: Reserved + //0x11B: Reserved + //0x11C: Reserved + //0x11D: Reserved + //0x11E: Reserved + //0x11F: Reserved AVR8_REGIDX_TCCR5A, AVR8_REGIDX_TCCR5B, AVR8_REGIDX_TCCR5C, - //0x123: Reserved + //0x123: Reserved AVR8_REGIDX_TCNT5L, AVR8_REGIDX_TCNT5H, AVR8_REGIDX_ICR5L, @@ -726,34 +726,34 @@ enum AVR8_REGIDX_OCR5BH, AVR8_REGIDX_OCR5CL, AVR8_REGIDX_OCR5CH, - //0x12E: Reserved - //0x12F: Reserved + //0x12E: Reserved + //0x12F: Reserved AVR8_REGIDX_UCSR3A, AVR8_REGIDX_UCSR3B, AVR8_REGIDX_UCSR3C, - //0x133: Reserved + //0x133: Reserved AVR8_REGIDX_UBRR3L, AVR8_REGIDX_UBRR3H, AVR8_REGIDX_UDR3, - //0x137: Reserved - // . - // . up to - // . - //0x1FF: Reserved + //0x137: Reserved + // . + // . up to + // . + //0x1FF: Reserved }; enum { - AVR8_IO_PORTA = 0, - AVR8_IO_PORTB, - AVR8_IO_PORTC, - AVR8_IO_PORTD, - AVR8_IO_PORTE, - AVR8_IO_PORTF, - AVR8_IO_PORTG, - AVR8_IO_PORTH, - AVR8_IO_PORTJ, - AVR8_IO_PORTK, - AVR8_IO_PORTL + AVR8_IO_PORTA = 0, + AVR8_IO_PORTB, + AVR8_IO_PORTC, + AVR8_IO_PORTD, + AVR8_IO_PORTE, + AVR8_IO_PORTF, + AVR8_IO_PORTG, + AVR8_IO_PORTH, + AVR8_IO_PORTJ, + AVR8_IO_PORTK, + AVR8_IO_PORTL }; //TODO: AVR8_REG_* and AVR8_IO_PORT* seem to serve the same purpose and thus should be unified. Verify this! @@ -810,46 +810,46 @@ enum //lock bit masks enum { - LB1 = (1 << 0), - LB2 = (1 << 1), - BLB01 = (1 << 2), - BLB02 = (1 << 3), - BLB11 = (1 << 4), - BLB12 = (1 << 5), + LB1 = (1 << 0), + LB2 = (1 << 1), + BLB01 = (1 << 2), + BLB02 = (1 << 3), + BLB11 = (1 << 4), + BLB12 = (1 << 5), }; //extended fuses bit masks enum { - BODLEVEL0 = (1 << 0), - BODLEVEL1 = (1 << 1), - BODLEVEL2 = (1 << 2), + BODLEVEL0 = (1 << 0), + BODLEVEL1 = (1 << 1), + BODLEVEL2 = (1 << 2), }; //high fuses bit masks enum { - BOOTRST = (1 << 0), - BOOTSZ0 = (1 << 1), - BOOTSZ1 = (1 << 2), - EESAVE = (1 << 3), - WDTON = (1 << 4), - SPIEN = (1 << 5), - JTAGEN = (1 << 6), - OCDEN = (1 << 7), + BOOTRST = (1 << 0), + BOOTSZ0 = (1 << 1), + BOOTSZ1 = (1 << 2), + EESAVE = (1 << 3), + WDTON = (1 << 4), + SPIEN = (1 << 5), + JTAGEN = (1 << 6), + OCDEN = (1 << 7), }; //low fuses bit masks enum { - CKSEL0 = (1 << 0), - CKSEL1 = (1 << 1), - CKSEL2 = (1 << 2), - CKSEL3 = (1 << 3), - SUT0 = (1 << 4), - SUT1 = (1 << 5), - CKOUT = (1 << 6), - CKDIV8 = (1 << 7), + CKSEL0 = (1 << 0), + CKSEL1 = (1 << 1), + CKSEL2 = (1 << 2), + CKSEL3 = (1 << 3), + SUT0 = (1 << 4), + SUT1 = (1 << 5), + CKOUT = (1 << 6), + CKDIV8 = (1 << 7), }; #define AVR8_EEARH_MASK 0x01 diff --git a/src/emu/cpu/avr8/avr8dasm.c b/src/emu/cpu/avr8/avr8dasm.c index b92daeb3dac..219488299c6 100644 --- a/src/emu/cpu/avr8/avr8dasm.c +++ b/src/emu/cpu/avr8/avr8dasm.c @@ -30,73 +30,73 @@ CPU_DISASSEMBLE( avr8 ) UINT32 op = oprom[pos++]; op |= oprom[pos++] << 8; UINT32 addr = 0; - const char* register_names[0x40] = {"PINA", "DDRA", "PORTA", "PINB", "DDRB", "PORTB", "PINC", "DDRC", "PORTC", "PIND", "DDRD", "PORTD", "PINE", "DDRE", "PORTE", "PINF", "DDRF", "PORTF", "PING", "DDRG", "PORTG", "TIFR0", "TIFR1", "TIFR2","TIFR3", "TIFR4", "TIFR5", "PCIFR", "EIFR", "EIMSK", "GPIOR0", "EECR", "EEDR", "EEARL", "EEARH", "GTCCR", "TCCR0A", "TCCR0B", "TCNT0", "OCR0A", "OCR0B", "0x29", "GPIOR1", "GPIOR2", "SPCR", "SPSR", "SPDR", "0x2F", "ACSR", "OCDR", "0x32", "SMCR", "MCUSR", "MCUCR", "0x36", "SPMCSR", "0x38", "0x39", "0x3A", "RAMPZ", "EIND", "SPL", "SPH", "SREG"}; + const char* register_names[0x40] = {"PINA", "DDRA", "PORTA", "PINB", "DDRB", "PORTB", "PINC", "DDRC", "PORTC", "PIND", "DDRD", "PORTD", "PINE", "DDRE", "PORTE", "PINF", "DDRF", "PORTF", "PING", "DDRG", "PORTG", "TIFR0", "TIFR1", "TIFR2","TIFR3", "TIFR4", "TIFR5", "PCIFR", "EIFR", "EIMSK", "GPIOR0", "EECR", "EEDR", "EEARL", "EEARH", "GTCCR", "TCCR0A", "TCCR0B", "TCNT0", "OCR0A", "OCR0B", "0x29", "GPIOR1", "GPIOR2", "SPCR", "SPSR", "SPDR", "0x2F", "ACSR", "OCDR", "0x32", "SMCR", "MCUSR", "MCUCR", "0x36", "SPMCSR", "0x38", "0x39", "0x3A", "RAMPZ", "EIND", "SPL", "SPH", "SREG"}; - const char* register_bit_names[0x40][8] = { - /* PINA */ { "0", "1", "2", "3", "4", "5", "6", "7"}, - /* DDRA */ { "0", "1", "2", "3", "4", "5", "6", "7"}, - /* PORTA */ { "0", "1", "2", "3", "4", "5", "6", "7"}, - /* PINB */ { "0", "1", "2", "3", "4", "5", "6", "7"}, - /* DDRB */ { "0", "1", "2", "3", "4", "5", "6", "7"}, - /* PORTB */ { "0", "1", "2", "3", "4", "5", "6", "7"}, - /* PINC */ { "0", "1", "2", "3", "4", "5", "6", "7"}, - /* DDRC */ { "0", "1", "2", "3", "4", "5", "6", "7"}, - /* PORTC */ { "0", "1", "2", "3", "4", "5", "6", "7"}, - /* PIND */ { "0", "1", "2", "3", "4", "5", "6", "7"}, - /* DDRD */ { "0", "1", "2", "3", "4", "5", "6", "7"}, - /* PORTD */ { "0", "1", "2", "3", "4", "5", "6", "7"}, - /* PINE */ { "0", "1", "2", "3", "4", "5", "6", "7"}, - /* DDRE */ { "0", "1", "2", "3", "4", "5", "6", "7"}, - /* PORTE */ { "0", "1", "2", "3", "4", "5", "6", "7"}, - /* PINF */ { "0", "1", "2", "3", "4", "5", "6", "7"}, - /* DDRF */ { "0", "1", "2", "3", "4", "5", "6", "7"}, - /* PORTF */ { "0", "1", "2", "3", "4", "5", "6", "7"}, - /* PING */ { "0", "1", "2", "3", "4", "5", "6", "7"}, - /* DDRG */ { "0", "1", "2", "3", "4", "5", "6", "7"}, - /* PORTG */ { "0", "1", "2", "3", "4", "5", "6", "7"}, - /* TIFR0 */ { "TOV0", "OCF0A", "OCF0B", "3", "4", "5", "6", "7"}, - /* TIFR1 */ { "TOV1", "OCF1A", "OCF1B", "OCF1C", "4", "ICF1", "6", "7"}, - /* TIFR2 */ { "TOV2", "OCF2A", "OCF2B", "3", "4", "5", "6", "7"}, - /* TIFR3 */ { "TOV3", "OCF3A", "OCF3B", "OCF3C", "4", "ICF3", "6", "7"}, - /* TIFR4 */ { "TOV4", "OCF4A", "OCF4B", "OCF4C", "4", "ICF4", "6", "7"}, - /* TIFR5 */ { "TOV5", "OCF5A", "OCF5B", "OCF5C", "4", "ICF5", "6", "7"}, - /* PCIFR */ {"PCIF0", "PCIF1", "PCIF2", "3", "4", "5", "6", "7"}, - /* EIFR */ {"INTF0", "INTF1", "INTF2", "INTF3", "INTF4", "INTF5", "INTF6", "INTF7"}, - /* EIMSK */ { "INT0", "INT1", "INT2", "INT3", "INT4", "INT5", "INT6", "INT7"}, - /* GPIOR0 */ { "0", "1", "2", "3", "4", "5", "6", "7"}, - /* EECR */ { "EERE", "EEPE", "EEMPE", "EERIE", "EEPM0", "EEPM1", "6", "7"}, - /* EEDR */ { "0", "1", "2", "3", "4", "5", "6", "7"}, - /* EEARL */ { "0", "1", "2", "3", "4", "5", "6", "7"}, - /* EEARH */ { "0", "1", "2", "3", "4", "5", "6", "7"}, - /* GTCCR */ {"PSRSYNC", "PSRASY", "2", "3", "4", "5", "6", "TSM"}, - /* TCCR0A */ {"WGM00", "WGM01", "2", "3","COM0B0","COM0B1","COM0A0","COM0A1"}, - /* TCCR0B */ { "CS0", "CS1", "CS2", "WGM02", "4", "5", "FOC0B", "FOC0A"}, - /* TCNT0 */ { "0", "1", "2", "3", "4", "5", "6", "7"}, - /* OCR0A */ { "0", "1", "2", "3", "4", "5", "6", "7"}, - /* OCR0B */ { "0", "1", "2", "3", "4", "5", "6", "7"}, - /* 0x29 */ { "0", "1", "2", "3", "4", "5", "6", "7"}, - /* GPIOR1 */ { "0", "1", "2", "3", "4", "5", "6", "7"}, - /* GPIOR2 */ { "0", "1", "2", "3", "4", "5", "6", "7"}, - /* SPCR */ { "SPR0", "SPR1", "CPHA", "CPOL", "MSTR", "DORD", "SPE", "SPIE"}, - /* SPSR */ {"SPI2X", "1", "2", "3", "4", "5", "WCOL", "SPIF"}, - /* SPDR */ { "0", "1", "2", "3", "4", "5", "6", "7"}, - /* 0x2F */ { "0", "1", "2", "3", "4", "5", "6", "7"}, - /* ACSR */ {"ACIS0", "ACIS1", "ACIC", "ACIE", "ACI", "ACO", "ACBG", "ACD"}, - /* OCDR */ { "0", "1", "2", "3", "4", "5", "6", "7"}, - /* 0x32 */ { "0", "1", "2", "3", "4", "5", "6", "7"}, - /* SMCR */ { "SE", "SM0", "SM1", "SM2", "4", "5", "6", "7"}, - /* MCUSR */ { "PORF", "EXTRF", "BORF", "WDRF", "JTRF", "5", "6", "7"}, - /* MCUCR */ { "IVCE", "IVSEL", "2", "3", "PUD", "5", "6", "JTD"}, - /* 0x36 */ { "0", "1", "2", "3", "4", "5", "6", "7"}, - /* SPMCSR */ {"SPMEN", "PGERS", "PGWRT","BLBSET","RWWSRE", "SIGRD", "RWWSB", "SPMIE"}, - /* 0x38 */ { "0", "1", "2", "3", "4", "5", "6", "7"}, - /* 0x39 */ { "0", "1", "2", "3", "4", "5", "6", "7"}, - /* 0x3A */ { "0", "1", "2", "3", "4", "5", "6", "7"}, - /* RAMPZ */ {"RAMPZ0","RAMPZ1", "2", "3", "4", "5", "6", "7"}, - /* EIND */ {"EIND0", "1", "2", "3", "4", "5", "6", "7"}, - /* SPL */ { "SP0", "SP1", "SP2", "SP3", "SP4", "SP5", "SP6", "SP7"}, - /* SPH */ { "SP8", "SP9", "SP10", "SP11", "SP12", "SP13", "SP14", "SP15"}, - /* SREG */ { "C", "Z", "N", "V", "S", "H", "T", "I"}}; + const char* register_bit_names[0x40][8] = { + /* PINA */ { "0", "1", "2", "3", "4", "5", "6", "7"}, + /* DDRA */ { "0", "1", "2", "3", "4", "5", "6", "7"}, + /* PORTA */ { "0", "1", "2", "3", "4", "5", "6", "7"}, + /* PINB */ { "0", "1", "2", "3", "4", "5", "6", "7"}, + /* DDRB */ { "0", "1", "2", "3", "4", "5", "6", "7"}, + /* PORTB */ { "0", "1", "2", "3", "4", "5", "6", "7"}, + /* PINC */ { "0", "1", "2", "3", "4", "5", "6", "7"}, + /* DDRC */ { "0", "1", "2", "3", "4", "5", "6", "7"}, + /* PORTC */ { "0", "1", "2", "3", "4", "5", "6", "7"}, + /* PIND */ { "0", "1", "2", "3", "4", "5", "6", "7"}, + /* DDRD */ { "0", "1", "2", "3", "4", "5", "6", "7"}, + /* PORTD */ { "0", "1", "2", "3", "4", "5", "6", "7"}, + /* PINE */ { "0", "1", "2", "3", "4", "5", "6", "7"}, + /* DDRE */ { "0", "1", "2", "3", "4", "5", "6", "7"}, + /* PORTE */ { "0", "1", "2", "3", "4", "5", "6", "7"}, + /* PINF */ { "0", "1", "2", "3", "4", "5", "6", "7"}, + /* DDRF */ { "0", "1", "2", "3", "4", "5", "6", "7"}, + /* PORTF */ { "0", "1", "2", "3", "4", "5", "6", "7"}, + /* PING */ { "0", "1", "2", "3", "4", "5", "6", "7"}, + /* DDRG */ { "0", "1", "2", "3", "4", "5", "6", "7"}, + /* PORTG */ { "0", "1", "2", "3", "4", "5", "6", "7"}, + /* TIFR0 */ { "TOV0", "OCF0A", "OCF0B", "3", "4", "5", "6", "7"}, + /* TIFR1 */ { "TOV1", "OCF1A", "OCF1B", "OCF1C", "4", "ICF1", "6", "7"}, + /* TIFR2 */ { "TOV2", "OCF2A", "OCF2B", "3", "4", "5", "6", "7"}, + /* TIFR3 */ { "TOV3", "OCF3A", "OCF3B", "OCF3C", "4", "ICF3", "6", "7"}, + /* TIFR4 */ { "TOV4", "OCF4A", "OCF4B", "OCF4C", "4", "ICF4", "6", "7"}, + /* TIFR5 */ { "TOV5", "OCF5A", "OCF5B", "OCF5C", "4", "ICF5", "6", "7"}, + /* PCIFR */ {"PCIF0", "PCIF1", "PCIF2", "3", "4", "5", "6", "7"}, + /* EIFR */ {"INTF0", "INTF1", "INTF2", "INTF3", "INTF4", "INTF5", "INTF6", "INTF7"}, + /* EIMSK */ { "INT0", "INT1", "INT2", "INT3", "INT4", "INT5", "INT6", "INT7"}, + /* GPIOR0 */ { "0", "1", "2", "3", "4", "5", "6", "7"}, + /* EECR */ { "EERE", "EEPE", "EEMPE", "EERIE", "EEPM0", "EEPM1", "6", "7"}, + /* EEDR */ { "0", "1", "2", "3", "4", "5", "6", "7"}, + /* EEARL */ { "0", "1", "2", "3", "4", "5", "6", "7"}, + /* EEARH */ { "0", "1", "2", "3", "4", "5", "6", "7"}, + /* GTCCR */ {"PSRSYNC", "PSRASY", "2", "3", "4", "5", "6", "TSM"}, + /* TCCR0A */ {"WGM00", "WGM01", "2", "3","COM0B0","COM0B1","COM0A0","COM0A1"}, + /* TCCR0B */ { "CS0", "CS1", "CS2", "WGM02", "4", "5", "FOC0B", "FOC0A"}, + /* TCNT0 */ { "0", "1", "2", "3", "4", "5", "6", "7"}, + /* OCR0A */ { "0", "1", "2", "3", "4", "5", "6", "7"}, + /* OCR0B */ { "0", "1", "2", "3", "4", "5", "6", "7"}, + /* 0x29 */ { "0", "1", "2", "3", "4", "5", "6", "7"}, + /* GPIOR1 */ { "0", "1", "2", "3", "4", "5", "6", "7"}, + /* GPIOR2 */ { "0", "1", "2", "3", "4", "5", "6", "7"}, + /* SPCR */ { "SPR0", "SPR1", "CPHA", "CPOL", "MSTR", "DORD", "SPE", "SPIE"}, + /* SPSR */ {"SPI2X", "1", "2", "3", "4", "5", "WCOL", "SPIF"}, + /* SPDR */ { "0", "1", "2", "3", "4", "5", "6", "7"}, + /* 0x2F */ { "0", "1", "2", "3", "4", "5", "6", "7"}, + /* ACSR */ {"ACIS0", "ACIS1", "ACIC", "ACIE", "ACI", "ACO", "ACBG", "ACD"}, + /* OCDR */ { "0", "1", "2", "3", "4", "5", "6", "7"}, + /* 0x32 */ { "0", "1", "2", "3", "4", "5", "6", "7"}, + /* SMCR */ { "SE", "SM0", "SM1", "SM2", "4", "5", "6", "7"}, + /* MCUSR */ { "PORF", "EXTRF", "BORF", "WDRF", "JTRF", "5", "6", "7"}, + /* MCUCR */ { "IVCE", "IVSEL", "2", "3", "PUD", "5", "6", "JTD"}, + /* 0x36 */ { "0", "1", "2", "3", "4", "5", "6", "7"}, + /* SPMCSR */ {"SPMEN", "PGERS", "PGWRT","BLBSET","RWWSRE", "SIGRD", "RWWSB", "SPMIE"}, + /* 0x38 */ { "0", "1", "2", "3", "4", "5", "6", "7"}, + /* 0x39 */ { "0", "1", "2", "3", "4", "5", "6", "7"}, + /* 0x3A */ { "0", "1", "2", "3", "4", "5", "6", "7"}, + /* RAMPZ */ {"RAMPZ0","RAMPZ1", "2", "3", "4", "5", "6", "7"}, + /* EIND */ {"EIND0", "1", "2", "3", "4", "5", "6", "7"}, + /* SPL */ { "SP0", "SP1", "SP2", "SP3", "SP4", "SP5", "SP6", "SP7"}, + /* SPH */ { "SP8", "SP9", "SP10", "SP11", "SP12", "SP13", "SP14", "SP15"}, + /* SREG */ { "C", "Z", "N", "V", "S", "H", "T", "I"}}; switch(op & 0xf000) { @@ -524,28 +524,28 @@ CPU_DISASSEMBLE( avr8 ) output += sprintf( output, "SBIW R%d:R%d, 0x%02x", 24+(RD2(op) << 1)+1, 24+(RD2(op) << 1), KCONST6(op) ); break; case 0x0800: - if (ACONST5(op) < 0x20) - output += sprintf( output, "CBI %s, %s", register_names[ACONST5(op)], register_bit_names[ACONST5(op)][RR3(op)] ); - else - output += sprintf( output, "CBI 0x%02x, %d", ACONST5(op), RR3(op) ); + if (ACONST5(op) < 0x20) + output += sprintf( output, "CBI %s, %s", register_names[ACONST5(op)], register_bit_names[ACONST5(op)][RR3(op)] ); + else + output += sprintf( output, "CBI 0x%02x, %d", ACONST5(op), RR3(op) ); break; case 0x0900: - if (ACONST5(op) < 0x20) - output += sprintf( output, "SBIC %s, %s", register_names[ACONST5(op)], register_bit_names[ACONST5(op)][RR3(op)] ); - else - output += sprintf( output, "SBIC 0x%02x, %d", ACONST5(op), RR3(op) ); + if (ACONST5(op) < 0x20) + output += sprintf( output, "SBIC %s, %s", register_names[ACONST5(op)], register_bit_names[ACONST5(op)][RR3(op)] ); + else + output += sprintf( output, "SBIC 0x%02x, %d", ACONST5(op), RR3(op) ); break; case 0x0a00: - if (ACONST5(op) < 0x20) - output += sprintf( output, "SBI %s, %s", register_names[ACONST5(op)], register_bit_names[ACONST5(op)][RR3(op)] ); - else - output += sprintf( output, "SBI 0x%02x, %d", ACONST5(op), RR3(op) ); + if (ACONST5(op) < 0x20) + output += sprintf( output, "SBI %s, %s", register_names[ACONST5(op)], register_bit_names[ACONST5(op)][RR3(op)] ); + else + output += sprintf( output, "SBI 0x%02x, %d", ACONST5(op), RR3(op) ); break; case 0x0b00: - if (ACONST5(op) < 0x20) - output += sprintf( output, "SBIS %s, %s", register_names[ACONST5(op)], register_bit_names[ACONST5(op)][RR3(op)] ); - else - output += sprintf( output, "SBIS 0x%02x, %d", ACONST5(op), RR3(op) ); + if (ACONST5(op) < 0x20) + output += sprintf( output, "SBIS %s, %s", register_names[ACONST5(op)], register_bit_names[ACONST5(op)][RR3(op)] ); + else + output += sprintf( output, "SBIS 0x%02x, %d", ACONST5(op), RR3(op) ); break; case 0x0c00: case 0x0d00: @@ -558,23 +558,23 @@ CPU_DISASSEMBLE( avr8 ) case 0xb000: if(op & 0x0800) { - if (ACONST6(op) < 0x40 ) { - output += sprintf( output, "OUT %s, R%d", register_names[ACONST6(op)], RD5(op) ); - } else { - output += sprintf( output, "OUT 0x%02x, R%d", ACONST6(op), RD5(op) ); - } + if (ACONST6(op) < 0x40 ) { + output += sprintf( output, "OUT %s, R%d", register_names[ACONST6(op)], RD5(op) ); + } else { + output += sprintf( output, "OUT 0x%02x, R%d", ACONST6(op), RD5(op) ); + } } else { - if (ACONST6(op) < 0x40 ) { - output += sprintf( output, "IN R%d, %s", RD5(op), register_names[ACONST6(op)] ); - } else { - output += sprintf( output, "IN R%d, 0x%02x", RD5(op), ACONST6(op) ); - } + if (ACONST6(op) < 0x40 ) { + output += sprintf( output, "IN R%d, %s", RD5(op), register_names[ACONST6(op)] ); + } else { + output += sprintf( output, "IN R%d, 0x%02x", RD5(op), ACONST6(op) ); + } } break; case 0xc000: - //I'm not sure if this is correct. why pc + ... : pc + 8 + ... ? + //I'm not sure if this is correct. why pc + ... : pc + 8 + ... ? output += sprintf( output, "RJMP %08x", (((op & 0x0800) ? pc + ((op & 0x0fff) | 0xfffff000) : pc + 8 + (op & 0x0fff)) << 0) ); break; case 0xd000: diff --git a/src/emu/cpu/cosmac/cosmac.h b/src/emu/cpu/cosmac/cosmac.h index 3903b247466..eafd8195aa2 100644 --- a/src/emu/cpu/cosmac/cosmac.h +++ b/src/emu/cpu/cosmac/cosmac.h @@ -374,16 +374,16 @@ protected: const address_space_config m_io_config; // device callbacks - devcb2_read_line m_read_wait; - devcb2_read_line m_read_clear; - devcb2_read_line m_read_ef1; - devcb2_read_line m_read_ef2; - devcb2_read_line m_read_ef3; - devcb2_read_line m_read_ef4; + devcb2_read_line m_read_wait; + devcb2_read_line m_read_clear; + devcb2_read_line m_read_ef1; + devcb2_read_line m_read_ef2; + devcb2_read_line m_read_ef3; + devcb2_read_line m_read_ef4; devcb2_write_line m_write_q; - devcb2_read8 m_read_dma; - devcb2_write8 m_write_dma; - devcb2_write8 m_write_sc; + devcb2_read8 m_read_dma; + devcb2_write8 m_write_dma; + devcb2_write8 m_write_sc; // control modes enum cosmac_mode diff --git a/src/emu/cpu/cpu.mak b/src/emu/cpu/cpu.mak index d7a03f92931..227682e1d84 100644 --- a/src/emu/cpu/cpu.mak +++ b/src/emu/cpu/cpu.mak @@ -489,39 +489,39 @@ $(CPUOBJ)/g65816/g65816o4.o: $(CPUSRC)/g65816/g65816o4.c \ ifneq ($(filter H8,$(CPUS)),) OBJDIRS += $(CPUOBJ)/h8 CPUOBJS += $(CPUOBJ)/h8/h8.o $(CPUOBJ)/h8/h8h.o $(CPUOBJ)/h8/h8s2000.o $(CPUOBJ)/h8/h8s2600.o \ - $(CPUOBJ)/h8/h83337.o \ - $(CPUOBJ)/h8/h83002.o $(CPUOBJ)/h8/h83006.o $(CPUOBJ)/h8/h83008.o \ - $(CPUOBJ)/h8/h83048.o \ - $(CPUOBJ)/h8/h8s2245.o $(CPUOBJ)/h8/h8s2320.o $(CPUOBJ)/h8/h8s2357.o \ - $(CPUOBJ)/h8/h8s2655.o \ - $(CPUOBJ)/h8/h8_adc.o $(CPUOBJ)/h8/h8_port.o $(CPUOBJ)/h8/h8_intc.o \ - $(CPUOBJ)/h8/h8_timer8.o $(CPUOBJ)/h8/h8_timer16.o $(CPUOBJ)/h8/h8_sci.o + $(CPUOBJ)/h8/h83337.o \ + $(CPUOBJ)/h8/h83002.o $(CPUOBJ)/h8/h83006.o $(CPUOBJ)/h8/h83008.o \ + $(CPUOBJ)/h8/h83048.o \ + $(CPUOBJ)/h8/h8s2245.o $(CPUOBJ)/h8/h8s2320.o $(CPUOBJ)/h8/h8s2357.o \ + $(CPUOBJ)/h8/h8s2655.o \ + $(CPUOBJ)/h8/h8_adc.o $(CPUOBJ)/h8/h8_port.o $(CPUOBJ)/h8/h8_intc.o \ + $(CPUOBJ)/h8/h8_timer8.o $(CPUOBJ)/h8/h8_timer16.o $(CPUOBJ)/h8/h8_sci.o DASMOBJS += endif -$(CPUOBJ)/h8/h8.o: $(CPUSRC)/h8/h8.c \ +$(CPUOBJ)/h8/h8.o: $(CPUSRC)/h8/h8.c \ $(CPUOBJ)/h8/h8.inc \ $(CPUSRC)/h8/h8.h -$(CPUOBJ)/h8/h8h.o: $(CPUSRC)/h8/h8h.c \ +$(CPUOBJ)/h8/h8h.o: $(CPUSRC)/h8/h8h.c \ $(CPUOBJ)/h8/h8h.inc \ $(CPUSRC)/h8/h8h.h \ $(CPUSRC)/h8/h8.h -$(CPUOBJ)/h8/h8s2000.o: $(CPUSRC)/h8/h8s2000.c \ +$(CPUOBJ)/h8/h8s2000.o: $(CPUSRC)/h8/h8s2000.c \ $(CPUOBJ)/h8/h8s2000.inc \ $(CPUSRC)/h8/h8s2000.h \ $(CPUSRC)/h8/h8h.h \ $(CPUSRC)/h8/h8.h -$(CPUOBJ)/h8/h8s2600.o: $(CPUSRC)/h8/h8s2600.c \ +$(CPUOBJ)/h8/h8s2600.o: $(CPUSRC)/h8/h8s2600.c \ $(CPUOBJ)/h8/h8s2600.inc \ $(CPUSRC)/h8/h8s2600.h \ $(CPUSRC)/h8/h8s2000.h \ $(CPUSRC)/h8/h8h.h \ $(CPUSRC)/h8/h8.h -$(CPUOBJ)/h8/h83337.o: $(CPUSRC)/h8/h83337.c \ +$(CPUOBJ)/h8/h83337.o: $(CPUSRC)/h8/h83337.c \ $(CPUSRC)/h8/h83337.h \ $(CPUSRC)/h8/h8.h \ $(CPUSRC)/h8/h8_intc.h \ @@ -531,7 +531,7 @@ $(CPUOBJ)/h8/h83337.o: $(CPUSRC)/h8/h83337.c \ $(CPUSRC)/h8/h8_timer16.h \ $(CPUSRC)/h8/h8_sci.h -$(CPUOBJ)/h8/h83002.o: $(CPUSRC)/h8/h83002.c \ +$(CPUOBJ)/h8/h83002.o: $(CPUSRC)/h8/h83002.c \ $(CPUSRC)/h8/h83002.h \ $(CPUSRC)/h8/h8h.h \ $(CPUSRC)/h8/h8.h \ @@ -541,7 +541,7 @@ $(CPUOBJ)/h8/h83002.o: $(CPUSRC)/h8/h83002.c \ $(CPUSRC)/h8/h8_timer16.h \ $(CPUSRC)/h8/h8_sci.h -$(CPUOBJ)/h8/h83006.o: $(CPUSRC)/h8/h83006.c \ +$(CPUOBJ)/h8/h83006.o: $(CPUSRC)/h8/h83006.c \ $(CPUSRC)/h8/h83006.h \ $(CPUSRC)/h8/h8h.h \ $(CPUSRC)/h8/h8.h \ @@ -552,7 +552,7 @@ $(CPUOBJ)/h8/h83006.o: $(CPUSRC)/h8/h83006.c \ $(CPUSRC)/h8/h8_timer16.h \ $(CPUSRC)/h8/h8_sci.h -$(CPUOBJ)/h8/h83008.o: $(CPUSRC)/h8/h83008.c \ +$(CPUOBJ)/h8/h83008.o: $(CPUSRC)/h8/h83008.c \ $(CPUSRC)/h8/h83008.h \ $(CPUSRC)/h8/h8h.h \ $(CPUSRC)/h8/h8.h \ @@ -563,7 +563,7 @@ $(CPUOBJ)/h8/h83008.o: $(CPUSRC)/h8/h83008.c \ $(CPUSRC)/h8/h8_timer16.h \ $(CPUSRC)/h8/h8_sci.h -$(CPUOBJ)/h8/h83048.o: $(CPUSRC)/h8/h83048.c \ +$(CPUOBJ)/h8/h83048.o: $(CPUSRC)/h8/h83048.c \ $(CPUSRC)/h8/h83048.h \ $(CPUSRC)/h8/h8h.h \ $(CPUSRC)/h8/h8.h \ @@ -573,7 +573,7 @@ $(CPUOBJ)/h8/h83048.o: $(CPUSRC)/h8/h83048.c \ $(CPUSRC)/h8/h8_timer16.h \ $(CPUSRC)/h8/h8_sci.h -$(CPUOBJ)/h8/h8s2245.o: $(CPUSRC)/h8/h8s2245.c \ +$(CPUOBJ)/h8/h8s2245.o: $(CPUSRC)/h8/h8s2245.c \ $(CPUSRC)/h8/h8s2245.h \ $(CPUSRC)/h8/h8s2000.h \ $(CPUSRC)/h8/h8h.h \ @@ -585,7 +585,7 @@ $(CPUOBJ)/h8/h8s2245.o: $(CPUSRC)/h8/h8s2245.c \ $(CPUSRC)/h8/h8_timer16.h \ $(CPUSRC)/h8/h8_sci.h -$(CPUOBJ)/h8/h8s2320.o: $(CPUSRC)/h8/h8s2320.c \ +$(CPUOBJ)/h8/h8s2320.o: $(CPUSRC)/h8/h8s2320.c \ $(CPUSRC)/h8/h8s2320.h \ $(CPUSRC)/h8/h8s2000.h \ $(CPUSRC)/h8/h8h.h \ @@ -597,7 +597,7 @@ $(CPUOBJ)/h8/h8s2320.o: $(CPUSRC)/h8/h8s2320.c \ $(CPUSRC)/h8/h8_timer16.h \ $(CPUSRC)/h8/h8_sci.h -$(CPUOBJ)/h8/h8s2357.o: $(CPUSRC)/h8/h8s2357.c \ +$(CPUOBJ)/h8/h8s2357.o: $(CPUSRC)/h8/h8s2357.c \ $(CPUSRC)/h8/h8s2357.h \ $(CPUSRC)/h8/h8s2000.h \ $(CPUSRC)/h8/h8h.h \ @@ -609,7 +609,7 @@ $(CPUOBJ)/h8/h8s2357.o: $(CPUSRC)/h8/h8s2357.c \ $(CPUSRC)/h8/h8_timer16.h \ $(CPUSRC)/h8/h8_sci.h -$(CPUOBJ)/h8/h8s2655.o: $(CPUSRC)/h8/h8s2655.c \ +$(CPUOBJ)/h8/h8s2655.o: $(CPUSRC)/h8/h8s2655.c \ $(CPUSRC)/h8/h8s2655.h \ $(CPUSRC)/h8/h8s2600.h \ $(CPUSRC)/h8/h8s2000.h \ @@ -622,25 +622,25 @@ $(CPUOBJ)/h8/h8s2655.o: $(CPUSRC)/h8/h8s2655.c \ $(CPUSRC)/h8/h8_timer16.h \ $(CPUSRC)/h8/h8_sci.h -$(CPUOBJ)/h8/h8_intc.o: $(CPUSRC)/h8/h8_intc.c \ +$(CPUOBJ)/h8/h8_intc.o: $(CPUSRC)/h8/h8_intc.c \ $(CPUSRC)/h8/h8_intc.h \ $(CPUSRC)/h8/h8.h -$(CPUOBJ)/h8/h8_adc.o: $(CPUSRC)/h8/h8_adc.c \ +$(CPUOBJ)/h8/h8_adc.o: $(CPUSRC)/h8/h8_adc.c \ $(CPUSRC)/h8/h8_adc.h \ $(CPUSRC)/h8/h8_intc.h \ $(CPUSRC)/h8/h8.h -$(CPUOBJ)/h8/h8_port.o: $(CPUSRC)/h8/h8_port.c \ +$(CPUOBJ)/h8/h8_port.o: $(CPUSRC)/h8/h8_port.c \ $(CPUSRC)/h8/h8_port.h \ $(CPUSRC)/h8/h8.h -$(CPUOBJ)/h8/h8_timer16.o: $(CPUSRC)/h8/h8_timer16.c \ +$(CPUOBJ)/h8/h8_timer16.o: $(CPUSRC)/h8/h8_timer16.c \ $(CPUSRC)/h8/h8_timer16.h \ $(CPUSRC)/h8/h8_intc.h \ $(CPUSRC)/h8/h8.h -$(CPUOBJ)/h8/h8_sci.o: $(CPUSRC)/h8/h8_sci.c \ +$(CPUOBJ)/h8/h8_sci.o: $(CPUSRC)/h8/h8_sci.c \ $(CPUSRC)/h8/h8_sci.h \ $(CPUSRC)/h8/h8_intc.h \ $(CPUSRC)/h8/h8.h diff --git a/src/emu/cpu/cubeqcpu/cubeqcpu.h b/src/emu/cpu/cubeqcpu/cubeqcpu.h index 47bf5f00c87..4243fe15595 100644 --- a/src/emu/cpu/cubeqcpu/cubeqcpu.h +++ b/src/emu/cpu/cubeqcpu/cubeqcpu.h @@ -357,10 +357,10 @@ private: UINT32 m_clkcnt; /* RAM */ - UINT16 m_sram[4096]; /* Shared with rotate CPU */ - UINT8 m_ptr_ram[1024]; /* Pointer RAM */ - UINT32 m_e_stack[32768]; /* Stack DRAM: 32kx20 */ - UINT32 m_o_stack[32768]; /* Stack DRAM: 32kx20 */ + UINT16 m_sram[4096]; /* Shared with rotate CPU */ + UINT8 m_ptr_ram[1024]; /* Pointer RAM */ + UINT32 m_e_stack[32768]; /* Stack DRAM: 32kx20 */ + UINT32 m_o_stack[32768]; /* Stack DRAM: 32kx20 */ address_space *m_program; direct_read_data *m_direct; diff --git a/src/emu/cpu/dsp32/dsp32.c b/src/emu/cpu/dsp32/dsp32.c index f95c09463a7..13af2eed780 100644 --- a/src/emu/cpu/dsp32/dsp32.c +++ b/src/emu/cpu/dsp32/dsp32.c @@ -188,7 +188,7 @@ dsp32c_device::dsp32c_device(const machine_config &mconfig, const char *tag, dev void dsp32c_device::device_start() { m_output_pins_changed.resolve_safe(); - + // get our address spaces m_program = &space(AS_PROGRAM); m_direct = &m_program->direct(); diff --git a/src/emu/cpu/esrip/esrip.h b/src/emu/cpu/esrip/esrip.h index c89a20ffb40..d39a7fb047c 100644 --- a/src/emu/cpu/esrip/esrip.h +++ b/src/emu/cpu/esrip/esrip.h @@ -27,13 +27,13 @@ #define MCFG_ESRIP_FDT_R_CALLBACK(_read) \ devcb = &esrip_device::static_set_fdt_r_callback(*device, DEVCB2_##_read); - + #define MCFG_ESRIP_FDT_W_CALLBACK(_write) \ devcb = &esrip_device::static_set_fdt_w_callback(*device, DEVCB2_##_write); - + #define MCFG_ESRIP_STATUS_IN_CALLBACK(_read) \ devcb = &esrip_device::static_set_status_in_callback(*device, DEVCB2_##_read); - + #define MCFG_ESRIP_DRAW_CALLBACK_OWNER(_class, _method) \ esrip_device::static_set_draw_callback(*device, esrip_draw_delegate(&_class::_method, #_class "::" #_method, downcast<_class *>(owner))); diff --git a/src/emu/cpu/g65816/g65816.h b/src/emu/cpu/g65816/g65816.h index 5422a6749f4..0a7207730a0 100644 --- a/src/emu/cpu/g65816/g65816.h +++ b/src/emu/cpu/g65816/g65816.h @@ -66,7 +66,7 @@ class _5a22_device : public legacy_cpu_device { public: _5a22_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, UINT32 clock); - + DECLARE_WRITE8_MEMBER( wrmpya_w ); DECLARE_WRITE8_MEMBER( wrmpyb_w ); DECLARE_WRITE8_MEMBER( wrdivl_w ); @@ -77,7 +77,7 @@ public: DECLARE_READ8_MEMBER( rddivh_r ); DECLARE_READ8_MEMBER( rdmpyl_r ); DECLARE_READ8_MEMBER( rdmpyh_r ); - + void set_5a22_map(); }; diff --git a/src/emu/cpu/h8/h8.c b/src/emu/cpu/h8/h8.c index 20bffeb7852..5835d911fcb 100644 --- a/src/emu/cpu/h8/h8.c +++ b/src/emu/cpu/h8/h8.c @@ -252,26 +252,26 @@ void h8_device::state_string_export(const device_state_entry &entry, astring &st case STATE_GENFLAGS: if(has_exr) string.printf("%c%c %c%c%c%c%c%c%c%c", - (EXR & EXR_T) ? 'T' : '-', - '0' + (EXR & EXR_I), - (CCR & F_I) ? 'I' : '-', - (CCR & F_UI) ? 'u' : '-', - (CCR & F_H) ? 'H' : '-', - (CCR & F_U) ? 'U' : '-', - (CCR & F_N) ? 'N' : '-', - (CCR & F_Z) ? 'Z' : '-', - (CCR & F_V) ? 'V' : '-', - (CCR & F_C) ? 'C' : '-'); + (EXR & EXR_T) ? 'T' : '-', + '0' + (EXR & EXR_I), + (CCR & F_I) ? 'I' : '-', + (CCR & F_UI) ? 'u' : '-', + (CCR & F_H) ? 'H' : '-', + (CCR & F_U) ? 'U' : '-', + (CCR & F_N) ? 'N' : '-', + (CCR & F_Z) ? 'Z' : '-', + (CCR & F_V) ? 'V' : '-', + (CCR & F_C) ? 'C' : '-'); else - string.printf("%c%c%c%c%c%c%c%c", - (CCR & F_I) ? 'I' : '-', - (CCR & F_UI) ? 'u' : '-', - (CCR & F_H) ? 'H' : '-', - (CCR & F_U) ? 'U' : '-', - (CCR & F_N) ? 'N' : '-', - (CCR & F_Z) ? 'Z' : '-', - (CCR & F_V) ? 'V' : '-', - (CCR & F_C) ? 'C' : '-'); + string.printf("%c%c%c%c%c%c%c%c", + (CCR & F_I) ? 'I' : '-', + (CCR & F_UI) ? 'u' : '-', + (CCR & F_H) ? 'H' : '-', + (CCR & F_U) ? 'U' : '-', + (CCR & F_N) ? 'N' : '-', + (CCR & F_Z) ? 'Z' : '-', + (CCR & F_V) ? 'V' : '-', + (CCR & F_C) ? 'C' : '-'); break; case H8_R0: case H8_R1: @@ -554,7 +554,7 @@ UINT8 h8_device::read8(UINT32 adr) void h8_device::write8(UINT32 adr, UINT8 data) { - // logerror("W %06x %02x\n", adr & 0xffffff, data); + // logerror("W %06x %02x\n", adr & 0xffffff, data); icount--; program->write_byte(adr, data); } @@ -567,7 +567,7 @@ UINT16 h8_device::read16(UINT32 adr) void h8_device::write16(UINT32 adr, UINT16 data) { - // logerror("W %06x %04x\n", adr & 0xfffffe, data); + // logerror("W %06x %04x\n", adr & 0xfffffe, data); icount--; program->write_word(adr & ~1, data); } @@ -644,7 +644,7 @@ UINT8 h8_device::do_addx8(UINT8 v1, UINT8 v2) if(res & 0x100) CCR |= F_C; return res; - + } UINT8 h8_device::do_subx8(UINT8 v1, UINT8 v2) @@ -662,7 +662,7 @@ UINT8 h8_device::do_subx8(UINT8 v1, UINT8 v2) if(res & 0x100) CCR |= F_C; return res; - + } UINT8 h8_device::do_inc8(UINT8 v1, UINT8 v2) @@ -675,7 +675,7 @@ UINT8 h8_device::do_inc8(UINT8 v1, UINT8 v2) CCR |= F_N; if((v1^v2) & (v1^res) & 0x80) CCR |= F_V; - return res; + return res; } UINT16 h8_device::do_inc16(UINT16 v1, UINT16 v2) @@ -688,7 +688,7 @@ UINT16 h8_device::do_inc16(UINT16 v1, UINT16 v2) CCR |= F_N; if((v1^v2) & (v1^res) & 0x8000) CCR |= F_V; - return res; + return res; } UINT32 h8_device::do_inc32(UINT32 v1, UINT32 v2) @@ -701,7 +701,7 @@ UINT32 h8_device::do_inc32(UINT32 v1, UINT32 v2) CCR |= F_N; if((v1^v2) & (v1^res) & 0x80000000) CCR |= F_V; - return res; + return res; } UINT8 h8_device::do_add8(UINT8 v1, UINT8 v2) @@ -719,7 +719,7 @@ UINT8 h8_device::do_add8(UINT8 v1, UINT8 v2) if(res & 0x100) CCR |= F_C; return res; - + } UINT16 h8_device::do_add16(UINT16 v1, UINT16 v2) @@ -737,7 +737,7 @@ UINT16 h8_device::do_add16(UINT16 v1, UINT16 v2) if(res & 0x10000) CCR |= F_C; return res; - + } UINT32 h8_device::do_add32(UINT32 v1, UINT32 v2) @@ -754,7 +754,7 @@ UINT32 h8_device::do_add32(UINT32 v1, UINT32 v2) CCR |= F_V; if(res & U64(0x100000000)) CCR |= F_C; - return res; + return res; } UINT8 h8_device::do_dec8(UINT8 v1, UINT8 v2) @@ -767,7 +767,7 @@ UINT8 h8_device::do_dec8(UINT8 v1, UINT8 v2) CCR |= F_N; if((v1^v2) & (v1^res) & 0x80) CCR |= F_V; - return res; + return res; } UINT16 h8_device::do_dec16(UINT16 v1, UINT16 v2) @@ -780,7 +780,7 @@ UINT16 h8_device::do_dec16(UINT16 v1, UINT16 v2) CCR |= F_N; if((v1^v2) & (v1^res) & 0x8000) CCR |= F_V; - return res; + return res; } UINT32 h8_device::do_dec32(UINT32 v1, UINT32 v2) @@ -793,7 +793,7 @@ UINT32 h8_device::do_dec32(UINT32 v1, UINT32 v2) CCR |= F_N; if((v1^v2) & (v1^res) & 0x80000000) CCR |= F_V; - return res; + return res; } UINT8 h8_device::do_sub8(UINT8 v1, UINT8 v2) @@ -811,7 +811,7 @@ UINT8 h8_device::do_sub8(UINT8 v1, UINT8 v2) if(res & 0x100) CCR |= F_C; return res; - + } UINT16 h8_device::do_sub16(UINT16 v1, UINT16 v2) @@ -829,7 +829,7 @@ UINT16 h8_device::do_sub16(UINT16 v1, UINT16 v2) if(res & 0x10000) CCR |= F_C; return res; - + } UINT32 h8_device::do_sub32(UINT32 v1, UINT32 v2) @@ -846,7 +846,7 @@ UINT32 h8_device::do_sub32(UINT32 v1, UINT32 v2) CCR |= F_V; if(res & U64(0x100000000)) CCR |= F_C; - return res; + return res; } UINT8 h8_device::do_shal8(UINT8 v) @@ -1017,7 +1017,7 @@ UINT8 h8_device::do_shal2_8(UINT8 v) if(v & 0x40) CCR |= F_C; if((v & 0xc0) == 0x40 || (v & 0xc0) == 0x80 || - (v & 0x60) == 0x20 || (v & 0x60) == 0x40) + (v & 0x60) == 0x20 || (v & 0x60) == 0x40) CCR |= F_V; v <<= 2; if(!v) @@ -1033,7 +1033,7 @@ UINT16 h8_device::do_shal2_16(UINT16 v) if(v & 0x4000) CCR |= F_C; if((v & 0xc000) == 0x4000 || (v & 0xc000) == 0x8000 || - (v & 0x6000) == 0x2000 || (v & 0x6000) == 0x4000) + (v & 0x6000) == 0x2000 || (v & 0x6000) == 0x4000) CCR |= F_V; v <<= 2; if(!v) @@ -1049,7 +1049,7 @@ UINT32 h8_device::do_shal2_32(UINT32 v) if(v & 0x40000000) CCR |= F_C; if((v & 0xc0000000) == 0x40000000 || (v & 0xc0000000) == 0x80000000 || - (v & 0x60000000) == 0x20000000 || (v & 0x60000000) == 0x40000000) + (v & 0x60000000) == 0x20000000 || (v & 0x60000000) == 0x40000000) CCR |= F_V; v <<= 2; if(!v) diff --git a/src/emu/cpu/h8/h8.h b/src/emu/cpu/h8/h8.h index b43c319809d..38d8b3b9561 100644 --- a/src/emu/cpu/h8/h8.h +++ b/src/emu/cpu/h8/h8.h @@ -499,7 +499,7 @@ enum { H8_E6, H8_E7, H8_CCR, - H8_EXR, + H8_EXR, }; #endif diff --git a/src/emu/cpu/h8/h8.lst b/src/emu/cpu/h8/h8.lst index 22c3e6f994f..3ec1f46fbe4 100644 --- a/src/emu/cpu/h8/h8.lst +++ b/src/emu/cpu/h8/h8.lst @@ -937,7 +937,7 @@ macro jsr32 %opc %spreg } r8_w(IR[0], do_add8(TMP1, TMP2)); prefetch(); - + 0f80 ff88 0 mov.l r32h r32l h TMP1 = r32_r(IR[0] >> 4); set_nzv32(TMP1); @@ -1303,7 +1303,7 @@ macro jsr32 %opc %spreg } r8_w(IR[0], do_add8(TMP1, TMP2)); prefetch(); - + 1f80 ff88 0 cmp.l r32h r32l h do_sub32(r32_r(IR[0]), r32_r(IR[0] >> 4)); prefetch(); @@ -2206,19 +2206,19 @@ macro jsr32 %opc %spreg 7000 ff80 0 bset imm3 r8l TMP1 = r8_r(IR[0]); bset IR[0] >> 4 - r8_w(IR[0], TMP1); + r8_w(IR[0], TMP1); prefetch(); 7100 ff80 0 bnot imm3 r8l TMP1 = r8_r(IR[0]); bnot IR[0] >> 4 - r8_w(IR[0], TMP1); + r8_w(IR[0], TMP1); prefetch(); 7200 ff80 0 bclr imm3 r8l TMP1 = r8_r(IR[0]); bclr IR[0] >> 4 - r8_w(IR[0], TMP1); + r8_w(IR[0], TMP1); prefetch(); 7300 ff80 0 btst imm3 r8l diff --git a/src/emu/cpu/h8/h83002.h b/src/emu/cpu/h8/h83002.h index 010846729c3..f3d9745c321 100644 --- a/src/emu/cpu/h8/h83002.h +++ b/src/emu/cpu/h8/h83002.h @@ -54,7 +54,7 @@ public: h83002_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); DECLARE_READ8_MEMBER(syscr_r); - DECLARE_WRITE8_MEMBER(syscr_w); + DECLARE_WRITE8_MEMBER(syscr_w); protected: required_device<h8h_intc_device> intc; diff --git a/src/emu/cpu/h8/h83006.h b/src/emu/cpu/h8/h83006.h index 4bea038b541..9d2061dcd3e 100644 --- a/src/emu/cpu/h8/h83006.h +++ b/src/emu/cpu/h8/h83006.h @@ -56,7 +56,7 @@ public: h83006_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); DECLARE_READ8_MEMBER(syscr_r); - DECLARE_WRITE8_MEMBER(syscr_w); + DECLARE_WRITE8_MEMBER(syscr_w); protected: required_device<h8h_intc_device> intc; diff --git a/src/emu/cpu/h8/h83008.h b/src/emu/cpu/h8/h83008.h index 9be1b6b978f..699f7453897 100644 --- a/src/emu/cpu/h8/h83008.h +++ b/src/emu/cpu/h8/h83008.h @@ -56,7 +56,7 @@ public: h83008_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); DECLARE_READ8_MEMBER(syscr_r); - DECLARE_WRITE8_MEMBER(syscr_w); + DECLARE_WRITE8_MEMBER(syscr_w); protected: required_device<h8h_intc_device> intc; diff --git a/src/emu/cpu/h8/h83048.h b/src/emu/cpu/h8/h83048.h index 7ece527222a..d3bcf295d11 100644 --- a/src/emu/cpu/h8/h83048.h +++ b/src/emu/cpu/h8/h83048.h @@ -63,7 +63,7 @@ public: h83048_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); DECLARE_READ8_MEMBER(syscr_r); - DECLARE_WRITE8_MEMBER(syscr_w); + DECLARE_WRITE8_MEMBER(syscr_w); protected: required_device<h8h_intc_device> intc; diff --git a/src/emu/cpu/h8/h83337.c b/src/emu/cpu/h8/h83337.c index a6768de88e6..2a4f261a517 100644 --- a/src/emu/cpu/h8/h83337.c +++ b/src/emu/cpu/h8/h83337.c @@ -95,9 +95,9 @@ DEVICE_ADDRESS_MAP_START(map, 16, h83337_device) AM_RANGE(0xff90, 0xff91) AM_DEVREADWRITE8("timer16:0", h8_timer16_channel_device, tier_r, tier_w, 0xff00) AM_RANGE(0xff90, 0xff91) AM_DEVREADWRITE8("timer16:0", h8_timer16_channel_device, tsr_r, tsr_w, 0x00ff) AM_RANGE(0xff92, 0xff93) AM_DEVREADWRITE( "timer16:0", h8_timer16_channel_device, tcnt_r, tcnt_w ) -// AM_RANGE(0xff94, 0xff95) AM_DEVREADWRITE( "timer16:0", h8_timer16_channel_device, ocr_r, ocr_w ) +// AM_RANGE(0xff94, 0xff95) AM_DEVREADWRITE( "timer16:0", h8_timer16_channel_device, ocr_r, ocr_w ) AM_RANGE(0xff96, 0xff97) AM_DEVREADWRITE8("timer16:0", h8_timer16_channel_device, tcr_r, tcr_w, 0xff00) -// AM_RANGE(0xff96, 0xff97) AM_DEVREADWRITE8("timer16:0", h8_timer16_channel_device, tocr_r, tocr_w, 0x00ff) +// AM_RANGE(0xff96, 0xff97) AM_DEVREADWRITE8("timer16:0", h8_timer16_channel_device, tocr_r, tocr_w, 0x00ff) AM_RANGE(0xff98, 0xff9f) AM_DEVREAD( "timer16:0", h8_timer16_channel_device, tgr_r ) AM_RANGE(0xffac, 0xffad) AM_DEVREADWRITE8("port1", h8_port_device, pcr_r, pcr_w, 0xff00) diff --git a/src/emu/cpu/h8/h83337.h b/src/emu/cpu/h8/h83337.h index 393068c4da0..ed5467cd801 100644 --- a/src/emu/cpu/h8/h83337.h +++ b/src/emu/cpu/h8/h83337.h @@ -63,13 +63,13 @@ public: h83337_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); DECLARE_READ8_MEMBER(wscr_r); - DECLARE_WRITE8_MEMBER(wscr_w); + DECLARE_WRITE8_MEMBER(wscr_w); DECLARE_READ8_MEMBER(stcr_r); - DECLARE_WRITE8_MEMBER(stcr_w); + DECLARE_WRITE8_MEMBER(stcr_w); DECLARE_READ8_MEMBER(syscr_r); - DECLARE_WRITE8_MEMBER(syscr_w); + DECLARE_WRITE8_MEMBER(syscr_w); DECLARE_READ8_MEMBER(mdcr_r); - DECLARE_WRITE8_MEMBER(mdcr_w); + DECLARE_WRITE8_MEMBER(mdcr_w); protected: required_device<h8_intc_device> intc; diff --git a/src/emu/cpu/h8/h8_adc.c b/src/emu/cpu/h8/h8_adc.c index 8def493ef86..644f8608a31 100644 --- a/src/emu/cpu/h8/h8_adc.c +++ b/src/emu/cpu/h8/h8_adc.c @@ -124,7 +124,7 @@ void h8_adc_device::device_reset() mode = IDLE; channel = 0; count = 0; - next_event = 0; + next_event = 0; mode_update(); analog_powered = !analog_power_control; adtrg = true; @@ -188,7 +188,7 @@ void h8_adc_device::start_conversion() count = start_count; sampling(); conversion_wait(true, !analog_powered); - analog_powered = true; + analog_powered = true; } void h8_adc_device::timeout(UINT64 current_time) @@ -450,7 +450,7 @@ void h8_adc_2655_device::mode_update() if(adcsr & 0x03) { mode |= BUFFER; - + } if(adcsr & 0x08) { diff --git a/src/emu/cpu/h8/h8_adc.h b/src/emu/cpu/h8/h8_adc.h index 6d0cef502f5..314af72c24b 100644 --- a/src/emu/cpu/h8/h8_adc.h +++ b/src/emu/cpu/h8/h8_adc.h @@ -43,7 +43,7 @@ #include "h8.h" #include "h8_intc.h" -#define MCFG_H8_ADC_GENERIC_ADD( _tag, _type, intc, vect ) \ +#define MCFG_H8_ADC_GENERIC_ADD( _tag, _type, intc, vect ) \ MCFG_DEVICE_ADD( _tag, _type, 0 ) \ downcast<h8_adc_device *>(device)->set_info(intc, vect); diff --git a/src/emu/cpu/h8/h8_intc.c b/src/emu/cpu/h8/h8_intc.c index 18570794a63..b563cdb63ae 100644 --- a/src/emu/cpu/h8/h8_intc.c +++ b/src/emu/cpu/h8/h8_intc.c @@ -280,10 +280,10 @@ void h8h_intc_device::update_irq_types() const int h8h_intc_device::vector_to_slot[64] = { -1, -1, -1, -1, -1, -1, -1, -1, // NMI at 7 -1, -1, -1, -1, 0, 1, 2, 2, // IRQ 0-3 - 3, 3, 3, 3, 4, 4, 4, 4, // IRQ 4-5, (reservedx2), WOVI, CMI, (reserved), ADI - 5, 5, 5, 5, 6, 6, 6, 6, // IMIA0, IMIB0, OVI0, (reserved), IMIA1, IMIB1, OVI1, (reserved) - 7, 7, 7, 7, 8, 8, 8, 8, // IMIA2, IMIB2, OVI2, (reserved), CMIA0, CMIB0, CMIx1, TOVI0/1 - 9, 9, 9, 9, 10, 10, 10, 10, // CMIA2, CMIB2, CMIx3, TOVI2/3, DEND0A, DEND0B, DEND1A, DEND1B + 3, 3, 3, 3, 4, 4, 4, 4, // IRQ 4-5, (reservedx2), WOVI, CMI, (reserved), ADI + 5, 5, 5, 5, 6, 6, 6, 6, // IMIA0, IMIB0, OVI0, (reserved), IMIA1, IMIB1, OVI1, (reserved) + 7, 7, 7, 7, 8, 8, 8, 8, // IMIA2, IMIB2, OVI2, (reserved), CMIA0, CMIB0, CMIx1, TOVI0/1 + 9, 9, 9, 9, 10, 10, 10, 10, // CMIA2, CMIB2, CMIx3, TOVI2/3, DEND0A, DEND0B, DEND1A, DEND1B 11, 11, 11, 11, 12, 12, 12, 12, // (reservedx4), ERI0, RXI0, TXI0, TEI0 13, 13, 13, 13, 14, 14, 14, 14 // ERI1, RXI1, TXI1, TEI1, ERI2, RXI2, TXI2, TEI2 }; @@ -342,8 +342,8 @@ WRITE8_MEMBER(h8s_intc_device::iprk_w) const int h8s_intc_device::vector_to_slot[92] = { -1, -1, -1, -1, -1, -1, -1, -1, // NMI at 7 -1, -1, -1, -1, -1, -1, -1, -1, - 0, 1, 2, 2, 3, 3, 4, 4, // IRQ 0-7 - 5, 6, 7, 8, 9, 9, 9, 9, // SWDTEND, WOVI, CMI, (reserved), ADI + 0, 1, 2, 2, 3, 3, 4, 4, // IRQ 0-7 + 5, 6, 7, 8, 9, 9, 9, 9, // SWDTEND, WOVI, CMI, (reserved), ADI 10, 10, 10, 10, 10, 10, 10, 10, // TGI0A, TGI0B, TGI0C, TGI0D, TGI0V 11, 11, 11, 11, 12, 12, 12, 12, // TGI1A, TGI1B, TGI1V, TGI1U, TGI2A, TGI2B, TGI2V, TGI2U 13, 13, 13, 13, 13, 13, 13, 13, // TGI3A, TGI3B, TGI3C, TGI3D, TGI3V diff --git a/src/emu/cpu/h8/h8_intc.h b/src/emu/cpu/h8/h8_intc.h index d0b2e2420af..bc28b26d604 100644 --- a/src/emu/cpu/h8/h8_intc.h +++ b/src/emu/cpu/h8/h8_intc.h @@ -42,13 +42,13 @@ #include "h8.h" -#define MCFG_H8_INTC_ADD( _tag ) \ +#define MCFG_H8_INTC_ADD( _tag ) \ MCFG_DEVICE_ADD( _tag, H8_INTC, 0 ) -#define MCFG_H8H_INTC_ADD( _tag ) \ +#define MCFG_H8H_INTC_ADD( _tag ) \ MCFG_DEVICE_ADD( _tag, H8H_INTC, 0 ) -#define MCFG_H8S_INTC_ADD( _tag ) \ +#define MCFG_H8S_INTC_ADD( _tag ) \ MCFG_DEVICE_ADD( _tag, H8S_INTC, 0 ) @@ -100,7 +100,7 @@ public: h8h_intc_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source); DECLARE_READ8_MEMBER(isr_r); - DECLARE_WRITE8_MEMBER(isr_w); + DECLARE_WRITE8_MEMBER(isr_w); DECLARE_READ8_MEMBER(icr_r); DECLARE_WRITE8_MEMBER(icr_w); DECLARE_READ8_MEMBER(icrc_r); diff --git a/src/emu/cpu/h8/h8_port.c b/src/emu/cpu/h8/h8_port.c index 7694f571c7b..db78d88e589 100644 --- a/src/emu/cpu/h8/h8_port.c +++ b/src/emu/cpu/h8/h8_port.c @@ -18,21 +18,21 @@ void h8_port_device::set_info(int _address, UINT8 _default_ddr, UINT8 _mask) WRITE8_MEMBER(h8_port_device::ddr_w) { - // logerror("%s: ddr_w %02x\n", tag(), data); + // logerror("%s: ddr_w %02x\n", tag(), data); ddr = data; update_output(); } WRITE8_MEMBER(h8_port_device::dr_w) { - // logerror("%s: dr_w %02x\n", tag(), data); + // logerror("%s: dr_w %02x\n", tag(), data); dr = data; update_output(); } READ8_MEMBER(h8_port_device::dr_r) { - // logerror("%s: dr_r %02x\n", tag(), (dr | mask) & 0xff); + // logerror("%s: dr_r %02x\n", tag(), (dr | mask) & 0xff); return dr | mask; } @@ -41,8 +41,8 @@ READ8_MEMBER(h8_port_device::port_r) UINT8 res = mask | (dr & ddr); if((ddr & ~mask) != UINT8(~mask)) res |= io->read_word(address) & ~ddr; - - // logerror("%s: port_r %02x (%02x %02x)\n", tag(), res, ddr & ~mask, UINT8(~mask)); + + // logerror("%s: port_r %02x (%02x %02x)\n", tag(), res, ddr & ~mask, UINT8(~mask)); return res; } diff --git a/src/emu/cpu/h8/h8_port.h b/src/emu/cpu/h8/h8_port.h index 2407929d14b..10df3d8a3e2 100644 --- a/src/emu/cpu/h8/h8_port.h +++ b/src/emu/cpu/h8/h8_port.h @@ -42,7 +42,7 @@ #include "h8.h" -#define MCFG_H8_PORT_ADD( _tag, address, ddr, mask ) \ +#define MCFG_H8_PORT_ADD( _tag, address, ddr, mask ) \ MCFG_DEVICE_ADD( _tag, H8_PORT, 0 ) \ downcast<h8_port_device *>(device)->set_info(address, ddr, mask); diff --git a/src/emu/cpu/h8/h8_sci.c b/src/emu/cpu/h8/h8_sci.c index 0db62806588..e5213bc109b 100644 --- a/src/emu/cpu/h8/h8_sci.c +++ b/src/emu/cpu/h8/h8_sci.c @@ -32,13 +32,13 @@ WRITE8_MEMBER(h8_sci_device::smr_w) { smr = data; logerror("%s: smr_w %02x %s %c%c%c%s /%d (%06x)\n", tag(), data, - data & SMR_CA ? "sync" : "async", - data & SMR_CHR ? '7' : '8', - data & SMR_PE ? data & SMR_OE ? 'o' : 'e' : 'n', - data & SMR_STOP ? '2' : '1', - data & SMR_MP ? " mp" : "", - 1 << 2*(data & SMR_CKS), - cpu->pc()); + data & SMR_CA ? "sync" : "async", + data & SMR_CHR ? '7' : '8', + data & SMR_PE ? data & SMR_OE ? 'o' : 'e' : 'n', + data & SMR_STOP ? '2' : '1', + data & SMR_MP ? " mp" : "", + 1 << 2*(data & SMR_CKS), + cpu->pc()); clock_update(); } @@ -64,14 +64,14 @@ READ8_MEMBER(h8_sci_device::brr_r) WRITE8_MEMBER(h8_sci_device::scr_w) { logerror("%s: scr_w %02x%s%s%s%s%s%s clk=%d (%06x)\n", tag(), data, - data & SCR_TIE ? " txi" : "", - data & SCR_RIE ? " rxi" : "", - data & SCR_TE ? " tx" : "", - data & SCR_RE ? " rx" : "", - data & SCR_MPIE ? " mpi" : "", - data & SCR_TEIE ? " tei" : "", - data & SCR_CKE, - cpu->pc()); + data & SCR_TIE ? " txi" : "", + data & SCR_RIE ? " rxi" : "", + data & SCR_TE ? " tx" : "", + data & SCR_RE ? " rx" : "", + data & SCR_MPIE ? " mpi" : "", + data & SCR_TEIE ? " tei" : "", + data & SCR_CKE, + cpu->pc()); UINT8 delta = scr ^ data; scr = data; @@ -217,7 +217,7 @@ void h8_sci_device::device_start() external_to_internal_ratio = (external_clock_period*cpu->clock()).as_double(); internal_to_external_ratio = 1/external_to_internal_ratio; } - + intc = siblingdevice<h8_intc_device>(intc_tag); save_item(NAME(rdr)); save_item(NAME(tdr)); @@ -301,7 +301,7 @@ WRITE_LINE_MEMBER(h8_sci_device::clk_w) case CLKM_EXTERNAL_SYNC: if((!ext_clock_value) && (clock_state & CLK_TX)) tx_dropped_edge(); - + else if(ext_clock_value && (clock_state & CLK_RX)) rx_raised_edge(); break; @@ -324,16 +324,16 @@ UINT64 h8_sci_device::internal_update(UINT64 current_time) clock_base += fp; } assert(delta < fp); - + bool new_clock = delta >= divider; if(new_clock != clock_value) { cpu->synchronize(); if((!new_clock) && (clock_state & CLK_TX)) tx_dropped_edge(); - + else if(new_clock && (clock_state & CLK_RX)) rx_raised_edge(); - + clock_value = new_clock; if(clock_state || clock_value) clk_cb(clock_value); @@ -359,16 +359,16 @@ UINT64 h8_sci_device::internal_update(UINT64 current_time) cpu->synchronize(); if((!new_clock) && (clock_state & CLK_TX)) tx_dropped_edge(); - + else if(new_clock && (clock_state & CLK_RX)) rx_raised_edge(); - + clock_value = new_clock; if(clock_mode == CLKM_INTERNAL_ASYNC_OUT && (clock_state || !clock_value)) clk_cb(clock_value); } } - + event = clock_base + (clock_value ? fp : divider*8); } break; @@ -385,14 +385,14 @@ UINT64 h8_sci_device::internal_update(UINT64 current_time) cpu->synchronize(); if((!new_clock) && (clock_state & CLK_TX)) tx_dropped_edge(); - + else if(new_clock && (clock_state & CLK_RX)) rx_raised_edge(); - + clock_value = new_clock; } } - + event = UINT64((clock_base + (clock_value ? 2 : 1))*external_to_internal_ratio)+1; } break; @@ -409,14 +409,14 @@ UINT64 h8_sci_device::internal_update(UINT64 current_time) cpu->synchronize(); if((!new_clock) && (clock_state & CLK_TX)) tx_dropped_edge(); - + else if(new_clock && (clock_state & CLK_RX)) rx_raised_edge(); - + clock_value = new_clock; } } - + event = UINT64((clock_base + (clock_value ? 16 : 8))*external_to_internal_ratio)+1; } break; @@ -503,7 +503,7 @@ void h8_sci_device::tx_start() } clock_start(CLK_TX); } - + void h8_sci_device::tx_dropped_edge() { logerror("%s: tx_dropped_edge state=%s bit=%d\n", tag(), state_names[tx_state], tx_bit); @@ -676,4 +676,3 @@ void h8_sci_device::rx_raised_edge() } logerror("%s: -> state=%s, bit=%d\n", tag(), state_names[rx_state], rx_bit); } - diff --git a/src/emu/cpu/h8/h8_sci.h b/src/emu/cpu/h8/h8_sci.h index e0083a87676..bd508e44061 100644 --- a/src/emu/cpu/h8/h8_sci.h +++ b/src/emu/cpu/h8/h8_sci.h @@ -84,7 +84,7 @@ public: template<class _Object> static devcb2_base &set_clk_cb(device_t &device, _Object object) { return downcast<h8_sci_device &>(device).clk_cb.set_callback(object); } UINT64 internal_update(UINT64 current_time); - + protected: enum { ST_IDLE, ST_START, ST_BIT, ST_PARITY, ST_STOP, ST_LAST_TICK, diff --git a/src/emu/cpu/h8/h8_timer16.c b/src/emu/cpu/h8/h8_timer16.c index 92ec7f932b2..abf89b42c16 100644 --- a/src/emu/cpu/h8/h8_timer16.c +++ b/src/emu/cpu/h8/h8_timer16.c @@ -94,14 +94,14 @@ WRITE8_MEMBER(h8_timer16_channel_device::tier_w) tier = data; tier_update(); logerror("%s: irq %c%c%c%c%c%c trigger=%d\n", - tag(), - ier & IRQ_A ? 'a' : '.', - ier & IRQ_B ? 'b' : '.', - ier & IRQ_C ? 'c' : '.', - ier & IRQ_D ? 'd' : '.', - ier & IRQ_V ? 'v' : '.', - ier & IRQ_U ? 'u' : '.', - ier & IRQ_TRIG ? 1 : 0); + tag(), + ier & IRQ_A ? 'a' : '.', + ier & IRQ_B ? 'b' : '.', + ier & IRQ_C ? 'c' : '.', + ier & IRQ_D ? 'd' : '.', + ier & IRQ_V ? 'v' : '.', + ier & IRQ_U ? 'u' : '.', + ier & IRQ_TRIG ? 1 : 0); recalc_event(); } @@ -218,11 +218,11 @@ void h8_timer16_channel_device::update_counter(UINT64 cur_time) tcnt = tt % counter_cycle; if(0) logerror("%s: Updating %d (%ld %ld) (%ld %ld) -> %d/%d\n", - tag(), - ott, - long(last_clock_update), long(cur_time), - long(base_time), long(new_time), - tt, tcnt); + tag(), + ott, + long(last_clock_update), long(cur_time), + long(base_time), long(new_time), + tt, tcnt); for(int i=0; i<tgr_count; i++) if((ier & (1 << i)) && (tt == tgr[i] || tcnt == tgr[i]) && interrupt[i] != -1) { @@ -284,7 +284,7 @@ void h8_timer16_channel_device::recalc_event(UINT64 cur_time) if(0) logerror("%s: tcnt=%d tgr%c=%d cycle=%d -> delay=%d\n", - tag(), tcnt, 'a'+i, tgr[i], counter_cycle, new_delay); + tag(), tcnt, 'a'+i, tgr[i], counter_cycle, new_delay); if(event_delay > new_delay) event_delay = new_delay; } @@ -292,10 +292,10 @@ void h8_timer16_channel_device::recalc_event(UINT64 cur_time) event_time = ((((cur_time + (1ULL << clock_divider) - phase) >> clock_divider) + event_delay - 1) << clock_divider) + phase; else event_time = 0; - + if(event_time && 0) logerror("%s: next event in %d cycles (%ld)\n", tag(), int(event_time - cpu->get_cycle()), long(event_time)); - + } else { logerror("decrementing counter\n"); exit(1); @@ -622,7 +622,7 @@ void h8s_timer16_channel_device::set_chain(const char *_chain_tag) } void h8s_timer16_channel_device::set_info(int _tgr_count, UINT8 _tier_mask, const char *intc, int irq_base, - int t0, int t1, int t2, int t3, int t4, int t5, int t6, int t7) + int t0, int t1, int t2, int t3, int t4, int t5, int t6, int t7) { tgr_count = _tgr_count; tbr_count = 0; diff --git a/src/emu/cpu/h8/h8_timer16.h b/src/emu/cpu/h8/h8_timer16.h index 210951ead97..2f3c581fe55 100644 --- a/src/emu/cpu/h8/h8_timer16.h +++ b/src/emu/cpu/h8/h8_timer16.h @@ -43,23 +43,23 @@ #include "h8.h" #include "h8_intc.h" -#define MCFG_H8_TIMER16_ADD( _tag, _count, _tstr ) \ - MCFG_DEVICE_ADD( _tag, H8_TIMER16, 0 ) \ +#define MCFG_H8_TIMER16_ADD( _tag, _count, _tstr ) \ + MCFG_DEVICE_ADD( _tag, H8_TIMER16, 0 ) \ downcast<h8_timer16_device *>(device)->set_info(_count, _tstr); #define MCFG_H8_TIMER16_CHANNEL_ADD( _tag, tgr_count, tbr_count, intc, irq_base ) \ - MCFG_DEVICE_ADD( _tag, H8_TIMER16_CHANNEL, 0 ) \ + MCFG_DEVICE_ADD( _tag, H8_TIMER16_CHANNEL, 0 ) \ downcast<h8_timer16_channel_device *>(device)->set_info(tgr_count, tbr_count, intc, irq_base); #define MCFG_H8H_TIMER16_CHANNEL_ADD( _tag, tgr_count, tbr_count, intc, irq_base ) \ - MCFG_DEVICE_ADD( _tag, H8H_TIMER16_CHANNEL, 0 ) \ + MCFG_DEVICE_ADD( _tag, H8H_TIMER16_CHANNEL, 0 ) \ downcast<h8h_timer16_channel_device *>(device)->set_info(tgr_count, tbr_count, intc, irq_base); #define MCFG_H8S_TIMER16_CHANNEL_ADD( _tag, tgr_count, tier_mask, intc, irq_base, t0, t1, t2, t3, t4, t5, t6, t7 ) \ - MCFG_DEVICE_ADD( _tag, H8S_TIMER16_CHANNEL, 0 ) \ + MCFG_DEVICE_ADD( _tag, H8S_TIMER16_CHANNEL, 0 ) \ downcast<h8s_timer16_channel_device *>(device)->set_info(tgr_count, tier_mask, intc, irq_base, t0, t1, t2, t3, t4, t5, t6, t7); -#define MCFG_H8S_TIMER16_CHANNEL_SET_CHAIN( _tag ) \ +#define MCFG_H8S_TIMER16_CHANNEL_SET_CHAIN( _tag ) \ downcast<h8s_timer16_channel_device *>(device)->set_chain(_tag); class h8_timer16_channel_device : public device_t { @@ -180,7 +180,7 @@ public: virtual ~h8s_timer16_channel_device(); void set_info(int tgr_count, UINT8 _tier_mask, const char *intc, int irq_base, - int t0, int t1, int t2, int t3, int t4, int t5, int t6, int t7); + int t0, int t1, int t2, int t3, int t4, int t5, int t6, int t7); void set_chain(const char *chain_tag); protected: diff --git a/src/emu/cpu/h8/h8_timer8.c b/src/emu/cpu/h8/h8_timer8.c index 7f6f7178686..074085b5f06 100644 --- a/src/emu/cpu/h8/h8_timer8.c +++ b/src/emu/cpu/h8/h8_timer8.c @@ -92,7 +92,7 @@ void h8_timer8_channel_device::update_tcr() clock_type = INPUT_UPDOWN; clock_divider = 0; logerror("%s: clock external both edges", tag()); - break; + break; } switch(tcr & TCR_CCLR) { @@ -118,9 +118,9 @@ void h8_timer8_channel_device::update_tcr() } logerror(", irq=%c%c%c\n", - tcr & TCR_CMIEB ? 'b' : '-', - tcr & TCR_CMIEA ? 'a' : '-', - tcr & TCR_OVIE ? 'o' : '-'); + tcr & TCR_CMIEB ? 'b' : '-', + tcr & TCR_CMIEA ? 'a' : '-', + tcr & TCR_OVIE ? 'o' : '-'); } READ8_MEMBER(h8_timer8_channel_device::tcsr_r) @@ -223,7 +223,7 @@ void h8_timer8_channel_device::update_counter(UINT64 cur_time) if(tt == tcor[0] || tcnt == tcor[0]) { if(chained_timer) chained_timer->chained_timer_tcora(); - + if(!(tcsr & TCSR_CMFA)) { tcsr |= TCSR_CMFA; if(tcr & TCR_CMIEA) @@ -317,7 +317,7 @@ void h8_timer8_channel_device::timer_tick() if(tcnt == tcor[0]) { if(chained_timer) chained_timer->chained_timer_tcora(); - + if(!(tcsr & TCSR_CMFA)) { tcsr |= TCSR_CMFA; if(tcr & TCR_CMIEA) diff --git a/src/emu/cpu/h8/h8_timer8.h b/src/emu/cpu/h8/h8_timer8.h index 0b8915a87cf..fb73a7eb17e 100644 --- a/src/emu/cpu/h8/h8_timer8.h +++ b/src/emu/cpu/h8/h8_timer8.h @@ -44,11 +44,11 @@ #include "h8_intc.h" #define MCFG_H8_TIMER8_CHANNEL_ADD( _tag, intc, irq_ca, irq_cb, irq_v, div1, div2, div3, div4, div5, div6 ) \ - MCFG_DEVICE_ADD( _tag, H8_TIMER8_CHANNEL, 0 ) \ + MCFG_DEVICE_ADD( _tag, H8_TIMER8_CHANNEL, 0 ) \ downcast<h8_timer8_channel_device *>(device)->set_info(intc, irq_ca, irq_cb, irq_v, div1, div2, div3, div4, div5, div6); #define MCFG_H8H_TIMER8_CHANNEL_ADD( _tag, intc, irq_ca, irq_cb, irq_v, chain, chain_mode, has_adte, has_ice ) \ - MCFG_DEVICE_ADD( _tag, H8H_TIMER8_CHANNEL, 0 ) \ + MCFG_DEVICE_ADD( _tag, H8H_TIMER8_CHANNEL, 0 ) \ downcast<h8h_timer8_channel_device *>(device)->set_info(intc, irq_ca, irq_cb, irq_v, chain, chain_mode, has_adte, has_ice); class h8_timer8_channel_device : public device_t { @@ -95,7 +95,7 @@ protected: TCSR_ADTE = 0x10, TCSR_OVF = 0x20, TCSR_CMFA = 0x40, - TCSR_CMFB = 0x80 + TCSR_CMFB = 0x80 }; enum { diff --git a/src/emu/cpu/h8/h8s2245.c b/src/emu/cpu/h8/h8s2245.c index ee1aefaac9f..91a0f5bead9 100644 --- a/src/emu/cpu/h8/h8s2245.c +++ b/src/emu/cpu/h8/h8s2245.c @@ -101,33 +101,33 @@ static MACHINE_CONFIG_FRAGMENT(h8s2245) MCFG_H8H_TIMER8_CHANNEL_ADD("timer8_1", "intc", 68, 69, 70, "timer8_0", h8_timer8_channel_device::CHAIN_A, false, false) MCFG_H8_TIMER16_ADD("timer16", 3, 0x00) MCFG_H8S_TIMER16_CHANNEL_ADD("timer16:0", 4, 0x60, "intc", 32, - h8_timer16_channel_device::DIV_1, - h8_timer16_channel_device::DIV_4, - h8_timer16_channel_device::DIV_16, - h8_timer16_channel_device::DIV_64, - h8_timer16_channel_device::INPUT_A, - h8_timer16_channel_device::INPUT_B, - h8_timer16_channel_device::INPUT_C, - h8_timer16_channel_device::INPUT_D) + h8_timer16_channel_device::DIV_1, + h8_timer16_channel_device::DIV_4, + h8_timer16_channel_device::DIV_16, + h8_timer16_channel_device::DIV_64, + h8_timer16_channel_device::INPUT_A, + h8_timer16_channel_device::INPUT_B, + h8_timer16_channel_device::INPUT_C, + h8_timer16_channel_device::INPUT_D) MCFG_H8S_TIMER16_CHANNEL_ADD("timer16:1", 2, 0x4c, "intc", 40, - h8_timer16_channel_device::DIV_1, - h8_timer16_channel_device::DIV_4, - h8_timer16_channel_device::DIV_16, - h8_timer16_channel_device::DIV_64, - h8_timer16_channel_device::INPUT_A, - h8_timer16_channel_device::INPUT_B, - h8_timer16_channel_device::DIV_256, - h8_timer16_channel_device::CHAIN) + h8_timer16_channel_device::DIV_1, + h8_timer16_channel_device::DIV_4, + h8_timer16_channel_device::DIV_16, + h8_timer16_channel_device::DIV_64, + h8_timer16_channel_device::INPUT_A, + h8_timer16_channel_device::INPUT_B, + h8_timer16_channel_device::DIV_256, + h8_timer16_channel_device::CHAIN) MCFG_H8S_TIMER16_CHANNEL_SET_CHAIN("timer16:2") MCFG_H8S_TIMER16_CHANNEL_ADD("timer16:2", 2, 0x4c, "intc", 44, - h8_timer16_channel_device::DIV_1, - h8_timer16_channel_device::DIV_4, - h8_timer16_channel_device::DIV_16, - h8_timer16_channel_device::DIV_64, - h8_timer16_channel_device::INPUT_A, - h8_timer16_channel_device::INPUT_B, - h8_timer16_channel_device::INPUT_C, - h8_timer16_channel_device::DIV_1024) + h8_timer16_channel_device::DIV_1, + h8_timer16_channel_device::DIV_4, + h8_timer16_channel_device::DIV_16, + h8_timer16_channel_device::DIV_64, + h8_timer16_channel_device::INPUT_A, + h8_timer16_channel_device::INPUT_B, + h8_timer16_channel_device::INPUT_C, + h8_timer16_channel_device::DIV_1024) MCFG_H8_SCI_ADD("sci0", "intc", 80, 81, 82, 83) MCFG_H8_SCI_ADD("sci1", "intc", 84, 85, 86, 87) MCFG_H8_SCI_ADD("sci2", "intc", 88, 89, 90, 91) diff --git a/src/emu/cpu/h8/h8s2245.h b/src/emu/cpu/h8/h8s2245.h index 8b1f0c2136b..d0b7108641c 100644 --- a/src/emu/cpu/h8/h8s2245.h +++ b/src/emu/cpu/h8/h8s2245.h @@ -63,7 +63,7 @@ public: h8s2245_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); DECLARE_READ8_MEMBER(syscr_r); - DECLARE_WRITE8_MEMBER(syscr_w); + DECLARE_WRITE8_MEMBER(syscr_w); protected: required_device<h8s_intc_device> intc; diff --git a/src/emu/cpu/h8/h8s2320.c b/src/emu/cpu/h8/h8s2320.c index 8121b9e4fbb..83e27aaa9f3 100644 --- a/src/emu/cpu/h8/h8s2320.c +++ b/src/emu/cpu/h8/h8s2320.c @@ -145,61 +145,61 @@ static MACHINE_CONFIG_FRAGMENT(h8s2320) MCFG_H8H_TIMER8_CHANNEL_ADD("timer8_1", "intc", 68, 69, 70, "timer8_0", h8_timer8_channel_device::CHAIN_A, false, false) MCFG_H8_TIMER16_ADD("timer16", 6, 0x00) MCFG_H8S_TIMER16_CHANNEL_ADD("timer16:0", 4, 0x60, "intc", 32, - h8_timer16_channel_device::DIV_1, - h8_timer16_channel_device::DIV_4, - h8_timer16_channel_device::DIV_16, - h8_timer16_channel_device::DIV_64, - h8_timer16_channel_device::INPUT_A, - h8_timer16_channel_device::INPUT_B, - h8_timer16_channel_device::INPUT_C, - h8_timer16_channel_device::INPUT_D) + h8_timer16_channel_device::DIV_1, + h8_timer16_channel_device::DIV_4, + h8_timer16_channel_device::DIV_16, + h8_timer16_channel_device::DIV_64, + h8_timer16_channel_device::INPUT_A, + h8_timer16_channel_device::INPUT_B, + h8_timer16_channel_device::INPUT_C, + h8_timer16_channel_device::INPUT_D) MCFG_H8S_TIMER16_CHANNEL_ADD("timer16:1", 2, 0x4c, "intc", 40, - h8_timer16_channel_device::DIV_1, - h8_timer16_channel_device::DIV_4, - h8_timer16_channel_device::DIV_16, - h8_timer16_channel_device::DIV_64, - h8_timer16_channel_device::INPUT_A, - h8_timer16_channel_device::INPUT_B, - h8_timer16_channel_device::DIV_256, - h8_timer16_channel_device::CHAIN) + h8_timer16_channel_device::DIV_1, + h8_timer16_channel_device::DIV_4, + h8_timer16_channel_device::DIV_16, + h8_timer16_channel_device::DIV_64, + h8_timer16_channel_device::INPUT_A, + h8_timer16_channel_device::INPUT_B, + h8_timer16_channel_device::DIV_256, + h8_timer16_channel_device::CHAIN) MCFG_H8S_TIMER16_CHANNEL_SET_CHAIN("timer16:2") MCFG_H8S_TIMER16_CHANNEL_ADD("timer16:2", 2, 0x4c, "intc", 44, - h8_timer16_channel_device::DIV_1, - h8_timer16_channel_device::DIV_4, - h8_timer16_channel_device::DIV_16, - h8_timer16_channel_device::DIV_64, - h8_timer16_channel_device::INPUT_A, - h8_timer16_channel_device::INPUT_B, - h8_timer16_channel_device::INPUT_C, - h8_timer16_channel_device::DIV_1024) + h8_timer16_channel_device::DIV_1, + h8_timer16_channel_device::DIV_4, + h8_timer16_channel_device::DIV_16, + h8_timer16_channel_device::DIV_64, + h8_timer16_channel_device::INPUT_A, + h8_timer16_channel_device::INPUT_B, + h8_timer16_channel_device::INPUT_C, + h8_timer16_channel_device::DIV_1024) MCFG_H8S_TIMER16_CHANNEL_ADD("timer16:3", 4, 0x60, "intc", 48, - h8_timer16_channel_device::DIV_1, - h8_timer16_channel_device::DIV_4, - h8_timer16_channel_device::DIV_16, - h8_timer16_channel_device::DIV_64, - h8_timer16_channel_device::INPUT_A, - h8_timer16_channel_device::DIV_1024, - h8_timer16_channel_device::DIV_256, - h8_timer16_channel_device::DIV_4096) + h8_timer16_channel_device::DIV_1, + h8_timer16_channel_device::DIV_4, + h8_timer16_channel_device::DIV_16, + h8_timer16_channel_device::DIV_64, + h8_timer16_channel_device::INPUT_A, + h8_timer16_channel_device::DIV_1024, + h8_timer16_channel_device::DIV_256, + h8_timer16_channel_device::DIV_4096) MCFG_H8S_TIMER16_CHANNEL_ADD("timer16:4", 2, 0x4c, "intc", 56, - h8_timer16_channel_device::DIV_1, - h8_timer16_channel_device::DIV_4, - h8_timer16_channel_device::DIV_16, - h8_timer16_channel_device::DIV_64, - h8_timer16_channel_device::INPUT_A, - h8_timer16_channel_device::INPUT_C, - h8_timer16_channel_device::DIV_1024, - h8_timer16_channel_device::CHAIN) + h8_timer16_channel_device::DIV_1, + h8_timer16_channel_device::DIV_4, + h8_timer16_channel_device::DIV_16, + h8_timer16_channel_device::DIV_64, + h8_timer16_channel_device::INPUT_A, + h8_timer16_channel_device::INPUT_C, + h8_timer16_channel_device::DIV_1024, + h8_timer16_channel_device::CHAIN) MCFG_H8S_TIMER16_CHANNEL_SET_CHAIN("timer16:5") MCFG_H8S_TIMER16_CHANNEL_ADD("timer16:5", 2, 0x4c, "intc", 60, - h8_timer16_channel_device::DIV_1, - h8_timer16_channel_device::DIV_4, - h8_timer16_channel_device::DIV_16, - h8_timer16_channel_device::DIV_64, - h8_timer16_channel_device::INPUT_A, - h8_timer16_channel_device::INPUT_C, - h8_timer16_channel_device::DIV_256, - h8_timer16_channel_device::INPUT_D) + h8_timer16_channel_device::DIV_1, + h8_timer16_channel_device::DIV_4, + h8_timer16_channel_device::DIV_16, + h8_timer16_channel_device::DIV_64, + h8_timer16_channel_device::INPUT_A, + h8_timer16_channel_device::INPUT_C, + h8_timer16_channel_device::DIV_256, + h8_timer16_channel_device::INPUT_D) MCFG_H8_SCI_ADD("sci0", "intc", 80, 81, 82, 83) MCFG_H8_SCI_ADD("sci1", "intc", 84, 85, 86, 87) MCFG_H8_SCI_ADD("sci2", "intc", 88, 89, 90, 91) diff --git a/src/emu/cpu/h8/h8s2320.h b/src/emu/cpu/h8/h8s2320.h index 924e117150c..0df2d0761a4 100644 --- a/src/emu/cpu/h8/h8s2320.h +++ b/src/emu/cpu/h8/h8s2320.h @@ -68,7 +68,7 @@ public: h8s2320_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); DECLARE_READ8_MEMBER(syscr_r); - DECLARE_WRITE8_MEMBER(syscr_w); + DECLARE_WRITE8_MEMBER(syscr_w); protected: required_device<h8s_intc_device> intc; diff --git a/src/emu/cpu/h8/h8s2357.c b/src/emu/cpu/h8/h8s2357.c index e3274ab098d..ceb04b7ebfa 100644 --- a/src/emu/cpu/h8/h8s2357.c +++ b/src/emu/cpu/h8/h8s2357.c @@ -123,61 +123,61 @@ static MACHINE_CONFIG_FRAGMENT(h8s2357) MCFG_H8H_TIMER8_CHANNEL_ADD("timer8_1", "intc", 68, 69, 70, "timer8_0", h8_timer8_channel_device::CHAIN_A, false, false) MCFG_H8_TIMER16_ADD("timer16", 6, 0x00) MCFG_H8S_TIMER16_CHANNEL_ADD("timer16:0", 4, 0x60, "intc", 32, - h8_timer16_channel_device::DIV_1, - h8_timer16_channel_device::DIV_4, - h8_timer16_channel_device::DIV_16, - h8_timer16_channel_device::DIV_64, - h8_timer16_channel_device::INPUT_A, - h8_timer16_channel_device::INPUT_B, - h8_timer16_channel_device::INPUT_C, - h8_timer16_channel_device::INPUT_D) + h8_timer16_channel_device::DIV_1, + h8_timer16_channel_device::DIV_4, + h8_timer16_channel_device::DIV_16, + h8_timer16_channel_device::DIV_64, + h8_timer16_channel_device::INPUT_A, + h8_timer16_channel_device::INPUT_B, + h8_timer16_channel_device::INPUT_C, + h8_timer16_channel_device::INPUT_D) MCFG_H8S_TIMER16_CHANNEL_ADD("timer16:1", 2, 0x4c, "intc", 40, - h8_timer16_channel_device::DIV_1, - h8_timer16_channel_device::DIV_4, - h8_timer16_channel_device::DIV_16, - h8_timer16_channel_device::DIV_64, - h8_timer16_channel_device::INPUT_A, - h8_timer16_channel_device::INPUT_B, - h8_timer16_channel_device::DIV_256, - h8_timer16_channel_device::CHAIN) + h8_timer16_channel_device::DIV_1, + h8_timer16_channel_device::DIV_4, + h8_timer16_channel_device::DIV_16, + h8_timer16_channel_device::DIV_64, + h8_timer16_channel_device::INPUT_A, + h8_timer16_channel_device::INPUT_B, + h8_timer16_channel_device::DIV_256, + h8_timer16_channel_device::CHAIN) MCFG_H8S_TIMER16_CHANNEL_SET_CHAIN("timer16:2") MCFG_H8S_TIMER16_CHANNEL_ADD("timer16:2", 2, 0x4c, "intc", 44, - h8_timer16_channel_device::DIV_1, - h8_timer16_channel_device::DIV_4, - h8_timer16_channel_device::DIV_16, - h8_timer16_channel_device::DIV_64, - h8_timer16_channel_device::INPUT_A, - h8_timer16_channel_device::INPUT_B, - h8_timer16_channel_device::INPUT_C, - h8_timer16_channel_device::DIV_1024) + h8_timer16_channel_device::DIV_1, + h8_timer16_channel_device::DIV_4, + h8_timer16_channel_device::DIV_16, + h8_timer16_channel_device::DIV_64, + h8_timer16_channel_device::INPUT_A, + h8_timer16_channel_device::INPUT_B, + h8_timer16_channel_device::INPUT_C, + h8_timer16_channel_device::DIV_1024) MCFG_H8S_TIMER16_CHANNEL_ADD("timer16:3", 4, 0x60, "intc", 48, - h8_timer16_channel_device::DIV_1, - h8_timer16_channel_device::DIV_4, - h8_timer16_channel_device::DIV_16, - h8_timer16_channel_device::DIV_64, - h8_timer16_channel_device::INPUT_A, - h8_timer16_channel_device::DIV_1024, - h8_timer16_channel_device::DIV_256, - h8_timer16_channel_device::DIV_4096) + h8_timer16_channel_device::DIV_1, + h8_timer16_channel_device::DIV_4, + h8_timer16_channel_device::DIV_16, + h8_timer16_channel_device::DIV_64, + h8_timer16_channel_device::INPUT_A, + h8_timer16_channel_device::DIV_1024, + h8_timer16_channel_device::DIV_256, + h8_timer16_channel_device::DIV_4096) MCFG_H8S_TIMER16_CHANNEL_ADD("timer16:4", 2, 0x4c, "intc", 56, - h8_timer16_channel_device::DIV_1, - h8_timer16_channel_device::DIV_4, - h8_timer16_channel_device::DIV_16, - h8_timer16_channel_device::DIV_64, - h8_timer16_channel_device::INPUT_A, - h8_timer16_channel_device::INPUT_C, - h8_timer16_channel_device::DIV_1024, - h8_timer16_channel_device::CHAIN) + h8_timer16_channel_device::DIV_1, + h8_timer16_channel_device::DIV_4, + h8_timer16_channel_device::DIV_16, + h8_timer16_channel_device::DIV_64, + h8_timer16_channel_device::INPUT_A, + h8_timer16_channel_device::INPUT_C, + h8_timer16_channel_device::DIV_1024, + h8_timer16_channel_device::CHAIN) MCFG_H8S_TIMER16_CHANNEL_SET_CHAIN("timer16:5") MCFG_H8S_TIMER16_CHANNEL_ADD("timer16:5", 2, 0x4c, "intc", 60, - h8_timer16_channel_device::DIV_1, - h8_timer16_channel_device::DIV_4, - h8_timer16_channel_device::DIV_16, - h8_timer16_channel_device::DIV_64, - h8_timer16_channel_device::INPUT_A, - h8_timer16_channel_device::INPUT_C, - h8_timer16_channel_device::DIV_256, - h8_timer16_channel_device::INPUT_D) + h8_timer16_channel_device::DIV_1, + h8_timer16_channel_device::DIV_4, + h8_timer16_channel_device::DIV_16, + h8_timer16_channel_device::DIV_64, + h8_timer16_channel_device::INPUT_A, + h8_timer16_channel_device::INPUT_C, + h8_timer16_channel_device::DIV_256, + h8_timer16_channel_device::INPUT_D) MCFG_H8_SCI_ADD("sci0", "intc", 80, 81, 82, 83) MCFG_H8_SCI_ADD("sci1", "intc", 84, 85, 86, 87) MCFG_H8_SCI_ADD("sci2", "intc", 88, 89, 90, 91) diff --git a/src/emu/cpu/h8/h8s2357.h b/src/emu/cpu/h8/h8s2357.h index 35a51551388..b38f90e7737 100644 --- a/src/emu/cpu/h8/h8s2357.h +++ b/src/emu/cpu/h8/h8s2357.h @@ -65,7 +65,7 @@ public: h8s2357_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); DECLARE_READ8_MEMBER(syscr_r); - DECLARE_WRITE8_MEMBER(syscr_w); + DECLARE_WRITE8_MEMBER(syscr_w); protected: required_device<h8s_intc_device> intc; diff --git a/src/emu/cpu/h8/h8s2655.c b/src/emu/cpu/h8/h8s2655.c index d6775e32a01..6f3e8778bb3 100644 --- a/src/emu/cpu/h8/h8s2655.c +++ b/src/emu/cpu/h8/h8s2655.c @@ -96,61 +96,61 @@ static MACHINE_CONFIG_FRAGMENT(h8s2655) MCFG_H8H_TIMER8_CHANNEL_ADD("timer8_1", "intc", 68, 69, 70, "timer8_0", h8_timer8_channel_device::CHAIN_A, false, false) MCFG_H8_TIMER16_ADD("timer16", 6, 0x00) MCFG_H8S_TIMER16_CHANNEL_ADD("timer16:0", 4, 0x60, "intc", 32, - h8_timer16_channel_device::DIV_1, - h8_timer16_channel_device::DIV_4, - h8_timer16_channel_device::DIV_16, - h8_timer16_channel_device::DIV_64, - h8_timer16_channel_device::INPUT_A, - h8_timer16_channel_device::INPUT_B, - h8_timer16_channel_device::INPUT_C, - h8_timer16_channel_device::INPUT_D) + h8_timer16_channel_device::DIV_1, + h8_timer16_channel_device::DIV_4, + h8_timer16_channel_device::DIV_16, + h8_timer16_channel_device::DIV_64, + h8_timer16_channel_device::INPUT_A, + h8_timer16_channel_device::INPUT_B, + h8_timer16_channel_device::INPUT_C, + h8_timer16_channel_device::INPUT_D) MCFG_H8S_TIMER16_CHANNEL_ADD("timer16:1", 2, 0x4c, "intc", 40, - h8_timer16_channel_device::DIV_1, - h8_timer16_channel_device::DIV_4, - h8_timer16_channel_device::DIV_16, - h8_timer16_channel_device::DIV_64, - h8_timer16_channel_device::INPUT_A, - h8_timer16_channel_device::INPUT_B, - h8_timer16_channel_device::DIV_256, - h8_timer16_channel_device::CHAIN) + h8_timer16_channel_device::DIV_1, + h8_timer16_channel_device::DIV_4, + h8_timer16_channel_device::DIV_16, + h8_timer16_channel_device::DIV_64, + h8_timer16_channel_device::INPUT_A, + h8_timer16_channel_device::INPUT_B, + h8_timer16_channel_device::DIV_256, + h8_timer16_channel_device::CHAIN) MCFG_H8S_TIMER16_CHANNEL_SET_CHAIN("timer16:2") MCFG_H8S_TIMER16_CHANNEL_ADD("timer16:2", 2, 0x4c, "intc", 44, - h8_timer16_channel_device::DIV_1, - h8_timer16_channel_device::DIV_4, - h8_timer16_channel_device::DIV_16, - h8_timer16_channel_device::DIV_64, - h8_timer16_channel_device::INPUT_A, - h8_timer16_channel_device::INPUT_B, - h8_timer16_channel_device::INPUT_C, - h8_timer16_channel_device::DIV_1024) + h8_timer16_channel_device::DIV_1, + h8_timer16_channel_device::DIV_4, + h8_timer16_channel_device::DIV_16, + h8_timer16_channel_device::DIV_64, + h8_timer16_channel_device::INPUT_A, + h8_timer16_channel_device::INPUT_B, + h8_timer16_channel_device::INPUT_C, + h8_timer16_channel_device::DIV_1024) MCFG_H8S_TIMER16_CHANNEL_ADD("timer16:3", 4, 0x60, "intc", 48, - h8_timer16_channel_device::DIV_1, - h8_timer16_channel_device::DIV_4, - h8_timer16_channel_device::DIV_16, - h8_timer16_channel_device::DIV_64, - h8_timer16_channel_device::INPUT_A, - h8_timer16_channel_device::DIV_1024, - h8_timer16_channel_device::DIV_256, - h8_timer16_channel_device::DIV_4096) + h8_timer16_channel_device::DIV_1, + h8_timer16_channel_device::DIV_4, + h8_timer16_channel_device::DIV_16, + h8_timer16_channel_device::DIV_64, + h8_timer16_channel_device::INPUT_A, + h8_timer16_channel_device::DIV_1024, + h8_timer16_channel_device::DIV_256, + h8_timer16_channel_device::DIV_4096) MCFG_H8S_TIMER16_CHANNEL_ADD("timer16:4", 2, 0x4c, "intc", 56, - h8_timer16_channel_device::DIV_1, - h8_timer16_channel_device::DIV_4, - h8_timer16_channel_device::DIV_16, - h8_timer16_channel_device::DIV_64, - h8_timer16_channel_device::INPUT_A, - h8_timer16_channel_device::INPUT_C, - h8_timer16_channel_device::DIV_1024, - h8_timer16_channel_device::CHAIN) + h8_timer16_channel_device::DIV_1, + h8_timer16_channel_device::DIV_4, + h8_timer16_channel_device::DIV_16, + h8_timer16_channel_device::DIV_64, + h8_timer16_channel_device::INPUT_A, + h8_timer16_channel_device::INPUT_C, + h8_timer16_channel_device::DIV_1024, + h8_timer16_channel_device::CHAIN) MCFG_H8S_TIMER16_CHANNEL_SET_CHAIN("timer16:5") MCFG_H8S_TIMER16_CHANNEL_ADD("timer16:5", 2, 0x4c, "intc", 60, - h8_timer16_channel_device::DIV_1, - h8_timer16_channel_device::DIV_4, - h8_timer16_channel_device::DIV_16, - h8_timer16_channel_device::DIV_64, - h8_timer16_channel_device::INPUT_A, - h8_timer16_channel_device::INPUT_C, - h8_timer16_channel_device::DIV_256, - h8_timer16_channel_device::INPUT_D) + h8_timer16_channel_device::DIV_1, + h8_timer16_channel_device::DIV_4, + h8_timer16_channel_device::DIV_16, + h8_timer16_channel_device::DIV_64, + h8_timer16_channel_device::INPUT_A, + h8_timer16_channel_device::INPUT_C, + h8_timer16_channel_device::DIV_256, + h8_timer16_channel_device::INPUT_D) MCFG_H8_SCI_ADD("sci0", "intc", 80, 81, 82, 83) MCFG_H8_SCI_ADD("sci1", "intc", 84, 85, 86, 87) MCFG_H8_SCI_ADD("sci2", "intc", 88, 89, 90, 91) diff --git a/src/emu/cpu/h8/h8s2655.h b/src/emu/cpu/h8/h8s2655.h index 52c5f9ecdcf..ca90c99d777 100644 --- a/src/emu/cpu/h8/h8s2655.h +++ b/src/emu/cpu/h8/h8s2655.h @@ -57,7 +57,7 @@ public: h8s2655_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); DECLARE_READ8_MEMBER(syscr_r); - DECLARE_WRITE8_MEMBER(syscr_w); + DECLARE_WRITE8_MEMBER(syscr_w); protected: required_device<h8s_intc_device> intc; diff --git a/src/emu/cpu/i386/i386.c b/src/emu/cpu/i386/i386.c index e5b8a41c90f..0b8d023f3be 100644 --- a/src/emu/cpu/i386/i386.c +++ b/src/emu/cpu/i386/i386.c @@ -4326,4 +4326,3 @@ void pentium4_device::device_reset() CHANGE_PC(m_eip); } - diff --git a/src/emu/cpu/i86/i186.c b/src/emu/cpu/i86/i186.c index be65922ad54..4a40b7e0b85 100644 --- a/src/emu/cpu/i86/i186.c +++ b/src/emu/cpu/i86/i186.c @@ -642,7 +642,7 @@ void i80186_cpu_device::device_reset() m_timer[0].control = 0; m_timer[1].control = 0; m_timer[2].control = 0; - + set_irq_acknowledge_callback(device_irq_acknowledge_delegate(FUNC(i80186_cpu_device::int_callback),this)); } diff --git a/src/emu/cpu/mn10200/mn10200.c b/src/emu/cpu/mn10200/mn10200.c index 9e729a8696e..ba32d878630 100644 --- a/src/emu/cpu/mn10200/mn10200.c +++ b/src/emu/cpu/mn10200/mn10200.c @@ -74,7 +74,7 @@ void mn10200_device::device_start() save_item(NAME(m_icrl)); save_item(NAME(m_icrh)); save_item(NAME(m_possible_irq)); - + // timers m_sysclock_base = attotime::from_hz(unscaled_clock() / 2); @@ -94,7 +94,7 @@ void mn10200_device::device_start() save_item(NAME(m_simple_timer[i].base), i); save_item(NAME(m_simple_timer[i].cur), i); } - + for (int i = 0; i < MN10200_NUM_PRESCALERS; i++) { m_prescaler[i].mode = 0; @@ -105,7 +105,7 @@ void mn10200_device::device_start() save_item(NAME(m_prescaler[i].base), i); save_item(NAME(m_prescaler[i].cur), i); } - + // dma for (int i = 0; i < 8; i++) { @@ -123,7 +123,7 @@ void mn10200_device::device_start() save_item(NAME(m_dma[i].ctrlh), i); save_item(NAME(m_dma[i].irq), i); } - + // serial for (int i = 0; i < 2; i++) { @@ -135,7 +135,7 @@ void mn10200_device::device_start() save_item(NAME(m_serial[i].ctrlh), i); save_item(NAME(m_serial[i].buf), i); } - + // ports m_p4 = 0xf; @@ -211,18 +211,18 @@ void mn10200_device::device_reset() { change_pc(0x80000); m_psw = 0; - + // note: officially, these registers are reset to 'undefined' memset(m_d, 0, sizeof(m_d)); memset(m_a, 0, sizeof(m_a)); m_mdr = 0; - + // reset internal peripherals m_nmicr = 0; m_iagr = 0; write_mem16(0xfc00, 0x8000); write_mem16(0xfc02, 0x0737); - + // need to clear them twice since some rely on the value of others for (int i = 0; i < 2; i++) for (int address = 0xfc04; address < 0x10000; address++) @@ -250,10 +250,10 @@ void mn10200_device::check_irq() { if (!m_nmicr && !(m_psw & FLAG_IE)) return; - + int level = m_psw >> 8 & 7; int group = 0; - + // find highest valid level for (int i = 1; i < 11; i++) { @@ -263,7 +263,7 @@ void mn10200_device::check_irq() group = i; } } - + // take interrupt if (m_nmicr && group) take_irq(level, 0); @@ -271,7 +271,7 @@ void mn10200_device::check_irq() take_irq(0, 0); else if (group) take_irq(level, group); - + return; } @@ -283,7 +283,7 @@ void mn10200_device::check_ext_irq() if ((m_p4 >> i & 1) == (m_extmdl >> (i * 2) & 3)) m_icrl[8] |= (1 << (4 + i)); } - + m_possible_irq = true; } @@ -295,33 +295,33 @@ void mn10200_device::execute_set_input(int irqnum, int state) int pin = state ? 0 : 1; int old = m_p4 >> irqnum & 1; bool active = false; - + switch (m_extmdl >> (irqnum * 2) & 3) { // 'L' level case 0: active = (pin == 0); break; - + // 'H' level case 1: active = (pin == 1); break; - + // falling edge case 2: active = (pin == 0 && old == 1); break; - + // rising edge case 3: active = (pin == 1 && old == 0); break; } - + m_p4 &= ~(1 << irqnum); m_p4 |= pin << irqnum; - + if (active) { m_icrl[8] |= (1 << (4 + irqnum)); @@ -335,7 +335,7 @@ void mn10200_device::execute_set_input(int irqnum, int state) int mn10200_device::timer_tick_simple(int tmr) { int next = tmr + 1; - + // is it a cascaded timer, and enabled? if (next < MN10200_NUM_TIMERS_8BIT && m_simple_timer[next].mode & 0x83 && (m_simple_timer[next].mode & 0x83) == 0x81) { @@ -391,13 +391,13 @@ void mn10200_device::refresh_all_timers() TIMER_CALLBACK_MEMBER( mn10200_device::simple_timer_cb ) { int tmr = param; - + // handle our expiring and also tick our cascaded children if (timer_tick_simple(tmr) == 2) m_simple_timer[tmr].cur = 0xff; // cascaded and no underflow occured else m_simple_timer[tmr].cur = m_simple_timer[tmr].base; - + // refresh this timer refresh_timer(tmr); } @@ -492,7 +492,6 @@ void mn10200_device::execute_run() { while (m_cycles > 0) { - // internal peripheral, external pin, or prev instruction may have changed irq state while (m_possible_irq) { @@ -780,7 +779,6 @@ void mn10200_device::execute_run() switch (op) { - // jmp (an) case 0x00: case 0x04: case 0x08: case 0x0c: m_cycles -= 1; @@ -868,7 +866,6 @@ void mn10200_device::execute_run() switch (op & 0xc0) { - // mov (di, an), am case 0x00: m_cycles -= 1; @@ -903,7 +900,6 @@ void mn10200_device::execute_run() switch (op & 0xf0) { - // add dm, an case 0x00: m_a[op&3] = do_add(m_a[op&3], m_d[op>>2&3], 0); @@ -999,7 +995,6 @@ void mn10200_device::execute_run() switch (op) { - // and dn, dm case 0x00: case 0x01: case 0x02: case 0x03: case 0x04: case 0x05: case 0x06: case 0x07: case 0x08: case 0x09: case 0x0a: case 0x0b: case 0x0c: case 0x0d: case 0x0e: case 0x0f: @@ -1180,7 +1175,6 @@ void mn10200_device::execute_run() switch (op) { - // mov dm, (d24, an) case 0x00: case 0x01: case 0x02: case 0x03: case 0x04: case 0x05: case 0x06: case 0x07: case 0x08: case 0x09: case 0x0a: case 0x0b: case 0x0c: case 0x0d: case 0x0e: case 0x0f: @@ -1346,7 +1340,6 @@ void mn10200_device::execute_run() switch (op) { - // and imm8, dn case 0x00: case 0x01: case 0x02: case 0x03: test_nz16(m_d[op&3] &= 0xff0000 | read_arg8(m_pc)); @@ -1507,7 +1500,6 @@ void mn10200_device::execute_run() switch (op) { - // and imm16, dn case 0x00: case 0x01: case 0x02: case 0x03: test_nz16(m_d[op&3] &= 0xff0000 | read_arg16(m_pc)); @@ -2164,7 +2156,7 @@ READ8_MEMBER(mn10200_device::io_control_r) return (m_io->read_byte(MN10200_PORT2) & 0x0f) | m_port[2].dir; case 0x3d3: return (m_io->read_byte(MN10200_PORT3) & 0x1f) | m_port[3].dir; - + // directions (0=input, 1=output) case 0x3e0: return m_port[0].dir; @@ -2184,6 +2176,6 @@ READ8_MEMBER(mn10200_device::io_control_r) log_event("MN102", "internal_r %04x (%03x)", offset+0xfc00, adr); break; } - + return 0; } diff --git a/src/emu/cpu/mn10200/mn10200.h b/src/emu/cpu/mn10200/mn10200.h index 51b3078ca71..fefeb4e29b9 100644 --- a/src/emu/cpu/mn10200/mn10200.h +++ b/src/emu/cpu/mn10200/mn10200.h @@ -43,7 +43,7 @@ enum MN10200_IRQ1, MN10200_IRQ2, MN10200_IRQ3, - + MN10200_MAX_EXT_IRQ }; @@ -155,7 +155,7 @@ private: UINT8 ctrlh; UINT8 buf; } m_serial[2]; - + // ports UINT8 m_pplul; UINT8 m_ppluh; @@ -167,7 +167,7 @@ private: UINT8 out; UINT8 dir; } m_port[4]; - + // internal read/write inline UINT8 read_arg8(UINT32 address) { return m_program->read_byte(address); } inline UINT16 read_arg16(UINT32 address) { return m_program->read_byte(address) | m_program->read_byte(address + 1) << 8; } diff --git a/src/emu/cpu/pdp1/pdp1.c b/src/emu/cpu/pdp1/pdp1.c index c4a3d0f1a92..caf2db3f78e 100644 --- a/src/emu/cpu/pdp1/pdp1.c +++ b/src/emu/cpu/pdp1/pdp1.c @@ -1813,4 +1813,3 @@ void pdp1_device::pulse_start_clear() if (m_io_sc_callback) (*m_io_sc_callback)(this); } - diff --git a/src/emu/cpu/pdp1/pdp1.h b/src/emu/cpu/pdp1/pdp1.h index 303f62cd465..a0550080fbc 100644 --- a/src/emu/cpu/pdp1/pdp1.h +++ b/src/emu/cpu/pdp1/pdp1.h @@ -73,7 +73,7 @@ struct pdp1_reset_param_t class pdp1_device : public cpu_device - , public pdp1_reset_param_t + , public pdp1_reset_param_t { public: // construction/destruction diff --git a/src/emu/cpu/pdp1/tx0.c b/src/emu/cpu/pdp1/tx0.c index 459b2b3ee99..8649d8620c8 100644 --- a/src/emu/cpu/pdp1/tx0.c +++ b/src/emu/cpu/pdp1/tx0.c @@ -1068,4 +1068,3 @@ offs_t tx0_64kw_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 extern CPU_DISASSEMBLE( tx0_64kw ); return CPU_DISASSEMBLE_NAME(tx0_64kw)(this, buffer, pc, oprom, opram, options); } - diff --git a/src/emu/cpu/pdp1/tx0.h b/src/emu/cpu/pdp1/tx0.h index 7c4b4d65a56..198ffa694a2 100644 --- a/src/emu/cpu/pdp1/tx0.h +++ b/src/emu/cpu/pdp1/tx0.h @@ -96,8 +96,8 @@ protected: unsigned int m_run; /* processor is running */ unsigned int m_rim; /* processor is in read-in mode */ unsigned int m_cycle; /* 0 -> fetch */ - /* 1 -> execute (except for taken branches) */ - /* 2 -> extra execute cycle for SXA and ADO */ + /* 1 -> execute (except for taken branches) */ + /* 2 -> extra execute cycle for SXA and ADO */ unsigned int m_ioh; /* i-o halt: processor is executing an Input-Output Transfer wait */ unsigned int m_ios; /* i-o synchronizer: set on i-o operation completion */ diff --git a/src/emu/cpu/powerpc/ppccom.c b/src/emu/cpu/powerpc/ppccom.c index 7178aab06f8..4532c7a5232 100644 --- a/src/emu/cpu/powerpc/ppccom.c +++ b/src/emu/cpu/powerpc/ppccom.c @@ -2489,7 +2489,7 @@ void ppc4xx_set_dma_write_handler(device_t *device, int channel, ppc4xx_dma_writ } /*------------------------------------------------- - ppc4xx_set_dcr_read_handler + ppc4xx_set_dcr_read_handler -------------------------------------------------*/ void ppc4xx_set_dcr_read_handler(device_t *device, read32_delegate dcr_read_func) @@ -2500,7 +2500,7 @@ void ppc4xx_set_dcr_read_handler(device_t *device, read32_delegate dcr_read_func } /*------------------------------------------------- - ppc4xx_set_dcr_write_handler + ppc4xx_set_dcr_write_handler -------------------------------------------------*/ void ppc4xx_set_dcr_write_handler(device_t *device, write32_delegate dcr_write_func) diff --git a/src/emu/cpu/rsp/rsp.h b/src/emu/cpu/rsp/rsp.h index 0e13a8d2eff..da6499019b8 100644 --- a/src/emu/cpu/rsp/rsp.h +++ b/src/emu/cpu/rsp/rsp.h @@ -17,7 +17,7 @@ #define __RSP_H__ #define USE_SIMD (0) -#define SIMUL_SIMD (0) +#define SIMUL_SIMD (0) #if USE_SIMD #include <tmmintrin.h> diff --git a/src/emu/cpu/rsp/rspdrc.c b/src/emu/cpu/rsp/rspdrc.c index 8c76c2ffa35..4d99d52e480 100644 --- a/src/emu/cpu/rsp/rspdrc.c +++ b/src/emu/cpu/rsp/rspdrc.c @@ -3829,56 +3829,56 @@ INLINE void cfunc_rsp_vmacf_simd(void *param) } VEC_WRITEBACK_RESULT(); /* - __m128i loProduct, hiProduct, unpackLo, unpackHi; - __m128i vaccHigh; - __m128i vdReg, vdRegLo, vdRegHi; - - __m128i vsReg = rsp->xv[VS1REG]; - __m128i vtReg = _mm_shuffle_epi8(rsp->xv[VS2REG], vec_shuf_inverse[EL]); - - __m128i vaccLow = rsp->accum_l; - - // Unpack to obtain for 32-bit precision. - RSPZeroExtend16to32(vaccLow, &vaccLow, &vaccHigh); - - // Begin accumulating the products. - unpackLo = _mm_mullo_epi16(vsReg, vtReg); - unpackHi = _mm_mulhi_epi16(vsReg, vtReg); - loProduct = _mm_unpacklo_epi16(unpackLo, unpackHi); - hiProduct = _mm_unpackhi_epi16(unpackLo, unpackHi); - loProduct = _mm_slli_epi32(loProduct, 1); - hiProduct = _mm_slli_epi32(hiProduct, 1); - - vdRegLo = _mm_srli_epi32(loProduct, 16); - vdRegHi = _mm_srli_epi32(hiProduct, 16); - vdRegLo = _mm_slli_epi32(vdRegLo, 16); - vdRegHi = _mm_slli_epi32(vdRegHi, 16); - vdRegLo = _mm_xor_si128(vdRegLo, loProduct); - vdRegHi = _mm_xor_si128(vdRegHi, hiProduct); - - vaccLow = _mm_add_epi32(vaccLow, vdRegLo); - vaccHigh = _mm_add_epi32(vaccHigh, vdRegHi); - - rsp->accum_l = vdReg = RSPPackLo32to16(vaccLow, vaccHigh); - - // Multiply the MSB of sources, accumulate the product. - vdRegLo = _mm_unpacklo_epi16(rsp->accum_m, rsp->accum_h); - vdRegHi = _mm_unpackhi_epi16(rsp->accum_m, rsp->accum_h); - - loProduct = _mm_srai_epi32(loProduct, 16); - hiProduct = _mm_srai_epi32(hiProduct, 16); - vaccLow = _mm_srai_epi32(vaccLow, 16); - vaccHigh = _mm_srai_epi32(vaccHigh, 16); - - vaccLow = _mm_add_epi32(loProduct, vaccLow); - vaccHigh = _mm_add_epi32(hiProduct, vaccHigh); - vaccLow = _mm_add_epi32(vdRegLo, vaccLow); - vaccHigh = _mm_add_epi32(vdRegHi, vaccHigh); - - // Clamp the accumulator and write it all out. - rsp->xv[VDREG] = _mm_packs_epi32(vaccLow, vaccHigh); - rsp->accum_m = RSPPackLo32to16(vaccLow, vaccHigh); - rsp->accum_h = RSPPackHi32to16(vaccLow, vaccHigh); + __m128i loProduct, hiProduct, unpackLo, unpackHi; + __m128i vaccHigh; + __m128i vdReg, vdRegLo, vdRegHi; + + __m128i vsReg = rsp->xv[VS1REG]; + __m128i vtReg = _mm_shuffle_epi8(rsp->xv[VS2REG], vec_shuf_inverse[EL]); + + __m128i vaccLow = rsp->accum_l; + + // Unpack to obtain for 32-bit precision. + RSPZeroExtend16to32(vaccLow, &vaccLow, &vaccHigh); + + // Begin accumulating the products. + unpackLo = _mm_mullo_epi16(vsReg, vtReg); + unpackHi = _mm_mulhi_epi16(vsReg, vtReg); + loProduct = _mm_unpacklo_epi16(unpackLo, unpackHi); + hiProduct = _mm_unpackhi_epi16(unpackLo, unpackHi); + loProduct = _mm_slli_epi32(loProduct, 1); + hiProduct = _mm_slli_epi32(hiProduct, 1); + + vdRegLo = _mm_srli_epi32(loProduct, 16); + vdRegHi = _mm_srli_epi32(hiProduct, 16); + vdRegLo = _mm_slli_epi32(vdRegLo, 16); + vdRegHi = _mm_slli_epi32(vdRegHi, 16); + vdRegLo = _mm_xor_si128(vdRegLo, loProduct); + vdRegHi = _mm_xor_si128(vdRegHi, hiProduct); + + vaccLow = _mm_add_epi32(vaccLow, vdRegLo); + vaccHigh = _mm_add_epi32(vaccHigh, vdRegHi); + + rsp->accum_l = vdReg = RSPPackLo32to16(vaccLow, vaccHigh); + + // Multiply the MSB of sources, accumulate the product. + vdRegLo = _mm_unpacklo_epi16(rsp->accum_m, rsp->accum_h); + vdRegHi = _mm_unpackhi_epi16(rsp->accum_m, rsp->accum_h); + + loProduct = _mm_srai_epi32(loProduct, 16); + hiProduct = _mm_srai_epi32(hiProduct, 16); + vaccLow = _mm_srai_epi32(vaccLow, 16); + vaccHigh = _mm_srai_epi32(vaccHigh, 16); + + vaccLow = _mm_add_epi32(loProduct, vaccLow); + vaccHigh = _mm_add_epi32(hiProduct, vaccHigh); + vaccLow = _mm_add_epi32(vdRegLo, vaccLow); + vaccHigh = _mm_add_epi32(vdRegHi, vaccHigh); + + // Clamp the accumulator and write it all out. + rsp->xv[VDREG] = _mm_packs_epi32(vaccLow, vaccHigh); + rsp->accum_m = RSPPackLo32to16(vaccLow, vaccHigh); + rsp->accum_h = RSPPackHi32to16(vaccLow, vaccHigh); */ } @@ -4269,55 +4269,55 @@ INLINE void cfunc_rsp_vmadn_simd(void *param) } /*INLINE void cfunc_rsp_vmadn_simd(void *param) { - rsp_state *rsp = (rsp_state*)param; - int op = rsp->impstate->arg0; + rsp_state *rsp = (rsp_state*)param; + int op = rsp->impstate->arg0; - __m128i vaccLow, vaccHigh, loProduct, hiProduct; - __m128i vsRegLo, vsRegHi, vtRegLo, vtRegHi, vdRegLo, vdRegHi; + __m128i vaccLow, vaccHigh, loProduct, hiProduct; + __m128i vsRegLo, vsRegHi, vtRegLo, vtRegHi, vdRegLo, vdRegHi; - __m128i vsReg = rsp->xv[VS1REG]; - __m128i vtReg = _mm_shuffle_epi8(rsp->xv[VS2REG], vec_shuf_inverse[EL]); + __m128i vsReg = rsp->xv[VS1REG]; + __m128i vtReg = _mm_shuffle_epi8(rsp->xv[VS2REG], vec_shuf_inverse[EL]); - vaccLow = rsp->accum_l; + vaccLow = rsp->accum_l; - RSPZeroExtend16to32(vsReg, &vsRegLo, &vsRegHi); - RSPSignExtend16to32(vtReg, &vtRegLo, &vtRegHi); - RSPZeroExtend16to32(vaccLow, &vaccLow, &vaccHigh); + RSPZeroExtend16to32(vsReg, &vsRegLo, &vsRegHi); + RSPSignExtend16to32(vtReg, &vtRegLo, &vtRegHi); + RSPZeroExtend16to32(vaccLow, &vaccLow, &vaccHigh); - // Begin accumulating the products. - loProduct = _mm_mullo_epi32(vsRegLo, vtRegLo); - hiProduct = _mm_mullo_epi32(vsRegHi, vtRegHi); + // Begin accumulating the products. + loProduct = _mm_mullo_epi32(vsRegLo, vtRegLo); + hiProduct = _mm_mullo_epi32(vsRegHi, vtRegHi); - vdRegLo = _mm_srli_epi32(loProduct, 16); - vdRegHi = _mm_srli_epi32(hiProduct, 16); - vdRegLo = _mm_slli_epi32(vdRegLo, 16); - vdRegHi = _mm_slli_epi32(vdRegHi, 16); - vdRegLo = _mm_xor_si128(vdRegLo, loProduct); - vdRegHi = _mm_xor_si128(vdRegHi, hiProduct); + vdRegLo = _mm_srli_epi32(loProduct, 16); + vdRegHi = _mm_srli_epi32(hiProduct, 16); + vdRegLo = _mm_slli_epi32(vdRegLo, 16); + vdRegHi = _mm_slli_epi32(vdRegHi, 16); + vdRegLo = _mm_xor_si128(vdRegLo, loProduct); + vdRegHi = _mm_xor_si128(vdRegHi, hiProduct); - vaccLow = _mm_add_epi32(vaccLow, vdRegLo); - vaccHigh = _mm_add_epi32(vaccHigh, vdRegHi); + vaccLow = _mm_add_epi32(vaccLow, vdRegLo); + vaccHigh = _mm_add_epi32(vaccHigh, vdRegHi); - rsp->accum_l = RSPPackLo32to16(vaccLow, vaccHigh); + rsp->accum_l = RSPPackLo32to16(vaccLow, vaccHigh); - // Multiply the MSB of sources, accumulate the product. - vdRegLo = _mm_unpacklo_epi16(rsp->accum_m, rsp->accum_h); - vdRegHi = _mm_unpackhi_epi16(rsp->accum_m, rsp->accum_h); + // Multiply the MSB of sources, accumulate the product. + vdRegLo = _mm_unpacklo_epi16(rsp->accum_m, rsp->accum_h); + vdRegHi = _mm_unpackhi_epi16(rsp->accum_m, rsp->accum_h); - loProduct = _mm_srai_epi32(loProduct, 16); - hiProduct = _mm_srai_epi32(hiProduct, 16); - vaccLow = _mm_srai_epi32(vaccLow, 16); - vaccHigh = _mm_srai_epi32(vaccHigh, 16); + loProduct = _mm_srai_epi32(loProduct, 16); + hiProduct = _mm_srai_epi32(hiProduct, 16); + vaccLow = _mm_srai_epi32(vaccLow, 16); + vaccHigh = _mm_srai_epi32(vaccHigh, 16); - vaccLow = _mm_add_epi32(loProduct, vaccLow); - vaccHigh = _mm_add_epi32(hiProduct, vaccHigh); - vaccLow = _mm_add_epi32(vdRegLo, vaccLow); - vaccHigh = _mm_add_epi32(vdRegHi, vaccHigh); + vaccLow = _mm_add_epi32(loProduct, vaccLow); + vaccHigh = _mm_add_epi32(hiProduct, vaccHigh); + vaccLow = _mm_add_epi32(vdRegLo, vaccLow); + vaccHigh = _mm_add_epi32(vdRegHi, vaccHigh); - // Clamp the accumulator and write it all out. - rsp->accum_m = RSPPackLo32to16(vaccLow, vaccHigh); - rsp->accum_h = RSPPackHi32to16(vaccLow, vaccHigh); - rsp->xv[VDREG] = RSPClampLowToVal(rsp->accum_l, rsp->accum_m, rsp->accum_h); + // Clamp the accumulator and write it all out. + rsp->accum_m = RSPPackLo32to16(vaccLow, vaccHigh); + rsp->accum_h = RSPPackHi32to16(vaccLow, vaccHigh); + rsp->xv[VDREG] = RSPClampLowToVal(rsp->accum_l, rsp->accum_m, rsp->accum_h); }*/ #endif diff --git a/src/emu/cpu/sc61860/sc61860.c b/src/emu/cpu/sc61860/sc61860.c index afdcc015a74..faf440a7a9a 100644 --- a/src/emu/cpu/sc61860/sc61860.c +++ b/src/emu/cpu/sc61860/sc61860.c @@ -259,4 +259,3 @@ void sc61860_device::execute_run() } while (m_icount > 0); } - diff --git a/src/emu/cpu/scmp/scmp.c b/src/emu/cpu/scmp/scmp.c index 9a3b58ea5e6..42566d9cbf3 100644 --- a/src/emu/cpu/scmp/scmp.c +++ b/src/emu/cpu/scmp/scmp.c @@ -564,4 +564,3 @@ void scmp_device::state_string_export(const device_state_entry &entry, astring & break; } } - diff --git a/src/emu/cpu/se3208/se3208.c b/src/emu/cpu/se3208/se3208.c index 18bd4d48f7a..567e37f68d5 100644 --- a/src/emu/cpu/se3208/se3208.c +++ b/src/emu/cpu/se3208/se3208.c @@ -1830,5 +1830,3 @@ offs_t se3208_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *o extern CPU_DISASSEMBLE( se3208 ); return CPU_DISASSEMBLE_NAME(se3208)(this, buffer, pc, oprom, opram, options); } - - diff --git a/src/emu/cpu/se3208/se3208.h b/src/emu/cpu/se3208/se3208.h index 95ecc27a524..66dc2c544fd 100644 --- a/src/emu/cpu/se3208/se3208.h +++ b/src/emu/cpu/se3208/se3208.h @@ -165,4 +165,3 @@ private: extern const device_type SE3208; - diff --git a/src/emu/cpu/sh2/sh2comn.c b/src/emu/cpu/sh2/sh2comn.c index 7730939caf3..14679b27aa2 100644 --- a/src/emu/cpu/sh2/sh2comn.c +++ b/src/emu/cpu/sh2/sh2comn.c @@ -538,7 +538,7 @@ WRITE32_HANDLER( sh2_internal_w ) { case 0x00: //if(mem_mask == 0xff) - // printf("%c",data & 0xff); + // printf("%c",data & 0xff); break; case 0x01: //printf("%08x %02x %02x\n",mem_mask,offset,data); diff --git a/src/emu/cpu/sharc/sharc.c b/src/emu/cpu/sharc/sharc.c index 5cc76965996..65a06fb6b37 100644 --- a/src/emu/cpu/sharc/sharc.c +++ b/src/emu/cpu/sharc/sharc.c @@ -659,11 +659,11 @@ void adsp21062_device::execute_set_input(int irqline, int state) { m_irq_active &= ~(1 << (8-irqline)); } - } + } else if (irqline >= SHARC_INPUT_FLAG0 && irqline <= SHARC_INPUT_FLAG3) - { - set_flag_input(irqline - SHARC_INPUT_FLAG0, state); - } + { + set_flag_input(irqline - SHARC_INPUT_FLAG0, state); + } } void adsp21062_device::set_flag_input(int flag_num, int state) @@ -917,4 +917,3 @@ bool adsp21062_device::memory_readop(offs_t offset, int size, UINT64 &value) return false; } - diff --git a/src/emu/cpu/sharc/sharc.h b/src/emu/cpu/sharc/sharc.h index 058fe9289c8..b699fdc519d 100644 --- a/src/emu/cpu/sharc/sharc.h +++ b/src/emu/cpu/sharc/sharc.h @@ -212,7 +212,7 @@ private: UINT32 m_astat_old_old; UINT32 m_astat_old_old_old; - UINT16 m_internal_ram[2 * 0x10000]; // 2x 128KB + UINT16 m_internal_ram[2 * 0x10000]; // 2x 128KB inline void CHANGE_PC(UINT32 newpc); inline void CHANGE_PC_DELAYED(UINT32 newpc); diff --git a/src/emu/cpu/ssp1601/ssp1601.c b/src/emu/cpu/ssp1601/ssp1601.c index 7bc24a11499..41107e84d7f 100644 --- a/src/emu/cpu/ssp1601/ssp1601.c +++ b/src/emu/cpu/ssp1601/ssp1601.c @@ -780,4 +780,3 @@ void ssp1601_device::execute_set_input( int inputnum, int state ) { fatalerror("ssp1610: execute_set_input not implemented yet!\n"); } - diff --git a/src/emu/cpu/superfx/superfx.c b/src/emu/cpu/superfx/superfx.c index 4f1394e862d..314200acb0d 100644 --- a/src/emu/cpu/superfx/superfx.c +++ b/src/emu/cpu/superfx/superfx.c @@ -1432,11 +1432,10 @@ offs_t superfx_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 * { extern offs_t superfx_dasm_one(char *buffer, offs_t pc, UINT8 op, UINT8 param0, UINT8 param1, UINT16 alt); - UINT8 op = *(UINT8 *)(opram + 0); - UINT8 param0 = *(UINT8 *)(opram + 1); - UINT8 param1 = *(UINT8 *)(opram + 2); - UINT16 alt = m_sfr & SUPERFX_SFR_ALT; + UINT8 op = *(UINT8 *)(opram + 0); + UINT8 param0 = *(UINT8 *)(opram + 1); + UINT8 param1 = *(UINT8 *)(opram + 2); + UINT16 alt = m_sfr & SUPERFX_SFR_ALT; - return superfx_dasm_one(buffer, pc, op, param0, param1, alt); + return superfx_dasm_one(buffer, pc, op, param0, param1, alt); } - diff --git a/src/emu/cpu/tlcs90/tlcs90.c b/src/emu/cpu/tlcs90/tlcs90.c index 9f9ee34383f..1fd3c4dd955 100644 --- a/src/emu/cpu/tlcs90/tlcs90.c +++ b/src/emu/cpu/tlcs90/tlcs90.c @@ -2788,4 +2788,3 @@ void tlcs90_device::state_string_export(const device_state_entry &entry, astring break; } } - diff --git a/src/emu/cpu/tms32010/tms32010.c b/src/emu/cpu/tms32010/tms32010.c index d9db3924bb5..cd68283b417 100644 --- a/src/emu/cpu/tms32010/tms32010.c +++ b/src/emu/cpu/tms32010/tms32010.c @@ -882,12 +882,12 @@ void tms32010_device::device_start() void tms32010_device::device_reset() { - m_PC = 0; - m_ACC.d = 0; - m_INTF = TMS32010_INT_NONE; - /* Setup Status Register : 7efe */ - CLR((OV_FLAG | ARP_REG | DP_REG)); - SET_FLAG((OVM_FLAG | INTM_FLAG)); + m_PC = 0; + m_ACC.d = 0; + m_INTF = TMS32010_INT_NONE; + /* Setup Status Register : 7efe */ + CLR((OV_FLAG | ARP_REG | DP_REG)); + SET_FLAG((OVM_FLAG | INTM_FLAG)); } @@ -981,4 +981,3 @@ void tms32010_device::execute_run() } } while (m_icount > 0); } - diff --git a/src/emu/cpu/tms32025/tms32025.c b/src/emu/cpu/tms32025/tms32025.c index 316c1e80b45..9b7d08226d9 100644 --- a/src/emu/cpu/tms32025/tms32025.c +++ b/src/emu/cpu/tms32025/tms32025.c @@ -2279,4 +2279,3 @@ bool tms32025_device::memory_write(address_spacenum spacenum, offs_t offset, int return 1; } - diff --git a/src/emu/cpu/tms32025/tms32025.h b/src/emu/cpu/tms32025/tms32025.h index 8c1cb44d40e..8c7c354bc80 100644 --- a/src/emu/cpu/tms32025/tms32025.h +++ b/src/emu/cpu/tms32025/tms32025.h @@ -88,8 +88,8 @@ protected: // device_memory_interface overrides virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const { return (spacenum == AS_PROGRAM) ? &m_program_config : ( (spacenum == AS_IO) ? &m_io_config : ( (spacenum == AS_DATA) ? &m_data_config : NULL ) ); } - virtual bool memory_read(address_spacenum spacenum, offs_t offset, int size, UINT64 &value); - virtual bool memory_write(address_spacenum spacenum, offs_t offset, int size, UINT64 value); + virtual bool memory_read(address_spacenum spacenum, offs_t offset, int size, UINT64 &value); + virtual bool memory_write(address_spacenum spacenum, offs_t offset, int size, UINT64 value); virtual bool memory_readop(offs_t offset, int size, UINT64 &value); // device_state_interface overrides diff --git a/src/emu/cpu/tms32051/tms32051.c b/src/emu/cpu/tms32051/tms32051.c index 3d02af003b6..1febe0daf23 100644 --- a/src/emu/cpu/tms32051/tms32051.c +++ b/src/emu/cpu/tms32051/tms32051.c @@ -520,4 +520,3 @@ bool tms32051_device::memory_read(address_spacenum spacenum, offs_t offset, int } return 1; } - diff --git a/src/emu/cpu/tms32051/tms32051.h b/src/emu/cpu/tms32051/tms32051.h index 60bf9dda900..32b012f8937 100644 --- a/src/emu/cpu/tms32051/tms32051.h +++ b/src/emu/cpu/tms32051/tms32051.h @@ -61,7 +61,7 @@ protected: // device_memory_interface overrides virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const { return (spacenum == AS_PROGRAM) ? &m_program_config : ( (spacenum == AS_DATA) ? &m_data_config : NULL ); } - virtual bool memory_read(address_spacenum spacenum, offs_t offset, int size, UINT64 &value); + virtual bool memory_read(address_spacenum spacenum, offs_t offset, int size, UINT64 &value); // device_disasm_interface overrides virtual UINT32 disasm_min_opcode_bytes() const { return 2; } diff --git a/src/emu/cpu/tms34010/34010gfx.c b/src/emu/cpu/tms34010/34010gfx.c index 01546b029cb..905b9579d6d 100644 --- a/src/emu/cpu/tms34010/34010gfx.c +++ b/src/emu/cpu/tms34010/34010gfx.c @@ -109,7 +109,7 @@ static int apply_window(tms34010_state *tms, const char *inst_name,int srcbpp, U /* clip Y */ diff = WSTART_Y(tms) - sy; if (diff > 0) - { + { #if 0 // littlerb and megaphx do not work correctly with this enabled, see items dropping into playfield from top if (srcaddr) *srcaddr += diff * SPTCH(tms); diff --git a/src/emu/cpu/tms34010/tms34010.c b/src/emu/cpu/tms34010/tms34010.c index 5cfd4aabdfd..611cc1c13da 100644 --- a/src/emu/cpu/tms34010/tms34010.c +++ b/src/emu/cpu/tms34010/tms34010.c @@ -1659,7 +1659,7 @@ READ16_MEMBER( tms34010_device::host_r ) tms34010_state *tms = get_safe_token(this); unsigned int addr; int result = 0; - + /* swap to the target cpu */ switch (reg) diff --git a/src/emu/cpu/tms34010/tms34010.h b/src/emu/cpu/tms34010/tms34010.h index cc4f28de5b5..fdf06d3feae 100644 --- a/src/emu/cpu/tms34010/tms34010.h +++ b/src/emu/cpu/tms34010/tms34010.h @@ -216,7 +216,7 @@ public: /* Reads & writes to the 34010 I/O registers; place at 0xc0000000 */ DECLARE_WRITE16_MEMBER( io_register_w ); DECLARE_READ16_MEMBER( io_register_r ); - + DECLARE_WRITE16_MEMBER(host_w); DECLARE_READ16_MEMBER(host_r); }; diff --git a/src/emu/cpu/tms7000/tms7000.c b/src/emu/cpu/tms7000/tms7000.c index b6476e2223b..257d8b9e16b 100644 --- a/src/emu/cpu/tms7000/tms7000.c +++ b/src/emu/cpu/tms7000/tms7000.c @@ -572,4 +572,3 @@ READ8_MEMBER( tms7000_device::tms7000_internal_r ) { return m_rf[ offset ]; } - diff --git a/src/emu/cpu/unsp/unsp.c b/src/emu/cpu/unsp/unsp.c index 5c33c50ecfd..558dd49bbe1 100644 --- a/src/emu/cpu/unsp/unsp.c +++ b/src/emu/cpu/unsp/unsp.c @@ -162,13 +162,13 @@ void unsp_device::state_export(const device_state_entry &entry) void unsp_device::state_import(const device_state_entry &entry) { - switch (entry.index()) - { - case UNSP_PC: + switch (entry.index()) + { + case UNSP_PC: UNSP_REG(PC) = (m_debugger_temp & 0x0001fffe) >> 1; UNSP_REG(SR) = (UNSP_REG(SR) & 0xffc0) | ((m_debugger_temp & 0x007e0000) >> 17); - break; - } + break; + } } void unsp_device::device_reset() @@ -863,4 +863,3 @@ void unsp_device::execute_set_input(int irqline, int state) UNSP_REG(PC) = READ16(irq_vector); UNSP_REG(SR) = 0; } - diff --git a/src/emu/cpu/upd7810/upd7810.c b/src/emu/cpu/upd7810/upd7810.c index 82d25445989..d4a6ccb8de0 100644 --- a/src/emu/cpu/upd7810/upd7810.c +++ b/src/emu/cpu/upd7810/upd7810.c @@ -487,7 +487,7 @@ upd7801_device::upd7801_device(const machine_config &mconfig, const char *tag, d } upd78c05_device::upd78c05_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) - : upd7810_device(mconfig, UPD78C05, "uPD78C05", tag, owner, clock, "upd78c05", __FILE__) + : upd7810_device(mconfig, UPD78C05, "uPD78C05", tag, owner, clock, "upd78c05", __FILE__) { m_op48 = s_op48_78c05; m_op4C = s_op4C_78c05; @@ -2250,4 +2250,3 @@ void upd7810_device::execute_set_input(int irqline, int state) } /* resetting interrupt requests is done with the SKIT/SKNIT opcodes only! */ } - diff --git a/src/emu/cpu/upd7810/upd7810.h b/src/emu/cpu/upd7810/upd7810.h index 270152e966c..758480d4fd3 100644 --- a/src/emu/cpu/upd7810/upd7810.h +++ b/src/emu/cpu/upd7810/upd7810.h @@ -81,7 +81,7 @@ enum upd7810_device::set_an7_func(*device, DEVCB2_##_devcb); -class upd7810_device : public cpu_device +class upd7810_device : public cpu_device { public: // construction/destruction diff --git a/src/emu/cpu/v60/v60.c b/src/emu/cpu/v60/v60.c index 959711e5029..785670bc474 100644 --- a/src/emu/cpu/v60/v60.c +++ b/src/emu/cpu/v60/v60.c @@ -550,4 +550,3 @@ void v60_device::execute_run() v60_try_irq(); } } - diff --git a/src/emu/cpu/v60/v60.h b/src/emu/cpu/v60/v60.h index c9392289618..7c5b8c2e758 100644 --- a/src/emu/cpu/v60/v60.h +++ b/src/emu/cpu/v60/v60.h @@ -157,7 +157,7 @@ private: UINT8 OV; UINT8 S; UINT8 Z; - } m_flags; + } m_flags; UINT8 m_irq_line; UINT8 m_nmi_line; address_space *m_program; diff --git a/src/emu/cpu/v810/v810.c b/src/emu/cpu/v810/v810.c index 66b9c6b6fc1..462b21b9f43 100644 --- a/src/emu/cpu/v810/v810.c +++ b/src/emu/cpu/v810/v810.c @@ -1392,4 +1392,3 @@ void v810_device::execute_set_input( int irqline, int state) m_irq_state = state; m_irq_line = irqline; } - diff --git a/src/emu/cpu/z180/z180.c b/src/emu/cpu/z180/z180.c index 6157b594ac0..3e939efc8ee 100644 --- a/src/emu/cpu/z180/z180.c +++ b/src/emu/cpu/z180/z180.c @@ -2600,4 +2600,3 @@ void z180_device::state_string_export(const device_state_entry &entry, astring & break; } } - diff --git a/src/emu/cpu/z180/z180tbl.h b/src/emu/cpu/z180/z180tbl.h index b3f0ff92917..c115eadc851 100644 --- a/src/emu/cpu/z180/z180tbl.h +++ b/src/emu/cpu/z180/z180tbl.h @@ -228,4 +228,3 @@ EXEC_PROTOTYPE(dd) EXEC_PROTOTYPE(ed) EXEC_PROTOTYPE(fd) EXEC_PROTOTYPE(xycb) - diff --git a/src/emu/cpu/z80/tlcs_z80.c b/src/emu/cpu/z80/tlcs_z80.c index ca88b5d3f6a..150bfff3b4d 100644 --- a/src/emu/cpu/z80/tlcs_z80.c +++ b/src/emu/cpu/z80/tlcs_z80.c @@ -40,7 +40,7 @@ static Z80PIO_INTERFACE( pio_intf ) static const z80sio_interface sio_intf = { DEVCB_CPU_INPUT_LINE(DEVICE_SELF_OWNER, INPUT_LINE_IRQ0), /* interrupt handler */ - DEVCB_NULL, /* DTR changed handler */ + DEVCB_NULL, /* DTR changed handler */ DEVCB_NULL, /* RTS changed handler */ DEVCB_NULL, /* BREAK changed handler */ DEVCB_NULL, /* transmit handler */ @@ -63,9 +63,9 @@ static ADDRESS_MAP_START( tlcs_z80_internal_io_map, AS_IO, 8, tlcs_z80_device ) AM_RANGE(0x10, 0x13) AM_DEVREADWRITE(TLCSZ80_INTERNAL_CTC_TAG, z80ctc_device, read, write) AM_RANGE(0x18, 0x1B) AM_DEVREADWRITE(TLCSZ80_INTERNAL_SIO_TAG, z80sio_device, read, write) AM_RANGE(0x1C, 0x1F) AM_DEVREADWRITE(TLCSZ80_INTERNAL_PIO_TAG, z80pio_device, read, write) -// AM_RANGE(0xF0, 0xF0) TODO: Watchdog Timer: Stand-by mode Register -// AM_RANGE(0xF1, 0xF1) TODO: Watchdog Timer: command Register -// AM_RANGE(0xF4, 0xF4) TODO: Daisy chain interrupt precedence Register +// AM_RANGE(0xF0, 0xF0) TODO: Watchdog Timer: Stand-by mode Register +// AM_RANGE(0xF1, 0xF1) TODO: Watchdog Timer: command Register +// AM_RANGE(0xF4, 0xF4) TODO: Daisy chain interrupt precedence Register ADDRESS_MAP_END //This is wrong! @@ -79,7 +79,7 @@ static MACHINE_CONFIG_FRAGMENT( tlcs_z80 ) MACHINE_CONFIG_END tlcs_z80_device::tlcs_z80_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) - : z80_device(mconfig, TLCS_Z80, "TLCS-Z80", tag, owner, clock, "tlcs_z80", __FILE__), + : z80_device(mconfig, TLCS_Z80, "TLCS-Z80", tag, owner, clock, "tlcs_z80", __FILE__), m_z80ctc(*this, TLCSZ80_INTERNAL_CTC_TAG), m_io_space_config( "io", ENDIANNESS_LITTLE, 8, 8, 0, ADDRESS_MAP_NAME( tlcs_z80_internal_io_map ) ) { } @@ -97,4 +97,3 @@ machine_config_constructor tlcs_z80_device::device_mconfig_additions() const } const device_type TLCS_Z80 = &device_creator<tlcs_z80_device>; - diff --git a/src/emu/cpu/z80/z80.c b/src/emu/cpu/z80/z80.c index 6332e2d0946..0fa78455c46 100644 --- a/src/emu/cpu/z80/z80.c +++ b/src/emu/cpu/z80/z80.c @@ -639,7 +639,7 @@ inline void z80_device::ret_cond(bool cond, UINT8 opcode) ***************************************************************/ inline void z80_device::retn() { - LOG(("Z80 '%s' RETN m_iff1:%d m_iff2:%d\n", + LOG(("Z80 '%s' RETN m_iff1:%d m_iff2:%d\n", tag(), m_iff1, m_iff2)); pop(m_pc); WZ = PC; @@ -2649,7 +2649,7 @@ OP(ed,54) { neg(); } /* NEG OP(ed,55) { retn(); } /* RETN */ OP(ed,56) { m_im = 1; } /* IM 1 */ OP(ed,57) { ld_a_i(); } /* LD A,i */ - + OP(ed,58) { E = in(BC); F = (F & CF) | SZP[E]; } /* IN E,(C) */ OP(ed,59) { out(BC, E); } /* OUT (C),E */ OP(ed,5a) { adc_hl(m_de); } /* ADC HL,DE */ diff --git a/src/emu/cpu/z8000/z8000.c b/src/emu/cpu/z8000/z8000.c index 59a9449526a..be2f22a76b2 100644 --- a/src/emu/cpu/z8000/z8000.c +++ b/src/emu/cpu/z8000/z8000.c @@ -834,4 +834,3 @@ void z8002_device::execute_set_input(int irqline, int state) } } } - diff --git a/src/emu/cpu/z8000/z8000.h b/src/emu/cpu/z8000/z8000.h index 21e491f1e85..0904a71a4b4 100644 --- a/src/emu/cpu/z8000/z8000.h +++ b/src/emu/cpu/z8000/z8000.h @@ -655,7 +655,7 @@ protected: virtual UINT32 PSA_ADDR(); virtual UINT32 read_irq_vector(); }; - + extern const device_type Z8001; extern const device_type Z8002; diff --git a/src/emu/cpu/z8000/z8000ops.inc b/src/emu/cpu/z8000/z8000ops.inc index b6f8c15f733..69cbddd97aa 100644 --- a/src/emu/cpu/z8000/z8000ops.inc +++ b/src/emu/cpu/z8000/z8000ops.inc @@ -69,7 +69,7 @@ void z8001_device::CHANGE_FCW(UINT16 fcw) if (fcw & F_S_N) /* new mode is system mode */ { if (!(m_fcw & F_S_N) /* old mode was user mode */ - || ((fcw ^ m_fcw) & F_SEG)) /* or switch between segmented and non-segmented */ + || ((fcw ^ m_fcw) & F_SEG)) /* or switch between segmented and non-segmented */ { tmp = RW(14); RW(14) = m_nspseg; @@ -79,7 +79,7 @@ void z8001_device::CHANGE_FCW(UINT16 fcw) else /* new mode is user mode */ { if (m_fcw & F_S_N /* old mode was system mode */ - && m_fcw & F_SEG) /* and was segmented */ + && m_fcw & F_SEG) /* and was segmented */ { tmp = RW(14); RW(14) = m_nspseg; |
