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-rw-r--r--src/emu/cpu/esrip/esrip.c22
-rw-r--r--src/emu/cpu/i860/i860.c2
-rw-r--r--src/emu/cpu/i860/i860dasm.c66
-rw-r--r--src/emu/cpu/m68000/m68000.h2
-rw-r--r--src/emu/cpu/m68000/m68kcpu.c4
-rw-r--r--src/emu/cpu/m68000/m68kcpu.h2
-rw-r--r--src/emu/cpu/mcs48/mcs48.c110
-rw-r--r--src/emu/cpu/mcs48/mcs48.h2
-rw-r--r--src/emu/cpu/mcs48/mcs48dsm.c4
-rw-r--r--src/emu/cpu/powerpc/ppcfe.c2
10 files changed, 108 insertions, 108 deletions
diff --git a/src/emu/cpu/esrip/esrip.c b/src/emu/cpu/esrip/esrip.c
index 6cc28ab7d00..36b0597bc53 100644
--- a/src/emu/cpu/esrip/esrip.c
+++ b/src/emu/cpu/esrip/esrip.c
@@ -62,7 +62,7 @@
***************************************************************************/
typedef struct
-{
+{
UINT16 ram[32];
UINT16 acc;
UINT16 d_latch;
@@ -74,7 +74,7 @@ typedef struct
UINT8 immflag;
UINT8 ct;
UINT8 t;
-
+
/* Instruction latches - current and previous values */
UINT8 l1, pl1;
UINT8 l2, pl2;
@@ -139,7 +139,7 @@ static STATE_POSTLOAD( esrip_postload )
//static void esrip_state_register(int index, const char *type)
//{
-// state_save_register_item_pointer(type, index, cpustate->ipt_ram, IPT_RAM_SIZE / 2);
+// state_save_register_item_pointer(type, index, cpustate->ipt_ram, IPT_RAM_SIZE / 2);
//}
@@ -261,9 +261,9 @@ static CPU_INIT( esrip )
cpustate->draw = _config->draw;
cpustate->ipt_ram = auto_malloc(IPT_RAM_SIZE);
-//state_save_register_global_pointer(cpustate->ipt_ram, IPT_RAM_SIZE / 2); // TODO
+//state_save_register_global_pointer(cpustate->ipt_ram, IPT_RAM_SIZE / 2); // TODO
-// esrip_state_register(index, "esrip");
+// esrip_state_register(index, "esrip");
cpustate->device = device;
cpustate->program = memory_find_address_space(device, ADDRESS_SPACE_PROGRAM);
@@ -1667,7 +1667,7 @@ static CPU_EXECUTE( esrip )
am29116_execute(cpustate, (cpustate->l7 << 8) | cpustate->l6, BIT(cpustate->l5, 2));
y_bus = cpustate->result;
-
+
if (BIT(cpustate->l5, 0))
cpustate->d_latch = y_bus;
}
@@ -1741,7 +1741,7 @@ static CPU_EXECUTE( esrip )
cpustate->l6 = (in_h >> 16);
cpustate->l7 = (in_h >> 24);
-// if (RISING_EDGE(cpustate->pl7, cpustate->l2, 7))
+// if (RISING_EDGE(cpustate->pl7, cpustate->l2, 7))
/* Colour latch */
if (RISING_EDGE(cpustate->pl3, cpustate->l3, 0))
@@ -1773,7 +1773,7 @@ static CPU_EXECUTE( esrip )
cpustate->y_scale = x_bus & 0xff;
/* Unknown */
-// if (RISING_EDGE(cpustate->pl4, cpustate->l4, 7))
+// if (RISING_EDGE(cpustate->pl4, cpustate->l4, 7))
/* Image ROM address */
if (RISING_EDGE(cpustate->pl3, cpustate->l3, 5))
@@ -1821,7 +1821,7 @@ static CPU_EXECUTE( esrip )
static CPU_DISASSEMBLE( esrip )
{
#if 0
- static const char* const jmp_types[] =
+ static const char* const jmp_types[] =
{
"JCT",
"JT1",
@@ -1833,7 +1833,7 @@ static CPU_DISASSEMBLE( esrip )
"JMP",
};
- static const char* const njmp_types[] =
+ static const char* const njmp_types[] =
{
"JNCT",
"JNT1",
@@ -1967,7 +1967,7 @@ CPU_GET_INFO( esrip )
case CPUINFO_STR_CORE_FILE: strcpy(info->s, __FILE__); break;
case CPUINFO_STR_CORE_CREDITS: strcpy(info->s, "Copyright Philip J Bennett"); break;
- case CPUINFO_STR_FLAGS: sprintf(info->s, "%c%c%c%c%c%c%c%c%c",
+ case CPUINFO_STR_FLAGS: sprintf(info->s, "%c%c%c%c%c%c%c%c%c",
cpustate->status & 0x80 ? '3' : '.',
cpustate->status & 0x40 ? '2' : '.',
cpustate->status & 0x20 ? '1' : '.',
diff --git a/src/emu/cpu/i860/i860.c b/src/emu/cpu/i860/i860.c
index 7157171687c..68fc190fcff 100644
--- a/src/emu/cpu/i860/i860.c
+++ b/src/emu/cpu/i860/i860.c
@@ -106,7 +106,7 @@ CPU_GET_INFO( i860 )
case CPUINFO_STR_CORE_VERSION: strcpy(info->s, "0.1"); break;
case CPUINFO_STR_CORE_FILE: strcpy(info->s, __FILE__); break;
case CPUINFO_STR_CORE_CREDITS: strcpy(info->s, "Jason Eckhardt and Andrew Gardner"); break;
-
+
case CPUINFO_INT_PC: info->i = i860->pc; break;
case CPUINFO_INT_PREVIOUSPC: info->i = i860->ppc; break;
}
diff --git a/src/emu/cpu/i860/i860dasm.c b/src/emu/cpu/i860/i860dasm.c
index 8bc3dcd90f5..c4b457474f2 100644
--- a/src/emu/cpu/i860/i860dasm.c
+++ b/src/emu/cpu/i860/i860dasm.c
@@ -48,9 +48,9 @@ CPU_DISASSEMBLE( i860 )
/* Little Endian */
const UINT32 op = (oprom[3] << 24) | (oprom[2] << 16) | (oprom[1] << 8) | (oprom[0] << 0);
- //const UINT32 op = (oprom[2] << 24) | (oprom[3] << 16) | (oprom[0] << 8) | (oprom[1] << 0); /* Mixed Endian */
- //const UINT32 op = (oprom[0] << 24) | (oprom[1] << 16) | (oprom[2] << 8) | (oprom[3] << 0); /* Big Endian */
- //const UINT32 op = (oprom[1] << 24) | (oprom[0] << 16) | (oprom[3] << 8) | (oprom[2] << 0); /* Mixed Endian */
+ //const UINT32 op = (oprom[2] << 24) | (oprom[3] << 16) | (oprom[0] << 8) | (oprom[1] << 0); /* Mixed Endian */
+ //const UINT32 op = (oprom[0] << 24) | (oprom[1] << 16) | (oprom[2] << 8) | (oprom[3] << 0); /* Big Endian */
+ //const UINT32 op = (oprom[1] << 24) | (oprom[0] << 16) | (oprom[3] << 8) | (oprom[2] << 0); /* Mixed Endian */
/* The opcode is the top 6 bits */
UINT8 opcode = (op >> 26) & 0x3f;
@@ -61,53 +61,53 @@ CPU_DISASSEMBLE( i860 )
/* Main decode */
switch (opcode)
{
- case 0x00:
+ case 0x00:
case 0x01:
case 0x04:
case 0x05: i860_dasm_ldx(op, tempB); break;
-
+
case 0x03:
case 0x07: i860_dasm_stx(op, tempB); break;
-
+
case 0x02: i860_dasm_ixfr(op, tempB); break;
-
+
case 0x06: sprintf(tempB, "(reserved)"); break;
-
+
case 0x08:
case 0x09:
case 0x0a:
case 0x0b: i860_dasm_fid_fst(op, tempB); break;
-
+
case 0x0d: i860_dasm_flush(op, tempB); break;
-
+
case 0x0f: i860_dasm_pstd(op, tempB); break;
-
+
case 0x0c:
case 0x0e: i860_dasm_ldc_sdc(op, tempB); break;
-
+
case 0x10: i860_dasm_bri(op, tempB); break;
-
+
case 0x11: i860_dasm_trap(op, tempB); break;
-
+
case 0x12: i860_dasm_floating_point_dasm(op, tempB); break; /* Floating point operation sub-group */
-
+
case 0x13: i860_dasm_core_dasm(op, tempB); break; /* Core operation sub-group */
-
+
case 0x14:
case 0x15:
case 0x16:
case 0x17: i860_dasm_bte_btne(op, tempB); break;
-
+
case 0x18:
case 0x19: i860_dasm_pfidy(op, tempB); break;
-
+
case 0x1a:
case 0x1b:
case 0x1c:
case 0x1d:
case 0x1e:
case 0x1f: i860_dasm_CTRL_dasm(op, tempB); break; /* CTRL operation sub-group */
-
+
case 0x20:
case 0x21:
case 0x22:
@@ -116,39 +116,39 @@ CPU_DISASSEMBLE( i860 )
case 0x25:
case 0x26:
case 0x27: i860_dasm_addu_subu(op, tempB); break;
-
+
case 0x28:
case 0x29:
case 0x2a:
case 0x2b: i860_dasm_shl_shr(op, tempB); break;
-
+
case 0x2c: i860_dasm_shrd(op, tempB); break;
-
+
case 0x2d: i860_dasm_bla(op, tempB); break;
-
+
case 0x2e:
case 0x2f: i860_dasm_shra(op, tempB); break;
-
+
case 0x30:
case 0x31:
case 0x32:
case 0x33: i860_dasm_and_andh(op, tempB); break;
-
+
case 0x34:
case 0x35:
case 0x36:
case 0x37: i860_dasm_andnot_andnoth(op, tempB); break;
-
+
case 0x38:
case 0x39:
case 0x3a:
case 0x3b: i860_dasm_or_orh(op, tempB); break;
-
+
case 0x3c:
case 0x3d:
case 0x3e:
case 0x3f: i860_dasm_xor_xorh(op, tempB); break;
-
+
default: sprintf(tempB, "(reserved)"); break;
}
@@ -228,11 +228,11 @@ static void i860_dasm_stx(const UINT32 op, char* buffer)
static void i860_dasm_ixfr(const UINT32 op, char* buffer)
{
-// UINT16 val = op & 0x7ff;
-// UINT8 opc = (op >> 26) & 0x3f;
-// UINT8 src2 = (op >> 21) & 0x1f;
-// UINT8 dest = (op >> 16) & 0x1f;
-// UINT8 src1 = (op >> 11) & 0x1f;
+// UINT16 val = op & 0x7ff;
+// UINT8 opc = (op >> 26) & 0x3f;
+// UINT8 src2 = (op >> 21) & 0x1f;
+// UINT8 dest = (op >> 16) & 0x1f;
+// UINT8 src1 = (op >> 11) & 0x1f;
sprintf(buffer, "ixfr");
}
diff --git a/src/emu/cpu/m68000/m68000.h b/src/emu/cpu/m68000/m68000.h
index 31c6d2af570..b4add1b1030 100644
--- a/src/emu/cpu/m68000/m68000.h
+++ b/src/emu/cpu/m68000/m68000.h
@@ -55,7 +55,7 @@ enum
M68K_SFC, M68K_DFC, M68K_CACR, M68K_CAAR, M68K_PREF_ADDR, M68K_PREF_DATA,
M68K_D0, M68K_D1, M68K_D2, M68K_D3, M68K_D4, M68K_D5, M68K_D6, M68K_D7,
M68K_A0, M68K_A1, M68K_A2, M68K_A3, M68K_A4, M68K_A5, M68K_A6, M68K_A7,
-
+
M68K_GENPC = REG_GENPC,
M68K_GENSP = REG_GENSP,
M68K_GENPCBASE = REG_GENPCBASE
diff --git a/src/emu/cpu/m68000/m68kcpu.c b/src/emu/cpu/m68000/m68kcpu.c
index 947db875b84..fb07ab08602 100644
--- a/src/emu/cpu/m68000/m68kcpu.c
+++ b/src/emu/cpu/m68000/m68kcpu.c
@@ -669,7 +669,7 @@ static CPU_IMPORT_STATE( m68k )
case M68K_SR:
m68ki_set_sr(m68k, m68k->iotemp);
break;
-
+
case M68K_ISP:
if (m68k->s_flag && !m68k->m_flag)
REG_SP = m68k->iotemp;
@@ -707,7 +707,7 @@ static CPU_EXPORT_STATE( m68k )
case M68K_SR:
m68k->iotemp = m68ki_get_sr(m68k);
break;
-
+
case M68K_ISP:
m68k->iotemp = (m68k->s_flag && !m68k->m_flag) ? REG_SP : REG_ISP;
break;
diff --git a/src/emu/cpu/m68000/m68kcpu.h b/src/emu/cpu/m68000/m68kcpu.h
index fb253964933..737e656367c 100644
--- a/src/emu/cpu/m68000/m68kcpu.h
+++ b/src/emu/cpu/m68000/m68kcpu.h
@@ -591,7 +591,7 @@ struct _m68ki_cpu_core
m68k_memory_interface memory;
offs_t encrypted_start;
offs_t encrypted_end;
-
+
cpu_state_table state;
UINT32 iotemp;
diff --git a/src/emu/cpu/mcs48/mcs48.c b/src/emu/cpu/mcs48/mcs48.c
index 5e7d3aad0f8..0bba6dd122f 100644
--- a/src/emu/cpu/mcs48/mcs48.c
+++ b/src/emu/cpu/mcs48/mcs48.c
@@ -40,27 +40,27 @@ T0 output clock
****************************************************************************
- UPI-41/42 chips are MCS-48 derived, with some opcode changes:
-
- MCS-48 opcode UPI-41/42 opcode
- ------------- ----------------
- 02: OUTL BUS,A OUT DBB,A
- 08: INS BUS,A <illegal>
- 22: <illegal> IN DBB,A
- 75: ENT0 CLK <illegal>
- 80: MOVX A,@R0 <illegal>
- 81: MOVX A,@R1 <illegal>
- 86: JNI <dest> JOBF <dest>
- 88: ORL BUS,#n <illegal>
- 90: MOVX @R0,A MOV STS,A
- 91: MOVX @R1,A <illegal>
- 98: ANL BUS,#n <illegal>
- D6: <illegal> JNIBF <dest>
- E5: SEL MB0 EN DMA
- F5: SEL MB1 EN FLAGS
-
- Chip numbers are similar to the MCS-48 series:
-
+ UPI-41/42 chips are MCS-48 derived, with some opcode changes:
+
+ MCS-48 opcode UPI-41/42 opcode
+ ------------- ----------------
+ 02: OUTL BUS,A OUT DBB,A
+ 08: INS BUS,A <illegal>
+ 22: <illegal> IN DBB,A
+ 75: ENT0 CLK <illegal>
+ 80: MOVX A,@R0 <illegal>
+ 81: MOVX A,@R1 <illegal>
+ 86: JNI <dest> JOBF <dest>
+ 88: ORL BUS,#n <illegal>
+ 90: MOVX @R0,A MOV STS,A
+ 91: MOVX @R1,A <illegal>
+ 98: ANL BUS,#n <illegal>
+ D6: <illegal> JNIBF <dest>
+ E5: SEL MB0 EN DMA
+ F5: SEL MB1 EN FLAGS
+
+ Chip numbers are similar to the MCS-48 series:
+
Chip RAM ROM I/O
---- --- --- ---
8041 128 1k
@@ -160,7 +160,7 @@ struct _mcs48_state
UINT8 feature_mask; /* processor feature flags */
UINT16 int_rom_size; /* internal rom size */
-
+
cpu_state_table state; /* state table */
UINT8 rtemp; /* temporary for import/export */
};
@@ -195,7 +195,7 @@ static const cpu_state_entry state_array[] =
MCS48_STATE_ENTRY(P1, "%02X", p1, 0xff, 0)
MCS48_STATE_ENTRY(P2, "%02X", p2, 0xff, 0)
-
+
MCS48_STATE_ENTRY(R0, "%02X", rtemp, 0xff, CPUSTATE_IMPORT | CPUSTATE_EXPORT)
MCS48_STATE_ENTRY(R1, "%02X", rtemp, 0xff, CPUSTATE_IMPORT | CPUSTATE_EXPORT)
MCS48_STATE_ENTRY(R2, "%02X", rtemp, 0xff, CPUSTATE_IMPORT | CPUSTATE_EXPORT)
@@ -332,7 +332,7 @@ INLINE void pull_pc_psw(mcs48_state *cpustate)
/*-------------------------------------------------
- pull_pc - pull the PC value from the stack,
+ pull_pc - pull the PC value from the stack,
leaving the upper part of PSW intact
-------------------------------------------------*/
@@ -437,7 +437,7 @@ INLINE UINT8 p2_mask(mcs48_state *cpustate)
/*-------------------------------------------------
- expander_operation - perform an operation via
+ expander_operation - perform an operation via
the 8243 expander chip
-------------------------------------------------*/
@@ -445,10 +445,10 @@ INLINE void expander_operation(mcs48_state *cpustate, UINT8 operation, UINT8 por
{
/* put opcode/data on low 4 bits of P2 */
port_w(2, cpustate->p2 = (cpustate->p2 & 0xf0) | (operation << 2) | (port & 3));
-
+
/* generate high-to-low transition on PROG line */
prog_w(0);
-
+
/* put data on low 4 bits of P2 */
if (operation != 0)
port_w(2, cpustate->p2 = (cpustate->p2 & 0xf0) | (cpustate->a & 0x0f));
@@ -737,7 +737,7 @@ OPHANDLER( out_dbb_a )
/* copy to the DBBO and update the bit in STS */
cpustate->dbbo = cpustate->a;
cpustate->sts |= STS_OBF;
-
+
/* if P2 flags are enabled, update the state of P2 */
if (cpustate->flags_enabled && (cpustate->p2 & P2_OBF) == 0)
port_w(2, cpustate->p2 |= P2_OBF);
@@ -824,37 +824,37 @@ SPLIT_OPHANDLER( split_f5, sel_mb1, en_flags )
static const mcs48_ophandler opcode_table[256]=
{
nop, illegal, split_02, add_a_n, jmp_0, en_i, illegal, dec_a, /* 00 */
- split_08, in_a_p1, in_a_p2, illegal, movd_a_p4, movd_a_p5, movd_a_p6, movd_a_p7,
+ split_08, in_a_p1, in_a_p2, illegal, movd_a_p4, movd_a_p5, movd_a_p6, movd_a_p7,
inc_xr0, inc_xr1, jb_0, adc_a_n, call_0, dis_i, jtf, inc_a, /* 10 */
- inc_r0, inc_r1, inc_r2, inc_r3, inc_r4, inc_r5, inc_r6, inc_r7,
+ inc_r0, inc_r1, inc_r2, inc_r3, inc_r4, inc_r5, inc_r6, inc_r7,
xch_a_xr0, xch_a_xr1, split_22, mov_a_n, jmp_1, en_tcnti, jnt_0, clr_a, /* 20 */
- xch_a_r0, xch_a_r1, xch_a_r2, xch_a_r3, xch_a_r4, xch_a_r5, xch_a_r6, xch_a_r7,
+ xch_a_r0, xch_a_r1, xch_a_r2, xch_a_r3, xch_a_r4, xch_a_r5, xch_a_r6, xch_a_r7,
xchd_a_xr0, xchd_a_xr1, jb_1, illegal, call_1, dis_tcnti, jt_0, cpl_a, /* 30 */
- illegal, outl_p1_a, outl_p2_a, illegal, movd_p4_a, movd_p5_a, movd_p6_a, movd_p7_a,
+ illegal, outl_p1_a, outl_p2_a, illegal, movd_p4_a, movd_p5_a, movd_p6_a, movd_p7_a,
orl_a_xr0, orl_a_xr1, mov_a_t, orl_a_n, jmp_2, strt_cnt, jnt_1, swap_a, /* 40 */
- orl_a_r0, orl_a_r1, orl_a_r2, orl_a_r3, orl_a_r4, orl_a_r5, orl_a_r6, orl_a_r7,
+ orl_a_r0, orl_a_r1, orl_a_r2, orl_a_r3, orl_a_r4, orl_a_r5, orl_a_r6, orl_a_r7,
anl_a_xr0, anl_a_xr1, jb_2, anl_a_n, call_2, strt_t, jt_1, da_a, /* 50 */
- anl_a_r0, anl_a_r1, anl_a_r2, anl_a_r3, anl_a_r4, anl_a_r5, anl_a_r6, anl_a_r7,
+ anl_a_r0, anl_a_r1, anl_a_r2, anl_a_r3, anl_a_r4, anl_a_r5, anl_a_r6, anl_a_r7,
add_a_xr0, add_a_xr1, mov_t_a, illegal, jmp_3, stop_tcnt, illegal, rrc_a, /* 60 */
- add_a_r0, add_a_r1, add_a_r2, add_a_r3, add_a_r4, add_a_r5, add_a_r6, add_a_r7,
+ add_a_r0, add_a_r1, add_a_r2, add_a_r3, add_a_r4, add_a_r5, add_a_r6, add_a_r7,
adc_a_xr0, adc_a_xr1, jb_3, illegal, call_3, split_75, jf1, rr_a, /* 70 */
- adc_a_r0, adc_a_r1, adc_a_r2, adc_a_r3, adc_a_r4, adc_a_r5, adc_a_r6, adc_a_r7,
+ adc_a_r0, adc_a_r1, adc_a_r2, adc_a_r3, adc_a_r4, adc_a_r5, adc_a_r6, adc_a_r7,
split_80, split_81, illegal, ret, jmp_4, clr_f0, split_86, illegal, /* 80 */
- split_88, orl_p1_n, orl_p2_n, illegal, orld_p4_a, orld_p5_a, orld_p6_a, orld_p7_a,
+ split_88, orl_p1_n, orl_p2_n, illegal, orld_p4_a, orld_p5_a, orld_p6_a, orld_p7_a,
split_90, split_91, jb_4, retr, call_4, cpl_f0, jnz, clr_c, /* 90 */
- split_98, anl_p1_n, anl_p2_n, illegal, anld_p4_a, anld_p5_a, anld_p6_a, anld_p7_a,
+ split_98, anl_p1_n, anl_p2_n, illegal, anld_p4_a, anld_p5_a, anld_p6_a, anld_p7_a,
mov_xr0_a, mov_xr1_a, illegal, movp_a_xa, jmp_5, clr_f1, illegal, cpl_c, /* A0 */
- mov_r0_a, mov_r1_a, mov_r2_a, mov_r3_a, mov_r4_a, mov_r5_a, mov_r6_a, mov_r7_a,
+ mov_r0_a, mov_r1_a, mov_r2_a, mov_r3_a, mov_r4_a, mov_r5_a, mov_r6_a, mov_r7_a,
mov_xr0_n, mov_xr1_n, jb_5, jmpp_xa, call_5, cpl_f1, jf0, illegal, /* B0 */
- mov_r0_n, mov_r1_n, mov_r2_n, mov_r3_n, mov_r4_n, mov_r5_n, mov_r6_n, mov_r7_n,
+ mov_r0_n, mov_r1_n, mov_r2_n, mov_r3_n, mov_r4_n, mov_r5_n, mov_r6_n, mov_r7_n,
illegal, illegal, illegal, illegal, jmp_6, sel_rb0, jz, mov_a_psw, /* C0 */
- dec_r0, dec_r1, dec_r2, dec_r3, dec_r4, dec_r5, dec_r6, dec_r7,
+ dec_r0, dec_r1, dec_r2, dec_r3, dec_r4, dec_r5, dec_r6, dec_r7,
xrl_a_xr0, xrl_a_xr1, jb_6, xrl_a_n, call_6, sel_rb1, split_d6, mov_psw_a, /* D0 */
- xrl_a_r0, xrl_a_r1, xrl_a_r2, xrl_a_r3, xrl_a_r4, xrl_a_r5, xrl_a_r6, xrl_a_r7,
+ xrl_a_r0, xrl_a_r1, xrl_a_r2, xrl_a_r3, xrl_a_r4, xrl_a_r5, xrl_a_r6, xrl_a_r7,
illegal, illegal, illegal, movp3_a_xa,jmp_7, split_e5, jnc, rl_a, /* E0 */
- djnz_r0, djnz_r1, djnz_r2, djnz_r3, djnz_r4, djnz_r5, djnz_r6, djnz_r7,
+ djnz_r0, djnz_r1, djnz_r2, djnz_r3, djnz_r4, djnz_r5, djnz_r6, djnz_r7,
mov_a_xr0, mov_a_xr1, jb_7, illegal, call_7, split_f5, jc, rlc_a, /* F0 */
- mov_a_r0, mov_a_r1, mov_a_r2, mov_a_r3, mov_a_r4, mov_a_r5, mov_a_r6, mov_a_r7
+ mov_a_r0, mov_a_r1, mov_a_r2, mov_a_r3, mov_a_r4, mov_a_r5, mov_a_r6, mov_a_r7
};
@@ -926,7 +926,7 @@ static void mcs48_init(const device_config *device, cpu_irq_callback irqcallback
/*-------------------------------------------------
- mcs48_norom_init - initialization for systems
+ mcs48_norom_init - initialization for systems
with no internal ROM
-------------------------------------------------*/
@@ -937,7 +937,7 @@ static CPU_INIT( mcs48_norom )
/*-------------------------------------------------
- mcs48_1k_rom_init - initialization for systems
+ mcs48_1k_rom_init - initialization for systems
with 1k of internal ROM
-------------------------------------------------*/
@@ -948,7 +948,7 @@ static CPU_INIT( mcs48_1k_rom )
/*-------------------------------------------------
- mcs48_2k_rom - initialization for systems
+ mcs48_2k_rom - initialization for systems
with 2k of internal ROM
-------------------------------------------------*/
@@ -959,7 +959,7 @@ static CPU_INIT( mcs48_2k_rom )
/*-------------------------------------------------
- mcs48_4k_rom - initialization for systems
+ mcs48_4k_rom - initialization for systems
with 2k of internal ROM
-------------------------------------------------*/
@@ -970,7 +970,7 @@ static CPU_INIT( mcs48_4k_rom )
/*-------------------------------------------------
- upi41_1k_rom_init - initialization for systems
+ upi41_1k_rom_init - initialization for systems
with 1k of internal ROM
-------------------------------------------------*/
@@ -981,7 +981,7 @@ static CPU_INIT( upi41_1k_rom )
/*-------------------------------------------------
- upi41_2k_rom_init - initialization for systems
+ upi41_2k_rom_init - initialization for systems
with 2k of internal ROM
-------------------------------------------------*/
@@ -1136,7 +1136,7 @@ static CPU_EXECUTE( mcs48 )
do
{
unsigned opcode;
-
+
/* fetch next opcode */
cpustate->prevpc = cpustate->pc;
debugger_instruction_hook(device, cpustate->pc);
@@ -1169,7 +1169,7 @@ static CPU_EXECUTE( mcs48 )
UINT8 upi41_master_r(const device_config *device, UINT8 a0)
{
mcs48_state *cpustate = device->token;
-
+
/* if just reading the status, return it */
if ((a0 & 1) != 0)
return cpustate->sts;
@@ -1196,10 +1196,10 @@ static TIMER_CALLBACK( master_callback )
mcs48_state *cpustate = device->token;
UINT8 a0 = (param >> 8) & 1;
UINT8 data = param;
-
+
/* data always goes to the input buffer */
cpustate->dbbi = data;
-
+
/* set the appropriate flags */
if ((cpustate->sts & STS_IBF) == 0)
{
@@ -1207,7 +1207,7 @@ static TIMER_CALLBACK( master_callback )
if (cpustate->flags_enabled)
port_w(2, cpustate->p2 &= ~P2_NIBF);
}
-
+
/* set F1 accordingly */
if (a0 == 0)
cpustate->sts &= ~STS_F1;
diff --git a/src/emu/cpu/mcs48/mcs48.h b/src/emu/cpu/mcs48/mcs48.h
index 50d7616a6d1..f0a5458cf2f 100644
--- a/src/emu/cpu/mcs48/mcs48.h
+++ b/src/emu/cpu/mcs48/mcs48.h
@@ -44,7 +44,7 @@ enum
MCS48_STS, /* UPI-41 systems only */
MCS48_DBBO, /* UPI-41 systems only */
MCS48_DBBI, /* UPI-41 systems only */
-
+
MCS48_GENPC = REG_GENPC,
MCS48_GENSP = REG_GENSP,
MCS48_GENPCBASE = REG_GENPCBASE
diff --git a/src/emu/cpu/mcs48/mcs48dsm.c b/src/emu/cpu/mcs48/mcs48dsm.c
index eba82f8c7bd..1eeafa8186c 100644
--- a/src/emu/cpu/mcs48/mcs48dsm.c
+++ b/src/emu/cpu/mcs48/mcs48dsm.c
@@ -14,7 +14,7 @@ static UINT32 common_dasm(const device_config *device, char *buffer, offs_t pc,
{
const UINT8 *startram = opram;
UINT32 flags = 0;
-
+
opram++;
switch (*oprom++)
{
@@ -293,7 +293,7 @@ static UINT32 common_dasm(const device_config *device, char *buffer, offs_t pc,
case 0xfe: sprintf(buffer, "mov a,r6"); break;
case 0xff: sprintf(buffer, "mov a,r7"); break;
}
-
+
return (opram - startram) | flags | DASMFLAG_SUPPORTED;
}
diff --git a/src/emu/cpu/powerpc/ppcfe.c b/src/emu/cpu/powerpc/ppcfe.c
index 195cadc39a1..c3337d45de8 100644
--- a/src/emu/cpu/powerpc/ppcfe.c
+++ b/src/emu/cpu/powerpc/ppcfe.c
@@ -1191,7 +1191,7 @@ static int describe_instruction_1f(powerpc_state *ppc, UINT32 op, opcode_desc *d
if (op & MSR_EE)
desc->flags |= OPFLAG_CAN_EXPOSE_EXTERNAL_INT;
return TRUE;
-
+
case 0x254: /* ESA */
case 0x274: /* DSA */
if (!is_602_class(ppc))