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Diffstat (limited to 'src/emu/cpu/tms9900/tms9995.h')
-rw-r--r--src/emu/cpu/tms9900/tms9995.h85
1 files changed, 52 insertions, 33 deletions
diff --git a/src/emu/cpu/tms9900/tms9995.h b/src/emu/cpu/tms9900/tms9995.h
index bfb26cfb619..7517934b588 100644
--- a/src/emu/cpu/tms9900/tms9995.h
+++ b/src/emu/cpu/tms9900/tms9995.h
@@ -4,7 +4,7 @@
tms9995.h
See tms9995.c for documentation
- Also see tms9900.h for types of TMS9xxx processors.
+ Also see tms9900.h for types of TMS99xx processors.
*/
#ifndef __TMS9995_H__
@@ -14,6 +14,10 @@
#include "debugger.h"
#include "tms99com.h"
+// device type definition
+extern const device_type TMS9995;
+extern const device_type TMS9995_MP9537;
+
enum
{
INT_9995_RESET = 0,
@@ -22,36 +26,30 @@ enum
INT_9995_INT4 = 3
};
-/*
- Configuration for the TMS9995. The connections are provided by the
- main board which contains the processor.
-*/
-struct tms9995_config
-{
- devcb_write8 external_callback;
- devcb_write_line iaq_line;
- devcb_write_line clock_out;
- devcb_write_line holda_line;
- devcb_write_line dbin_line;
- int mode;
- int overflow;
-};
+#define MCFG_TMS9995_EXTOP_HANDLER( _extop) \
+ devcb = &tms9995_device::static_set_extop_callback( *device, DEVCB2_##_extop );
-#define TMS9995_CONFIG(name) \
- const tms9995_config(name) =
+#define MCFG_TMS9995_IAQ_HANDLER( _iaq ) \
+ devcb = &tms9995_device::static_set_iaq_callback( *device, DEVCB2_##_iaq );
+
+#define MCFG_TMS9995_CLKOUT_HANDLER( _clkout ) \
+ devcb = &tms9995_device::static_set_clkout_callback( *device, DEVCB2_##_clkout );
+
+#define MCFG_TMS9995_HOLDA_HANDLER( _holda ) \
+ devcb = &tms9995_device::static_set_holda_callback( *device, DEVCB2_##_holda );
+
+#define MCFG_TMS9995_DBIN_HANDLER( _dbin ) \
+ devcb = &tms9995_device::static_set_dbin_callback( *device, DEVCB2_##_dbin );
+
+#define MCFG_TMS9995_ENABLE_OVINT( _ovint ) \
+ downcast<tms9995_device*>(device)->set_overflow_interrupt( _ovint );
-enum
-{
- NO_INTERNAL_RAM = 0,
- INTERNAL_RAM,
- NO_OVERFLOW_INT = 0,
- OVERFLOW_INT
-};
class tms9995_device : public cpu_device
{
public:
tms9995_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+ tms9995_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source);
// READY input line. When asserted (high), the memory is ready for data exchange.
// We chose to use a direct method instead of a delegate to keep performance
@@ -63,10 +61,19 @@ public:
// is acknowledged by the HOLDA output line.
void set_hold(int state);
+ // Callbacks
+ template<class _Object> static devcb2_base &static_set_extop_callback(device_t &device, _Object object) { return downcast<tms9995_device &>(device).m_external_operation.set_callback(object); }
+ template<class _Object> static devcb2_base &static_set_iaq_callback(device_t &device, _Object object) { return downcast<tms9995_device &>(device).m_iaq_line.set_callback(object); }
+ template<class _Object> static devcb2_base &static_set_clkout_callback(device_t &device, _Object object) { return downcast<tms9995_device &>(device).m_clock_out_line.set_callback(object); }
+ template<class _Object> static devcb2_base &static_set_holda_callback(device_t &device, _Object object) { return downcast<tms9995_device &>(device).m_holda_line.set_callback(object); }
+ template<class _Object> static devcb2_base &static_set_dbin_callback(device_t &device, _Object object) { return downcast<tms9995_device &>(device).m_dbin_line.set_callback(object); }
+
// For debugger access
UINT8 debug_read_onchip_memory(offs_t addr) { return m_onchip_memory[addr & 0xff]; };
bool is_onchip(offs_t addrb) { return (((addrb & 0xff00)==0xf000 && (addrb < 0xf0fc)) || ((addrb & 0xfffc)==0xfffc)) && !m_mp9537; }
+ void set_overflow_interrupt( int enable ) { m_check_overflow = (enable!=0); }
+
protected:
// device-level overrides
virtual void device_start();
@@ -90,6 +97,9 @@ protected:
UINT64 execute_clocks_to_cycles(UINT64 clocks) const { return clocks / 4.0; }
UINT64 execute_cycles_to_clocks(UINT64 cycles) const { return cycles * 4.0; }
+ // Variant of the TMS9995 without internal RAM and decrementer
+ bool m_mp9537;
+
private:
// State / debug management
UINT16 m_state_any;
@@ -117,8 +127,6 @@ private:
address_space* m_prgspace;
address_space* m_cru;
- // Variant of the TMS9995 without internal RAM and decrementer
- bool m_mp9537;
// Processor states
bool m_idle_state;
@@ -403,25 +411,36 @@ private:
// We could realize this via the CRU access as well, but the data bus access
// is not that simple to emulate. For the sake of homogenity between the
// chip emulations we use a dedicated callback.
- devcb_resolved_write8 m_external_operation;
+ devcb2_write8 m_external_operation;
// Signal to the outside world that we are now getting an instruction (IAQ).
// In the real hardware this line is shared with the HOLDA line, and the
// /MEMEN line is used to decide which signal we have on the line. We do not
// emulate the /MEMEN line, so we have to use two separate lines.
- devcb_resolved_write_line m_iaq_line;
+ devcb2_write_line m_iaq_line;
// Clock output.
- devcb_resolved_write_line m_clock_out_line;
+ devcb2_write_line m_clock_out_line;
// Asserted when the CPU is in a HOLD state
- devcb_resolved_write_line m_holda_line;
+ devcb2_write_line m_holda_line;
// DBIN line. When asserted (high), the CPU has disabled the data bus output buffers.
- devcb_resolved_write_line m_dbin_line;
+ devcb2_write_line m_dbin_line;
};
-// device type definition
-extern const device_type TMS9995;
+
+/*
+ Variant of the TMS9995 without on-chip RAM; used in the TI-99/8 console
+*/
+class tms9995_mp9537_device : public tms9995_device
+{
+public:
+ tms9995_mp9537_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+ : tms9995_device(mconfig, TMS9995_MP9537, "TMS9995-MP9537", tag, owner, clock, "tms9995_mp9537", __FILE__)
+ {
+ m_mp9537 = true;
+ }
+};
#endif /* __TMS9995_H__ */