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-rw-r--r--src/emu/cpu/sh2/sh2.c20
-rw-r--r--src/emu/cpu/sh2/sh2.h12
-rw-r--r--src/emu/cpu/sh2/sh2comn.c9
3 files changed, 20 insertions, 21 deletions
diff --git a/src/emu/cpu/sh2/sh2.c b/src/emu/cpu/sh2/sh2.c
index b2ea57f60d4..629d447323e 100644
--- a/src/emu/cpu/sh2/sh2.c
+++ b/src/emu/cpu/sh2/sh2.c
@@ -143,11 +143,11 @@ READ32_MEMBER(sh2_device::sh2_internal_a5)
static ADDRESS_MAP_START( sh7604_map, AS_PROGRAM, 32, sh2_device )
AM_RANGE(0x40000000, 0xbfffffff) AM_READ(sh2_internal_a5)
-/*!
+/*!
@todo: cps3boot breaks with this enabled. Needs customization ...
*/
-// AM_RANGE(0xc0000000, 0xc0000fff) AM_RAM // cache data array
-// AM_RANGE(0xffffff88, 0xffffff8b) AM_READWRITE(dma_dtcr0_r,dma_dtcr0_w)
+// AM_RANGE(0xc0000000, 0xc0000fff) AM_RAM // cache data array
+// AM_RANGE(0xffffff88, 0xffffff8b) AM_READWRITE(dma_dtcr0_r,dma_dtcr0_w)
AM_RANGE(0xe0000000, 0xe00001ff) AM_MIRROR(0x1ffffe00) AM_READWRITE(sh7604_r, sh7604_w)
ADDRESS_MAP_END
@@ -159,14 +159,14 @@ static ADDRESS_MAP_START( sh7021_map, AS_PROGRAM, 32, sh2a_device )
AM_RANGE(0x05ffff48, 0x05ffff4b) AM_READWRITE16(dma_tcr0_r, dma_tcr0_w,0x0000ffff)
AM_RANGE(0x05ffff4c, 0x05ffff4f) AM_READWRITE16(dma_chcr0_r, dma_chcr0_w, 0x0000ffff)
// fall-back
- AM_RANGE(0x05fffe00, 0x05ffffff) AM_READWRITE16(sh7021_r,sh7021_w,0xffffffff) // SH-7032H internal i/o
-// AM_RANGE(0x07000000, 0x070003ff) AM_RAM AM_SHARE("oram")// on-chip RAM, actually at 0xf000000 (1 kb)
-// AM_RANGE(0x0f000000, 0x0f0003ff) AM_RAM AM_SHARE("oram")// on-chip RAM, actually at 0xf000000 (1 kb)
+ AM_RANGE(0x05fffe00, 0x05ffffff) AM_READWRITE16(sh7021_r,sh7021_w,0xffffffff) // SH-7032H internal i/o
+// AM_RANGE(0x07000000, 0x070003ff) AM_RAM AM_SHARE("oram")// on-chip RAM, actually at 0xf000000 (1 kb)
+// AM_RANGE(0x0f000000, 0x0f0003ff) AM_RAM AM_SHARE("oram")// on-chip RAM, actually at 0xf000000 (1 kb)
ADDRESS_MAP_END
static ADDRESS_MAP_START( sh7032_map, AS_PROGRAM, 32, sh1_device )
// fall-back
- AM_RANGE(0x05fffe00, 0x05ffffff) AM_READWRITE16(sh7032_r,sh7032_w,0xffffffff) // SH-7032H internal i/o
+ AM_RANGE(0x05fffe00, 0x05ffffff) AM_READWRITE16(sh7032_r,sh7032_w,0xffffffff) // SH-7032H internal i/o
ADDRESS_MAP_END
sh2_device::sh2_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
@@ -300,7 +300,7 @@ void sh2_device::WB(offs_t A, UINT8 V)
m_program->write_byte(A & AM,V);
return;
}
-
+
m_program->write_byte(A,V);
}
@@ -311,7 +311,7 @@ void sh2_device::WW(offs_t A, UINT16 V)
m_program->write_word(A & AM,V);
return;
}
-
+
m_program->write_word(A,V);
}
@@ -322,7 +322,7 @@ void sh2_device::WL(offs_t A, UINT32 V)
m_program->write_dword(A & AM,V);
return;
}
-
+
/* 0x20000000 no Cache */
/* 0x00000000 read thru Cache if CE bit is 1 */
m_program->write_dword(A,V);
diff --git a/src/emu/cpu/sh2/sh2.h b/src/emu/cpu/sh2/sh2.h
index c53b6baad59..9724c1f51b0 100644
--- a/src/emu/cpu/sh2/sh2.h
+++ b/src/emu/cpu/sh2/sh2.h
@@ -513,17 +513,17 @@ public:
DECLARE_READ16_MEMBER(sh7021_r);
DECLARE_WRITE16_MEMBER(sh7021_w);
void sh7032_dma_exec(int ch);
-
+
private:
UINT16 m_sh7021_regs[0x200];
struct
{
- UINT32 sar; /**< Source Address Register */
- UINT32 dar; /**< Destination Address Register */
- UINT16 tcr; /**< Transfer Count Register */
- UINT16 chcr; /**< Channel Control Register */
+ UINT32 sar; /**< Source Address Register */
+ UINT32 dar; /**< Destination Address Register */
+ UINT16 tcr; /**< Transfer Count Register */
+ UINT16 chcr; /**< Channel Control Register */
} m_dma[4];
- UINT16 m_dmaor; /**< DMA Operation Register (status flags) */
+ UINT16 m_dmaor; /**< DMA Operation Register (status flags) */
};
diff --git a/src/emu/cpu/sh2/sh2comn.c b/src/emu/cpu/sh2/sh2comn.c
index 38b6d633c22..1080203494f 100644
--- a/src/emu/cpu/sh2/sh2comn.c
+++ b/src/emu/cpu/sh2/sh2comn.c
@@ -899,7 +899,7 @@ void sh2_device::sh2_exception(const char *message, int irqline)
void sh2a_device::sh7032_dma_exec(int ch)
{
const short dma_word_size[4] = { 0, +1, -1, 0 };
- UINT8 rs = (m_dma[ch].chcr >> 8) & 0xf; /**< Resource Select bits */
+ UINT8 rs = (m_dma[ch].chcr >> 8) & 0xf; /**< Resource Select bits */
if(rs != 0xc) // Auto-Request
{
logerror("Warning: SH7032 DMA enables non auto-request transfer\n");
@@ -911,9 +911,9 @@ void sh2a_device::sh7032_dma_exec(int ch)
return;
printf("%08x %08x %04x\n",m_dma[ch].sar,m_dma[ch].dar,m_dma[ch].chcr);
- UINT8 dm = (m_dma[ch].chcr >> 14) & 3; /**< Destination Address Mode bits */
- UINT8 sm = (m_dma[ch].chcr >> 12) & 3; /**< Source Address Mode bits */
- bool ts = (m_dma[ch].chcr & 8); /**< Transfer Size bit */
+ UINT8 dm = (m_dma[ch].chcr >> 14) & 3; /**< Destination Address Mode bits */
+ UINT8 sm = (m_dma[ch].chcr >> 12) & 3; /**< Source Address Mode bits */
+ bool ts = (m_dma[ch].chcr & 8); /**< Transfer Size bit */
int src_word_size = dma_word_size[sm] * ((ts == true) ? 2 : 1);
int dst_word_size = dma_word_size[dm] * ((ts == true) ? 2 : 1);
UINT32 src_addr = m_dma[ch].sar;
@@ -1025,4 +1025,3 @@ WRITE16_MEMBER(sh2a_device::sh7021_w)
#if (defined(__MINGW32__) && (__GNUC__ >= 5))
#pragma GCC diagnostic pop
#endif
-