diff options
Diffstat (limited to 'src/emu/cpu/saturn')
-rw-r--r-- | src/emu/cpu/saturn/satops.c | 896 | ||||
-rw-r--r-- | src/emu/cpu/saturn/sattable.c | 774 | ||||
-rw-r--r-- | src/emu/cpu/saturn/saturn.c | 592 | ||||
-rw-r--r-- | src/emu/cpu/saturn/saturn.h | 243 |
4 files changed, 1365 insertions, 1140 deletions
diff --git a/src/emu/cpu/saturn/satops.c b/src/emu/cpu/saturn/satops.c index cabb27f89f8..e4050c0e699 100644 --- a/src/emu/cpu/saturn/satops.c +++ b/src/emu/cpu/saturn/satops.c @@ -1,114 +1,114 @@ #define IRQ_ADDRESS 0xf #define saturn_assert(x) \ - do { if (!(x)) logerror("SATURN '%s' assertion failed: %s at %s:%i, pc=%05x\n", cpustate->device->tag(), #x, __FILE__, __LINE__, cpustate->pc); } while (0) + do { if (!(x)) logerror("SATURN '%s' assertion failed: %s at %s:%i, pc=%05x\n", tag(), #x, __FILE__, __LINE__, m_pc); } while (0) -INLINE int READ_OP(saturn_state *cpustate) +int saturn_device::READ_OP() { UINT8 data; - cpustate->icount-=3; - data=cpustate->direct->read_decrypted_byte(cpustate->pc); + m_icount-=3; + data=m_direct->read_decrypted_byte(m_pc); saturn_assert(data<0x10); - cpustate->pc=(cpustate->pc+1)&0xfffff; + m_pc=(m_pc+1)&0xfffff; return data; } -INLINE int READ_OP_ARG(saturn_state *cpustate) +int saturn_device::READ_OP_ARG() { UINT8 data; - cpustate->icount-=3; - data=cpustate->direct->read_raw_byte(cpustate->pc); + m_icount-=3; + data=m_direct->read_raw_byte(m_pc); saturn_assert(data<0x10); - cpustate->pc=(cpustate->pc+1)&0xfffff; + m_pc=(m_pc+1)&0xfffff; return data; } -INLINE int READ_OP_ARG8(saturn_state *cpustate) +int saturn_device::READ_OP_ARG8() { - int n0=READ_OP_ARG(cpustate); - int n1=READ_OP_ARG(cpustate); + int n0=READ_OP_ARG(); + int n1=READ_OP_ARG(); return n0|(n1<<4); } -INLINE INT8 READ_OP_DIS8(saturn_state *cpustate) +INT8 saturn_device::READ_OP_DIS8() { - return (INT8)READ_OP_ARG8(cpustate); + return (INT8)READ_OP_ARG8(); } -INLINE int READ_OP_ARG12(saturn_state *cpustate) +int saturn_device::READ_OP_ARG12() { - int n0=READ_OP_ARG(cpustate); - int n1=READ_OP_ARG(cpustate); - int n2=READ_OP_ARG(cpustate); + int n0=READ_OP_ARG(); + int n1=READ_OP_ARG(); + int n2=READ_OP_ARG(); return n0|(n1<<4)|(n2<<8); } -INLINE int READ_OP_DIS12(saturn_state *cpustate) +int saturn_device::READ_OP_DIS12() { - int temp=READ_OP_ARG12(cpustate); + int temp=READ_OP_ARG12(); if (temp&0x800) temp-=0x1000; return temp; } -INLINE int READ_OP_ARG16(saturn_state *cpustate) +int saturn_device::READ_OP_ARG16() { - int n0=READ_OP_ARG(cpustate); - int n1=READ_OP_ARG(cpustate); - int n2=READ_OP_ARG(cpustate); - int n3=READ_OP_ARG(cpustate); + int n0=READ_OP_ARG(); + int n1=READ_OP_ARG(); + int n2=READ_OP_ARG(); + int n3=READ_OP_ARG(); return n0|(n1<<4)|(n2<<8)|(n3<<12); } -INLINE INT16 READ_OP_DIS16(saturn_state *cpustate) +INT16 saturn_device::READ_OP_DIS16() { - return (INT16)READ_OP_ARG16(cpustate); + return (INT16)READ_OP_ARG16(); } -INLINE int READ_OP_ARG20(saturn_state *cpustate) +int saturn_device::READ_OP_ARG20() { - int n0=READ_OP_ARG(cpustate); - int n1=READ_OP_ARG(cpustate); - int n2=READ_OP_ARG(cpustate); - int n3=READ_OP_ARG(cpustate); - int n4=READ_OP_ARG(cpustate); + int n0=READ_OP_ARG(); + int n1=READ_OP_ARG(); + int n2=READ_OP_ARG(); + int n3=READ_OP_ARG(); + int n4=READ_OP_ARG(); return n0|(n1<<4)|(n2<<8)|(n3<<12)|(n4<<16); } -INLINE int READ_NIBBLE(saturn_state *cpustate, SaturnAdr adr) +int saturn_device::READ_NIBBLE(UINT32 adr) { UINT8 data; - cpustate->icount-=3; - data=cpustate->program->read_byte(adr&0xfffff); + m_icount-=3; + data=m_program->read_byte(adr&0xfffff); saturn_assert(data<0x10); - if (cpustate->config&&cpustate->config->crc) cpustate->config->crc(cpustate->device, adr&0xfffff, data); + m_crc_func(adr&0xfffff, data, 0xffffffff); return data; } -INLINE int READ_8(saturn_state *cpustate, SaturnAdr adr) +int saturn_device::READ_8(UINT32 adr) { - return READ_NIBBLE(cpustate, adr)|(READ_NIBBLE(cpustate, adr+1)<<4); + return READ_NIBBLE(adr)|(READ_NIBBLE(adr+1)<<4); } -INLINE int READ_12(saturn_state *cpustate, SaturnAdr adr) +int saturn_device::READ_12(UINT32 adr) { - return READ_NIBBLE(cpustate, adr)|(READ_NIBBLE(cpustate, adr+1)<<4)|(READ_NIBBLE(cpustate, adr+2)<<8); + return READ_NIBBLE(adr)|(READ_NIBBLE(adr+1)<<4)|(READ_NIBBLE(adr+2)<<8); } -INLINE int READ_16(saturn_state *cpustate, SaturnAdr adr) +int saturn_device::READ_16(UINT32 adr) { - return READ_NIBBLE(cpustate, adr)|(READ_NIBBLE(cpustate, adr+1)<<4)|(READ_NIBBLE(cpustate, adr+2)<<8)|(READ_NIBBLE(cpustate, adr+3)<<12); + return READ_NIBBLE(adr)|(READ_NIBBLE(adr+1)<<4)|(READ_NIBBLE(adr+2)<<8)|(READ_NIBBLE(adr+3)<<12); } -INLINE int READ_20(saturn_state *cpustate, SaturnAdr adr) +int saturn_device::READ_20(UINT32 adr) { - return READ_NIBBLE(cpustate, adr)|(READ_NIBBLE(cpustate, adr+1)<<4)|(READ_NIBBLE(cpustate, adr+2)<<8)|(READ_NIBBLE(cpustate, adr+3)<<12)|(READ_NIBBLE(cpustate, adr+4)<<16); + return READ_NIBBLE(adr)|(READ_NIBBLE(adr+1)<<4)|(READ_NIBBLE(adr+2)<<8)|(READ_NIBBLE(adr+3)<<12)|(READ_NIBBLE(adr+4)<<16); } -INLINE void WRITE_NIBBLE(saturn_state *cpustate, SaturnAdr adr, SaturnNib nib) +void saturn_device::WRITE_NIBBLE(UINT32 adr, UINT8 nib) { - cpustate->icount-=3; + m_icount-=3; saturn_assert(nib<0x10); - cpustate->program->write_byte(adr&0xfffff,nib); + m_program->write_byte(adr&0xfffff,nib); } #define BEGIN_B 0 @@ -127,733 +127,731 @@ INLINE void WRITE_NIBBLE(saturn_state *cpustate, SaturnAdr adr, SaturnNib nib) #define COUNT_W 16 -INLINE int S64_READ_X(saturn_state *cpustate, int r) +int saturn_device::S64_READ_X(int r) { - return cpustate->reg[r][0]|(cpustate->reg[r][1]<<4)|(cpustate->reg[r][2]<<8); + return m_reg[r][0]|(m_reg[r][1]<<4)|(m_reg[r][2]<<8); } -INLINE int S64_READ_WORD(saturn_state *cpustate, int r) +int saturn_device::S64_READ_WORD(int r) { - return cpustate->reg[r][0]|(cpustate->reg[r][1]<<4)|(cpustate->reg[r][2]<<8)|(cpustate->reg[r][3]<<12); + return m_reg[r][0]|(m_reg[r][1]<<4)|(m_reg[r][2]<<8)|(m_reg[r][3]<<12); } -INLINE int S64_READ_A(saturn_state *cpustate, int r) +int saturn_device::S64_READ_A(int r) { - return cpustate->reg[r][0]|(cpustate->reg[r][1]<<4)|(cpustate->reg[r][2]<<8)|(cpustate->reg[r][3]<<12)|(cpustate->reg[r][4]<<16); + return m_reg[r][0]|(m_reg[r][1]<<4)|(m_reg[r][2]<<8)|(m_reg[r][3]<<12)|(m_reg[r][4]<<16); } -INLINE void S64_WRITE_X(saturn_state *cpustate, int r, int v) +void saturn_device::S64_WRITE_X(int r, int v) { - cpustate->reg[r][0]=v&0xf; - cpustate->reg[r][1]=(v>>4)&0xf; - cpustate->reg[r][2]=(v>>8)&0xf; + m_reg[r][0]=v&0xf; + m_reg[r][1]=(v>>4)&0xf; + m_reg[r][2]=(v>>8)&0xf; } -INLINE void S64_WRITE_WORD(saturn_state *cpustate, int r, int v) +void saturn_device::S64_WRITE_WORD(int r, int v) { - cpustate->reg[r][0]=v&0xf; - cpustate->reg[r][1]=(v>>4)&0xf; - cpustate->reg[r][2]=(v>>8)&0xf; - cpustate->reg[r][3]=(v>>12)&0xf; + m_reg[r][0]=v&0xf; + m_reg[r][1]=(v>>4)&0xf; + m_reg[r][2]=(v>>8)&0xf; + m_reg[r][3]=(v>>12)&0xf; } -INLINE void S64_WRITE_A(saturn_state *cpustate, int r, int v) +void saturn_device::S64_WRITE_A(int r, int v) { - cpustate->reg[r][0]=v&0xf; - cpustate->reg[r][1]=(v>>4)&0xf; - cpustate->reg[r][2]=(v>>8)&0xf; - cpustate->reg[r][3]=(v>>12)&0xf; - cpustate->reg[r][4]=(v>>16)&0xf; + m_reg[r][0]=v&0xf; + m_reg[r][1]=(v>>4)&0xf; + m_reg[r][2]=(v>>8)&0xf; + m_reg[r][3]=(v>>12)&0xf; + m_reg[r][4]=(v>>16)&0xf; } -INLINE SaturnAdr saturn_pop(saturn_state *cpustate) +UINT32 saturn_device::saturn_pop() { - SaturnAdr temp=cpustate->rstk[0]; - memmove(cpustate->rstk, cpustate->rstk+1, sizeof(cpustate->rstk)-sizeof(cpustate->rstk[0])); - cpustate->rstk[7]=0; + UINT32 temp=m_rstk[0]; + memmove(m_rstk, m_rstk+1, sizeof(m_rstk)-sizeof(m_rstk[0])); + m_rstk[7]=0; return temp; } -INLINE void saturn_push(saturn_state *cpustate, SaturnAdr adr) +void saturn_device::saturn_push(UINT32 adr) { - memmove(cpustate->rstk+1, cpustate->rstk, sizeof(cpustate->rstk)-sizeof(cpustate->rstk[0])); - cpustate->rstk[0]=adr; + memmove(m_rstk+1, m_rstk, sizeof(m_rstk)-sizeof(m_rstk[0])); + m_rstk[0]=adr; } -INLINE void saturn_interrupt_on(saturn_state *cpustate) +void saturn_device::saturn_interrupt_on() { - LOG(( "SATURN '%s' at %05x: INTON\n", cpustate->device->tag(), cpustate->pc-4 )); - cpustate->irq_enable=1; - if (cpustate->irq_state) + LOG(( "SATURN '%s' at %05x: INTON\n", tag(), m_pc-4 )); + m_irq_enable=1; + if (m_irq_state) { - LOG(( "SATURN '%s' set_irq_line(ASSERT)\n", cpustate->device->tag())); - cpustate->pending_irq=1; + LOG(( "SATURN '%s' set_irq_line(ASSERT)\n", tag())); + m_pending_irq=1; } } -INLINE void saturn_interrupt_off(saturn_state *cpustate) +void saturn_device::saturn_interrupt_off() { - LOG(( "SATURN '%s' at %05x: INTOFF\n", cpustate->device->tag(), cpustate->pc-4 )); - cpustate->irq_enable=0; + LOG(( "SATURN '%s' at %05x: INTOFF\n", tag(), m_pc-4 )); + m_irq_enable=0; } -INLINE void saturn_reset_interrupt(saturn_state *cpustate) +void saturn_device::saturn_reset_interrupt() { - LOG(( "SATURN '%s' at %05x: RSI\n", cpustate->device->tag(), cpustate->pc-5 )); - if (cpustate->config&&cpustate->config->rsi) cpustate->config->rsi(cpustate->device); + LOG(( "SATURN '%s' at %05x: RSI\n", tag(), m_pc-5 )); + m_rsi_func(ASSERT_LINE); } -INLINE void saturn_mem_reset(saturn_state *cpustate) +void saturn_device::saturn_mem_reset() { - if (cpustate->config&&cpustate->config->reset) cpustate->config->reset(cpustate->device); + m_reset_func(ASSERT_LINE); } -INLINE void saturn_mem_config(saturn_state *cpustate) +void saturn_device::saturn_mem_config() { - if (cpustate->config&&cpustate->config->config) cpustate->config->config(cpustate->device, S64_READ_A(cpustate, C)); + m_config_func(S64_READ_A(C)); } -INLINE void saturn_mem_unconfig(saturn_state *cpustate) +void saturn_device::saturn_mem_unconfig() { - if (cpustate->config&&cpustate->config->unconfig) cpustate->config->unconfig(cpustate->device, S64_READ_A(cpustate, C)); + m_unconfig_func(S64_READ_A(C)); } -INLINE void saturn_mem_id(saturn_state *cpustate) +void saturn_device::saturn_mem_id() { int id=0; - if (cpustate->config&&cpustate->config->id) id=cpustate->config->id(cpustate->device); - S64_WRITE_A(cpustate, C,id); - cpustate->monitor_id = id; + id = m_id_func(); + S64_WRITE_A(C,id); + m_monitor_id = id; } -INLINE void saturn_shutdown(saturn_state *cpustate) +void saturn_device::saturn_shutdown() { - cpustate->sleeping=1; - cpustate->irq_enable=1; - LOG(( "SATURN '%s' at %05x: SHUTDN\n", cpustate->device->tag(), cpustate->pc-3 )); + m_sleeping=1; + m_irq_enable=1; + LOG(( "SATURN '%s' at %05x: SHUTDN\n", tag(), m_pc-3 )); } -INLINE void saturn_bus_command_b(saturn_state *cpustate) +void saturn_device::saturn_bus_command_b() { - logerror( "SATURN '%s' at %05x: BUSCB opcode not handled\n", cpustate->device->tag(), cpustate->pc-4 ); + logerror( "SATURN '%s' at %05x: BUSCB opcode not handled\n", tag(), m_pc-4 ); } -INLINE void saturn_bus_command_c(saturn_state *cpustate) +void saturn_device::saturn_bus_command_c() { - logerror( "SATURN '%s' at %05x: BUSCC opcode not handled\n", cpustate->device->tag(), cpustate->pc-3 ); + logerror( "SATURN '%s' at %05x: BUSCC opcode not handled\n", tag(), m_pc-3 ); } -INLINE void saturn_bus_command_d(saturn_state *cpustate) +void saturn_device::saturn_bus_command_d() { - logerror( "SATURN '%s' at %05x: BUSCD opcode not handled\n", cpustate->device->tag(), cpustate->pc-4 ); + logerror( "SATURN '%s' at %05x: BUSCD opcode not handled\n", tag(), m_pc-4 ); } -INLINE void saturn_serial_request(saturn_state *cpustate) +void saturn_device::saturn_serial_request() { - logerror( "SATURN '%s' at %05x: SREQ? opcode not handled\n", cpustate->device->tag(), cpustate->pc-3 ); + logerror( "SATURN '%s' at %05x: SREQ? opcode not handled\n", tag(), m_pc-3 ); } -INLINE void saturn_out_c(saturn_state *cpustate) +void saturn_device::saturn_out_c() { - cpustate->out=S64_READ_X(cpustate, C); - if (cpustate->config&&cpustate->config->out) cpustate->config->out(cpustate->device, cpustate->out); + m_out=S64_READ_X(C); + m_out_func(m_out); } -INLINE void saturn_out_cs(saturn_state *cpustate) +void saturn_device::saturn_out_cs() { - cpustate->out=(cpustate->out&0xff0)|cpustate->reg[C][0]; - if (cpustate->config&&cpustate->config->out) cpustate->config->out(cpustate->device, cpustate->out); + m_out=(m_out&0xff0)|m_reg[C][0]; + m_out_func(m_out); } -INLINE void saturn_in(saturn_state *cpustate, int reg) +void saturn_device::saturn_in(int reg) { int in = 0; saturn_assert(reg>=0 && reg<9); - if (!(cpustate->pc&1)) + if (!(m_pc&1)) logerror( "SATURN '%s' at %05x: reg=IN opcode at odd addresse\n", - cpustate->device->tag(), cpustate->pc-3 ); - if (cpustate->config&&cpustate->config->in) in = cpustate->config->in(cpustate->device); - S64_WRITE_WORD(cpustate, reg,in); - cpustate->monitor_in = in; + tag(), m_pc-3 ); + in = m_in_func(); + S64_WRITE_WORD(reg,in); + m_monitor_in = in; } -INLINE void saturn_sethex(saturn_state *cpustate) { cpustate->decimal=0; } -INLINE void saturn_setdec(saturn_state *cpustate) { cpustate->decimal=1; } /* st related */ -INLINE void saturn_clear_st(saturn_state *cpustate) +void saturn_device::saturn_clear_st() { - cpustate->st&=0xf000; + m_st&=0xf000; } -INLINE void saturn_st_to_c(saturn_state *cpustate) +void saturn_device::saturn_st_to_c() { - S64_WRITE_X(cpustate, C,cpustate->st); + S64_WRITE_X(C,m_st); } -INLINE void saturn_c_to_st(saturn_state *cpustate) +void saturn_device::saturn_c_to_st() { - cpustate->st=(cpustate->st&0xf000)|(S64_READ_X(cpustate, C)); + m_st=(m_st&0xf000)|(S64_READ_X(C)); } -INLINE void saturn_exchange_c_st(saturn_state *cpustate) +void saturn_device::saturn_exchange_c_st() { - int t=cpustate->st; - cpustate->st=(t&0xf000)|(S64_READ_X(cpustate, C)); - S64_WRITE_X(cpustate, C,t); + int t=m_st; + m_st=(t&0xf000)|(S64_READ_X(C)); + S64_WRITE_X(C,t); } -INLINE void saturn_jump_after_test(saturn_state *cpustate) +void saturn_device::saturn_jump_after_test() { - int adr=READ_OP_DIS8(cpustate); - if (cpustate->carry) { + int adr=READ_OP_DIS8(); + if (m_carry) { if (adr==0) { - cpustate->pc=saturn_pop(cpustate); + m_pc=saturn_pop(); } else { - cpustate->pc=(cpustate->pc+adr-2)&0xfffff; + m_pc=(m_pc+adr-2)&0xfffff; } } } -INLINE void saturn_st_clear_bit(saturn_state *cpustate) +void saturn_device::saturn_st_clear_bit() { - cpustate->st &= ~(1<<(READ_OP_ARG(cpustate))); + m_st &= ~(1<<(READ_OP_ARG())); } -INLINE void saturn_st_set_bit(saturn_state *cpustate) +void saturn_device::saturn_st_set_bit() { - cpustate->st |= (1<<(READ_OP_ARG(cpustate))); + m_st |= (1<<(READ_OP_ARG())); } -INLINE void saturn_st_jump_bit_clear(saturn_state *cpustate) +void saturn_device::saturn_st_jump_bit_clear() { - cpustate->carry=!((cpustate->st>>(READ_OP_ARG(cpustate)))&1); - saturn_jump_after_test(cpustate); + m_carry=!((m_st>>(READ_OP_ARG()))&1); + saturn_jump_after_test(); } -INLINE void saturn_st_jump_bit_set(saturn_state *cpustate) +void saturn_device::saturn_st_jump_bit_set() { - cpustate->carry=(cpustate->st>>(READ_OP_ARG(cpustate)))&1; - saturn_jump_after_test(cpustate); + m_carry=(m_st>>(READ_OP_ARG()))&1; + saturn_jump_after_test(); } -INLINE void saturn_hst_clear_bits(saturn_state *cpustate) +void saturn_device::saturn_hst_clear_bits() { - cpustate->hst&=~(READ_OP_ARG(cpustate)); + m_hst&=~(READ_OP_ARG()); } -INLINE void saturn_hst_bits_cleared(saturn_state *cpustate) +void saturn_device::saturn_hst_bits_cleared() { - cpustate->carry=!(cpustate->hst&(READ_OP_ARG(cpustate))); - saturn_jump_after_test(cpustate); + m_carry=!(m_hst&(READ_OP_ARG())); + saturn_jump_after_test(); } /* p related */ -INLINE void saturn_exchange_p(saturn_state *cpustate) +void saturn_device::saturn_exchange_p() { - int nr=READ_OP_ARG(cpustate); - int t=cpustate->p; - cpustate->p=cpustate->reg[C][nr]; - cpustate->reg[C][nr]=t; + int nr=READ_OP_ARG(); + int t=m_p; + m_p=m_reg[C][nr]; + m_reg[C][nr]=t; } -INLINE void saturn_p_to_c(saturn_state *cpustate) +void saturn_device::saturn_p_to_c() { - int nr=READ_OP_ARG(cpustate); - cpustate->reg[C][nr]=cpustate->p; + int nr=READ_OP_ARG(); + m_reg[C][nr]=m_p; } -INLINE void saturn_c_to_p(saturn_state *cpustate) +void saturn_device::saturn_c_to_p() { - int nr=READ_OP_ARG(cpustate); - cpustate->p=cpustate->reg[C][nr]; + int nr=READ_OP_ARG(); + m_p=m_reg[C][nr]; } -INLINE void saturn_dec_p(saturn_state *cpustate) +void saturn_device::saturn_dec_p() { - cpustate->carry=cpustate->p==0; - cpustate->p=(cpustate->p-1)&0xf; + m_carry=m_p==0; + m_p=(m_p-1)&0xf; } -INLINE void saturn_inc_p(saturn_state *cpustate) +void saturn_device::saturn_inc_p() { - cpustate->p=(cpustate->p+1)&0xf; - cpustate->carry=cpustate->p==0; + m_p=(m_p+1)&0xf; + m_carry=m_p==0; } -INLINE void saturn_load_p(saturn_state *cpustate) +void saturn_device::saturn_load_p() { - cpustate->p=READ_OP_ARG(cpustate); + m_p=READ_OP_ARG(); } -INLINE void saturn_p_equals(saturn_state *cpustate) +void saturn_device::saturn_p_equals() { - cpustate->carry=cpustate->p==(READ_OP_ARG(cpustate)); - saturn_jump_after_test(cpustate); + m_carry=m_p==(READ_OP_ARG()); + saturn_jump_after_test(); } -INLINE void saturn_p_not_equals(saturn_state *cpustate) +void saturn_device::saturn_p_not_equals() { - cpustate->carry=cpustate->p!=(READ_OP_ARG(cpustate)); - saturn_jump_after_test(cpustate); + m_carry=m_p!=(READ_OP_ARG()); + saturn_jump_after_test(); } -INLINE void saturn_ca_p_1(saturn_state *cpustate) +void saturn_device::saturn_ca_p_1() { - int a=(S64_READ_A(cpustate, C))+1+cpustate->p; - cpustate->carry=a>=0x100000; - S64_WRITE_A(cpustate, C,a&0xfffff); + int a=(S64_READ_A(C))+1+m_p; + m_carry=a>=0x100000; + S64_WRITE_A(C,a&0xfffff); } -INLINE void saturn_load_reg(saturn_state *cpustate, int reg) +void saturn_device::saturn_load_reg(int reg) { - int count=READ_OP_ARG(cpustate); - int pos=cpustate->p; + int count=READ_OP_ARG(); + int pos=m_p; saturn_assert(reg>=0 && reg<9); for (; count>=0; count--, pos=(pos+1)&0xf ) { - cpustate->reg[reg][pos]=READ_OP_ARG(cpustate); + m_reg[reg][pos]=READ_OP_ARG(); } } -INLINE void saturn_jump(saturn_state *cpustate, int adr, int jump) +void saturn_device::saturn_jump(int adr, int jump) { saturn_assert(adr>=0 && adr<0x100000); if (jump) { - cpustate->pc=adr; - cpustate->icount-=10; + m_pc=adr; + m_icount-=10; } } -INLINE void saturn_call(saturn_state *cpustate, int adr) +void saturn_device::saturn_call(int adr) { saturn_assert(adr>=0 && adr<0x100000); - saturn_push(cpustate, cpustate->pc); - cpustate->pc=adr; -// cpustate->icount-=10; + saturn_push(m_pc); + m_pc=adr; +// m_icount-=10; } -INLINE void saturn_return(saturn_state *cpustate, int yes) +void saturn_device::saturn_return(int yes) { if (yes) { - cpustate->pc=saturn_pop(cpustate); -// cpustate->icount-=10; + m_pc=saturn_pop(); +// m_icount-=10; } } -INLINE void saturn_return_carry_set(saturn_state *cpustate) +void saturn_device::saturn_return_carry_set() { - cpustate->pc=saturn_pop(cpustate); -// cpustate->icount-=10; - cpustate->carry=1; + m_pc=saturn_pop(); +// m_icount-=10; + m_carry=1; } -INLINE void saturn_return_carry_clear(saturn_state *cpustate) +void saturn_device::saturn_return_carry_clear() { - cpustate->pc=saturn_pop(cpustate); -// cpustate->icount-=10; - cpustate->carry=0; + m_pc=saturn_pop(); +// m_icount-=10; + m_carry=0; } -INLINE void saturn_return_interrupt(saturn_state *cpustate) +void saturn_device::saturn_return_interrupt() { - LOG(( "SATURN '%s' at %05x: RTI\n", cpustate->device->tag(), cpustate->pc-2 )); - cpustate->in_irq=0; /* set to 1 when an IRQ is taken */ - cpustate->pc=saturn_pop(cpustate); -// cpustate->icount-=10; + LOG(( "SATURN '%s' at %05x: RTI\n", tag(), m_pc-2 )); + m_in_irq=0; /* set to 1 when an IRQ is taken */ + m_pc=saturn_pop(); +// m_icount-=10; } -INLINE void saturn_return_xm_set(saturn_state *cpustate) +void saturn_device::saturn_return_xm_set() { - cpustate->pc=saturn_pop(cpustate); - cpustate->hst|=XM; -// cpustate->icount-=10; + m_pc=saturn_pop(); + m_hst|=XM; +// m_icount-=10; } -INLINE void saturn_pop_c(saturn_state *cpustate) +void saturn_device::saturn_pop_c() { - S64_WRITE_A(cpustate, C,saturn_pop(cpustate)); + S64_WRITE_A(C,saturn_pop()); } -INLINE void saturn_push_c(saturn_state *cpustate) +void saturn_device::saturn_push_c() { - saturn_push(cpustate, S64_READ_A(cpustate, C)); + saturn_push(S64_READ_A(C)); } -INLINE void saturn_indirect_jump(saturn_state *cpustate, int reg) +void saturn_device::saturn_indirect_jump(int reg) { saturn_assert(reg>=0 && reg<9); - cpustate->pc=READ_20(cpustate, S64_READ_A(cpustate, reg)); + m_pc=READ_20(S64_READ_A(reg)); } -INLINE void saturn_equals_zero(saturn_state *cpustate, int reg, int begin, int count) +void saturn_device::saturn_equals_zero(int reg, int begin, int count) { int i, t; saturn_assert(reg>=0 && reg<9); saturn_assert(begin>=0 && count>=0 && begin+count<=16); - cpustate->carry=1; + m_carry=1; for (i=0; i<count; i++) { - t=cpustate->reg[reg][begin+i]; - if (t!=0) { cpustate->carry=0; break; } - cpustate->icount-=2; + t=m_reg[reg][begin+i]; + if (t!=0) { m_carry=0; break; } + m_icount-=2; } - saturn_jump_after_test(cpustate); + saturn_jump_after_test(); } -INLINE void saturn_equals(saturn_state *cpustate, int reg, int begin, int count, int right) +void saturn_device::saturn_equals(int reg, int begin, int count, int right) { int i, t,t2; saturn_assert(reg>=0 && reg<9); saturn_assert(right>=0 && right<9); saturn_assert(begin>=0 && count>=0 && begin+count<=16); - cpustate->carry=1; + m_carry=1; for (i=0; i<count; i++) { - t=cpustate->reg[reg][begin+i]; - t2=cpustate->reg[right][begin+i]; - if (t!=t2) { cpustate->carry=0; break; } - cpustate->icount-=2; + t=m_reg[reg][begin+i]; + t2=m_reg[right][begin+i]; + if (t!=t2) { m_carry=0; break; } + m_icount-=2; } - saturn_jump_after_test(cpustate); + saturn_jump_after_test(); } -INLINE void saturn_not_equals_zero(saturn_state *cpustate, int reg, int begin, int count) +void saturn_device::saturn_not_equals_zero(int reg, int begin, int count) { int i, t; saturn_assert(reg>=0 && reg<9); saturn_assert(begin>=0 && count>=0 && begin+count<=16); - cpustate->carry=0; + m_carry=0; for (i=0; i<count; i++) { - t=cpustate->reg[reg][begin+i]; - if (t!=0) { cpustate->carry=1; break; } - cpustate->icount-=2; + t=m_reg[reg][begin+i]; + if (t!=0) { m_carry=1; break; } + m_icount-=2; } - saturn_jump_after_test(cpustate); + saturn_jump_after_test(); } -INLINE void saturn_not_equals(saturn_state *cpustate, int reg, int begin, int count, int right) +void saturn_device::saturn_not_equals(int reg, int begin, int count, int right) { int i, t,t2; saturn_assert(reg>=0 && reg<9); saturn_assert(right>=0 && right<9); saturn_assert(begin>=0 && count>=0 && begin+count<=16); - cpustate->carry=0; + m_carry=0; for (i=0; i<count; i++) { - t=cpustate->reg[reg][begin+i]; - t2=cpustate->reg[right][begin+i]; - if (t!=t2) { cpustate->carry=1; break; } - cpustate->icount-=2; + t=m_reg[reg][begin+i]; + t2=m_reg[right][begin+i]; + if (t!=t2) { m_carry=1; break; } + m_icount-=2; } - saturn_jump_after_test(cpustate); + saturn_jump_after_test(); } -INLINE void saturn_greater(saturn_state *cpustate, int reg, int begin, int count, int right) +void saturn_device::saturn_greater(int reg, int begin, int count, int right) { int i, t,t2; saturn_assert(reg>=0 && reg<9); saturn_assert(right>=0 && right<9); saturn_assert(begin>=0 && count>=0 && begin+count<=16); - cpustate->carry=0; + m_carry=0; for (i=count-1; i>=0; i--) { - t=cpustate->reg[reg][begin+i]; - t2=cpustate->reg[right][begin+i]; - if (t>t2) { cpustate->carry=1; break; } + t=m_reg[reg][begin+i]; + t2=m_reg[right][begin+i]; + if (t>t2) { m_carry=1; break; } if (t<t2) break; - cpustate->icount-=2; + m_icount-=2; } - saturn_jump_after_test(cpustate); + saturn_jump_after_test(); } -INLINE void saturn_greater_equals(saturn_state *cpustate, int reg, int begin, int count, int right) +void saturn_device::saturn_greater_equals(int reg, int begin, int count, int right) { int i, t,t2; saturn_assert(reg>=0 && reg<9); saturn_assert(right>=0 && right<9); saturn_assert(begin>=0 && count>=0 && begin+count<=16); - cpustate->carry=1; + m_carry=1; for (i=count-1; i>=0; i--) { - t=cpustate->reg[reg][begin+i]; - t2=cpustate->reg[right][begin+i]; - if (t<t2) { cpustate->carry=0; break; } + t=m_reg[reg][begin+i]; + t2=m_reg[right][begin+i]; + if (t<t2) { m_carry=0; break; } if (t>t2) break; - cpustate->icount-=2; + m_icount-=2; } - saturn_jump_after_test(cpustate); + saturn_jump_after_test(); } -INLINE void saturn_smaller_equals(saturn_state *cpustate, int reg, int begin, int count, int right) +void saturn_device::saturn_smaller_equals(int reg, int begin, int count, int right) { int i, t,t2; saturn_assert(reg>=0 && reg<9); saturn_assert(right>=0 && right<9); saturn_assert(begin>=0 && count>=0 && begin+count<=16); - cpustate->carry=1; + m_carry=1; for (i=count-1; i>=0; i--) { - t=cpustate->reg[reg][begin+i]; - t2=cpustate->reg[right][begin+i]; - if (t>t2) { cpustate->carry=0; break; } + t=m_reg[reg][begin+i]; + t2=m_reg[right][begin+i]; + if (t>t2) { m_carry=0; break; } if (t<t2) break; - cpustate->icount-=2; + m_icount-=2; } - saturn_jump_after_test(cpustate); + saturn_jump_after_test(); } -INLINE void saturn_smaller(saturn_state *cpustate, int reg, int begin, int count, int right) +void saturn_device::saturn_smaller(int reg, int begin, int count, int right) { int i, t,t2; saturn_assert(reg>=0 && reg<9); saturn_assert(right>=0 && right<9); saturn_assert(begin>=0 && count>=0 && begin+count<=16); - cpustate->carry=0; + m_carry=0; for (i=count-1; i>=0; i--) { - t=cpustate->reg[reg][begin+i]; - t2=cpustate->reg[right][begin+i]; - if (t<t2) { cpustate->carry=1; break; } + t=m_reg[reg][begin+i]; + t2=m_reg[right][begin+i]; + if (t<t2) { m_carry=1; break; } if (t>t2) break; - cpustate->icount-=2; + m_icount-=2; } - saturn_jump_after_test(cpustate); + saturn_jump_after_test(); } -INLINE void saturn_jump_bit_clear(saturn_state *cpustate, int reg) +void saturn_device::saturn_jump_bit_clear(int reg) { - int op=READ_OP_ARG(cpustate); + int op=READ_OP_ARG(); saturn_assert(reg>=0 && reg<9); - cpustate->carry=!((cpustate->reg[reg][op>>2]>>(op&3))&1); - saturn_jump_after_test(cpustate); + m_carry=!((m_reg[reg][op>>2]>>(op&3))&1); + saturn_jump_after_test(); } -INLINE void saturn_jump_bit_set(saturn_state *cpustate, int reg) +void saturn_device::saturn_jump_bit_set(int reg) { - int op=READ_OP_ARG(cpustate); + int op=READ_OP_ARG(); saturn_assert(reg>=0 && reg<9); - cpustate->carry=(cpustate->reg[reg][op>>2]>>(op&3))&1; - saturn_jump_after_test(cpustate); + m_carry=(m_reg[reg][op>>2]>>(op&3))&1; + saturn_jump_after_test(); } -INLINE void saturn_load_pc(saturn_state *cpustate, int reg) +void saturn_device::saturn_load_pc(int reg) { saturn_assert(reg>=0 && reg<9); - cpustate->pc=S64_READ_A(cpustate, reg); + m_pc=S64_READ_A(reg); } -INLINE void saturn_store_pc(saturn_state *cpustate, int reg) +void saturn_device::saturn_store_pc(int reg) { saturn_assert(reg>=0 && reg<9); - S64_WRITE_A(cpustate, reg,cpustate->pc); + S64_WRITE_A(reg,m_pc); } -INLINE void saturn_exchange_pc(saturn_state *cpustate, int reg) +void saturn_device::saturn_exchange_pc(int reg) { - int temp=cpustate->pc; + int temp=m_pc; saturn_assert(reg>=0 && reg<9); - cpustate->pc=S64_READ_A(cpustate, reg); - S64_WRITE_A(cpustate, reg, temp); + m_pc=S64_READ_A(reg); + S64_WRITE_A(reg, temp); } /************************************************************************************* address register related *************************************************************************************/ -INLINE void saturn_load_adr(saturn_state *cpustate, int reg, int nibbles) +void saturn_device::saturn_load_adr(int reg, int nibbles) { saturn_assert(reg>=0 && reg<2); saturn_assert(nibbles==2 || nibbles==4 || nibbles==5); switch (nibbles) { case 5: - cpustate->d[reg]=READ_OP_ARG20(cpustate); + m_d[reg]=READ_OP_ARG20(); break; case 4: - cpustate->d[reg]=(cpustate->d[reg]&0xf0000)|READ_OP_ARG16(cpustate); + m_d[reg]=(m_d[reg]&0xf0000)|READ_OP_ARG16(); break; case 2: - cpustate->d[reg]=(cpustate->d[reg]&0xfff00)|READ_OP_ARG8(cpustate); + m_d[reg]=(m_d[reg]&0xfff00)|READ_OP_ARG8(); break; } } -INLINE void saturn_add_adr(saturn_state *cpustate, int reg) +void saturn_device::saturn_add_adr(int reg) { - int t=cpustate->d[reg]+READ_OP_ARG(cpustate)+1; + int t=m_d[reg]+READ_OP_ARG()+1; saturn_assert(reg>=0 && reg<2); - cpustate->d[reg]=t&0xfffff; - cpustate->carry=t>=0x100000; + m_d[reg]=t&0xfffff; + m_carry=t>=0x100000; } -INLINE void saturn_sub_adr(saturn_state *cpustate, int reg) +void saturn_device::saturn_sub_adr(int reg) { - int t=cpustate->d[reg]-READ_OP_ARG(cpustate)-1; + int t=m_d[reg]-READ_OP_ARG()-1; saturn_assert(reg>=0 && reg<2); - cpustate->d[reg]=t&0xfffff; - cpustate->carry=t<0; + m_d[reg]=t&0xfffff; + m_carry=t<0; } -INLINE void saturn_adr_to_reg(saturn_state *cpustate, int adr, int reg) +void saturn_device::saturn_adr_to_reg(int adr, int reg) { saturn_assert(reg>=0 && reg<9); saturn_assert(adr>=0 && adr<2); - S64_WRITE_A(cpustate, reg,cpustate->d[adr]); + S64_WRITE_A(reg,m_d[adr]); } -INLINE void saturn_reg_to_adr(saturn_state *cpustate, int reg, int adr) +void saturn_device::saturn_reg_to_adr(int reg, int adr) { saturn_assert(reg>=0 && reg<9); saturn_assert(adr>=0 && adr<2); - cpustate->d[adr]=S64_READ_A(cpustate, reg); + m_d[adr]=S64_READ_A(reg); } -INLINE void saturn_adr_to_reg_word(saturn_state *cpustate, int adr, int reg) +void saturn_device::saturn_adr_to_reg_word(int adr, int reg) { saturn_assert(reg>=0 && reg<9); saturn_assert(adr>=0 && adr<2); - S64_WRITE_WORD(cpustate, reg,cpustate->d[adr]&0xffff); + S64_WRITE_WORD(reg,m_d[adr]&0xffff); } -INLINE void saturn_reg_to_adr_word(saturn_state *cpustate, int reg, int adr) +void saturn_device::saturn_reg_to_adr_word(int reg, int adr) { saturn_assert(reg>=0 && reg<9); saturn_assert(adr>=0 && adr<2); - cpustate->d[adr]=(cpustate->d[adr]&0xf0000)|S64_READ_WORD(cpustate, reg); + m_d[adr]=(m_d[adr]&0xf0000)|S64_READ_WORD(reg); } -INLINE void saturn_exchange_adr_reg(saturn_state *cpustate, int adr, int reg) +void saturn_device::saturn_exchange_adr_reg(int adr, int reg) { - int temp=cpustate->d[adr]; + int temp=m_d[adr]; saturn_assert(reg>=0 && reg<9); saturn_assert(adr>=0 && adr<2); - cpustate->d[adr]=S64_READ_A(cpustate, reg); - S64_WRITE_A(cpustate, reg,temp); + m_d[adr]=S64_READ_A(reg); + S64_WRITE_A(reg,temp); } -INLINE void saturn_exchange_adr_reg_word(saturn_state *cpustate, int adr, int reg) +void saturn_device::saturn_exchange_adr_reg_word(int adr, int reg) { - int temp=cpustate->d[adr]&0xffff; + int temp=m_d[adr]&0xffff; saturn_assert(reg>=0 && reg<9); saturn_assert(adr>=0 && adr<2); - cpustate->d[adr]=(cpustate->d[adr]&0xf0000)|S64_READ_WORD(cpustate, reg); - S64_WRITE_WORD(cpustate, reg,temp); + m_d[adr]=(m_d[adr]&0xf0000)|S64_READ_WORD(reg); + S64_WRITE_WORD(reg,temp); } -INLINE void saturn_load_nibbles(saturn_state *cpustate, int reg, int begin, int count, int adr) +void saturn_device::saturn_load_nibbles(int reg, int begin, int count, int adr) { int i; saturn_assert(reg>=0 && reg<9); saturn_assert(adr>=0 && adr<2); saturn_assert(begin>=0 && count>=0 && begin+count<=16); for (i=0; i<count; i++) { - cpustate->reg[reg][begin+i]=READ_NIBBLE(cpustate, cpustate->d[adr]+i); - cpustate->icount-=2; + m_reg[reg][begin+i]=READ_NIBBLE(m_d[adr]+i); + m_icount-=2; } } -INLINE void saturn_store_nibbles(saturn_state *cpustate, int reg, int begin, int count, int adr) +void saturn_device::saturn_store_nibbles(int reg, int begin, int count, int adr) { int i; saturn_assert(reg>=0 && reg<9); saturn_assert(adr>=0 && adr<2); saturn_assert(begin>=0 && count>=0 && begin+count<=16); for (i=0; i<count; i++) { - WRITE_NIBBLE(cpustate,(cpustate->d[adr]+i)&0xfffff,cpustate->reg[reg][begin+i]); - cpustate->icount-=2; + WRITE_NIBBLE((m_d[adr]+i)&0xfffff,m_reg[reg][begin+i]); + m_icount-=2; } } -INLINE void saturn_clear_bit(saturn_state *cpustate, int reg) +void saturn_device::saturn_clear_bit(int reg) { - int arg=READ_OP_ARG(cpustate); + int arg=READ_OP_ARG(); saturn_assert(reg>=0 && reg<9); - cpustate->reg[reg][arg>>2]&=~(1<<(arg&3)); + m_reg[reg][arg>>2]&=~(1<<(arg&3)); } -INLINE void saturn_set_bit(saturn_state *cpustate, int reg) +void saturn_device::saturn_set_bit(int reg) { - int arg=READ_OP_ARG(cpustate); + int arg=READ_OP_ARG(); saturn_assert(reg>=0 && reg<9); - cpustate->reg[reg][arg>>2]|=1<<(arg&3); + m_reg[reg][arg>>2]|=1<<(arg&3); } /**************************************************************************** clear opers ****************************************************************************/ -INLINE void saturn_clear(saturn_state *cpustate, int reg, int begin, int count) +void saturn_device::saturn_clear(int reg, int begin, int count) { int i; saturn_assert(reg>=0 && reg<9); saturn_assert(begin>=0 && count>=0 && begin+count<=16); for (i=0; i<count; i++) { - cpustate->reg[reg][begin+i]=0; - cpustate->icount-=2; + m_reg[reg][begin+i]=0; + m_icount-=2; } } /**************************************************************************** exchange opers ****************************************************************************/ -INLINE void saturn_exchange(saturn_state *cpustate, int left, int begin, int count, int right) +void saturn_device::saturn_exchange(int left, int begin, int count, int right) { int i; - SaturnNib temp; + UINT8 temp; saturn_assert(left>=0 && left<9); saturn_assert(right>=0 && right<9); saturn_assert(begin>=0 && count>=0 && begin+count<=16); for (i=0; i<count; i++) { - temp=cpustate->reg[left][begin+i]; - cpustate->reg[left][begin+i]=cpustate->reg[right][begin+i]; - cpustate->reg[right][begin+i]=temp; - cpustate->icount-=2; + temp=m_reg[left][begin+i]; + m_reg[left][begin+i]=m_reg[right][begin+i]; + m_reg[right][begin+i]=temp; + m_icount-=2; } } /**************************************************************************** copy opers ****************************************************************************/ -INLINE void saturn_copy(saturn_state *cpustate, int dest, int begin, int count, int src) +void saturn_device::saturn_copy(int dest, int begin, int count, int src) { int i; saturn_assert(dest>=0 && dest<9); saturn_assert(src>=0 && src<9); saturn_assert(begin>=0 && count>=0 && begin+count<=16); for (i=0; i<count; i++) { - cpustate->reg[dest][begin+i]=cpustate->reg[src][begin+i]; - cpustate->icount-=2; + m_reg[dest][begin+i]=m_reg[src][begin+i]; + m_icount-=2; } } /**************************************************************************** add opers ****************************************************************************/ -INLINE void saturn_add(saturn_state *cpustate, int reg, int begin, int count, int right) +void saturn_device::saturn_add(int reg, int begin, int count, int right) { int i, t; - int base=cpustate->decimal?10:16; + int base=m_decimal?10:16; saturn_assert(reg>=0 && reg<9); saturn_assert(right>=0 && right<9); saturn_assert(begin>=0 && count>=0 && begin+count<=16); - cpustate->carry=0; + m_carry=0; for (i=0; i<count; i++) { - t=cpustate->reg[reg][begin+i]; - t+=cpustate->reg[right][begin+i]; - t+=cpustate->carry; + t=m_reg[reg][begin+i]; + t+=m_reg[right][begin+i]; + t+=m_carry; if (t>=base) { - cpustate->carry=1; + m_carry=1; t-=base; } - else cpustate->carry=0; + else m_carry=0; saturn_assert(t>=0); saturn_assert(t<base); - cpustate->reg[reg][begin+i]=t&0xf; - cpustate->icount-=2; + m_reg[reg][begin+i]=t&0xf; + m_icount-=2; } } -INLINE void saturn_add_const(saturn_state *cpustate, int reg, int begin, int count, SaturnNib right) +void saturn_device::saturn_add_const(int reg, int begin, int count, UINT8 right) { int i, t; - int base=cpustate->decimal?10:16; + int base=m_decimal?10:16; saturn_assert(reg>=0 && reg<9); saturn_assert(begin>=0 && count>=0 && begin+count<=16); - saturn_assert(count>1 || !cpustate->decimal); /* SATURN bug */ + saturn_assert(count>1 || !m_decimal); /* SATURN bug */ for (i=0; i<count; i++) { - t=cpustate->reg[reg][begin+i]; + t=m_reg[reg][begin+i]; t+=(right&0xf); right>>=4; if (t>=base) { @@ -861,48 +859,48 @@ INLINE void saturn_add_const(saturn_state *cpustate, int reg, int begin, int cou t-=base; } saturn_assert(t>=0); saturn_assert(t<base); - cpustate->reg[reg][begin+i]=t&0xf; - cpustate->icount-=2; + m_reg[reg][begin+i]=t&0xf; + m_icount-=2; if (!right) break; } - cpustate->carry=right>0; + m_carry=right>0; } /**************************************************************************** sub opers ****************************************************************************/ -INLINE void saturn_sub(saturn_state *cpustate, int reg, int begin, int count, int right) +void saturn_device::saturn_sub(int reg, int begin, int count, int right) { int i, t; - int base=cpustate->decimal?10:16; + int base=m_decimal?10:16; saturn_assert(reg>=0 && reg<9); saturn_assert(right>=0 && right<9); saturn_assert(begin>=0 && count>=0 && begin+count<=16); - cpustate->carry=0; + m_carry=0; for (i=0; i<count; i++) { - t=cpustate->reg[reg][begin+i]; - t-=cpustate->reg[right][begin+i]; - t-=cpustate->carry; + t=m_reg[reg][begin+i]; + t-=m_reg[right][begin+i]; + t-=m_carry; if (t<0) { - cpustate->carry=1; + m_carry=1; t+=base; } - else cpustate->carry=0; + else m_carry=0; saturn_assert(t>=0); saturn_assert(t<base); - cpustate->reg[reg][begin+i]=t&0xf; - cpustate->icount-=2; + m_reg[reg][begin+i]=t&0xf; + m_icount-=2; } } -INLINE void saturn_sub_const(saturn_state *cpustate, int reg, int begin, int count, int right) +void saturn_device::saturn_sub_const(int reg, int begin, int count, int right) { int i, t; - int base=cpustate->decimal?10:16; + int base=m_decimal?10:16; saturn_assert(reg>=0 && reg<9); saturn_assert(begin>=0 && count>=0 && begin+count<=16); - saturn_assert(count>1 || !cpustate->decimal); /* SATURN bug */ + saturn_assert(count>1 || !m_decimal); /* SATURN bug */ for (i=0; i<count; i++) { - t=cpustate->reg[reg][begin+i]; + t=m_reg[reg][begin+i]; t-=(right&0xf); right>>=4; if (t<0) { @@ -910,228 +908,228 @@ INLINE void saturn_sub_const(saturn_state *cpustate, int reg, int begin, int cou t+=base; } saturn_assert(t>=0); saturn_assert(t<base); - cpustate->reg[reg][begin+i]=t&0xf; - cpustate->icount-=2; + m_reg[reg][begin+i]=t&0xf; + m_icount-=2; if (!right) break; } - cpustate->carry=right>0; + m_carry=right>0; } /**************************************************************************** sub2 opers (a=b-a) ****************************************************************************/ -INLINE void saturn_sub2(saturn_state *cpustate, int reg, int begin, int count, int right) +void saturn_device::saturn_sub2(int reg, int begin, int count, int right) { int i, t; - int base=cpustate->decimal?10:16; + int base=m_decimal?10:16; saturn_assert(reg>=0 && reg<9); saturn_assert(right>=0 && right<9); saturn_assert(begin>=0 && count>=0 && begin+count<=16); - cpustate->carry=0; + m_carry=0; for (i=0; i<count; i++) { - t=cpustate->reg[right][begin+i]; - t-=cpustate->reg[reg][begin+i]; - t-=cpustate->carry; + t=m_reg[right][begin+i]; + t-=m_reg[reg][begin+i]; + t-=m_carry; if (t<0) { - cpustate->carry=1; + m_carry=1; t+=base; } - else cpustate->carry=0; + else m_carry=0; saturn_assert(t>=0); saturn_assert(t<base); - cpustate->reg[reg][begin+i]=t&0xf; - cpustate->icount-=2; + m_reg[reg][begin+i]=t&0xf; + m_icount-=2; } } /**************************************************************************** increment opers ****************************************************************************/ -INLINE void saturn_increment(saturn_state *cpustate, int reg, int begin, int count) +void saturn_device::saturn_increment(int reg, int begin, int count) { int i, t=0; - int base=cpustate->decimal?10:16; + int base=m_decimal?10:16; saturn_assert(reg>=0 && reg<9); saturn_assert(begin>=0 && count>=0 && begin+count<=16); for (i=0; i<count; i++) { - cpustate->icount-=2; - t=cpustate->reg[reg][begin+i]; + m_icount-=2; + t=m_reg[reg][begin+i]; t++; - if (t>=base) cpustate->reg[reg][begin+i]=t-base; - else { cpustate->reg[reg][begin+i]=t; break; } + if (t>=base) m_reg[reg][begin+i]=t-base; + else { m_reg[reg][begin+i]=t; break; } } - cpustate->carry=t>=base; + m_carry=t>=base; } /**************************************************************************** decrement opers ****************************************************************************/ -INLINE void saturn_decrement(saturn_state *cpustate, int reg, int begin, int count) +void saturn_device::saturn_decrement(int reg, int begin, int count) { int i, t=0; - int base=cpustate->decimal?10:16; + int base=m_decimal?10:16; saturn_assert(reg>=0 && reg<9); saturn_assert(begin>=0 && count>=0 && begin+count<=16); for (i=0; i<count; i++) { - cpustate->icount-=2; - t=cpustate->reg[reg][begin+i]; + m_icount-=2; + t=m_reg[reg][begin+i]; t--; - if (t<0) cpustate->reg[reg][begin+i]=t+base; - else { cpustate->reg[reg][begin+i]=t; break; } + if (t<0) m_reg[reg][begin+i]=t+base; + else { m_reg[reg][begin+i]=t; break; } } - cpustate->carry=t<0; + m_carry=t<0; } /**************************************************************************** invert (1 complement) opers ****************************************************************************/ -INLINE void saturn_invert(saturn_state *cpustate, int reg, int begin, int count) +void saturn_device::saturn_invert(int reg, int begin, int count) { int i; - int max=cpustate->decimal?9:15; + int max=m_decimal?9:15; saturn_assert(reg>=0 && reg<9); saturn_assert(begin>=0 && count>=0 && begin+count<=16); - cpustate->carry=0; + m_carry=0; for (i=0; i<count; i++) { - cpustate->reg[reg][begin+i]=(max-cpustate->reg[reg][begin+i])&0xf; - cpustate->icount-=2; + m_reg[reg][begin+i]=(max-m_reg[reg][begin+i])&0xf; + m_icount-=2; } } /**************************************************************************** negate (2 complement) opers ****************************************************************************/ -INLINE void saturn_negate(saturn_state *cpustate, int reg, int begin, int count) +void saturn_device::saturn_negate(int reg, int begin, int count) { int i, n, c; - int max=cpustate->decimal?9:15; + int max=m_decimal?9:15; saturn_assert(reg>=0 && reg<9); saturn_assert(begin>=0 && count>=0 && begin+count<=16); c=1; - cpustate->carry=0; + m_carry=0; for (i=0; i<count; i++) { - n=cpustate->reg[reg][begin+i]; - if (n) cpustate->carry=1; + n=m_reg[reg][begin+i]; + if (n) m_carry=1; n=max+c-n; if (n>max) n-=max+1; else c=0; saturn_assert(n>=0); saturn_assert(n<=max); - cpustate->reg[reg][begin+i]=n&0xf; - cpustate->icount-=2; + m_reg[reg][begin+i]=n&0xf; + m_icount-=2; } } /**************************************************************************** or opers ****************************************************************************/ -INLINE void saturn_or(saturn_state *cpustate, int dest, int begin, int count, int src) +void saturn_device::saturn_or(int dest, int begin, int count, int src) { int i; saturn_assert(dest>=0 && dest<9); saturn_assert(src>=0 && src<9); saturn_assert(begin>=0 && count>=0 && begin+count<=16); for (i=0; i<count; i++) { - cpustate->reg[dest][begin+i]|=cpustate->reg[src][begin+i]; - cpustate->icount-=2; + m_reg[dest][begin+i]|=m_reg[src][begin+i]; + m_icount-=2; } } /**************************************************************************** and opers ****************************************************************************/ -INLINE void saturn_and(saturn_state *cpustate, int dest, int begin, int count, int src) +void saturn_device::saturn_and(int dest, int begin, int count, int src) { int i; saturn_assert(dest>=0 && dest<9); saturn_assert(src>=0 && src<9); saturn_assert(begin>=0 && count>=0 && begin+count<=16); for (i=0; i<count; i++) { - cpustate->reg[dest][begin+i]&=cpustate->reg[src][begin+i]; - cpustate->icount-=2; + m_reg[dest][begin+i]&=m_reg[src][begin+i]; + m_icount-=2; } } /**************************************************************************** shift nibbles left opers ****************************************************************************/ -INLINE void saturn_shift_nibble_left(saturn_state *cpustate, int reg, int begin, int count) +void saturn_device::saturn_shift_nibble_left(int reg, int begin, int count) { int i; saturn_assert(reg>=0 && reg<9); saturn_assert(begin>=0 && count>=0 && begin+count<=16); - if (cpustate->reg[reg][begin+count-1]) cpustate->hst|=SB; + if (m_reg[reg][begin+count-1]) m_hst|=SB; for (i=count-1; i>=1; i--) { - cpustate->reg[reg][begin+i]=cpustate->reg[reg][begin+i-1]; - cpustate->icount-=2; + m_reg[reg][begin+i]=m_reg[reg][begin+i-1]; + m_icount-=2; } - cpustate->reg[reg][begin]=0; - cpustate->icount-=2; + m_reg[reg][begin]=0; + m_icount-=2; } /**************************************************************************** shift nibbles right opers ****************************************************************************/ -INLINE void saturn_shift_nibble_right(saturn_state *cpustate, int reg, int begin, int count) +void saturn_device::saturn_shift_nibble_right(int reg, int begin, int count) { int i; saturn_assert(reg>=0 && reg<9); saturn_assert(begin>=0 && count>=0 && begin+count<=16); - if (cpustate->reg[reg][begin]) cpustate->hst|=SB; + if (m_reg[reg][begin]) m_hst|=SB; for (i=1; i<count; i++) { - cpustate->reg[reg][begin+i-1]=cpustate->reg[reg][begin+i]; - cpustate->icount-=2; + m_reg[reg][begin+i-1]=m_reg[reg][begin+i]; + m_icount-=2; } - cpustate->reg[reg][begin+count-1]=0; - cpustate->icount-=2; + m_reg[reg][begin+count-1]=0; + m_icount-=2; } /**************************************************************************** rotate nibbles left opers ****************************************************************************/ -INLINE void saturn_rotate_nibble_left_w(saturn_state *cpustate, int reg) +void saturn_device::saturn_rotate_nibble_left_w(int reg) { - int i, x=cpustate->reg[reg][15]; + int i, x=m_reg[reg][15]; saturn_assert(reg>=0 && reg<9); for (i=15; i>=1; i--) { - cpustate->reg[reg][i]=cpustate->reg[reg][i-1]; - cpustate->icount-=2; + m_reg[reg][i]=m_reg[reg][i-1]; + m_icount-=2; } - cpustate->reg[reg][0]=x; - cpustate->icount-=2; + m_reg[reg][0]=x; + m_icount-=2; } /**************************************************************************** rotate nibbles right opers ****************************************************************************/ -INLINE void saturn_rotate_nibble_right_w(saturn_state *cpustate, int reg) +void saturn_device::saturn_rotate_nibble_right_w(int reg) { - int i, x=cpustate->reg[reg][0]; + int i, x=m_reg[reg][0]; saturn_assert(reg>=0 && reg<9); for (i=1; i<16; i++) { - cpustate->reg[reg][i-1]=cpustate->reg[reg][i]; - cpustate->icount-=2; + m_reg[reg][i-1]=m_reg[reg][i]; + m_icount-=2; } - cpustate->reg[reg][15]=x; - if (x) cpustate->hst|=SB; - cpustate->icount-=2; + m_reg[reg][15]=x; + if (x) m_hst|=SB; + m_icount-=2; } /**************************************************************************** shift right opers ****************************************************************************/ -INLINE void saturn_shift_right(saturn_state *cpustate, int reg, int begin, int count) +void saturn_device::saturn_shift_right(int reg, int begin, int count) { int i, t, c=0; saturn_assert(reg>=0 && reg<9); saturn_assert(begin>=0 && count>=0 && begin+count<=16); for (i=count-1; i>=0; i--) { - t=cpustate->reg[reg][begin+i]; + t=m_reg[reg][begin+i]; t|=(c<<4); c=t&1; - cpustate->reg[reg][begin+i]=t>>1; - cpustate->icount-=2; + m_reg[reg][begin+i]=t>>1; + m_icount-=2; } - if (c) cpustate->hst|=SB; - cpustate->icount-=2; + if (c) m_hst|=SB; + m_icount-=2; } diff --git a/src/emu/cpu/saturn/sattable.c b/src/emu/cpu/saturn/sattable.c index 400cd1105ad..82af6dd829f 100644 --- a/src/emu/cpu/saturn/sattable.c +++ b/src/emu/cpu/saturn/sattable.c @@ -35,869 +35,869 @@ static const int add_right[]={B,C,A,C, I,I,I,I, A,B,C,D, I,I,I,I}; static const int sub_left[] ={A,B,C,D, I,I,I,I, B,C,A,C, A,B,C,D}; static const int sub_right[]={B,C,A,C, I,I,I,I, A,B,C,D, B,C,A,C}; -static void saturn_invalid3( saturn_state *cpustate, int op1, int op2, int op3 ) +void saturn_device::saturn_invalid3( int op1, int op2, int op3 ) { logerror( "SATURN '%s' invalid opcode %x%x%x at %05x\n", - cpustate->device->tag(), op1, op2, op3, cpustate->pc-3 ); + tag(), op1, op2, op3, m_pc-3 ); } -static void saturn_invalid4( saturn_state *cpustate, int op1, int op2, int op3, int op4 ) +void saturn_device::saturn_invalid4( int op1, int op2, int op3, int op4 ) { logerror( "SATURN '%s' invalid opcode %x%x%x%x at %05x\n", - cpustate->device->tag(), op1, op2, op3, op4, cpustate->pc-4 ); + tag(), op1, op2, op3, op4, m_pc-4 ); } -static void saturn_invalid5( saturn_state *cpustate, int op1, int op2, int op3, int op4, int op5 ) +void saturn_device::saturn_invalid5( int op1, int op2, int op3, int op4, int op5 ) { logerror( "SATURN '%s' invalid opcode %x%x%x%x%x at %05x\n", - cpustate->device->tag(), op1, op2, op3, op4, op5, cpustate->pc-5 ); + tag(), op1, op2, op3, op4, op5, m_pc-5 ); } -static void saturn_invalid6( saturn_state *cpustate, int op1, int op2, int op3, int op4, int op5, int op6 ) +void saturn_device::saturn_invalid6( int op1, int op2, int op3, int op4, int op5, int op6 ) { logerror( "SATURN '%s' invalid opcode %x%x%x%x%x%x at %05x\n", - cpustate->device->tag(), op1, op2, op3, op4, op5, op6, cpustate->pc-6 ); + tag(), op1, op2, op3, op4, op5, op6, m_pc-6 ); } -INLINE void saturn_instruction_0e(saturn_state *cpustate) +void saturn_device::saturn_instruction_0e() { int reg, adr; - switch(adr=READ_OP(cpustate)) { + switch(adr=READ_OP()) { case 0: - switch(reg=READ_OP(cpustate)){ + switch(reg=READ_OP()){ case 0: case 1: case 2: case 3: case 4: case 5: case 6: case 7: - saturn_and(cpustate, reg_left[reg], cpustate->p, 1, reg_right[reg]); + saturn_and(reg_left[reg], m_p, 1, reg_right[reg]); break; //A=A&B p case 8: case 9: case 0xa: case 0xb: case 0xc: case 0xd: case 0xe: case 0xf: - saturn_or(cpustate, reg_left[reg&7], cpustate->p, 1, reg_right[reg&7]); + saturn_or(reg_left[reg&7], m_p, 1, reg_right[reg&7]); break; //A=A!B p } break; case 1: - switch(reg=READ_OP(cpustate)){ + switch(reg=READ_OP()){ case 0: case 1: case 2: case 3:case 4: case 5: case 6: case 7: - saturn_and(cpustate, reg_left[reg], 0, cpustate->p+1, reg_right[reg]); + saturn_and(reg_left[reg], 0, m_p+1, reg_right[reg]); break; //A=A&B wp case 8: case 9: case 0xa: case 0xb: case 0xc: case 0xd: case 0xe: case 0xf: - saturn_or(cpustate, reg_left[reg&7], 0, cpustate->p+1, reg_right[reg&7]); + saturn_or(reg_left[reg&7], 0, m_p+1, reg_right[reg&7]); break; //A=A!B wp } break; case 2: case 3: case 4: case 5: case 6: case 7: case 0xf: - switch(reg=READ_OP(cpustate)){ + switch(reg=READ_OP()){ case 0: case 1: case 2: case 3: case 4: case 5: case 6: case 7: - saturn_and(cpustate, reg_left[reg], adr_af_begin[adr], adr_af_count[adr], reg_right[reg]); + saturn_and(reg_left[reg], adr_af_begin[adr], adr_af_count[adr], reg_right[reg]); break; //A=A&B xs case 8: case 9: case 0xa: case 0xb: case 0xc: case 0xd: case 0xe: case 0xf: - saturn_or(cpustate, reg_left[reg&7], adr_af_begin[adr], adr_af_count[adr], reg_right[reg&7]); + saturn_or(reg_left[reg&7], adr_af_begin[adr], adr_af_count[adr], reg_right[reg&7]); break; //A=A!B xs } break; default: - saturn_invalid3( cpustate, 0, 0xe, adr ); + saturn_invalid3( 0, 0xe, adr ); break; } } -static void saturn_instruction_1(saturn_state *cpustate) +void saturn_device::saturn_instruction_1() { int reg, adr, oper; - switch (adr=READ_OP(cpustate)) { + switch (adr=READ_OP()) { case 0: - switch (reg=READ_OP(cpustate)) { + switch (reg=READ_OP()) { case 0: case 1: case 2: case 3: case 4: - saturn_copy(cpustate, R0+reg, BEGIN_W, COUNT_W, A); + saturn_copy(R0+reg, BEGIN_W, COUNT_W, A); break; // r0=a w case 8: case 9: case 0xa: case 0xb: case 0xc: - saturn_copy(cpustate, R0+(reg&7), BEGIN_W, COUNT_W, C); + saturn_copy(R0+(reg&7), BEGIN_W, COUNT_W, C); break; // r0=c w default: - saturn_invalid3( cpustate, 1, adr, reg ); + saturn_invalid3( 1, adr, reg ); break; } break; case 1: - switch (reg=READ_OP(cpustate)) { + switch (reg=READ_OP()) { case 0: case 1: case 2: case 3: case 4: - saturn_copy(cpustate, A, BEGIN_W, COUNT_W, R0+reg); + saturn_copy(A, BEGIN_W, COUNT_W, R0+reg); break; // a=r0 w case 8: case 9: case 0xa: case 0xb: case 0xc: - saturn_copy(cpustate, C, BEGIN_W, COUNT_W, R0+(reg&7)); + saturn_copy(C, BEGIN_W, COUNT_W, R0+(reg&7)); break; // c=r0 w default: - saturn_invalid3( cpustate, 1, adr, reg ); + saturn_invalid3( 1, adr, reg ); break; } break; case 2: - switch (reg=READ_OP(cpustate)) { + switch (reg=READ_OP()) { case 0: case 1: case 2: case 3: case 4: - saturn_exchange(cpustate, A, BEGIN_W, COUNT_W, R0+reg); + saturn_exchange(A, BEGIN_W, COUNT_W, R0+reg); break; // ar0ex w case 8: case 9: case 0xa: case 0xb: case 0xc: - saturn_exchange(cpustate, C, BEGIN_W, COUNT_W, R0+(reg&7)); + saturn_exchange(C, BEGIN_W, COUNT_W, R0+(reg&7)); break; // cr0ex w default: - saturn_invalid3( cpustate, 2, adr, reg ); + saturn_invalid3( 2, adr, reg ); break; } break; case 3: - switch (READ_OP(cpustate)) { - case 0: saturn_reg_to_adr(cpustate, A,0);break; - case 1: saturn_reg_to_adr(cpustate, A,1);break; - case 2: saturn_exchange_adr_reg(cpustate, 0,A);break; - case 3: saturn_exchange_adr_reg(cpustate, 1,A);break; - case 4: saturn_reg_to_adr(cpustate, C,0);break; - case 5: saturn_reg_to_adr(cpustate, C,1);break; - case 6: saturn_exchange_adr_reg(cpustate, 0,C);break; - case 7: saturn_exchange_adr_reg(cpustate, 1,C);break; - case 8: saturn_reg_to_adr_word(cpustate, A,0);break; - case 9: saturn_reg_to_adr_word(cpustate, A,1);break; - case 0xa: saturn_exchange_adr_reg_word(cpustate, 0,A);break; - case 0xb: saturn_exchange_adr_reg_word(cpustate, 1,A);break; - case 0xc: saturn_reg_to_adr_word(cpustate, C,0);break; - case 0xd: saturn_reg_to_adr_word(cpustate, C,1);break; - case 0xe: saturn_exchange_adr_reg_word(cpustate, 0,C);break; - case 0xf: saturn_exchange_adr_reg_word(cpustate, 1,C);break; + switch (READ_OP()) { + case 0: saturn_reg_to_adr(A,0);break; + case 1: saturn_reg_to_adr(A,1);break; + case 2: saturn_exchange_adr_reg(0,A);break; + case 3: saturn_exchange_adr_reg(1,A);break; + case 4: saturn_reg_to_adr(C,0);break; + case 5: saturn_reg_to_adr(C,1);break; + case 6: saturn_exchange_adr_reg(0,C);break; + case 7: saturn_exchange_adr_reg(1,C);break; + case 8: saturn_reg_to_adr_word(A,0);break; + case 9: saturn_reg_to_adr_word(A,1);break; + case 0xa: saturn_exchange_adr_reg_word(0,A);break; + case 0xb: saturn_exchange_adr_reg_word(1,A);break; + case 0xc: saturn_reg_to_adr_word(C,0);break; + case 0xd: saturn_reg_to_adr_word(C,1);break; + case 0xe: saturn_exchange_adr_reg_word(0,C);break; + case 0xf: saturn_exchange_adr_reg_word(1,C);break; } break; case 4: - switch (READ_OP(cpustate)) { - case 0: saturn_store_nibbles(cpustate, A, BEGIN_A, COUNT_A, 0); break; - case 1: saturn_store_nibbles(cpustate, A, BEGIN_A, COUNT_A, 1); break; - case 2: saturn_load_nibbles(cpustate, A, BEGIN_A, COUNT_A, 0); break; - case 3: saturn_load_nibbles(cpustate, A, BEGIN_A, COUNT_A, 1); break; - case 4: saturn_store_nibbles(cpustate, C, BEGIN_A, COUNT_A, 0); break; - case 5: saturn_store_nibbles(cpustate, C, BEGIN_A, COUNT_A, 1); break; - case 6: saturn_load_nibbles(cpustate, C, BEGIN_A, COUNT_A, 0); break; - case 7: saturn_load_nibbles(cpustate, C, BEGIN_A, COUNT_A, 1); break; - case 8: saturn_store_nibbles(cpustate, A, BEGIN_B, COUNT_B, 0); break; - case 9: saturn_store_nibbles(cpustate, A, BEGIN_B, COUNT_B, 1); break; - case 0xa: saturn_load_nibbles(cpustate, A, BEGIN_B, COUNT_B, 0); break; - case 0xb: saturn_load_nibbles(cpustate, A, BEGIN_B, COUNT_B, 1); break; - case 0xc: saturn_store_nibbles(cpustate, C, BEGIN_B, COUNT_B, 0); break; - case 0xd: saturn_store_nibbles(cpustate, C, BEGIN_B, COUNT_B, 1); break; - case 0xe: saturn_load_nibbles(cpustate, C, BEGIN_B, COUNT_B, 0); break; - case 0xf: saturn_load_nibbles(cpustate, C, BEGIN_B, COUNT_B, 1); break; + switch (READ_OP()) { + case 0: saturn_store_nibbles(A, BEGIN_A, COUNT_A, 0); break; + case 1: saturn_store_nibbles(A, BEGIN_A, COUNT_A, 1); break; + case 2: saturn_load_nibbles(A, BEGIN_A, COUNT_A, 0); break; + case 3: saturn_load_nibbles(A, BEGIN_A, COUNT_A, 1); break; + case 4: saturn_store_nibbles(C, BEGIN_A, COUNT_A, 0); break; + case 5: saturn_store_nibbles(C, BEGIN_A, COUNT_A, 1); break; + case 6: saturn_load_nibbles(C, BEGIN_A, COUNT_A, 0); break; + case 7: saturn_load_nibbles(C, BEGIN_A, COUNT_A, 1); break; + case 8: saturn_store_nibbles(A, BEGIN_B, COUNT_B, 0); break; + case 9: saturn_store_nibbles(A, BEGIN_B, COUNT_B, 1); break; + case 0xa: saturn_load_nibbles(A, BEGIN_B, COUNT_B, 0); break; + case 0xb: saturn_load_nibbles(A, BEGIN_B, COUNT_B, 1); break; + case 0xc: saturn_store_nibbles(C, BEGIN_B, COUNT_B, 0); break; + case 0xd: saturn_store_nibbles(C, BEGIN_B, COUNT_B, 1); break; + case 0xe: saturn_load_nibbles(C, BEGIN_B, COUNT_B, 0); break; + case 0xf: saturn_load_nibbles(C, BEGIN_B, COUNT_B, 1); break; } break; case 5: - switch (oper=READ_OP(cpustate)) { + switch (oper=READ_OP()) { case 0: case 1: case 4: case 5: - switch (adr=READ_OP(cpustate)) { + switch (adr=READ_OP()) { case 0: - saturn_store_nibbles(cpustate, oper&4?C:A,cpustate->p,1,oper&1); + saturn_store_nibbles(oper&4?C:A,m_p,1,oper&1); break; case 1: - saturn_store_nibbles(cpustate, oper&4?C:A,0,cpustate->p+1,oper&1); + saturn_store_nibbles(oper&4?C:A,0,m_p+1,oper&1); break; case 2: case 3: case 4: case 5: case 6: case 7: - saturn_store_nibbles(cpustate, oper&4?C:A,adr_a_begin[adr],adr_a_count[adr],oper&1); + saturn_store_nibbles(oper&4?C:A,adr_a_begin[adr],adr_a_count[adr],oper&1); break; default: - saturn_invalid4( cpustate, 1, 5, oper, adr ); + saturn_invalid4( 1, 5, oper, adr ); break; } break; case 2: case 3: case 6: case 7: - switch (adr=READ_OP(cpustate)) { + switch (adr=READ_OP()) { case 0: - saturn_load_nibbles(cpustate, oper&4?C:A,cpustate->p,1,oper&1); + saturn_load_nibbles(oper&4?C:A,m_p,1,oper&1); break; case 1: - saturn_load_nibbles(cpustate, oper&4?C:A,0,cpustate->p+1,oper&1); + saturn_load_nibbles(oper&4?C:A,0,m_p+1,oper&1); break; case 2: case 3: case 4: case 5: case 6: case 7: - saturn_load_nibbles(cpustate, oper&4?C:A,adr_a_begin[adr],adr_a_count[adr],oper&1); + saturn_load_nibbles(oper&4?C:A,adr_a_begin[adr],adr_a_count[adr],oper&1); break; default: - saturn_invalid4( cpustate, 1, 5, oper, adr ); + saturn_invalid4( 1, 5, oper, adr ); break; } break; - case 8: saturn_store_nibbles(cpustate, A, 0, READ_OP(cpustate)+1, 0); break; - case 9: saturn_store_nibbles(cpustate, A, 0, READ_OP(cpustate)+1, 1); break; - case 0xa: saturn_load_nibbles(cpustate, A, 0, READ_OP(cpustate)+1, 0); break; - case 0xb: saturn_load_nibbles(cpustate, A, 0, READ_OP(cpustate)+1, 1); break; - case 0xc: saturn_store_nibbles(cpustate, C, 0, READ_OP(cpustate)+1, 0); break; - case 0xd: saturn_store_nibbles(cpustate, C, 0, READ_OP(cpustate)+1, 1); break; - case 0xe: saturn_load_nibbles(cpustate, C, 0, READ_OP(cpustate)+1, 0); break; - case 0xf: saturn_load_nibbles(cpustate, C, 0, READ_OP(cpustate)+1, 1); break; + case 8: saturn_store_nibbles(A, 0, READ_OP()+1, 0); break; + case 9: saturn_store_nibbles(A, 0, READ_OP()+1, 1); break; + case 0xa: saturn_load_nibbles(A, 0, READ_OP()+1, 0); break; + case 0xb: saturn_load_nibbles(A, 0, READ_OP()+1, 1); break; + case 0xc: saturn_store_nibbles(C, 0, READ_OP()+1, 0); break; + case 0xd: saturn_store_nibbles(C, 0, READ_OP()+1, 1); break; + case 0xe: saturn_load_nibbles(C, 0, READ_OP()+1, 0); break; + case 0xf: saturn_load_nibbles(C, 0, READ_OP()+1, 1); break; } break; - case 6: saturn_add_adr(cpustate, 0);break; - case 7: saturn_add_adr(cpustate, 1);break; - case 8: saturn_sub_adr(cpustate, 0);break; - case 9: saturn_load_adr(cpustate, 0,2);break; - case 0xa: saturn_load_adr(cpustate, 0,4);break; - case 0xb: saturn_load_adr(cpustate, 0,5);break; - case 0xc: saturn_sub_adr(cpustate, 1);break; - case 0xd: saturn_load_adr(cpustate, 1,2);break; - case 0xe: saturn_load_adr(cpustate, 1,4);break; - case 0xf: saturn_load_adr(cpustate, 1,5);break; + case 6: saturn_add_adr(0);break; + case 7: saturn_add_adr(1);break; + case 8: saturn_sub_adr(0);break; + case 9: saturn_load_adr(0,2);break; + case 0xa: saturn_load_adr(0,4);break; + case 0xb: saturn_load_adr(0,5);break; + case 0xc: saturn_sub_adr(1);break; + case 0xd: saturn_load_adr(1,2);break; + case 0xe: saturn_load_adr(1,4);break; + case 0xf: saturn_load_adr(1,5);break; } } -static void saturn_instruction_80(saturn_state *cpustate) +void saturn_device::saturn_instruction_80() { int op; - switch(READ_OP(cpustate)) { - case 0: saturn_out_cs(cpustate);break; - case 1: saturn_out_c(cpustate);break; - case 2: saturn_in(cpustate, A);break; - case 3: saturn_in(cpustate, C);break; - case 4: saturn_mem_unconfig(cpustate);break; - case 5: saturn_mem_config(cpustate);break; - case 6: saturn_mem_id(cpustate);break; - case 7: saturn_shutdown(cpustate);break; + switch(READ_OP()) { + case 0: saturn_out_cs();break; + case 1: saturn_out_c();break; + case 2: saturn_in(A);break; + case 3: saturn_in(C);break; + case 4: saturn_mem_unconfig();break; + case 5: saturn_mem_config();break; + case 6: saturn_mem_id();break; + case 7: saturn_shutdown();break; case 8: - switch(READ_OP(cpustate)) { - case 0: saturn_interrupt_on(cpustate);break; + switch(READ_OP()) { + case 0: saturn_interrupt_on();break; case 1: - switch(op=READ_OP(cpustate)) { - case 0: saturn_reset_interrupt(cpustate);break; - default: saturn_invalid5( cpustate, 8, 0, 8, 1, op ); break; + switch(op=READ_OP()) { + case 0: saturn_reset_interrupt();break; + default: saturn_invalid5( 8, 0, 8, 1, op ); break; } break; - case 2: saturn_load_reg(cpustate, A);break; //la - case 3: saturn_bus_command_b(cpustate);break; - case 4: saturn_clear_bit(cpustate, A);break; // abit=0 - case 5: saturn_set_bit(cpustate, A);break; // abit=1 - case 6: saturn_jump_bit_clear(cpustate, A);break; - case 7: saturn_jump_bit_set(cpustate, A);break; - case 8: saturn_clear_bit(cpustate, C);break; // cbit=0 - case 9: saturn_set_bit(cpustate, C);break; // cbit=1 - case 0xa: saturn_jump_bit_clear(cpustate, C);break; - case 0xb: saturn_jump_bit_set(cpustate, C);break; - case 0xc: saturn_indirect_jump(cpustate, A);break; - case 0xd: saturn_bus_command_d(cpustate);break; - case 0xe: saturn_indirect_jump(cpustate, C);break; - case 0xf: saturn_interrupt_off(cpustate);break; + case 2: saturn_load_reg(A);break; //la + case 3: saturn_bus_command_b();break; + case 4: saturn_clear_bit(A);break; // abit=0 + case 5: saturn_set_bit(A);break; // abit=1 + case 6: saturn_jump_bit_clear(A);break; + case 7: saturn_jump_bit_set(A);break; + case 8: saturn_clear_bit(C);break; // cbit=0 + case 9: saturn_set_bit(C);break; // cbit=1 + case 0xa: saturn_jump_bit_clear(C);break; + case 0xb: saturn_jump_bit_set(C);break; + case 0xc: saturn_indirect_jump(A);break; + case 0xd: saturn_bus_command_d();break; + case 0xe: saturn_indirect_jump(C);break; + case 0xf: saturn_interrupt_off();break; } break; - case 9: saturn_ca_p_1(cpustate);break;//C+P+1 - case 0xa: saturn_mem_reset(cpustate);break; - case 0xb: saturn_bus_command_b(cpustate);break; - case 0xc: saturn_p_to_c(cpustate);break; - case 0xd: saturn_c_to_p(cpustate);break; - case 0xe: saturn_serial_request(cpustate);break; - case 0xf: saturn_exchange_p(cpustate);break; + case 9: saturn_ca_p_1();break;//C+P+1 + case 0xa: saturn_mem_reset();break; + case 0xb: saturn_bus_command_b();break; + case 0xc: saturn_p_to_c();break; + case 0xd: saturn_c_to_p();break; + case 0xe: saturn_serial_request();break; + case 0xf: saturn_exchange_p();break; } } -static void saturn_instruction_81a(saturn_state *cpustate) +void saturn_device::saturn_instruction_81a() { int reg, adr,op; - switch(adr=READ_OP(cpustate)) { + switch(adr=READ_OP()) { case 0: - switch(op=READ_OP(cpustate)) { + switch(op=READ_OP()) { case 0: - switch(reg=READ_OP(cpustate)) { + switch(reg=READ_OP()) { case 0: case 1: case 2: case 3: case 4: - saturn_copy(cpustate, R0+reg,cpustate->p,1,A); + saturn_copy(R0+reg,m_p,1,A); break; //r0=a p case 8: case 9: case 0xa: case 0xb: case 0xc: - saturn_copy(cpustate, R0+(reg&7),cpustate->p,1,C); + saturn_copy(R0+(reg&7),m_p,1,C); break; //r0=c p default: - saturn_invalid6( cpustate, 8, 1, 0xa, adr, op, reg); + saturn_invalid6( 8, 1, 0xa, adr, op, reg); break; } break; case 1: - switch(reg=READ_OP(cpustate)) { + switch(reg=READ_OP()) { case 0: case 1: case 2: case 3: case 4: - saturn_copy(cpustate, A,cpustate->p,1,R0+reg); + saturn_copy(A,m_p,1,R0+reg); break; //a=r0 p case 8: case 9: case 0xa: case 0xb: case 0xc: - saturn_copy(cpustate, C,cpustate->p,1,R0+(reg&7)); + saturn_copy(C,m_p,1,R0+(reg&7)); break; //c=r0 p default: - saturn_invalid6( cpustate, 8, 1, 0xa, adr, op, reg); + saturn_invalid6( 8, 1, 0xa, adr, op, reg); break; } break; case 2: - switch (reg=READ_OP(cpustate)) { + switch (reg=READ_OP()) { case 0: case 1: case 2: case 3: case 4: - saturn_exchange(cpustate, A, cpustate->p,1,R0+reg); + saturn_exchange(A, m_p,1,R0+reg); break; // ar0ex p case 8: case 9: case 0xa: case 0xb: case 0xc: - saturn_exchange(cpustate, C, cpustate->p,1,R0+(reg&7)); + saturn_exchange(C, m_p,1,R0+(reg&7)); break; // cr0ex p default: - saturn_invalid6( cpustate, 8, 1, 0xa, adr, op, reg); + saturn_invalid6( 8, 1, 0xa, adr, op, reg); break; } break; default: - saturn_invalid5( cpustate, 8, 1, 0xa, adr, op ); + saturn_invalid5( 8, 1, 0xa, adr, op ); break; } break; case 1: - switch(op=READ_OP(cpustate)) { + switch(op=READ_OP()) { case 0: - switch(reg=READ_OP(cpustate)) { + switch(reg=READ_OP()) { case 0: case 1: case 2: case 3: case 4: - saturn_copy(cpustate, R0+reg,0,cpustate->p+1,A); + saturn_copy(R0+reg,0,m_p+1,A); break; //r0=a wp case 8: case 9: case 0xa: case 0xb: case 0xc: - saturn_copy(cpustate, R0+(reg&7),0,cpustate->p+1,C); + saturn_copy(R0+(reg&7),0,m_p+1,C); break; //r0=c wp default: - saturn_invalid6( cpustate, 8, 1, 0xa, adr, op, reg); + saturn_invalid6( 8, 1, 0xa, adr, op, reg); break; } break; case 1: - switch(reg=READ_OP(cpustate)) { + switch(reg=READ_OP()) { case 0: case 1: case 2: case 3: case 4: - saturn_copy(cpustate, A,0,cpustate->p+1,R0+reg); + saturn_copy(A,0,m_p+1,R0+reg); break; //a=r0 wp case 8: case 9: case 0xa: case 0xb: case 0xc: - saturn_copy(cpustate, C,0,cpustate->p+1,R0+(reg&7)); + saturn_copy(C,0,m_p+1,R0+(reg&7)); break; //c=r0 wp default: - saturn_invalid6( cpustate, 8, 1, 0xa, adr, op, reg); + saturn_invalid6( 8, 1, 0xa, adr, op, reg); break; } break; case 2: - switch (reg=READ_OP(cpustate)) { + switch (reg=READ_OP()) { case 0: case 1: case 2: case 3: case 4: - saturn_exchange(cpustate, A, 0, cpustate->p+1, R0+reg); + saturn_exchange(A, 0, m_p+1, R0+reg); break; // ar0ex wp case 8: case 9: case 0xa: case 0xb: case 0xc: - saturn_exchange(cpustate, C, 0, cpustate->p+1, R0+(reg&7)); + saturn_exchange(C, 0, m_p+1, R0+(reg&7)); break; // cr0ex wp default: - saturn_invalid6( cpustate, 8, 1, 0xa, adr, op, reg); + saturn_invalid6( 8, 1, 0xa, adr, op, reg); break; } break; default: - saturn_invalid5( cpustate, 8, 1, 0xa, adr, op ); + saturn_invalid5( 8, 1, 0xa, adr, op ); break; } break; case 2: case 3: case 4: case 5: case 6: case 7: case 0xf: - switch(op=READ_OP(cpustate)) { + switch(op=READ_OP()) { case 0: - switch(reg=READ_OP(cpustate)) { + switch(reg=READ_OP()) { case 0: case 1: case 2: case 3: case 4: - saturn_copy(cpustate, R0+reg,adr_af_begin[adr],adr_af_count[adr],A); + saturn_copy(R0+reg,adr_af_begin[adr],adr_af_count[adr],A); break; //r0=a xs case 8: case 9: case 0xa: case 0xb: case 0xc: - saturn_copy(cpustate, R0+(reg&7),adr_af_begin[adr], adr_af_count[adr],C); + saturn_copy(R0+(reg&7),adr_af_begin[adr], adr_af_count[adr],C); break; //r0=c xs default: - saturn_invalid6( cpustate, 8, 1, 0xa, adr, op, reg); + saturn_invalid6( 8, 1, 0xa, adr, op, reg); break; } break; case 1: - switch(reg=READ_OP(cpustate)) { + switch(reg=READ_OP()) { case 0: case 1: case 2: case 3: case 4: - saturn_copy(cpustate, A,adr_af_begin[adr],adr_af_count[adr],R0+reg); + saturn_copy(A,adr_af_begin[adr],adr_af_count[adr],R0+reg); break; //a=r0 xs case 8: case 9: case 0xa: case 0xb: case 0xc: - saturn_copy(cpustate, C,adr_af_begin[adr],adr_af_count[adr],R0+(reg&7)); + saturn_copy(C,adr_af_begin[adr],adr_af_count[adr],R0+(reg&7)); break; //c=r0 xs default: - saturn_invalid6( cpustate, 8, 1, 0xa, adr, op, reg); + saturn_invalid6( 8, 1, 0xa, adr, op, reg); break; } break; case 2: - switch (reg=READ_OP(cpustate)) { + switch (reg=READ_OP()) { case 0: case 1: case 2: case 3: case 4: - saturn_exchange(cpustate, A, adr_af_begin[adr], adr_af_count[adr], R0+reg); + saturn_exchange(A, adr_af_begin[adr], adr_af_count[adr], R0+reg); break; // ar0ex xs case 8: case 9: case 0xa: case 0xb: case 0xc: - saturn_exchange(cpustate, C, adr_af_begin[adr], adr_af_count[adr], R0+(reg&7)); + saturn_exchange(C, adr_af_begin[adr], adr_af_count[adr], R0+(reg&7)); break; // cr0ex xs default: - saturn_invalid6( cpustate, 8, 1, 0xa, adr, op, reg); + saturn_invalid6( 8, 1, 0xa, adr, op, reg); break; } break; default: - saturn_invalid5( cpustate, 8, 1, 0xa, adr, op ); + saturn_invalid5( 8, 1, 0xa, adr, op ); break; } break; default: - saturn_invalid4( cpustate, 8, 1, 0xa, adr ); + saturn_invalid4( 8, 1, 0xa, adr ); break; } } -static void saturn_instruction_81(saturn_state *cpustate) +void saturn_device::saturn_instruction_81() { int reg, adr; - switch(reg=READ_OP(cpustate)) { + switch(reg=READ_OP()) { case 0: case 1: case 2: case 3: - saturn_rotate_nibble_left_w(cpustate, A+reg); break; // aslc w + saturn_rotate_nibble_left_w(A+reg); break; // aslc w case 4: case 5: case 6: case 7: - saturn_rotate_nibble_right_w(cpustate, A+(reg&3)); break; // asrc w + saturn_rotate_nibble_right_w(A+(reg&3)); break; // asrc w case 8: - switch(adr=READ_OP(cpustate)) { + switch(adr=READ_OP()) { case 0: - switch (reg=READ_OP(cpustate)) { + switch (reg=READ_OP()) { case 0: case 1: case 2: case 3: - saturn_add_const(cpustate, A+reg, cpustate->p, 1, READ_OP(cpustate)+1); + saturn_add_const(A+reg, m_p, 1, READ_OP()+1); break; case 8: case 9: case 0xa: case 0xb: - saturn_sub_const(cpustate, A+(reg&3), cpustate->p, 1, READ_OP(cpustate)+1); + saturn_sub_const(A+(reg&3), m_p, 1, READ_OP()+1); break; default: - saturn_invalid5( cpustate, 8, 1, 8, adr, reg ); + saturn_invalid5( 8, 1, 8, adr, reg ); break; } break; case 1: - switch (reg=READ_OP(cpustate)) { + switch (reg=READ_OP()) { case 0: case 1: case 2: case 3: - saturn_add_const(cpustate, A+reg, 0, cpustate->p+1, READ_OP(cpustate)+1); + saturn_add_const(A+reg, 0, m_p+1, READ_OP()+1); break; case 8: case 9: case 0xa: case 0xb: - saturn_sub_const(cpustate, A+(reg&3), 0, cpustate->p+1, READ_OP(cpustate)+1); + saturn_sub_const(A+(reg&3), 0, m_p+1, READ_OP()+1); break; default: - saturn_invalid5( cpustate, 8, 1, 8, adr, reg ); + saturn_invalid5( 8, 1, 8, adr, reg ); break; } break; case 2: case 3: case 4: case 5: case 6: case 7: case 0xf: - switch (reg=READ_OP(cpustate)) { + switch (reg=READ_OP()) { case 0: case 1: case 2: case 3: - saturn_add_const(cpustate, A+reg, adr_af_begin[adr], adr_af_count[adr], READ_OP(cpustate)+1); + saturn_add_const(A+reg, adr_af_begin[adr], adr_af_count[adr], READ_OP()+1); break; case 8: case 9: case 0xa: case 0xb: - saturn_sub_const(cpustate, A+(reg&3), adr_af_begin[adr], adr_af_count[adr], READ_OP(cpustate)+1); + saturn_sub_const(A+(reg&3), adr_af_begin[adr], adr_af_count[adr], READ_OP()+1); break; default: - saturn_invalid5( cpustate, 8, 1, 8, adr, reg ); + saturn_invalid5( 8, 1, 8, adr, reg ); break; } break; default: - saturn_invalid4( cpustate, 8, 1, 8, adr ); + saturn_invalid4( 8, 1, 8, adr ); break; } break; case 9: - switch(adr=READ_OP(cpustate)) { + switch(adr=READ_OP()) { case 0: - switch(reg=READ_OP(cpustate)){ + switch(reg=READ_OP()){ case 0: case 1: case 2: case 3: - saturn_shift_right(cpustate, A+reg,cpustate->p,1); + saturn_shift_right(A+reg,m_p,1); break; // asrb p default: - saturn_invalid5( cpustate, 8, 1, 9, adr, reg ); + saturn_invalid5( 8, 1, 9, adr, reg ); break; } break; case 1: - switch(reg=READ_OP(cpustate)){ + switch(reg=READ_OP()){ case 0: case 1: case 2: case 3: - saturn_shift_right(cpustate, A+reg, 0,cpustate->p+1); + saturn_shift_right(A+reg, 0,m_p+1); break; // asrb wp default: - saturn_invalid5( cpustate, 8, 1, 9, adr, reg ); + saturn_invalid5( 8, 1, 9, adr, reg ); break; } break; case 2: case 3: case 4: case 5: case 6: case 7: case 0xf: - switch(reg=READ_OP(cpustate)){ + switch(reg=READ_OP()){ case 0: case 1: case 2: case 3: - saturn_shift_right(cpustate, A+reg, adr_af_begin[adr], adr_af_count[adr]); + saturn_shift_right(A+reg, adr_af_begin[adr], adr_af_count[adr]); break; // asrb xs default: - saturn_invalid5( cpustate, 8, 1, 9, adr, reg ); + saturn_invalid5( 8, 1, 9, adr, reg ); break; } break; default: - saturn_invalid4( cpustate, 8, 1, 9, adr ); + saturn_invalid4( 8, 1, 9, adr ); break; } break; case 0xa: - saturn_instruction_81a(cpustate); + saturn_instruction_81a(); break; case 0xb: - switch(adr=READ_OP(cpustate)) { - case 2: saturn_load_pc(cpustate, A);break; - case 3: saturn_load_pc(cpustate, C);break; - case 4: saturn_store_pc(cpustate, A);break; - case 5: saturn_store_pc(cpustate, C);break; - case 6: saturn_exchange_pc(cpustate, A);break; - case 7: saturn_exchange_pc(cpustate, C);break; - default: saturn_invalid4( cpustate, 8, 1, reg, adr ); break; + switch(adr=READ_OP()) { + case 2: saturn_load_pc(A);break; + case 3: saturn_load_pc(C);break; + case 4: saturn_store_pc(A);break; + case 5: saturn_store_pc(C);break; + case 6: saturn_exchange_pc(A);break; + case 7: saturn_exchange_pc(C);break; + default: saturn_invalid4( 8, 1, reg, adr ); break; } break; case 0xc: case 0xd: case 0xe: case 0xf: - saturn_shift_right(cpustate, A+(reg&3), BEGIN_W, COUNT_W); + saturn_shift_right(A+(reg&3), BEGIN_W, COUNT_W); break; // asrb w } } -static void saturn_instruction_8(saturn_state *cpustate) +void saturn_device::saturn_instruction_8() { int oper, adr; - switch(READ_OP(cpustate)) { + switch(READ_OP()) { case 0: - saturn_instruction_80(cpustate); + saturn_instruction_80(); break; case 1: - saturn_instruction_81(cpustate); + saturn_instruction_81(); break; - case 2: saturn_hst_clear_bits(cpustate);break; - case 3: saturn_hst_bits_cleared(cpustate);break; - case 4: saturn_st_clear_bit(cpustate);break; - case 5: saturn_st_set_bit(cpustate);break; - case 6: saturn_st_jump_bit_clear(cpustate);break; - case 7: saturn_st_jump_bit_set(cpustate);break; - case 8: saturn_p_not_equals(cpustate); break; - case 9: saturn_p_equals(cpustate); break; + case 2: saturn_hst_clear_bits();break; + case 3: saturn_hst_bits_cleared();break; + case 4: saturn_st_clear_bit();break; + case 5: saturn_st_set_bit();break; + case 6: saturn_st_jump_bit_clear();break; + case 7: saturn_st_jump_bit_set();break; + case 8: saturn_p_not_equals(); break; + case 9: saturn_p_equals(); break; case 0xa: - switch(oper=READ_OP(cpustate)) { + switch(oper=READ_OP()) { case 0: case 1: case 2: case 3: - saturn_equals(cpustate, reg_left[oper&3] , BEGIN_A, COUNT_A, reg_right[oper&3]); + saturn_equals(reg_left[oper&3] , BEGIN_A, COUNT_A, reg_right[oper&3]); break; case 4: case 5: case 6: case 7: - saturn_not_equals(cpustate, reg_left[oper&3] , BEGIN_A, COUNT_A, reg_right[oper&3]); + saturn_not_equals(reg_left[oper&3] , BEGIN_A, COUNT_A, reg_right[oper&3]); break; case 8: case 9: case 0xa: case 0xb: - saturn_equals_zero(cpustate, A+(oper&3), BEGIN_A, COUNT_A); + saturn_equals_zero(A+(oper&3), BEGIN_A, COUNT_A); break; case 0xc: case 0xd: case 0xe: case 0xf: - saturn_not_equals_zero(cpustate, A+(oper&3), BEGIN_A, COUNT_A); + saturn_not_equals_zero(A+(oper&3), BEGIN_A, COUNT_A); break; } break; case 0xb: - switch(oper=READ_OP(cpustate)) { + switch(oper=READ_OP()) { case 0: case 1: case 2: case 3: - saturn_greater(cpustate, reg_left[oper&3] , BEGIN_A, COUNT_A, reg_right[oper&3]); + saturn_greater(reg_left[oper&3] , BEGIN_A, COUNT_A, reg_right[oper&3]); break; case 4: case 5: case 6: case 7: - saturn_smaller(cpustate, reg_left[oper&3] , BEGIN_A, COUNT_A, reg_right[oper&3]); + saturn_smaller(reg_left[oper&3] , BEGIN_A, COUNT_A, reg_right[oper&3]); break; case 8: case 9: case 0xa: case 0xb: - saturn_greater_equals(cpustate, reg_left[oper&3], BEGIN_A, COUNT_A, reg_right[oper&3]); + saturn_greater_equals(reg_left[oper&3], BEGIN_A, COUNT_A, reg_right[oper&3]); break; case 0xc: case 0xd: case 0xe: case 0xf: - saturn_smaller_equals(cpustate, reg_left[oper&3], BEGIN_A, COUNT_A, reg_right[oper&3]); + saturn_smaller_equals(reg_left[oper&3], BEGIN_A, COUNT_A, reg_right[oper&3]); break; } break; case 0xc: - adr=READ_OP_DIS16(cpustate); - saturn_jump(cpustate, (adr+cpustate->pc-4)&0xfffff,1); + adr=READ_OP_DIS16(); + saturn_jump((adr+m_pc-4)&0xfffff,1); break; case 0xd: - adr=READ_OP_ARG20(cpustate); - saturn_jump(cpustate, adr,1); + adr=READ_OP_ARG20(); + saturn_jump(adr,1); break; case 0xe: - adr=READ_OP_DIS16(cpustate); - saturn_call(cpustate, (adr+cpustate->pc)&0xfffff); + adr=READ_OP_DIS16(); + saturn_call((adr+m_pc)&0xfffff); break; case 0xf: - adr=READ_OP_ARG20(cpustate); - saturn_call(cpustate, adr); + adr=READ_OP_ARG20(); + saturn_call(adr); break; } } -static void saturn_instruction_9(saturn_state *cpustate) +void saturn_device::saturn_instruction_9() { int adr, oper; - switch(adr=READ_OP(cpustate)) { + switch(adr=READ_OP()) { case 0: - switch(oper=READ_OP(cpustate)) { + switch(oper=READ_OP()) { case 0: case 1: case 2: case 3: - saturn_equals(cpustate, reg_left[oper&3] , cpustate->p, 1, reg_right[oper&3]); + saturn_equals(reg_left[oper&3] , m_p, 1, reg_right[oper&3]); break; case 4: case 5: case 6: case 7: - saturn_not_equals(cpustate, reg_left[oper&3] ,cpustate->p, 1, reg_right[oper&3]); + saturn_not_equals(reg_left[oper&3] ,m_p, 1, reg_right[oper&3]); break; case 8: case 9: case 0xa: case 0xb: - saturn_equals_zero(cpustate, A+(oper&3), cpustate->p, 1); + saturn_equals_zero(A+(oper&3), m_p, 1); break; case 0xc: case 0xd: case 0xe: case 0xf: - saturn_not_equals_zero(cpustate, A+(oper&3), cpustate->p, 1); + saturn_not_equals_zero(A+(oper&3), m_p, 1); break; } break; case 1: - switch(oper=READ_OP(cpustate)) { + switch(oper=READ_OP()) { case 0: case 1: case 2: case 3: - saturn_equals(cpustate, reg_left[oper&3] , 0, cpustate->p+1, reg_right[oper&3]); + saturn_equals(reg_left[oper&3] , 0, m_p+1, reg_right[oper&3]); break; case 4: case 5: case 6: case 7: - saturn_not_equals(cpustate, reg_left[oper&3] , 0, cpustate->p+1, reg_right[oper&3]); + saturn_not_equals(reg_left[oper&3] , 0, m_p+1, reg_right[oper&3]); break; case 8: case 9: case 0xa: case 0xb: - saturn_equals_zero(cpustate, A+(oper&3), 0, cpustate->p+1); + saturn_equals_zero(A+(oper&3), 0, m_p+1); break; case 0xc: case 0xd: case 0xe: case 0xf: - saturn_not_equals_zero(cpustate, A+(oper&3), 0, cpustate->p+1); + saturn_not_equals_zero(A+(oper&3), 0, m_p+1); break; } break; case 2: case 3: case 4: case 5: case 6: case 7: - switch(oper=READ_OP(cpustate)) { + switch(oper=READ_OP()) { case 0: case 1: case 2: case 3: - saturn_equals(cpustate, reg_left[oper&3] ,adr_a_begin[adr], adr_a_count[adr], reg_right[oper&3]); + saturn_equals(reg_left[oper&3] ,adr_a_begin[adr], adr_a_count[adr], reg_right[oper&3]); break; case 4: case 5: case 6: case 7: - saturn_not_equals(cpustate, reg_left[oper&3] ,adr_a_begin[adr], adr_a_count[adr], reg_right[oper&3]); + saturn_not_equals(reg_left[oper&3] ,adr_a_begin[adr], adr_a_count[adr], reg_right[oper&3]); break; case 8: case 9: case 0xa: case 0xb: - saturn_equals_zero(cpustate, A+(oper&3),adr_a_begin[adr], adr_a_count[adr]); + saturn_equals_zero(A+(oper&3),adr_a_begin[adr], adr_a_count[adr]); break; case 0xc: case 0xd: case 0xe: case 0xf: - saturn_not_equals_zero(cpustate, A+(oper&3) ,adr_a_begin[adr], adr_a_count[adr]); + saturn_not_equals_zero(A+(oper&3) ,adr_a_begin[adr], adr_a_count[adr]); break; } break; case 8: - switch(oper=READ_OP(cpustate)) { + switch(oper=READ_OP()) { case 0: case 1: case 2: case 3: - saturn_greater(cpustate, reg_left[oper&3] ,cpustate->p, 1, reg_right[oper&3]); + saturn_greater(reg_left[oper&3] ,m_p, 1, reg_right[oper&3]); break; case 4: case 5: case 6: case 7: - saturn_smaller(cpustate, reg_left[oper&3] ,cpustate->p, 1, reg_right[oper&3]); + saturn_smaller(reg_left[oper&3] ,m_p, 1, reg_right[oper&3]); break; case 8: case 9: case 0xa: case 0xb: - saturn_greater_equals(cpustate, reg_left[oper&3] ,cpustate->p, 1, reg_right[oper&3]); + saturn_greater_equals(reg_left[oper&3] ,m_p, 1, reg_right[oper&3]); break; case 0xc: case 0xd: case 0xe: case 0xf: - saturn_smaller_equals(cpustate, reg_left[oper&3] ,cpustate->p, 1, reg_right[oper&3]); + saturn_smaller_equals(reg_left[oper&3] ,m_p, 1, reg_right[oper&3]); break; } break; case 9: - switch(oper=READ_OP(cpustate)) { + switch(oper=READ_OP()) { case 0: case 1: case 2: case 3: - saturn_greater(cpustate, reg_left[oper&3] , 0, cpustate->p+1, reg_right[oper&3]); + saturn_greater(reg_left[oper&3] , 0, m_p+1, reg_right[oper&3]); break; case 4: case 5: case 6: case 7: - saturn_smaller(cpustate, reg_left[oper&3] , 0, cpustate->p+1, reg_right[oper&3]); + saturn_smaller(reg_left[oper&3] , 0, m_p+1, reg_right[oper&3]); break; case 8: case 9: case 0xa: case 0xb: - saturn_greater_equals(cpustate, reg_left[oper&3], 0, cpustate->p+1, reg_right[oper&3]); + saturn_greater_equals(reg_left[oper&3], 0, m_p+1, reg_right[oper&3]); break; case 0xc: case 0xd: case 0xe: case 0xf: - saturn_smaller_equals(cpustate, reg_left[oper&3], 0, cpustate->p+1, reg_right[oper&3]); + saturn_smaller_equals(reg_left[oper&3], 0, m_p+1, reg_right[oper&3]); break; } break; case 0xa: case 0xb: case 0xc: case 0xd: case 0xe: case 0xf: - switch(oper=READ_OP(cpustate)) { + switch(oper=READ_OP()) { case 0: case 1: case 2: case 3: - saturn_greater(cpustate, reg_left[oper&3] ,adr_b_begin[adr], adr_b_count[adr], reg_right[oper&3]); + saturn_greater(reg_left[oper&3] ,adr_b_begin[adr], adr_b_count[adr], reg_right[oper&3]); break; case 4: case 5: case 6: case 7: - saturn_smaller(cpustate, reg_left[oper&3] ,adr_b_begin[adr], adr_b_count[adr], reg_right[oper&3]); + saturn_smaller(reg_left[oper&3] ,adr_b_begin[adr], adr_b_count[adr], reg_right[oper&3]); break; case 8: case 9: case 0xa: case 0xb: - saturn_greater_equals(cpustate, reg_left[oper&3] ,adr_b_begin[adr], adr_b_count[adr], reg_right[oper&3]); + saturn_greater_equals(reg_left[oper&3] ,adr_b_begin[adr], adr_b_count[adr], reg_right[oper&3]); break; case 0xc: case 0xd: case 0xe: case 0xf: - saturn_smaller_equals(cpustate, reg_left[oper&3] ,adr_b_begin[adr], adr_b_count[adr], reg_right[oper&3]); + saturn_smaller_equals(reg_left[oper&3] ,adr_b_begin[adr], adr_b_count[adr], reg_right[oper&3]); break; } break; } } -static void saturn_instruction_a(saturn_state *cpustate) +void saturn_device::saturn_instruction_a() { int reg, adr; - switch(adr=READ_OP(cpustate)) { + switch(adr=READ_OP()) { case 0: - switch (reg=READ_OP(cpustate)) { + switch (reg=READ_OP()) { case 0: case 1: case 2: case 3: case 8: case 9: case 0xa: case 0xb: - saturn_add(cpustate, add_left[reg], cpustate->p, 1, add_right[reg]); + saturn_add(add_left[reg], m_p, 1, add_right[reg]); break; case 4: case 5: case 6: case 7: - saturn_add(cpustate, A+(reg&3), cpustate->p, 1, A+(reg&3)); + saturn_add(A+(reg&3), m_p, 1, A+(reg&3)); break; case 0xc: case 0xd: case 0xe: case 0xf: - saturn_decrement(cpustate, A+(reg&3), cpustate->p, 1); + saturn_decrement(A+(reg&3), m_p, 1); break; } break; case 1: - switch (reg=READ_OP(cpustate)) { + switch (reg=READ_OP()) { case 0: case 1: case 2: case 3: case 8: case 9: case 0xa: case 0xb: - saturn_add(cpustate, add_left[reg], 0, cpustate->p+1, add_right[reg]); + saturn_add(add_left[reg], 0, m_p+1, add_right[reg]); break; case 4: case 5: case 6: case 7: - saturn_add(cpustate, A+(reg&3), 0, cpustate->p+1, A+(reg&3)); + saturn_add(A+(reg&3), 0, m_p+1, A+(reg&3)); break; case 0xc: case 0xd: case 0xe: case 0xf: - saturn_decrement(cpustate, A+(reg&3), 0, cpustate->p+1); + saturn_decrement(A+(reg&3), 0, m_p+1); break; } break; case 2: case 3: case 4: case 5: case 6: case 7: - switch (reg=READ_OP(cpustate)) { + switch (reg=READ_OP()) { case 0: case 1: case 2: case 3: case 8: case 9: case 0xa: case 0xb: - saturn_add(cpustate, add_left[reg], adr_a_begin[adr], adr_a_count[adr], add_right[reg]); + saturn_add(add_left[reg], adr_a_begin[adr], adr_a_count[adr], add_right[reg]); break; case 4: case 5: case 6: case 7: - saturn_add(cpustate, A+(reg&3), adr_a_begin[adr], adr_a_count[adr], A+(reg&3)); + saturn_add(A+(reg&3), adr_a_begin[adr], adr_a_count[adr], A+(reg&3)); break; case 0xc: case 0xd: case 0xe: case 0xf: - saturn_decrement(cpustate, A+(reg&3), adr_a_begin[adr], adr_a_count[adr]); + saturn_decrement(A+(reg&3), adr_a_begin[adr], adr_a_count[adr]); break; } break; case 8: - switch(reg=READ_OP(cpustate)) { + switch(reg=READ_OP()) { case 0: case 1: case 2: case 3: - saturn_clear(cpustate, A+reg, cpustate->p,1); + saturn_clear(A+reg, m_p,1); break; // a=0 p case 4: case 5: case 6: case 7: case 8: case 9: case 0xa: case 0xb: - saturn_copy(cpustate, reg_right[reg&7], cpustate->p,1,reg_left[reg&7]); + saturn_copy(reg_right[reg&7], m_p,1,reg_left[reg&7]); break; // a=b p case 0xc: case 0xd: case 0xe: case 0xf: - saturn_exchange(cpustate, reg_left[reg&3], cpustate->p,1,reg_right[reg&3]); + saturn_exchange(reg_left[reg&3], m_p,1,reg_right[reg&3]); break; // abex p } break; case 9: - switch(reg=READ_OP(cpustate)) { + switch(reg=READ_OP()) { case 0: case 1: case 2: case 3: - saturn_clear(cpustate, A+reg,0,cpustate->p+1); + saturn_clear(A+reg,0,m_p+1); break; // a=0 wp case 4: case 5: case 6: case 7: case 8: case 9: case 0xa: case 0xb: - saturn_copy(cpustate, reg_right[reg&7], 0, cpustate->p+1, reg_left[reg&7]); + saturn_copy(reg_right[reg&7], 0, m_p+1, reg_left[reg&7]); break; // a=b wp case 0xc: case 0xd: case 0xe: case 0xf: - saturn_exchange(cpustate, reg_left[reg&3], 0, cpustate->p+1, reg_right[reg&3]); + saturn_exchange(reg_left[reg&3], 0, m_p+1, reg_right[reg&3]); break; // abex wp } break; case 0xa: case 0xb: case 0xc: case 0xd: case 0xe: case 0xf: - switch(reg=READ_OP(cpustate)) { + switch(reg=READ_OP()) { case 0: case 1: case 2: case 3: - saturn_clear(cpustate, A+reg, adr_b_begin[adr], adr_b_count[adr]); + saturn_clear(A+reg, adr_b_begin[adr], adr_b_count[adr]); break; // a=0 xs case 4: case 5: case 6: case 7: case 8: case 9: case 0xa: case 0xb: - saturn_copy(cpustate, reg_right[reg&7], adr_b_begin[adr], adr_b_count[adr], reg_left[reg&7]); + saturn_copy(reg_right[reg&7], adr_b_begin[adr], adr_b_count[adr], reg_left[reg&7]); break; // a=b xs case 0xc: case 0xd: case 0xe: case 0xf: - saturn_exchange(cpustate, reg_left[reg&3], adr_b_begin[adr], adr_b_count[adr], reg_right[reg&3]); + saturn_exchange(reg_left[reg&3], adr_b_begin[adr], adr_b_count[adr], reg_right[reg&3]); break; // abex xs } break; } } -static void saturn_instruction_b(saturn_state *cpustate) +void saturn_device::saturn_instruction_b() { int adr, reg; - switch(adr=READ_OP(cpustate)) { + switch(adr=READ_OP()) { case 0: - switch(reg=READ_OP(cpustate)) { + switch(reg=READ_OP()) { case 0: case 1: case 2: case 3: case 8: case 9: case 0xa: case 0xb: - saturn_sub(cpustate, sub_left[reg], cpustate->p, 1, sub_right[reg]); + saturn_sub(sub_left[reg], m_p, 1, sub_right[reg]); break; case 4: case 5: case 6: case 7: - saturn_increment(cpustate, A+(reg&3), cpustate->p, 1); break; // a=a+1 p + saturn_increment(A+(reg&3), m_p, 1); break; // a=a+1 p case 0xc: case 0xd: case 0xe: case 0xf: - saturn_sub2(cpustate, sub_left[reg], cpustate->p, 1, sub_right[reg]); + saturn_sub2(sub_left[reg], m_p, 1, sub_right[reg]); break; } break; case 1: - switch(reg=READ_OP(cpustate)) { + switch(reg=READ_OP()) { case 0: case 1: case 2: case 3: case 8: case 9: case 0xa: case 0xb: - saturn_sub(cpustate, sub_left[reg], 0, cpustate->p+1, sub_right[reg]); + saturn_sub(sub_left[reg], 0, m_p+1, sub_right[reg]); break; case 4: case 5: case 6: case 7: - saturn_increment(cpustate, A+(reg&3), 0, cpustate->p+1); break; // a=a+1 wp + saturn_increment(A+(reg&3), 0, m_p+1); break; // a=a+1 wp case 0xc: case 0xd: case 0xe: case 0xf: - saturn_sub2(cpustate, sub_left[reg], 0, cpustate->p+1, sub_right[reg]); + saturn_sub2(sub_left[reg], 0, m_p+1, sub_right[reg]); break; } break; case 2: case 3: case 4: case 5: case 6: case 7: - switch(reg=READ_OP(cpustate)) { + switch(reg=READ_OP()) { case 0: case 1: case 2: case 3: case 8: case 9: case 0xa: case 0xb: - saturn_sub(cpustate, sub_left[reg], adr_a_begin[adr], adr_a_count[adr], sub_right[reg]); + saturn_sub(sub_left[reg], adr_a_begin[adr], adr_a_count[adr], sub_right[reg]); break; case 4: case 5: case 6: case 7: - saturn_increment(cpustate, A+(reg&3), adr_a_begin[adr], adr_a_count[adr]); + saturn_increment(A+(reg&3), adr_a_begin[adr], adr_a_count[adr]); break; // a=a+1 xs case 0xc: case 0xd: case 0xe: case 0xf: - saturn_sub2(cpustate, sub_left[reg], adr_a_begin[adr], adr_a_count[adr], + saturn_sub2(sub_left[reg], adr_a_begin[adr], adr_a_count[adr], sub_right[reg]); break; } break; case 8: - switch(reg=READ_OP(cpustate)) { + switch(reg=READ_OP()) { case 0: case 1: case 2: case 3: - saturn_shift_nibble_left(cpustate, A+reg, cpustate->p, 1); break; // asl p + saturn_shift_nibble_left(A+reg, m_p, 1); break; // asl p case 4: case 5: case 6: case 7: - saturn_shift_nibble_right(cpustate, A+(reg&3), cpustate->p, 1); break; // asr p + saturn_shift_nibble_right(A+(reg&3), m_p, 1); break; // asr p case 8: case 9: case 0xa: case 0xb: - saturn_negate(cpustate, A+(reg&3), cpustate->p, 1); break; // A=-A p + saturn_negate(A+(reg&3), m_p, 1); break; // A=-A p case 0xc: case 0xd: case 0xe: case 0xf: - saturn_invert(cpustate, A+(reg&3), cpustate->p, 1); break; // A=-A-1 p + saturn_invert(A+(reg&3), m_p, 1); break; // A=-A-1 p } break; case 9: - switch(reg=READ_OP(cpustate)) { + switch(reg=READ_OP()) { case 0: case 1: case 2: case 3: - saturn_shift_nibble_left(cpustate, A+reg,0,cpustate->p+1); break; // asl wp + saturn_shift_nibble_left(A+reg,0,m_p+1); break; // asl wp case 4: case 5: case 6: case 7: - saturn_shift_nibble_right(cpustate, A+(reg&3),0,cpustate->p+1); break; // asr wp + saturn_shift_nibble_right(A+(reg&3),0,m_p+1); break; // asr wp case 8: case 9: case 0xa: case 0xb: - saturn_negate(cpustate, A+(reg&3),0,cpustate->p+1); break; // A=-A wp + saturn_negate(A+(reg&3),0,m_p+1); break; // A=-A wp case 0xc: case 0xd: case 0xe: case 0xf: - saturn_invert(cpustate, A+(reg&3),0,cpustate->p+1); break; // A=-A-1 wp + saturn_invert(A+(reg&3),0,m_p+1); break; // A=-A-1 wp } break; case 0xa: case 0xb: case 0xc: case 0xd: case 0xe: case 0xf: - switch(reg=READ_OP(cpustate)) { + switch(reg=READ_OP()) { case 0: case 1: case 2: case 3: - saturn_shift_nibble_left(cpustate, A+reg,adr_b_begin[adr], adr_b_count[adr]); + saturn_shift_nibble_left(A+reg,adr_b_begin[adr], adr_b_count[adr]); break; case 4: case 5: case 6: case 7: - saturn_shift_nibble_right(cpustate, A+(reg&3), adr_b_begin[adr], adr_b_count[adr]); + saturn_shift_nibble_right(A+(reg&3), adr_b_begin[adr], adr_b_count[adr]); break; case 8: case 9: case 0xa: case 0xb: - saturn_negate(cpustate, A+(reg&3), adr_b_begin[adr], adr_b_count[adr]); + saturn_negate(A+(reg&3), adr_b_begin[adr], adr_b_count[adr]); break; case 0xc: case 0xd: case 0xe: case 0xf: - saturn_invert(cpustate, A+(reg&3), adr_b_begin[adr], adr_b_count[adr]); + saturn_invert(A+(reg&3), adr_b_begin[adr], adr_b_count[adr]); break; } break; @@ -905,131 +905,131 @@ static void saturn_instruction_b(saturn_state *cpustate) } -static void saturn_instruction(saturn_state *cpustate) +void saturn_device::saturn_instruction() { int reg, adr; - switch(READ_OP(cpustate)) { + switch(READ_OP()) { case 0: - switch(READ_OP(cpustate)) { - case 0: saturn_return_xm_set(cpustate);break; - case 1: saturn_return(cpustate, 1);break; - case 2: saturn_return_carry_set(cpustate);break; - case 3: saturn_return_carry_clear(cpustate);break; - case 4: saturn_sethex(cpustate);break; - case 5: saturn_setdec(cpustate);break; - case 6: saturn_push_c(cpustate);break; - case 7: saturn_pop_c(cpustate);break; - case 8: saturn_clear_st(cpustate);break; - case 9: saturn_st_to_c(cpustate);break; - case 0xa: saturn_c_to_st(cpustate);break; - case 0xb: saturn_exchange_c_st(cpustate);break; - case 0xc: saturn_inc_p(cpustate);break; - case 0xd: saturn_dec_p(cpustate);break; - case 0xe: saturn_instruction_0e(cpustate);break; - case 0xf: saturn_return_interrupt(cpustate);break; + switch(READ_OP()) { + case 0: saturn_return_xm_set();break; + case 1: saturn_return(1);break; + case 2: saturn_return_carry_set();break; + case 3: saturn_return_carry_clear();break; + case 4: saturn_sethex();break; + case 5: saturn_setdec();break; + case 6: saturn_push_c();break; + case 7: saturn_pop_c();break; + case 8: saturn_clear_st();break; + case 9: saturn_st_to_c();break; + case 0xa: saturn_c_to_st();break; + case 0xb: saturn_exchange_c_st();break; + case 0xc: saturn_inc_p();break; + case 0xd: saturn_dec_p();break; + case 0xe: saturn_instruction_0e();break; + case 0xf: saturn_return_interrupt();break; } break; case 1: - saturn_instruction_1(cpustate); + saturn_instruction_1(); break; case 2: - saturn_load_p(cpustate); + saturn_load_p(); break; case 3: - saturn_load_reg(cpustate, C); + saturn_load_reg(C); break; // lc case 4: - adr=READ_OP_DIS8(cpustate); + adr=READ_OP_DIS8(); if (adr==0) { - saturn_return(cpustate, cpustate->carry); + saturn_return(m_carry); } else { - saturn_jump(cpustate, (cpustate->pc+adr-2)&0xfffff, cpustate->carry); + saturn_jump((m_pc+adr-2)&0xfffff, m_carry); } break; case 5: - adr=READ_OP_DIS8(cpustate); + adr=READ_OP_DIS8(); if (adr==0) { - saturn_return(cpustate, !cpustate->carry); + saturn_return(!m_carry); } else { - saturn_jump(cpustate, (cpustate->pc+adr-2)&0xfffff,!cpustate->carry); + saturn_jump((m_pc+adr-2)&0xfffff,!m_carry); } break; case 6: - adr=READ_OP_DIS12(cpustate); - saturn_jump(cpustate, (cpustate->pc+adr-3)&0xfffff,1); break; + adr=READ_OP_DIS12(); + saturn_jump((m_pc+adr-3)&0xfffff,1); break; case 7: - adr=READ_OP_DIS12(cpustate); - saturn_call(cpustate, (adr+cpustate->pc)&0xfffff); break; + adr=READ_OP_DIS12(); + saturn_call((adr+m_pc)&0xfffff); break; case 8: - saturn_instruction_8(cpustate); + saturn_instruction_8(); break; case 9: - saturn_instruction_9(cpustate); + saturn_instruction_9(); break; case 0xa: - saturn_instruction_a(cpustate); + saturn_instruction_a(); break; case 0xb: - saturn_instruction_b(cpustate); + saturn_instruction_b(); break; case 0xc: - switch (reg=READ_OP(cpustate)) { + switch (reg=READ_OP()) { case 0: case 1: case 2: case 3: case 8: case 9: case 0xa: case 0xb: - saturn_add(cpustate, add_left[reg], BEGIN_A, COUNT_A, add_right[reg]); + saturn_add(add_left[reg], BEGIN_A, COUNT_A, add_right[reg]); break; case 4: case 5: case 6: case 7: - saturn_add(cpustate, A+(reg&3), BEGIN_A, COUNT_A, A+(reg&3)); + saturn_add(A+(reg&3), BEGIN_A, COUNT_A, A+(reg&3)); break; case 0xc: case 0xd: case 0xe: case 0xf: - saturn_decrement(cpustate, A+(reg&3), BEGIN_A, COUNT_A); + saturn_decrement(A+(reg&3), BEGIN_A, COUNT_A); break; } break; case 0xd: - switch(reg=READ_OP(cpustate)) { + switch(reg=READ_OP()) { case 0: case 1: case 2: case 3: - saturn_clear(cpustate, A+reg, BEGIN_A, COUNT_A); + saturn_clear(A+reg, BEGIN_A, COUNT_A); break; // a=0 a case 4: case 5: case 6: case 7: case 8: case 9: case 0xa: case 0xb: - saturn_copy(cpustate, reg_right[reg&7], BEGIN_A, COUNT_A, reg_left[reg&7]); + saturn_copy(reg_right[reg&7], BEGIN_A, COUNT_A, reg_left[reg&7]); break; // a=b a case 0xc: case 0xd: case 0xe: case 0xf: - saturn_exchange(cpustate, reg_left[reg&3], BEGIN_A, COUNT_A, reg_right[reg&3]); + saturn_exchange(reg_left[reg&3], BEGIN_A, COUNT_A, reg_right[reg&3]); break; // abex a } break; case 0xe: - switch(reg=READ_OP(cpustate)) { + switch(reg=READ_OP()) { case 0: case 1: case 2: case 3: case 8: case 9: case 0xa: case 0xb: - saturn_sub(cpustate, sub_left[reg], BEGIN_A, COUNT_A, sub_right[reg]); + saturn_sub(sub_left[reg], BEGIN_A, COUNT_A, sub_right[reg]); break; case 4: case 5: case 6: case 7: - saturn_increment(cpustate, A+(reg&3), BEGIN_A, COUNT_A); + saturn_increment(A+(reg&3), BEGIN_A, COUNT_A); break; // a=a+1 a case 0xc: case 0xd: case 0xe: case 0xf: - saturn_sub2(cpustate, sub_left[reg], BEGIN_A, COUNT_A, sub_right[reg]); + saturn_sub2(sub_left[reg], BEGIN_A, COUNT_A, sub_right[reg]); break; } break; case 0xf: - switch(reg=READ_OP(cpustate)) { + switch(reg=READ_OP()) { case 0: case 1: case 2: case 3: - saturn_shift_nibble_left(cpustate, A+reg,BEGIN_A, COUNT_A); + saturn_shift_nibble_left(A+reg,BEGIN_A, COUNT_A); break; // asl a case 4: case 5: case 6: case 7: - saturn_shift_nibble_right(cpustate, A+(reg&3),BEGIN_A, COUNT_A); + saturn_shift_nibble_right(A+(reg&3),BEGIN_A, COUNT_A); break; // asr a case 8: case 9: case 0xa: case 0xb: - saturn_negate(cpustate, A+(reg&3),BEGIN_A, COUNT_A); + saturn_negate(A+(reg&3),BEGIN_A, COUNT_A); break; // A=-A a case 0xc: case 0xd: case 0xe: case 0xf: - saturn_invert(cpustate, A+(reg&3),BEGIN_A, COUNT_A); + saturn_invert(A+(reg&3),BEGIN_A, COUNT_A); break; // A=-A-1 a } break; diff --git a/src/emu/cpu/saturn/saturn.c b/src/emu/cpu/saturn/saturn.c index 57fe36f781a..58a17d7944b 100644 --- a/src/emu/cpu/saturn/saturn.c +++ b/src/emu/cpu/saturn/saturn.c @@ -38,62 +38,45 @@ #define D 8 #define I 9 // invalid -typedef UINT32 SaturnAdr; // 20 bit, packed -typedef UINT8 SaturnNib; // 4 bit - -// 64 bit, unpacked (one nibble per byte) -typedef SaturnNib Saturn64[16]; #define VERBOSE 0 #define LOG(x) do { if (VERBOSE) logerror x; } while (0) -/**************************************************************************** - * The SATURN registers. - ****************************************************************************/ -struct saturn_state -{ - saturn_cpu_core *config; +// Hardware status bits +#define XM 1 // external Modules missing +#define SB 2 // Sticky bit +#define SR 4 // Service Request +#define MP 8 // Module Pulled - Saturn64 reg[9]; //r0,r1,r2,r3,r4,a,b,c,d - SaturnAdr d[2], pc, oldpc, rstk[8]; // 20 bit addresses - SaturnNib p; // 4 bit pointer +const device_type SATURN = &device_creator<saturn_device>; - UINT16 out; // 12 bit (packed) - UINT8 carry, decimal; - UINT16 st; // status 16 bit - SaturnNib hst; // hardware status 4 bit -#define XM 1 // external Modules missing -#define SB 2 // Sticky bit -#define SR 4 // Service Request -#define MP 8 // Module Pulled +saturn_device::saturn_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) + : cpu_device(mconfig, SATURN, "Saturn", tag, owner, clock, "saturn_cpu", __FILE__) + , m_program_config("program", ENDIANNESS_LITTLE, 8, 20, 0) + , m_out_func(*this) + , m_in_func(*this) + , m_reset_func(*this) + , m_config_func(*this) + , m_unconfig_func(*this) + , m_id_func(*this) + , m_crc_func(*this) + , m_rsi_func(*this) +{ +} + - UINT8 nmi_state; - UINT8 irq_state; - UINT8 irq_enable; /* INTON / INTOFF */ - UINT8 in_irq; /* already servicing IRQ */ - UINT8 pending_irq; /* IRQ is pending */ - UINT8 sleeping; /* low-consumption state */ - int monitor_id; - int monitor_in; - device_irq_acknowledge_callback irq_callback; - legacy_cpu_device *device; - address_space *program; - direct_read_data *direct; - int icount; -}; - -INLINE saturn_state *get_safe_token(device_t *device) +offs_t saturn_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options) { - assert(device != NULL); - assert(device->type() == SATURN); - return (saturn_state *)downcast<legacy_cpu_device *>(device)->token(); + extern CPU_DISASSEMBLE( saturn ); + return CPU_DISASSEMBLE_NAME(saturn)(this, buffer, pc, oprom, opram, options); } + /*************************************************************** * include the opcode macros, functions and tables ***************************************************************/ @@ -107,189 +90,328 @@ INLINE saturn_state *get_safe_token(device_t *device) * *****************************************************************************/ -static CPU_INIT( saturn ) +void saturn_device::device_start() { - saturn_state *cpustate = get_safe_token(device); - - cpustate->config = (saturn_cpu_core *) device->static_config(); - cpustate->irq_callback = irqcallback; - cpustate->device = device; - cpustate->program = &device->space(AS_PROGRAM); - cpustate->direct = &cpustate->program->direct(); - - device->save_item(NAME(cpustate->reg[R0])); - device->save_item(NAME(cpustate->reg[R1])); - device->save_item(NAME(cpustate->reg[R2])); - device->save_item(NAME(cpustate->reg[R3])); - device->save_item(NAME(cpustate->reg[R4])); - device->save_item(NAME(cpustate->reg[A])); - device->save_item(NAME(cpustate->reg[B])); - device->save_item(NAME(cpustate->reg[C])); - device->save_item(NAME(cpustate->reg[D])); - device->save_item(NAME(cpustate->d)); - device->save_item(NAME(cpustate->pc)); - device->save_item(NAME(cpustate->oldpc)); - device->save_item(NAME(cpustate->rstk)); - device->save_item(NAME(cpustate->out)); - device->save_item(NAME(cpustate->carry)); - device->save_item(NAME(cpustate->st)); - device->save_item(NAME(cpustate->hst)); - device->save_item(NAME(cpustate->nmi_state)); - device->save_item(NAME(cpustate->irq_state)); - device->save_item(NAME(cpustate->irq_enable)); - device->save_item(NAME(cpustate->in_irq)); - device->save_item(NAME(cpustate->pending_irq)); - device->save_item(NAME(cpustate->sleeping)); + m_program = &space(AS_PROGRAM); + m_direct = &m_program->direct(); + + m_out_func.resolve_safe(); + m_in_func.resolve_safe(0); + m_reset_func.resolve_safe(); + m_config_func.resolve_safe(); + m_unconfig_func.resolve_safe(); + m_id_func.resolve_safe(0); + m_crc_func.resolve_safe(); + m_rsi_func.resolve_safe(); + + memset(m_reg, 0, sizeof(m_reg)); + memset(m_d, 0, sizeof(m_d)); + m_pc = 0; + m_oldpc = 0; + memset(m_rstk, 0, sizeof(m_rstk)); + m_out = 0; + m_carry = 0; + m_st = 0; + m_hst = 0; + m_nmi_state = 0; + m_irq_state = 0; + m_irq_enable = 0; + m_in_irq = 0; + m_pending_irq = 0; + m_sleeping = 0; + + save_item(NAME(m_reg[R0])); + save_item(NAME(m_reg[R1])); + save_item(NAME(m_reg[R2])); + save_item(NAME(m_reg[R3])); + save_item(NAME(m_reg[R4])); + save_item(NAME(m_reg[A])); + save_item(NAME(m_reg[B])); + save_item(NAME(m_reg[C])); + save_item(NAME(m_reg[D])); + save_item(NAME(m_d)); + save_item(NAME(m_pc)); + save_item(NAME(m_oldpc)); + save_item(NAME(m_rstk)); + save_item(NAME(m_out)); + save_item(NAME(m_carry)); + save_item(NAME(m_st)); + save_item(NAME(m_hst)); + save_item(NAME(m_nmi_state)); + save_item(NAME(m_irq_state)); + save_item(NAME(m_irq_enable)); + save_item(NAME(m_in_irq)); + save_item(NAME(m_pending_irq)); + save_item(NAME(m_sleeping)); + + // TODO: Register state + state_add( SATURN_PC, "PC", m_pc ).formatstr("%5X"); + state_add( SATURN_D0, "D0", m_d[0] ).formatstr("%5X"); + state_add( SATURN_D1, "D1", m_d[1] ).formatstr("%5X"); + state_add( SATURN_A, "A", m_debugger_temp ).formatstr("%19s"); + state_add( SATURN_B, "B", m_debugger_temp ).formatstr("%19s"); + state_add( SATURN_C, "C", m_debugger_temp ).formatstr("%19s"); + state_add( SATURN_D, "D", m_debugger_temp ).formatstr("%19s"); + state_add( SATURN_R0, "R0", m_debugger_temp ).formatstr("%19s"); + state_add( SATURN_R1, "R1", m_debugger_temp ).formatstr("%19s"); + state_add( SATURN_R2, "R2", m_debugger_temp ).formatstr("%19s"); + state_add( SATURN_R3, "R3", m_debugger_temp ).formatstr("%19s"); + state_add( SATURN_R4, "R4", m_debugger_temp ).formatstr("%19s"); + state_add( SATURN_P, "P", m_p).formatstr("%1X"); + state_add( SATURN_OUT, "OUTP", m_out).formatstr("%3X"); + state_add( SATURN_CARRY, "Carry", m_carry).formatstr("%1X"); + state_add( SATURN_ST, "ST", m_st).formatstr("%4X"); + state_add( SATURN_HST, "HST", m_hst).formatstr("%1X"); + state_add( SATURN_RSTK0, "RSTK0", m_rstk[0]).formatstr("%5X"); + state_add( SATURN_RSTK1, "RSTK1", m_rstk[1]).formatstr("%5X"); + state_add( SATURN_RSTK2, "RSTK2", m_rstk[2]).formatstr("%5X"); + state_add( SATURN_RSTK3, "RSTK3", m_rstk[3]).formatstr("%5X"); + state_add( SATURN_RSTK4, "RSTK4", m_rstk[4]).formatstr("%5X"); + state_add( SATURN_RSTK5, "RSTK5", m_rstk[5]).formatstr("%5X"); + state_add( SATURN_RSTK6, "RSTK6", m_rstk[6]).formatstr("%5X"); + state_add( SATURN_RSTK7, "RSTK7", m_rstk[7]).formatstr("%5X"); + state_add( SATURN_IRQ_STATE, "IRQ", m_debugger_temp).formatstr("%4s"); + state_add( SATURN_SLEEPING, "sleep", m_sleeping).formatstr("%1X"); + + state_add( STATE_GENPC, "GENPC", m_pc ).noshow(); + state_add( STATE_GENFLAGS, "GENFLAGS", m_debugger_temp).formatstr("%2s").noshow(); + + m_icountptr = &m_icount; } -static CPU_RESET( saturn ) +void saturn_device::state_string_export(const device_state_entry &entry, astring &string) { - saturn_state *cpustate = get_safe_token(device); +#define Reg64Data(s) s[15],s[14],s[13],s[12],s[11],s[10],s[9],s[8],s[7],s[6],s[5],s[4],s[3],s[2],s[1],s[0] +#define Reg64Format "%x %x%x%x%x%x%x%x %x%x%x %x%x%x%x%x" - cpustate->pc=0; - cpustate->sleeping = 0; - cpustate->irq_enable = 0; - cpustate->in_irq = 0; -} + switch (entry.index()) + { + case SATURN_A: + string.printf( Reg64Format, Reg64Data(m_reg[A]) ); + break; + case SATURN_B: + string.printf( Reg64Format, Reg64Data(m_reg[B]) ); + break; -INLINE void saturn_take_irq(saturn_state *cpustate) -{ - cpustate->in_irq = 1; /* reset by software, using RTI */ - cpustate->pending_irq = 0; - cpustate->icount -= 7; - saturn_push(cpustate, cpustate->pc); - cpustate->pc=IRQ_ADDRESS; + case SATURN_C: + string.printf( Reg64Format, Reg64Data(m_reg[C]) ); + break; - LOG(("Saturn '%s' takes IRQ ($%04x)\n", cpustate->device->tag(), cpustate->pc)); + case SATURN_D: + string.printf( Reg64Format, Reg64Data(m_reg[D]) ); + break; - if (cpustate->irq_callback) (*cpustate->irq_callback)(cpustate->device, SATURN_IRQ_LINE); -} + case SATURN_R0: + string.printf( Reg64Format, Reg64Data(m_reg[R0]) ); + break; -static CPU_EXECUTE( saturn ) -{ - saturn_state *cpustate = get_safe_token(device); + case SATURN_R1: + string.printf( Reg64Format, Reg64Data(m_reg[R1]) ); + break; - do - { - cpustate->oldpc = cpustate->pc; + case SATURN_R2: + string.printf( Reg64Format, Reg64Data(m_reg[R2]) ); + break; - debugger_instruction_hook(device, cpustate->pc); + case SATURN_R3: + string.printf( Reg64Format, Reg64Data(m_reg[R3]) ); + break; - if ( cpustate->sleeping ) - { - /* advance time when sleeping */ - cpustate->icount -= 100; - } - else - { - /* takes irq */ - if ( cpustate->pending_irq && (!cpustate->in_irq) ) - saturn_take_irq(cpustate); + case SATURN_R4: + string.printf( Reg64Format, Reg64Data(m_reg[R4]) ); + break; - /* execute one instruction */ - saturn_instruction(cpustate); - } + case SATURN_IRQ_STATE: + string.printf( "%c%c%c%i", m_in_irq?'S':'.', m_irq_enable?'e':'.', m_pending_irq?'p':'.', m_irq_state ); + break; - } while (cpustate->icount > 0); + case STATE_GENFLAGS: + string.printf( "%c%c", m_decimal?'D':'.', m_carry ? 'C':'.' ); + break; + } } -static void saturn_set_nmi_line(saturn_state *cpustate, int state) +void saturn_device::state_import(const device_state_entry &entry) { - if ( state == cpustate->nmi_state ) return; - cpustate->nmi_state = state; - if ( state != CLEAR_LINE ) + switch (entry.index()) { - LOG(( "SATURN '%s' set_nmi_line(ASSERT)\n", cpustate->device->tag())); - cpustate->pending_irq = 1; + case SATURN_A: + IntReg64(m_reg[A], m_debugger_temp); + break; + + case SATURN_B: + IntReg64(m_reg[B], m_debugger_temp); + break; + + case SATURN_C: + IntReg64(m_reg[C], m_debugger_temp); + break; + + case SATURN_D: + IntReg64(m_reg[D], m_debugger_temp); + break; + + case SATURN_R0: + IntReg64(m_reg[R0], m_debugger_temp); + break; + + case SATURN_R1: + IntReg64(m_reg[R1], m_debugger_temp); + break; + + case SATURN_R2: + IntReg64(m_reg[R2], m_debugger_temp); + break; + + case SATURN_R3: + IntReg64(m_reg[R3], m_debugger_temp); + break; + + case SATURN_R4: + IntReg64(m_reg[R4], m_debugger_temp); + break; } } -static void saturn_set_irq_line(saturn_state *cpustate, int state) +void saturn_device::state_export(const device_state_entry &entry) { - if ( state == cpustate->irq_state ) return; - cpustate->irq_state = state; - if ( state != CLEAR_LINE && cpustate->irq_enable ) + switch (entry.index()) { - LOG(( "SATURN '%s' set_irq_line(ASSERT)\n", cpustate->device->tag())); - cpustate->pending_irq = 1; + case SATURN_A: + m_debugger_temp = Reg64Int(m_reg[A]); + break; + + case SATURN_B: + m_debugger_temp = Reg64Int(m_reg[B]); + break; + + case SATURN_C: + m_debugger_temp = Reg64Int(m_reg[C]); + break; + + case SATURN_D: + m_debugger_temp = Reg64Int(m_reg[D]); + break; + + case SATURN_R0: + m_debugger_temp = Reg64Int(m_reg[R0]); + break; + + case SATURN_R1: + m_debugger_temp = Reg64Int(m_reg[R1]); + break; + + case SATURN_R2: + m_debugger_temp = Reg64Int(m_reg[R2]); + break; + + case SATURN_R3: + m_debugger_temp = Reg64Int(m_reg[R3]); + break; + + case SATURN_R4: + m_debugger_temp = Reg64Int(m_reg[R4]); + break; } } -static void saturn_set_wakeup_line(saturn_state *cpustate, int state) + +void saturn_device::device_reset() { - if (cpustate->sleeping && state==1) - { - LOG(( "SATURN '%s' set_wakeup_line(ASSERT)\n", cpustate->device->tag())); - if (cpustate->irq_callback) (*cpustate->irq_callback)(cpustate->device, SATURN_WAKEUP_LINE); - cpustate->sleeping = 0; - } + m_pc=0; + m_sleeping = 0; + m_irq_enable = 0; + m_in_irq = 0; } +void saturn_device::saturn_take_irq() +{ + m_in_irq = 1; /* reset by software, using RTI */ + m_pending_irq = 0; + m_icount -= 7; + saturn_push(m_pc); + m_pc=IRQ_ADDRESS; -/************************************************************************** - * Generic set_info - **************************************************************************/ + LOG(("Saturn '%s' takes IRQ ($%04x)\n", tag(), m_pc)); + + standard_irq_callback(SATURN_IRQ_LINE); +} -static void IntReg64(Saturn64 r, INT64 d) +void saturn_device::execute_run() { - int i; - for (i=0; i<16; i++) - r[i] = (d >> (4*i)) & 0xf; + do + { + m_oldpc = m_pc; + + debugger_instruction_hook(this, m_pc); + + if ( m_sleeping ) + { + /* advance time when sleeping */ + m_icount -= 100; + } + else + { + /* takes irq */ + if ( m_pending_irq && (!m_in_irq) ) + saturn_take_irq(); + + /* execute one instruction */ + saturn_instruction(); + } + + } while (m_icount > 0); } -static CPU_SET_INFO( saturn ) +void saturn_device::execute_set_input(int inputnum, int state) { - saturn_state *cpustate = get_safe_token(device); - - switch (state) + switch (inputnum) { - /* --- the following bits of info are set as 64-bit signed integers --- */ - case CPUINFO_INT_INPUT_STATE + SATURN_NMI_LINE: saturn_set_nmi_line(cpustate, info->i); break; - case CPUINFO_INT_INPUT_STATE + SATURN_IRQ_LINE: saturn_set_irq_line(cpustate, info->i); break; - case CPUINFO_INT_INPUT_STATE + SATURN_WAKEUP_LINE: saturn_set_wakeup_line(cpustate, info->i); break; - - case CPUINFO_INT_PC: - case CPUINFO_INT_REGISTER + SATURN_PC: cpustate->pc = info->i; break; - case CPUINFO_INT_REGISTER + SATURN_D0: cpustate->d[0] = info->i; break; - case CPUINFO_INT_REGISTER + SATURN_D1: cpustate->d[1] = info->i; break; - case CPUINFO_INT_REGISTER + SATURN_A: IntReg64(cpustate->reg[A], info->i); break; - case CPUINFO_INT_REGISTER + SATURN_B: IntReg64(cpustate->reg[B], info->i); break; - case CPUINFO_INT_REGISTER + SATURN_C: IntReg64(cpustate->reg[C], info->i); break; - case CPUINFO_INT_REGISTER + SATURN_D: IntReg64(cpustate->reg[D], info->i); break; - case CPUINFO_INT_REGISTER + SATURN_R0: IntReg64(cpustate->reg[R0], info->i); break; - case CPUINFO_INT_REGISTER + SATURN_R1: IntReg64(cpustate->reg[R1], info->i); break; - case CPUINFO_INT_REGISTER + SATURN_R2: IntReg64(cpustate->reg[R2], info->i); break; - case CPUINFO_INT_REGISTER + SATURN_R3: IntReg64(cpustate->reg[R3], info->i); break; - case CPUINFO_INT_REGISTER + SATURN_R4: IntReg64(cpustate->reg[R4], info->i); break; - case CPUINFO_INT_REGISTER + SATURN_P: cpustate->p = info->i; break; - case CPUINFO_INT_REGISTER + SATURN_OUT: cpustate->out = info->i; break; - case CPUINFO_INT_REGISTER + SATURN_CARRY: cpustate->carry = info->i; break; - case CPUINFO_INT_REGISTER + SATURN_ST: cpustate->st = info->i; break; - case CPUINFO_INT_REGISTER + SATURN_HST: cpustate->hst = info->i; break; - case CPUINFO_INT_REGISTER + SATURN_RSTK0: cpustate->rstk[0] = info->i; break; - case CPUINFO_INT_REGISTER + SATURN_RSTK1: cpustate->rstk[1] = info->i; break; - case CPUINFO_INT_REGISTER + SATURN_RSTK2: cpustate->rstk[2] = info->i; break; - case CPUINFO_INT_REGISTER + SATURN_RSTK3: cpustate->rstk[3] = info->i; break; - case CPUINFO_INT_REGISTER + SATURN_RSTK4: cpustate->rstk[4] = info->i; break; - case CPUINFO_INT_REGISTER + SATURN_RSTK5: cpustate->rstk[5] = info->i; break; - case CPUINFO_INT_REGISTER + SATURN_RSTK6: cpustate->rstk[6] = info->i; break; - case CPUINFO_INT_REGISTER + SATURN_RSTK7: cpustate->rstk[7] = info->i; break; - case CPUINFO_INT_REGISTER + SATURN_SLEEPING: cpustate->sleeping = info->i; + case SATURN_NMI_LINE: + if ( state == m_nmi_state ) return; + m_nmi_state = state; + if ( state != CLEAR_LINE ) + { + LOG(( "SATURN '%s' set_nmi_line(ASSERT)\n", tag())); + m_pending_irq = 1; + } + break; + + case SATURN_IRQ_LINE: + if ( state == m_irq_state ) return; + m_irq_state = state; + if ( state != CLEAR_LINE && m_irq_enable ) + { + LOG(( "SATURN '%s' set_irq_line(ASSERT)\n", tag())); + m_pending_irq = 1; + } + break; + + case SATURN_WAKEUP_LINE: + if (m_sleeping && state==1) + { + LOG(( "SATURN '%s' set_wakeup_line(ASSERT)\n", tag())); + standard_irq_callback(SATURN_WAKEUP_LINE); + m_sleeping = 0; + } + break; } } -/************************************************************************** - * Generic get_info - **************************************************************************/ -#define Reg64Data(s) s[15],s[14],s[13],s[12],s[11],s[10],s[9],s[8],s[7],s[6],s[5],s[4],s[3],s[2],s[1],s[0] -#define Reg64Format "%x %x%x%x%x%x%x%x %x%x%x %x%x%x%x%x" +void saturn_device::IntReg64(Saturn64 r, INT64 d) +{ + int i; + for (i=0; i<16; i++) + r[i] = (d >> (4*i)) & 0xf; +} -static INT64 Reg64Int(Saturn64 r) + +INT64 saturn_device::Reg64Int(Saturn64 r) { INT64 x = 0; int i; @@ -298,115 +420,3 @@ static INT64 Reg64Int(Saturn64 r) return x; } -CPU_GET_INFO( saturn ) -{ - saturn_state *cpustate = (device != NULL && device->token() != NULL) ? get_safe_token(device) : NULL; - - switch (state) - { - /* --- the following bits of info are returned as 64-bit signed integers --- */ - case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(saturn_state); break; - case CPUINFO_INT_INPUT_LINES: info->i = 1; break; - case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break; - case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_LITTLE; break; - case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break; - case CPUINFO_INT_CLOCK_DIVIDER: info->i = 1; break; - case CPUINFO_INT_MIN_INSTRUCTION_BYTES: info->i = 1; break; - case CPUINFO_INT_MAX_INSTRUCTION_BYTES: info->i = 20; /* 20 nibbles max */ break; - case CPUINFO_INT_MIN_CYCLES: info->i = 2; break; - case CPUINFO_INT_MAX_CYCLES: info->i = 21; break; - - case CPUINFO_INT_DATABUS_WIDTH + AS_PROGRAM: info->i = 8; break; - case CPUINFO_INT_ADDRBUS_WIDTH + AS_PROGRAM: info->i = 20; break; - case CPUINFO_INT_ADDRBUS_SHIFT + AS_PROGRAM: info->i = 0; break; - case CPUINFO_INT_DATABUS_WIDTH + AS_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_WIDTH + AS_DATA: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_SHIFT + AS_DATA: info->i = 0; break; - case CPUINFO_INT_DATABUS_WIDTH + AS_IO: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_WIDTH + AS_IO: info->i = 0; break; - case CPUINFO_INT_ADDRBUS_SHIFT + AS_IO: info->i = 0; break; - - case CPUINFO_INT_INPUT_STATE + SATURN_NMI_LINE: info->i = cpustate->nmi_state; break; - case CPUINFO_INT_INPUT_STATE + SATURN_IRQ_LINE: info->i = cpustate->irq_state; break; - - case CPUINFO_INT_PREVIOUSPC: info->i = cpustate->oldpc; break; - - case CPUINFO_INT_PC: - case CPUINFO_INT_REGISTER + SATURN_PC: info->i = cpustate->pc; break; - case CPUINFO_INT_REGISTER + SATURN_D0: info->i = cpustate->d[0]; break; - case CPUINFO_INT_REGISTER + SATURN_D1: info->i = cpustate->d[1]; break; - - case CPUINFO_INT_REGISTER + SATURN_A: info->i = Reg64Int(cpustate->reg[A]); break; - case CPUINFO_INT_REGISTER + SATURN_B: info->i = Reg64Int(cpustate->reg[B]); break; - case CPUINFO_INT_REGISTER + SATURN_C: info->i = Reg64Int(cpustate->reg[C]); break; - case CPUINFO_INT_REGISTER + SATURN_D: info->i = Reg64Int(cpustate->reg[D]); break; - case CPUINFO_INT_REGISTER + SATURN_R0: info->i = Reg64Int(cpustate->reg[R0]); break; - case CPUINFO_INT_REGISTER + SATURN_R1: info->i = Reg64Int(cpustate->reg[R1]); break; - case CPUINFO_INT_REGISTER + SATURN_R2: info->i = Reg64Int(cpustate->reg[R2]); break; - case CPUINFO_INT_REGISTER + SATURN_R3: info->i = Reg64Int(cpustate->reg[R3]); break; - case CPUINFO_INT_REGISTER + SATURN_R4: info->i = Reg64Int(cpustate->reg[R4]); break; - - case CPUINFO_INT_REGISTER + SATURN_P: info->i = cpustate->p; break; - case CPUINFO_INT_REGISTER + SATURN_OUT: info->i = cpustate->out; break; - case CPUINFO_INT_REGISTER + SATURN_CARRY: info->i = cpustate->carry; break; - case CPUINFO_INT_REGISTER + SATURN_ST: info->i = cpustate->st; break; - case CPUINFO_INT_REGISTER + SATURN_HST: info->i = cpustate->hst; break; - case CPUINFO_INT_REGISTER + SATURN_RSTK0: info->i = cpustate->rstk[0]; break; - case CPUINFO_INT_REGISTER + SATURN_RSTK1: info->i = cpustate->rstk[1]; break; - case CPUINFO_INT_REGISTER + SATURN_RSTK2: info->i = cpustate->rstk[2]; break; - case CPUINFO_INT_REGISTER + SATURN_RSTK3: info->i = cpustate->rstk[3]; break; - case CPUINFO_INT_REGISTER + SATURN_RSTK4: info->i = cpustate->rstk[4]; break; - case CPUINFO_INT_REGISTER + SATURN_RSTK5: info->i = cpustate->rstk[5]; break; - case CPUINFO_INT_REGISTER + SATURN_RSTK6: info->i = cpustate->rstk[6]; break; - case CPUINFO_INT_REGISTER + SATURN_RSTK7: info->i = cpustate->rstk[7]; break; - case CPUINFO_INT_REGISTER + SATURN_SLEEPING: info->i = cpustate->sleeping; - - /* --- the following bits of info are returned as pointers to data or functions --- */ - case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(saturn); break; - case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(saturn); break; - case CPUINFO_FCT_RESET: info->reset = CPU_RESET_NAME(saturn); break; - case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(saturn); break; - case CPUINFO_FCT_BURN: info->burn = NULL; break; - case CPUINFO_FCT_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(saturn); break; - case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cpustate->icount; break; - - /* --- the following bits of info are returned as NULL-terminated strings --- */ - case CPUINFO_STR_NAME: strcpy(info->s, "Saturn"); break; - case CPUINFO_STR_SHORTNAME: strcpy(info->s, "saturn_cpu"); break; - case CPUINFO_STR_FAMILY: strcpy(info->s, "Saturn"); break; - case CPUINFO_STR_VERSION: strcpy(info->s, "1.0alpha"); break; - case CPUINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break; - case CPUINFO_STR_CREDITS: strcpy(info->s, "Copyright Peter Trauner, all rights reserved."); break; - - case CPUINFO_STR_REGISTER + SATURN_PC: sprintf(info->s, "PC: %.5x", cpustate->pc);break; - case CPUINFO_STR_REGISTER + SATURN_D0: sprintf(info->s, "D0: %.5x", cpustate->d[0]);break; - case CPUINFO_STR_REGISTER + SATURN_D1: sprintf(info->s, "D1: %.5x", cpustate->d[1]);break; - case CPUINFO_STR_REGISTER + SATURN_A: sprintf(info->s, "A: " Reg64Format, Reg64Data(cpustate->reg[A]));break; - case CPUINFO_STR_REGISTER + SATURN_B: sprintf(info->s, "B: " Reg64Format, Reg64Data(cpustate->reg[B]));break; - case CPUINFO_STR_REGISTER + SATURN_C: sprintf(info->s, "C: " Reg64Format, Reg64Data(cpustate->reg[C]));break; - case CPUINFO_STR_REGISTER + SATURN_D: sprintf(info->s, "D: " Reg64Format, Reg64Data(cpustate->reg[D]));break; - case CPUINFO_STR_REGISTER + SATURN_R0: sprintf(info->s, "R0: " Reg64Format, Reg64Data(cpustate->reg[R0]));break; - case CPUINFO_STR_REGISTER + SATURN_R1: sprintf(info->s, "R1: " Reg64Format, Reg64Data(cpustate->reg[R1]));break; - case CPUINFO_STR_REGISTER + SATURN_R2: sprintf(info->s, "R2: " Reg64Format, Reg64Data(cpustate->reg[R2]));break; - case CPUINFO_STR_REGISTER + SATURN_R3: sprintf(info->s, "R3: " Reg64Format, Reg64Data(cpustate->reg[R3]));break; - case CPUINFO_STR_REGISTER + SATURN_R4: sprintf(info->s, "R4: " Reg64Format, Reg64Data(cpustate->reg[R4]));break; - case CPUINFO_STR_REGISTER + SATURN_P: sprintf(info->s, "P:%x", cpustate->p);break; - case CPUINFO_STR_REGISTER + SATURN_OUT: sprintf(info->s, "OUT:%.3x", cpustate->out);break; - case CPUINFO_STR_REGISTER + SATURN_CARRY: sprintf(info->s, "Carry: %d", cpustate->carry);break; - case CPUINFO_STR_REGISTER + SATURN_ST: sprintf(info->s, "ST:%.4x", cpustate->st);break; - case CPUINFO_STR_REGISTER + SATURN_HST: sprintf(info->s, "HST:%x", cpustate->hst);break; - case CPUINFO_STR_REGISTER + SATURN_RSTK0: sprintf(info->s, "RSTK0:%.5x", cpustate->rstk[0]);break; - case CPUINFO_STR_REGISTER + SATURN_RSTK1: sprintf(info->s, "RSTK1:%.5x", cpustate->rstk[1]);break; - case CPUINFO_STR_REGISTER + SATURN_RSTK2: sprintf(info->s, "RSTK2:%.5x", cpustate->rstk[2]);break; - case CPUINFO_STR_REGISTER + SATURN_RSTK3: sprintf(info->s, "RSTK3:%.5x", cpustate->rstk[3]);break; - case CPUINFO_STR_REGISTER + SATURN_RSTK4: sprintf(info->s, "RSTK4:%.5x", cpustate->rstk[4]);break; - case CPUINFO_STR_REGISTER + SATURN_RSTK5: sprintf(info->s, "RSTK5:%.5x", cpustate->rstk[5]);break; - case CPUINFO_STR_REGISTER + SATURN_RSTK6: sprintf(info->s, "RSTK6:%.5x", cpustate->rstk[6]);break; - case CPUINFO_STR_REGISTER + SATURN_RSTK7: sprintf(info->s, "RSTK7:%.5x", cpustate->rstk[7]);break; - case CPUINFO_STR_REGISTER + SATURN_IRQ_STATE: sprintf(info->s, "IRQ:%c%c%c%i", cpustate->in_irq?'S':'.', cpustate->irq_enable?'e':'.', cpustate->pending_irq?'p':'.', cpustate->irq_state); break; - case CPUINFO_STR_FLAGS: sprintf(info->s, "%c%c", cpustate->decimal?'D':'.', cpustate->carry ? 'C':'.'); break; - case CPUINFO_STR_REGISTER + SATURN_SLEEPING: sprintf(info->s, "sleep:%c", cpustate->sleeping?'S':'.'); break; - } -} - -DEFINE_LEGACY_CPU_DEVICE(SATURN, saturn); diff --git a/src/emu/cpu/saturn/saturn.h b/src/emu/cpu/saturn/saturn.h index fabd069e4b7..53dabec81ab 100644 --- a/src/emu/cpu/saturn/saturn.h +++ b/src/emu/cpu/saturn/saturn.h @@ -50,17 +50,6 @@ HP38G 09/??/95 1LT8 Yorke #define SATURN_INT_IRQ 1 #define SATURN_INT_NMI 2 -struct saturn_cpu_core -{ - void (*out)(device_t*,int); - int (*in)(device_t*); - void (*reset)(device_t*); - void (*config)(device_t*,int v); - void (*unconfig)(device_t*,int v); - int (*id)(device_t*); - void (*crc)(device_t*,int addr, int data); - void (*rsi)(device_t*); -}; enum { @@ -84,8 +73,236 @@ enum #define SATURN_NMI_LINE 1 #define SATURN_WAKEUP_LINE 2 -CPU_DISASSEMBLE( saturn ); -DECLARE_LEGACY_CPU_DEVICE(SATURN, saturn); +#define MCFG_SATURN_CONFIG(_out, _in, _reset, _config, _unconfig, _id, _crc, _rsi) \ + saturn_device::set_out_func(*device, DEVCB2_##_out); \ + saturn_device::set_in_func(*device, DEVCB2_##_in); \ + saturn_device::set_reset_func(*device, DEVCB2_##_reset); \ + saturn_device::set_config_func(*device, DEVCB2_##_config); \ + saturn_device::set_unconfig_func(*device, DEVCB2_##_unconfig); \ + saturn_device::set_id_func(*device, DEVCB2_##_id); \ + saturn_device::set_crc_func(*device, DEVCB2_##_crc); \ + saturn_device::set_rsi_func(*device, DEVCB2_##_rsi); + + +class saturn_device : public cpu_device +{ +public: + // construction/destruction + saturn_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); + + // static configuration helpers + template<class _Object> static devcb2_base &set_out_func(device_t &device, _Object object) { return downcast<saturn_device &>(device).m_out_func.set_callback(object); } + template<class _Object> static devcb2_base &set_in_func(device_t &device, _Object object) { return downcast<saturn_device &>(device).m_in_func.set_callback(object); } + template<class _Object> static devcb2_base &set_reset_func(device_t &device, _Object object) { return downcast<saturn_device &>(device).m_reset_func.set_callback(object); } + template<class _Object> static devcb2_base &set_config_func(device_t &device, _Object object) { return downcast<saturn_device &>(device).m_config_func.set_callback(object); } + template<class _Object> static devcb2_base &set_unconfig_func(device_t &device, _Object object) { return downcast<saturn_device &>(device).m_unconfig_func.set_callback(object); } + template<class _Object> static devcb2_base &set_id_func(device_t &device, _Object object) { return downcast<saturn_device &>(device).m_id_func.set_callback(object); } + template<class _Object> static devcb2_base &set_crc_func(device_t &device, _Object object) { return downcast<saturn_device &>(device).m_crc_func.set_callback(object); } + template<class _Object> static devcb2_base &set_rsi_func(device_t &device, _Object object) { return downcast<saturn_device &>(device).m_rsi_func.set_callback(object); } + +protected: + // device-level overrides + virtual void device_start(); + virtual void device_reset(); + + // device_execute_interface overrides + virtual UINT32 execute_min_cycles() const { return 2; } + virtual UINT32 execute_max_cycles() const { return 21; } + virtual UINT32 execute_input_lines() const { return 1; } + virtual void execute_run(); + virtual void execute_set_input(int inputnum, int state); + + // device_memory_interface overrides + virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const { return (spacenum == AS_PROGRAM) ? &m_program_config : NULL; } + + // device_state_interface overrides + void state_string_export(const device_state_entry &entry, astring &string); + virtual void state_import(const device_state_entry &entry); + virtual void state_export(const device_state_entry &entry); + + // device_disasm_interface overrides + virtual UINT32 disasm_min_opcode_bytes() const { return 1; } + virtual UINT32 disasm_max_opcode_bytes() const { return 20; } + virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options); + +private: + address_space_config m_program_config; + + devcb2_write32 m_out_func; + devcb2_read32 m_in_func; + devcb2_write_line m_reset_func; + devcb2_write32 m_config_func; + devcb2_write32 m_unconfig_func; + devcb2_read32 m_id_func; + devcb2_write32 m_crc_func; + devcb2_write_line m_rsi_func; + +// 64 bit, unpacked (one nibble per byte) +typedef UINT8 Saturn64[16]; + + Saturn64 m_reg[9]; //r0,r1,r2,r3,r4,a,b,c,d + + UINT32 m_d[2], m_pc, m_oldpc, m_rstk[8]; // 20 bit, packed addresses + + UINT8 m_p; // 4 bit pointer + + UINT16 m_out; // 12 bit (packed) + UINT8 m_carry, m_decimal; + UINT16 m_st; // status 16 bit + + UINT8 m_hst; // hardware status 4 bit + + UINT8 m_nmi_state; + UINT8 m_irq_state; + UINT8 m_irq_enable; /* INTON / INTOFF */ + UINT8 m_in_irq; /* already servicing IRQ */ + UINT8 m_pending_irq; /* IRQ is pending */ + UINT8 m_sleeping; /* low-consumption state */ + int m_monitor_id; + int m_monitor_in; + address_space *m_program; + direct_read_data *m_direct; + int m_icount; + INT64 m_debugger_temp; + + void saturn_take_irq(); + void IntReg64(Saturn64 r, INT64 d); + INT64 Reg64Int(Saturn64 r); + + inline int READ_OP(); + inline int READ_OP_ARG(); + inline int READ_OP_ARG8(); + inline INT8 READ_OP_DIS8(); + inline int READ_OP_ARG12(); + inline int READ_OP_DIS12(); + inline int READ_OP_ARG16(); + inline INT16 READ_OP_DIS16(); + inline int READ_OP_ARG20(); + inline int READ_NIBBLE(UINT32 adr); + inline int READ_8(UINT32 adr); + inline int READ_12(UINT32 adr); + inline int READ_16(UINT32 adr); + inline int READ_20(UINT32 adr); + inline void WRITE_NIBBLE(UINT32 adr, UINT8 nib); + inline int S64_READ_X(int r); + inline int S64_READ_WORD(int r); + inline int S64_READ_A(int r); + inline void S64_WRITE_X(int r, int v); + inline void S64_WRITE_WORD(int r, int v); + inline void S64_WRITE_A(int r, int v); + inline UINT32 saturn_pop(); + inline void saturn_push(UINT32 adr); + inline void saturn_interrupt_on(); + inline void saturn_interrupt_off(); + inline void saturn_reset_interrupt(); + inline void saturn_mem_reset(); + inline void saturn_mem_config(); + inline void saturn_mem_unconfig(); + inline void saturn_mem_id(); + inline void saturn_shutdown(); + inline void saturn_bus_command_b(); + inline void saturn_bus_command_c(); + inline void saturn_bus_command_d(); + inline void saturn_serial_request(); + inline void saturn_out_c(); + inline void saturn_out_cs(); + inline void saturn_in(int reg); + inline void saturn_sethex() { m_decimal=0; } + inline void saturn_setdec() { m_decimal=1; } + inline void saturn_clear_st(); + inline void saturn_st_to_c(); + inline void saturn_c_to_st(); + inline void saturn_exchange_c_st(); + inline void saturn_jump_after_test(); + inline void saturn_st_clear_bit(); + inline void saturn_st_set_bit(); + inline void saturn_st_jump_bit_clear(); + inline void saturn_st_jump_bit_set(); + inline void saturn_hst_clear_bits(); + inline void saturn_hst_bits_cleared(); + inline void saturn_exchange_p(); + inline void saturn_p_to_c(); + inline void saturn_c_to_p(); + inline void saturn_dec_p(); + inline void saturn_inc_p(); + inline void saturn_load_p(); + inline void saturn_p_equals(); + inline void saturn_p_not_equals(); + inline void saturn_ca_p_1(); + inline void saturn_load_reg(int reg); + inline void saturn_jump(int adr, int jump); + inline void saturn_call(int adr); + inline void saturn_return(int yes); + inline void saturn_return_carry_set(); + inline void saturn_return_carry_clear(); + inline void saturn_return_interrupt(); + inline void saturn_return_xm_set(); + inline void saturn_pop_c(); + inline void saturn_push_c(); + inline void saturn_indirect_jump(int reg); + inline void saturn_equals_zero(int reg, int begin, int count); + inline void saturn_equals(int reg, int begin, int count, int right); + inline void saturn_not_equals_zero(int reg, int begin, int count); + inline void saturn_not_equals(int reg, int begin, int count, int right); + inline void saturn_greater(int reg, int begin, int count, int right); + inline void saturn_greater_equals(int reg, int begin, int count, int right); + inline void saturn_smaller_equals(int reg, int begin, int count, int right); + inline void saturn_smaller(int reg, int begin, int count, int right); + inline void saturn_jump_bit_clear(int reg); + inline void saturn_jump_bit_set(int reg); + inline void saturn_load_pc(int reg); + inline void saturn_store_pc(int reg); + inline void saturn_exchange_pc(int reg); + inline void saturn_load_adr(int reg, int nibbles); + inline void saturn_add_adr(int reg); + inline void saturn_sub_adr(int reg); + inline void saturn_adr_to_reg(int adr, int reg); + inline void saturn_reg_to_adr(int reg, int adr); + inline void saturn_adr_to_reg_word(int adr, int reg); + inline void saturn_reg_to_adr_word(int reg, int adr); + inline void saturn_exchange_adr_reg(int adr, int reg); + inline void saturn_exchange_adr_reg_word(int adr, int reg); + inline void saturn_load_nibbles(int reg, int begin, int count, int adr); + inline void saturn_store_nibbles(int reg, int begin, int count, int adr); + inline void saturn_clear_bit(int reg); + inline void saturn_set_bit(int reg); + inline void saturn_clear(int reg, int begin, int count); + inline void saturn_exchange(int left, int begin, int count, int right); + inline void saturn_copy(int dest, int begin, int count, int src); + inline void saturn_add(int reg, int begin, int count, int right); + inline void saturn_add_const(int reg, int begin, int count, UINT8 right); + inline void saturn_sub(int reg, int begin, int count, int right); + inline void saturn_sub_const(int reg, int begin, int count, int right); + inline void saturn_sub2(int reg, int begin, int count, int right); + inline void saturn_increment(int reg, int begin, int count); + inline void saturn_decrement(int reg, int begin, int count); + inline void saturn_invert(int reg, int begin, int count); + inline void saturn_negate(int reg, int begin, int count); + inline void saturn_or(int dest, int begin, int count, int src); + inline void saturn_and(int dest, int begin, int count, int src); + inline void saturn_shift_nibble_left(int reg, int begin, int count); + inline void saturn_shift_nibble_right(int reg, int begin, int count); + inline void saturn_rotate_nibble_left_w(int reg); + inline void saturn_rotate_nibble_right_w(int reg); + inline void saturn_shift_right(int reg, int begin, int count); + void saturn_invalid3( int op1, int op2, int op3 ); + void saturn_invalid4( int op1, int op2, int op3, int op4 ); + void saturn_invalid5( int op1, int op2, int op3, int op4, int op5 ); + void saturn_invalid6( int op1, int op2, int op3, int op4, int op5, int op6 ); + void saturn_instruction_0e(); + void saturn_instruction_1(); + void saturn_instruction_80(); + void saturn_instruction_81a(); + void saturn_instruction_81(); + void saturn_instruction_8(); + void saturn_instruction_9(); + void saturn_instruction_a(); + void saturn_instruction_b(); + void saturn_instruction(); +}; + +extern const device_type SATURN; + #endif /* __SATURN_H__ */ |