diff options
Diffstat (limited to 'src/emu/cpu/powerpc')
| -rw-r--r-- | src/emu/cpu/powerpc/ppc.h | 2 | ||||
| -rw-r--r-- | src/emu/cpu/powerpc/ppccom.c | 16 | ||||
| -rw-r--r-- | src/emu/cpu/powerpc/ppcdrc.c | 18 | ||||
| -rw-r--r-- | src/emu/cpu/powerpc/ppcfe.c | 4 |
4 files changed, 20 insertions, 20 deletions
diff --git a/src/emu/cpu/powerpc/ppc.h b/src/emu/cpu/powerpc/ppc.h index 72fdf76a2d7..623250ae672 100644 --- a/src/emu/cpu/powerpc/ppc.h +++ b/src/emu/cpu/powerpc/ppc.h @@ -2,7 +2,7 @@ ppc.h - Interface file for the universal machine language-based + Interface file for the universal machine language-based PowerPC emulator. Copyright Aaron Giles diff --git a/src/emu/cpu/powerpc/ppccom.c b/src/emu/cpu/powerpc/ppccom.c index d2e54293591..6994c73c52a 100644 --- a/src/emu/cpu/powerpc/ppccom.c +++ b/src/emu/cpu/powerpc/ppccom.c @@ -476,18 +476,18 @@ void ppccom_tlb_fill(powerpc_state *ppc) int transtype = ppc->param1; offs_t transaddr = address; UINT32 entryval; - + /* 4xx case: "TLB" really just caches writes and checks compare registers */ if (ppc->cap & PPCCAP_4XX) { /* assume success and direct translation */ ppc->param0 = 1; transaddr = address & 0x7fffffff; - + /* we don't support the MMU of the 403GCX */ if (ppc->flavor == PPC_MODEL_403GCX && (ppc->msr & MSROEA_DR)) fatalerror("MMU enabled but not supported!"); - + /* only check if PE is enabled */ if (transtype == TRANSLATE_WRITE && (ppc->msr & MSR4XX_PE)) { @@ -500,11 +500,11 @@ void ppccom_tlb_fill(powerpc_state *ppc) ppc->param0 = 2; } } - + /* OEA case: perform an address translation */ else ppc->param0 = ppccom_translate_address_internal(ppc, transtype | transuser, &transaddr); - + /* log information and return upon failure */ if (PRINTF_TLB_FILL) printf("tlb_fill: %08X (%s%s) -> ", address, (transtype == TRANSLATE_READ) ? "R" : (transtype == TRANSLATE_WRITE) ? "W" : "F", transuser ? "U" : "S"); @@ -1386,7 +1386,7 @@ static int ppc4xx_dma_decrement_count(powerpc_state *ppc, int dmachan) /* set the complete bit and handle interrupts */ ppc->dcr[DCR4XX_DMASR] |= 1 << (31 - dmachan); -// ppc->dcr[DCR4XX_DMASR] |= 1 << (27 - dmachan); +// ppc->dcr[DCR4XX_DMASR] |= 1 << (27 - dmachan); ppc4xx_dma_update_irq_states(ppc); return TRUE; } @@ -1644,7 +1644,7 @@ static void ppc4xx_spu_rx_data(powerpc_state *ppc, UINT8 data) new_rxin = (ppc->spu.rxin + 1) % ARRAY_LENGTH(ppc->spu.rxbuffer); if (new_rxin == ppc->spu.rxout) fatalerror("ppc4xx_spu_rx_data: buffer overrun!"); - + /* store the data and accept the new in index */ ppc->spu.rxbuffer[ppc->spu.rxin] = data; ppc->spu.rxin = new_rxin; @@ -1719,7 +1719,7 @@ static TIMER_CALLBACK( ppc4xx_spu_callback ) { int operation = (ppc->spu.regs[SPU4XX_RX_COMMAND] >> 5) & 3; UINT8 rxbyte; - + /* consume the byte and advance the out pointer */ rxbyte = ppc->spu.rxbuffer[ppc->spu.rxout]; ppc->spu.rxout = (ppc->spu.rxout + 1) % ARRAY_LENGTH(ppc->spu.rxbuffer); diff --git a/src/emu/cpu/powerpc/ppcdrc.c b/src/emu/cpu/powerpc/ppcdrc.c index 48da8cd2de4..51597e8e100 100644 --- a/src/emu/cpu/powerpc/ppcdrc.c +++ b/src/emu/cpu/powerpc/ppcdrc.c @@ -12,7 +12,7 @@ Future improvements/changes: - * crxor a,a,a / creqv a,a,a / cror a,a,a + * crxor a,a,a / creqv a,a,a / cror a,a,a ***************************************************************************/ @@ -582,7 +582,7 @@ static void ppcdrc_init(powerpc_flavor flavor, UINT8 cap, int tb_divisor, int cl ppc->impstate->drcuml = drcuml_alloc(cache, flags, 8, 32, 2); if (ppc->impstate->drcuml == NULL) fatalerror("Error initializing the UML"); - + /* add symbols for our stuff */ drcuml_symbol_add(ppc->impstate->drcuml, &ppc->pc, sizeof(ppc->pc), "pc"); drcuml_symbol_add(ppc->impstate->drcuml, &ppc->icount, sizeof(ppc->icount), "icount"); @@ -1798,14 +1798,14 @@ static void static_generate_memory_accessor(drcuml_state *drcuml, int mode, int UML_LOAD(block, IREG(3), ppc->tlb_table, IREG(3), DWORD); // load i3,[tlb_table],i3,dword UML_JMP(block, tlbreturn); // jmp tlbreturn UML_LABEL(block, dsi); // dsi: - + /* 4XX case: protection exception */ if (ppc->cap & PPCCAP_4XX) { UML_MOV(block, SPR32(SPR4XX_DEAR), IREG(0)); // mov [dear],i0 UML_EXH(block, ppc->impstate->exception[EXCEPTION_DSI], IREG(0)); // exh dsi,i0 } - + /* 603 case: TLBMISS exception */ else if (ppc->cap & PPCCAP_603_MMU) { @@ -1818,7 +1818,7 @@ static void static_generate_memory_accessor(drcuml_state *drcuml, int mode, int else UML_EXH(block, ppc->impstate->exception[EXCEPTION_DTLBMISSL], IREG(0)); // exh dtlbmissl,i0 } - + /* general case: DSI exception */ else { @@ -1887,7 +1887,7 @@ static void static_generate_lsw_entries(drcuml_state *drcuml, int mode) for (regnum = 0; regnum < 32; regnum++) { char temp[20]; - + /* allocate a handle */ sprintf(temp, "lsw%d", regnum); alloc_handle(drcuml, &ppc->impstate->lsw[mode][regnum], temp); @@ -1947,7 +1947,7 @@ static void static_generate_stsw_entries(drcuml_state *drcuml, int mode) for (regnum = 0; regnum < 32; regnum++) { char temp[20]; - + /* allocate a handle */ sprintf(temp, "stsw%d", regnum); alloc_handle(drcuml, &ppc->impstate->stsw[mode][regnum], temp); @@ -1994,7 +1994,7 @@ static void generate_update_mode(drcuml_block *block) { /* LE in bit 0 of mode */ UML_AND(block, IREG(0), MSR32, IMM(MSR_LE)); // and i0,msr,MSR_LE - + /* DR (OEA and 403GCX) in bit 1 of mode */ if ((ppc->cap & PPCCAP_OEA) || ppc->flavor == PPC_MODEL_403GCX) { @@ -2008,7 +2008,7 @@ static void generate_update_mode(drcuml_block *block) UML_ROLAND(block, IREG(1), MSR32, IMM(30), IMM(0x02)); // roland i1,[msr],30,0x02 UML_OR(block, IREG(0), IREG(0), IREG(1)); // or i0,i0,i1 } - + /* PR in bit 2 of mode */ UML_ROLAND(block, IREG(1), MSR32, IMM(20), IMM(0x04)); // roland i1,[msr],20,0x04 UML_OR(block, MEM(&ppc->impstate->mode), IREG(0), IREG(1)); // or [mode],i0,i1 diff --git a/src/emu/cpu/powerpc/ppcfe.c b/src/emu/cpu/powerpc/ppcfe.c index 78ed46709c1..550a2810fbe 100644 --- a/src/emu/cpu/powerpc/ppcfe.c +++ b/src/emu/cpu/powerpc/ppcfe.c @@ -655,7 +655,7 @@ static int describe_instruction_1f(powerpc_state *ppc, UINT32 op, opcode_desc *d if (op & M_RC) CR_MODIFIED(desc, 0); return TRUE; - + case 0x2c8: /* SUBFZEOx */ case 0x2ca: /* ADDZEOx */ case 0x2e8: /* SUBFMEOx */ @@ -1066,7 +1066,7 @@ static int describe_instruction_1f(powerpc_state *ppc, UINT32 op, opcode_desc *d GPR_USED(desc, regnum); desc->flags |= OPFLAG_WRITES_MEMORY; return TRUE; - + case 0x2d5: /* STSWI */ GPR_USED_OR_ZERO(desc, G_RA(op)); for (regnum = 0; regnum < ((G_NB(op) - 1) & 0x1f) + 1; regnum += 4) |
