diff options
Diffstat (limited to 'src/emu/cpu/i386')
| -rw-r--r-- | src/emu/cpu/i386/i386.c | 4 | ||||
| -rw-r--r-- | src/emu/cpu/i386/i386op16.c | 4 | ||||
| -rw-r--r-- | src/emu/cpu/i386/i386op32.c | 4 | ||||
| -rw-r--r-- | src/emu/cpu/i386/i386priv.h | 2 | ||||
| -rw-r--r-- | src/emu/cpu/i386/i486ops.c | 4 | ||||
| -rw-r--r-- | src/emu/cpu/i386/x87ops.c | 136 |
6 files changed, 77 insertions, 77 deletions
diff --git a/src/emu/cpu/i386/i386.c b/src/emu/cpu/i386/i386.c index 2c4a6631cf4..0c9dcb9917c 100644 --- a/src/emu/cpu/i386/i386.c +++ b/src/emu/cpu/i386/i386.c @@ -1062,7 +1062,7 @@ static void i286_task_switch(i386_state *cpustate, UINT16 selector, UINT8 nested CHANGE_PC(cpustate,cpustate->eip); cpustate->CPL = cpustate->sreg[CS].selector & 0x03; -// printf("286 Task Switch from selector %04x to %04x\n",old_task,selector); +// printf("286 Task Switch from selector %04x to %04x\n",old_task,selector); } static void i386_task_switch(i386_state *cpustate, UINT16 selector, UINT8 nested) @@ -1177,7 +1177,7 @@ static void i386_task_switch(i386_state *cpustate, UINT16 selector, UINT8 nested CHANGE_PC(cpustate,cpustate->eip); cpustate->CPL = cpustate->sreg[CS].selector & 0x03; -// printf("386 Task Switch from selector %04x to %04x\n",old_task,selector); +// printf("386 Task Switch from selector %04x to %04x\n",old_task,selector); } static void i386_check_irq_line(i386_state *cpustate) diff --git a/src/emu/cpu/i386/i386op16.c b/src/emu/cpu/i386/i386op16.c index 20aa740a017..3e647024cdc 100644 --- a/src/emu/cpu/i386/i386op16.c +++ b/src/emu/cpu/i386/i386op16.c @@ -3277,7 +3277,7 @@ static void I386OP(group0F01_16)(i386_state *cpustate) // Opcode 0x0f 01 case 2: /* LGDT */ { if(PROTECTED_MODE && cpustate->CPL) - FAULT(FAULT_GP,0) + FAULT(FAULT_GP,0) if( modrm >= 0xc0 ) { address = LOAD_RM16(modrm); ea = i386_translate(cpustate, CS, address, 0 ); @@ -3292,7 +3292,7 @@ static void I386OP(group0F01_16)(i386_state *cpustate) // Opcode 0x0f 01 case 3: /* LIDT */ { if(PROTECTED_MODE && cpustate->CPL) - FAULT(FAULT_GP,0) + FAULT(FAULT_GP,0) if( modrm >= 0xc0 ) { address = LOAD_RM16(modrm); ea = i386_translate(cpustate, CS, address, 0 ); diff --git a/src/emu/cpu/i386/i386op32.c b/src/emu/cpu/i386/i386op32.c index a165f6f22a1..aa53fcfb1e0 100644 --- a/src/emu/cpu/i386/i386op32.c +++ b/src/emu/cpu/i386/i386op32.c @@ -3123,7 +3123,7 @@ static void I386OP(group0F01_32)(i386_state *cpustate) // Opcode 0x0f 01 case 2: /* LGDT */ { if(PROTECTED_MODE && cpustate->CPL) - FAULT(FAULT_GP,0) + FAULT(FAULT_GP,0) if( modrm >= 0xc0 ) { address = LOAD_RM32(modrm); ea = i386_translate(cpustate, CS, address, 0 ); @@ -3138,7 +3138,7 @@ static void I386OP(group0F01_32)(i386_state *cpustate) // Opcode 0x0f 01 case 3: /* LIDT */ { if(PROTECTED_MODE && cpustate->CPL) - FAULT(FAULT_GP,0) + FAULT(FAULT_GP,0) if( modrm >= 0xc0 ) { address = LOAD_RM32(modrm); ea = i386_translate(cpustate, CS, address, 0 ); diff --git a/src/emu/cpu/i386/i386priv.h b/src/emu/cpu/i386/i386priv.h index 92467b7504c..35b29faba9e 100644 --- a/src/emu/cpu/i386/i386priv.h +++ b/src/emu/cpu/i386/i386priv.h @@ -458,7 +458,7 @@ INLINE int translate_address(i386_state *cpustate, int rwn, UINT32 *address, UIN if(!(page_dir & 0x40) && (rwn == 1)) cpustate->program->write_dword(pdbr + directory * 4, page_dir | 0x60); else if(!(page_dir & 0x20) && (rwn != -1)) - cpustate->program->write_dword(pdbr + directory * 4, page_dir | 0x20); + cpustate->program->write_dword(pdbr + directory * 4, page_dir | 0x20); *address = (page_dir & 0xffc00000) | (a & 0x003fffff); } } diff --git a/src/emu/cpu/i386/i486ops.c b/src/emu/cpu/i386/i486ops.c index b573fd09da0..8a5e86dfa14 100644 --- a/src/emu/cpu/i386/i486ops.c +++ b/src/emu/cpu/i386/i486ops.c @@ -241,7 +241,7 @@ static void I486OP(group0F01_16)(i386_state *cpustate) // Opcode 0x0f 01 case 2: /* LGDT */ { if(PROTECTED_MODE && cpustate->CPL) - FAULT(FAULT_GP,0) + FAULT(FAULT_GP,0) if( modrm >= 0xc0 ) { address = LOAD_RM16(modrm); ea = i386_translate( cpustate, CS, address, 0 ); @@ -256,7 +256,7 @@ static void I486OP(group0F01_16)(i386_state *cpustate) // Opcode 0x0f 01 case 3: /* LIDT */ { if(PROTECTED_MODE && cpustate->CPL) - FAULT(FAULT_GP,0) + FAULT(FAULT_GP,0) if( modrm >= 0xc0 ) { address = LOAD_RM16(modrm); ea = i386_translate( cpustate, CS, address, 0 ); diff --git a/src/emu/cpu/i386/x87ops.c b/src/emu/cpu/i386/x87ops.c index 21e05057628..c6b9dc4bb85 100644 --- a/src/emu/cpu/i386/x87ops.c +++ b/src/emu/cpu/i386/x87ops.c @@ -2,17 +2,17 @@ x87 FPU emulation - TODO: - - 80-bit precision for F2XM1, FYL2X, FPATAN - - Figure out why SoftFloat trig extensions produce bad values - - Cycle counts for all processors (currently using 486 counts) - - Precision-dependent cycle counts for divide instructions - - Last instruction, operand pointers etc. - - Fix FLDENV, FSTENV, FSAVE, FRSTOR and FPREM - - Status word C2 updates to reflect round up/down - - Handling of invalid and denormal numbers - - Remove redundant operand checks - - Exceptions + TODO: + - 80-bit precision for F2XM1, FYL2X, FPATAN + - Figure out why SoftFloat trig extensions produce bad values + - Cycle counts for all processors (currently using 486 counts) + - Precision-dependent cycle counts for divide instructions + - Last instruction, operand pointers etc. + - Fix FLDENV, FSTENV, FSAVE, FRSTOR and FPREM + - Status word C2 updates to reflect round up/down + - Handling of invalid and denormal numbers + - Remove redundant operand checks + - Exceptions ***************************************************************************/ @@ -2167,7 +2167,7 @@ void x87_fptan(i386_state *cpustate, UINT8 modrm) double x = fx80_to_double(result1); x = tan(x); result1 = double_to_fx80(x); - + cpustate->x87_sw &= ~X87_SW_C2; #endif } @@ -2229,7 +2229,7 @@ void x87_fsin(i386_state *cpustate, UINT8 modrm) double x = fx80_to_double(result); x = sin(x); result = double_to_fx80(x); - + cpustate->x87_sw &= ~X87_SW_C2; #endif } @@ -2262,7 +2262,7 @@ void x87_fcos(i386_state *cpustate, UINT8 modrm) double x = fx80_to_double(result); x = cos(x); result = double_to_fx80(x); - + cpustate->x87_sw &= ~X87_SW_C2; #endif } @@ -2300,13 +2300,13 @@ void x87_fsincos(i386_state *cpustate, UINT8 modrm) cpustate->x87_sw |= X87_SW_C2; #else double s = fx80_to_double(s_result); - double c = fx80_to_double(c_result); + double c = fx80_to_double(c_result); s = sin(s); c = cos(c); - + s_result = double_to_fx80(s); c_result = double_to_fx80(c); - + cpustate->x87_sw &= ~X87_SW_C2; #endif } @@ -4023,38 +4023,38 @@ void x87_fstenv(i386_state *cpustate, UINT8 modrm) WRITE16(cpustate, ea + 0, cpustate->x87_cw); WRITE16(cpustate, ea + 2, cpustate->x87_sw); WRITE16(cpustate, ea + 4, cpustate->x87_tw); -// WRITE16(cpustate, ea + 6, cpustate->fpu_inst_ptr & 0xffff); -// WRITE16(cpustate, ea + 8, (cpustate->fpu_opcode & 0x07ff) | ((cpustate->fpu_inst_ptr & 0x0f0000) >> 4)); -// WRITE16(cpustate, ea + 10, cpustate->fpu_data_ptr & 0xffff); -// WRITE16(cpustate, ea + 12, (cpustate->fpu_inst_ptr & 0x0f0000) >> 4); +// WRITE16(cpustate, ea + 6, cpustate->fpu_inst_ptr & 0xffff); +// WRITE16(cpustate, ea + 8, (cpustate->fpu_opcode & 0x07ff) | ((cpustate->fpu_inst_ptr & 0x0f0000) >> 4)); +// WRITE16(cpustate, ea + 10, cpustate->fpu_data_ptr & 0xffff); +// WRITE16(cpustate, ea + 12, (cpustate->fpu_inst_ptr & 0x0f0000) >> 4); break; case 1: // 16-bit protected mode WRITE16(cpustate,ea + 0, cpustate->x87_cw); WRITE16(cpustate,ea + 2, cpustate->x87_sw); WRITE16(cpustate,ea + 4, cpustate->x87_tw); -// WRITE16(cpustate,ea + 6, cpustate->fpu_inst_ptr & 0xffff); -// WRITE16(cpustate,ea + 8, (cpustate->fpu_opcode & 0x07ff) | ((cpustate->fpu_inst_ptr & 0x0f0000) >> 4)); -// WRITE16(cpustate,ea + 10, cpustate->fpu_data_ptr & 0xffff); -// WRITE16(cpustate,ea + 12, (cpustate->fpu_inst_ptr & 0x0f0000) >> 4); +// WRITE16(cpustate,ea + 6, cpustate->fpu_inst_ptr & 0xffff); +// WRITE16(cpustate,ea + 8, (cpustate->fpu_opcode & 0x07ff) | ((cpustate->fpu_inst_ptr & 0x0f0000) >> 4)); +// WRITE16(cpustate,ea + 10, cpustate->fpu_data_ptr & 0xffff); +// WRITE16(cpustate,ea + 12, (cpustate->fpu_inst_ptr & 0x0f0000) >> 4); break; case 2: // 32-bit real mode WRITE16(cpustate, ea + 0, cpustate->x87_cw); WRITE16(cpustate, ea + 4, cpustate->x87_sw); WRITE16(cpustate, ea + 8, cpustate->x87_tw); -// WRITE16(cpustate, ea + 12, cpustate->fpu_inst_ptr & 0xffff); -// WRITE16(cpustate, ea + 8, (cpustate->fpu_opcode & 0x07ff) | ((cpustate->fpu_inst_ptr & 0x0f0000) >> 4)); -// WRITE16(cpustate, ea + 20, cpustate->fpu_data_ptr & 0xffff); -// WRITE16(cpustate, ea + 12, ((cpustate->fpu_inst_ptr & 0x0f0000) >> 4)); -// WRITE32(cpustate, ea + 24, (cpustate->fpu_data_ptr >> 16) << 12); +// WRITE16(cpustate, ea + 12, cpustate->fpu_inst_ptr & 0xffff); +// WRITE16(cpustate, ea + 8, (cpustate->fpu_opcode & 0x07ff) | ((cpustate->fpu_inst_ptr & 0x0f0000) >> 4)); +// WRITE16(cpustate, ea + 20, cpustate->fpu_data_ptr & 0xffff); +// WRITE16(cpustate, ea + 12, ((cpustate->fpu_inst_ptr & 0x0f0000) >> 4)); +// WRITE32(cpustate, ea + 24, (cpustate->fpu_data_ptr >> 16) << 12); break; case 3: // 32-bit protected mode WRITE16(cpustate, ea + 0, cpustate->x87_cw); WRITE16(cpustate, ea + 4, cpustate->x87_sw); WRITE16(cpustate, ea + 8, cpustate->x87_tw); -// WRITE32(cpustate, ea + 12, cpustate->fpu_inst_ptr); -// WRITE32(cpustate, ea + 16, cpustate->fpu_opcode); -// WRITE32(cpustate, ea + 20, cpustate->fpu_data_ptr); -// WRITE32(cpustate, ea + 24, cpustate->fpu_inst_ptr); +// WRITE32(cpustate, ea + 12, cpustate->fpu_inst_ptr); +// WRITE32(cpustate, ea + 16, cpustate->fpu_opcode); +// WRITE32(cpustate, ea + 20, cpustate->fpu_data_ptr); +// WRITE32(cpustate, ea + 24, cpustate->fpu_inst_ptr); break; } @@ -4072,41 +4072,41 @@ void x87_fsave(i386_state *cpustate, UINT8 modrm) WRITE16(cpustate, ea + 0, cpustate->x87_cw); WRITE16(cpustate, ea + 2, cpustate->x87_sw); WRITE16(cpustate, ea + 4, cpustate->x87_tw); -// WRITE16(cpustate, ea + 6, cpustate->fpu_inst_ptr & 0xffff); -// WRITE16(cpustate, ea + 8, (cpustate->fpu_opcode & 0x07ff) | ((cpustate->fpu_inst_ptr & 0x0f0000) >> 4)); -// WRITE16(cpustate, ea + 10, cpustate->fpu_data_ptr & 0xffff); -// WRITE16(cpustate, ea + 12, (cpustate->fpu_inst_ptr & 0x0f0000) >> 4); +// WRITE16(cpustate, ea + 6, cpustate->fpu_inst_ptr & 0xffff); +// WRITE16(cpustate, ea + 8, (cpustate->fpu_opcode & 0x07ff) | ((cpustate->fpu_inst_ptr & 0x0f0000) >> 4)); +// WRITE16(cpustate, ea + 10, cpustate->fpu_data_ptr & 0xffff); +// WRITE16(cpustate, ea + 12, (cpustate->fpu_inst_ptr & 0x0f0000) >> 4); ea += 14; break; case 1: // 16-bit protected mode WRITE16(cpustate,ea + 0, cpustate->x87_cw); WRITE16(cpustate,ea + 2, cpustate->x87_sw); WRITE16(cpustate,ea + 4, cpustate->x87_tw); -// WRITE16(cpustate,ea + 6, cpustate->fpu_inst_ptr & 0xffff); -// WRITE16(cpustate,ea + 8, (cpustate->fpu_opcode & 0x07ff) | ((cpustate->fpu_inst_ptr & 0x0f0000) >> 4)); -// WRITE16(cpustate,ea + 10, cpustate->fpu_data_ptr & 0xffff); -// WRITE16(cpustate,ea + 12, (cpustate->fpu_inst_ptr & 0x0f0000) >> 4); +// WRITE16(cpustate,ea + 6, cpustate->fpu_inst_ptr & 0xffff); +// WRITE16(cpustate,ea + 8, (cpustate->fpu_opcode & 0x07ff) | ((cpustate->fpu_inst_ptr & 0x0f0000) >> 4)); +// WRITE16(cpustate,ea + 10, cpustate->fpu_data_ptr & 0xffff); +// WRITE16(cpustate,ea + 12, (cpustate->fpu_inst_ptr & 0x0f0000) >> 4); ea += 14; break; case 2: // 32-bit real mode WRITE16(cpustate, ea + 0, cpustate->x87_cw); WRITE16(cpustate, ea + 4, cpustate->x87_sw); WRITE16(cpustate, ea + 8, cpustate->x87_tw); -// WRITE16(cpustate, ea + 12, cpustate->fpu_inst_ptr & 0xffff); -// WRITE16(cpustate, ea + 8, (cpustate->fpu_opcode & 0x07ff) | ((cpustate->fpu_inst_ptr & 0x0f0000) >> 4)); -// WRITE16(cpustate, ea + 20, cpustate->fpu_data_ptr & 0xffff); -// WRITE16(cpustate, ea + 12, ((cpustate->fpu_inst_ptr & 0x0f0000) >> 4)); -// WRITE32(cpustate, ea + 24, (cpustate->fpu_data_ptr >> 16) << 12); +// WRITE16(cpustate, ea + 12, cpustate->fpu_inst_ptr & 0xffff); +// WRITE16(cpustate, ea + 8, (cpustate->fpu_opcode & 0x07ff) | ((cpustate->fpu_inst_ptr & 0x0f0000) >> 4)); +// WRITE16(cpustate, ea + 20, cpustate->fpu_data_ptr & 0xffff); +// WRITE16(cpustate, ea + 12, ((cpustate->fpu_inst_ptr & 0x0f0000) >> 4)); +// WRITE32(cpustate, ea + 24, (cpustate->fpu_data_ptr >> 16) << 12); ea += 28; break; case 3: // 32-bit protected mode WRITE16(cpustate, ea + 0, cpustate->x87_cw); WRITE16(cpustate, ea + 4, cpustate->x87_sw); WRITE16(cpustate, ea + 8, cpustate->x87_tw); -// WRITE32(cpustate, ea + 12, cpustate->fpu_inst_ptr); -// WRITE32(cpustate, ea + 16, cpustate->fpu_opcode); -// WRITE32(cpustate, ea + 20, cpustate->fpu_data_ptr); -// WRITE32(cpustate, ea + 24, cpustate->fpu_inst_ptr); +// WRITE32(cpustate, ea + 12, cpustate->fpu_inst_ptr); +// WRITE32(cpustate, ea + 16, cpustate->fpu_opcode); +// WRITE32(cpustate, ea + 20, cpustate->fpu_data_ptr); +// WRITE32(cpustate, ea + 24, cpustate->fpu_inst_ptr); ea += 28; break; } @@ -4128,41 +4128,41 @@ void x87_frstor(i386_state *cpustate, UINT8 modrm) x87_write_cw(cpustate, READ16(cpustate, ea)); cpustate->x87_sw = READ16(cpustate, ea + 2); cpustate->x87_tw = READ16(cpustate, ea + 4); -// WRITE16(cpustate, ea + 6, cpustate->fpu_inst_ptr & 0xffff); -// WRITE16(cpustate, ea + 8, (cpustate->fpu_opcode & 0x07ff) | ((cpustate->fpu_inst_ptr & 0x0f0000) >> 4)); -// WRITE16(cpustate, ea + 10, cpustate->fpu_data_ptr & 0xffff); -// WRITE16(cpustate, ea + 12, (cpustate->fpu_inst_ptr & 0x0f0000) >> 4); +// WRITE16(cpustate, ea + 6, cpustate->fpu_inst_ptr & 0xffff); +// WRITE16(cpustate, ea + 8, (cpustate->fpu_opcode & 0x07ff) | ((cpustate->fpu_inst_ptr & 0x0f0000) >> 4)); +// WRITE16(cpustate, ea + 10, cpustate->fpu_data_ptr & 0xffff); +// WRITE16(cpustate, ea + 12, (cpustate->fpu_inst_ptr & 0x0f0000) >> 4); ea += 14; break; case 1: // 16-bit protected mode x87_write_cw(cpustate, READ16(cpustate, ea)); cpustate->x87_sw = READ16(cpustate, ea + 2); cpustate->x87_tw = READ16(cpustate, ea + 4); -// WRITE16(cpustate,ea + 6, cpustate->fpu_inst_ptr & 0xffff); -// WRITE16(cpustate,ea + 8, (cpustate->fpu_opcode & 0x07ff) | ((cpustate->fpu_inst_ptr & 0x0f0000) >> 4)); -// WRITE16(cpustate,ea + 10, cpustate->fpu_data_ptr & 0xffff); -// WRITE16(cpustate,ea + 12, (cpustate->fpu_inst_ptr & 0x0f0000) >> 4); +// WRITE16(cpustate,ea + 6, cpustate->fpu_inst_ptr & 0xffff); +// WRITE16(cpustate,ea + 8, (cpustate->fpu_opcode & 0x07ff) | ((cpustate->fpu_inst_ptr & 0x0f0000) >> 4)); +// WRITE16(cpustate,ea + 10, cpustate->fpu_data_ptr & 0xffff); +// WRITE16(cpustate,ea + 12, (cpustate->fpu_inst_ptr & 0x0f0000) >> 4); ea += 14; break; case 2: // 32-bit real mode x87_write_cw(cpustate, READ16(cpustate, ea)); cpustate->x87_sw = READ16(cpustate, ea + 4); cpustate->x87_tw = READ16(cpustate, ea + 8); -// WRITE16(cpustate, ea + 12, cpustate->fpu_inst_ptr & 0xffff); -// WRITE16(cpustate, ea + 8, (cpustate->fpu_opcode & 0x07ff) | ((cpustate->fpu_inst_ptr & 0x0f0000) >> 4)); -// WRITE16(cpustate, ea + 20, cpustate->fpu_data_ptr & 0xffff); -// WRITE16(cpustate, ea + 12, ((cpustate->fpu_inst_ptr & 0x0f0000) >> 4)); -// WRITE32(cpustate, ea + 24, (cpustate->fpu_data_ptr >> 16) << 12); +// WRITE16(cpustate, ea + 12, cpustate->fpu_inst_ptr & 0xffff); +// WRITE16(cpustate, ea + 8, (cpustate->fpu_opcode & 0x07ff) | ((cpustate->fpu_inst_ptr & 0x0f0000) >> 4)); +// WRITE16(cpustate, ea + 20, cpustate->fpu_data_ptr & 0xffff); +// WRITE16(cpustate, ea + 12, ((cpustate->fpu_inst_ptr & 0x0f0000) >> 4)); +// WRITE32(cpustate, ea + 24, (cpustate->fpu_data_ptr >> 16) << 12); ea += 28; break; case 3: // 32-bit protected mode x87_write_cw(cpustate, READ16(cpustate, ea)); cpustate->x87_sw = READ16(cpustate, ea + 4); cpustate->x87_tw = READ16(cpustate, ea + 8); -// WRITE32(cpustate, ea + 12, cpustate->fpu_inst_ptr); -// WRITE32(cpustate, ea + 16, cpustate->fpu_opcode); -// WRITE32(cpustate, ea + 20, cpustate->fpu_data_ptr); -// WRITE32(cpustate, ea + 24, cpustate->fpu_inst_ptr); +// WRITE32(cpustate, ea + 12, cpustate->fpu_inst_ptr); +// WRITE32(cpustate, ea + 16, cpustate->fpu_opcode); +// WRITE32(cpustate, ea + 20, cpustate->fpu_data_ptr); +// WRITE32(cpustate, ea + 24, cpustate->fpu_inst_ptr); ea += 28; break; } |
