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-rw-r--r--src/emu/cpu/arcompact/arcompact.c3
-rw-r--r--src/emu/cpu/arcompact/arcompact.h69
-rw-r--r--src/emu/cpu/arcompact/arcompact_common.c13
-rw-r--r--src/emu/cpu/arcompact/arcompact_execute.c384
-rw-r--r--src/emu/cpu/arcompact/arcompactdasm.c66
-rw-r--r--src/emu/cpu/arcompact/arcompactdasm_dispatch.c47
-rw-r--r--src/emu/cpu/arcompact/arcompactdasm_dispatch.h3
-rw-r--r--src/emu/cpu/arcompact/arcompactdasm_ops.c260
-rw-r--r--src/emu/cpu/arcompact/arcompactdasm_ops.h7
9 files changed, 394 insertions, 458 deletions
diff --git a/src/emu/cpu/arcompact/arcompact.c b/src/emu/cpu/arcompact/arcompact.c
index 4f229f7a291..5527830be1b 100644
--- a/src/emu/cpu/arcompact/arcompact.c
+++ b/src/emu/cpu/arcompact/arcompact.c
@@ -164,9 +164,8 @@ void arcompact_device::device_reset()
/*****************************************************************************/
-
+
void arcompact_device::execute_set_input(int irqline, int state)
{
-
}
diff --git a/src/emu/cpu/arcompact/arcompact.h b/src/emu/cpu/arcompact/arcompact.h
index 4bf491daf00..1b901fb6950 100644
--- a/src/emu/cpu/arcompact/arcompact.h
+++ b/src/emu/cpu/arcompact/arcompact.h
@@ -21,16 +21,15 @@
ARCOMPACT_RETTYPE arcompact_handle##name##_p11(OPS_32) \
{ \
int M = (op & 0x00000020) >> 5; \
- \
+ \
switch (M) \
{ \
case 0x00: return arcompact_handle##name##_p11_m0(PARAMS); \
case 0x01: return arcompact_handle##name##_p11_m1(PARAMS); \
} \
- \
+ \
return 0; \
-}; \
-
+};
#define ARCOMPACT_HANDLER04_TYPE(name) \
ARCOMPACT_RETTYPE arcompact_handle##name(OPS_32) \
{ \
@@ -45,8 +44,7 @@ ARCOMPACT_RETTYPE arcompact_handle##name(OPS_32) \
} \
\
return 0; \
-}; \
-
+};
#define ARCOMPACT_HANDLER04_TYPE_PM(name) \
ARCOMPACT_RETTYPE arcompact_handle##name##_p00(OPS_32); \
@@ -55,8 +53,7 @@ ARCOMPACT_RETTYPE arcompact_handle##name(OPS_32) \
ARCOMPACT_RETTYPE arcompact_handle##name##_p11_m0(OPS_32); \
ARCOMPACT_RETTYPE arcompact_handle##name##_p11_m1(OPS_32); \
ARCOMPACT_HANDLER04_P11_TYPE(name); \
- ARCOMPACT_HANDLER04_TYPE(name); \
-
+ ARCOMPACT_HANDLER04_TYPE(name);
class arcompact_device : public cpu_device
{
@@ -146,53 +143,53 @@ protected:
ARCOMPACT_RETTYPE arcompact_handle01_01_01_0f(OPS_32);
ARCOMPACT_RETTYPE arcompact_handle02(OPS_32);
ARCOMPACT_RETTYPE arcompact_handle03(OPS_32);
-// ARCOMPACT_RETTYPE arcompact_handle04_00(OPS_32);
+// ARCOMPACT_RETTYPE arcompact_handle04_00(OPS_32);
ARCOMPACT_RETTYPE arcompact_handle04_01(OPS_32);
-// ARCOMPACT_RETTYPE arcompact_handle04_02(OPS_32);
+// ARCOMPACT_RETTYPE arcompact_handle04_02(OPS_32);
ARCOMPACT_RETTYPE arcompact_handle04_03(OPS_32);
-// ARCOMPACT_RETTYPE arcompact_handle04_04(OPS_32);
-// ARCOMPACT_RETTYPE arcompact_handle04_05(OPS_32);
-// ARCOMPACT_RETTYPE arcompact_handle04_06(OPS_32);
-// ARCOMPACT_RETTYPE arcompact_handle04_07(OPS_32);
+// ARCOMPACT_RETTYPE arcompact_handle04_04(OPS_32);
+// ARCOMPACT_RETTYPE arcompact_handle04_05(OPS_32);
+// ARCOMPACT_RETTYPE arcompact_handle04_06(OPS_32);
+// ARCOMPACT_RETTYPE arcompact_handle04_07(OPS_32);
ARCOMPACT_RETTYPE arcompact_handle04_08(OPS_32);
ARCOMPACT_RETTYPE arcompact_handle04_09(OPS_32);
-// ARCOMPACT_RETTYPE arcompact_handle04_0a(OPS_32);
+// ARCOMPACT_RETTYPE arcompact_handle04_0a(OPS_32);
ARCOMPACT_RETTYPE arcompact_handle04_0b(OPS_32);
ARCOMPACT_RETTYPE arcompact_handle04_0c(OPS_32);
ARCOMPACT_RETTYPE arcompact_handle04_0d(OPS_32);
-// ARCOMPACT_RETTYPE arcompact_handle04_0e(OPS_32);
-// ARCOMPACT_RETTYPE arcompact_handle04_0f(OPS_32);
+// ARCOMPACT_RETTYPE arcompact_handle04_0e(OPS_32);
+// ARCOMPACT_RETTYPE arcompact_handle04_0f(OPS_32);
ARCOMPACT_RETTYPE arcompact_handle04_10(OPS_32);
ARCOMPACT_RETTYPE arcompact_handle04_11(OPS_32);
ARCOMPACT_RETTYPE arcompact_handle04_12(OPS_32);
-// ARCOMPACT_RETTYPE arcompact_handle04_13(OPS_32);
-// ARCOMPACT_RETTYPE arcompact_handle04_14(OPS_32);
-// ARCOMPACT_RETTYPE arcompact_handle04_15(OPS_32);
-// ARCOMPACT_RETTYPE arcompact_handle04_16(OPS_32);
-// ARCOMPACT_RETTYPE arcompact_handle04_17(OPS_32);
-// ARCOMPACT_RETTYPE arcompact_handle04_18(OPS_32);
-// ARCOMPACT_RETTYPE arcompact_handle04_19(OPS_32);
+// ARCOMPACT_RETTYPE arcompact_handle04_13(OPS_32);
+// ARCOMPACT_RETTYPE arcompact_handle04_14(OPS_32);
+// ARCOMPACT_RETTYPE arcompact_handle04_15(OPS_32);
+// ARCOMPACT_RETTYPE arcompact_handle04_16(OPS_32);
+// ARCOMPACT_RETTYPE arcompact_handle04_17(OPS_32);
+// ARCOMPACT_RETTYPE arcompact_handle04_18(OPS_32);
+// ARCOMPACT_RETTYPE arcompact_handle04_19(OPS_32);
ARCOMPACT_RETTYPE arcompact_handle04_1a(OPS_32);
ARCOMPACT_RETTYPE arcompact_handle04_1b(OPS_32);
ARCOMPACT_RETTYPE arcompact_handle04_1c(OPS_32);
ARCOMPACT_RETTYPE arcompact_handle04_1d(OPS_32);
-// ARCOMPACT_RETTYPE arcompact_handle04_20(OPS_32);
+// ARCOMPACT_RETTYPE arcompact_handle04_20(OPS_32);
ARCOMPACT_RETTYPE arcompact_handle04_21(OPS_32);
ARCOMPACT_RETTYPE arcompact_handle04_22(OPS_32);
ARCOMPACT_RETTYPE arcompact_handle04_23(OPS_32);
ARCOMPACT_RETTYPE arcompact_handle04_28(OPS_32);
ARCOMPACT_RETTYPE arcompact_handle04_29(OPS_32);
ARCOMPACT_RETTYPE arcompact_handle04_2a(OPS_32);
-// ARCOMPACT_RETTYPE arcompact_handle04_2b(OPS_32);
+// ARCOMPACT_RETTYPE arcompact_handle04_2b(OPS_32);
ARCOMPACT_RETTYPE arcompact_handle04_2f_00(OPS_32);
ARCOMPACT_RETTYPE arcompact_handle04_2f_01(OPS_32);
-// ARCOMPACT_RETTYPE arcompact_handle04_2f_02(OPS_32);
+// ARCOMPACT_RETTYPE arcompact_handle04_2f_02(OPS_32);
ARCOMPACT_RETTYPE arcompact_handle04_2f_03(OPS_32);
ARCOMPACT_RETTYPE arcompact_handle04_2f_04(OPS_32);
ARCOMPACT_RETTYPE arcompact_handle04_2f_05(OPS_32);
ARCOMPACT_RETTYPE arcompact_handle04_2f_06(OPS_32);
-// ARCOMPACT_RETTYPE arcompact_handle04_2f_07(OPS_32);
-// ARCOMPACT_RETTYPE arcompact_handle04_2f_08(OPS_32);
+// ARCOMPACT_RETTYPE arcompact_handle04_2f_07(OPS_32);
+// ARCOMPACT_RETTYPE arcompact_handle04_2f_08(OPS_32);
ARCOMPACT_RETTYPE arcompact_handle04_2f_09(OPS_32);
ARCOMPACT_RETTYPE arcompact_handle04_2f_0a(OPS_32);
ARCOMPACT_RETTYPE arcompact_handle04_2f_0b(OPS_32);
@@ -779,9 +776,9 @@ protected:
ARCOMPACT_HANDLER04_TYPE_PM(04_14);
ARCOMPACT_HANDLER04_TYPE_PM(04_15);
ARCOMPACT_HANDLER04_TYPE_PM(04_16);
- ARCOMPACT_HANDLER04_TYPE_PM(04_17);
+ ARCOMPACT_HANDLER04_TYPE_PM(04_17);
ARCOMPACT_HANDLER04_TYPE_PM(04_18);
- ARCOMPACT_HANDLER04_TYPE_PM(04_19);
+ ARCOMPACT_HANDLER04_TYPE_PM(04_19);
ARCOMPACT_HANDLER04_TYPE_PM(04_20);
ARCOMPACT_HANDLER04_TYPE_PM(04_2b);
@@ -811,10 +808,10 @@ private:
inline UINT32 READ32(UINT32 address) { return m_program->read_dword(address << 2); }
inline void WRITE32(UINT32 address, UINT32 data) { m_program->write_dword(address << 2, data); }
inline UINT16 READ16(UINT32 address) { return m_program->read_word(address << 1); }
- inline void WRITE16(UINT32 address, UINT16 data){ m_program->write_word(address << 1, data); }
+ inline void WRITE16(UINT32 address, UINT16 data){ m_program->write_word(address << 1, data); }
inline UINT8 READ8(UINT32 address) { return m_program->read_byte(address << 0); }
- inline void WRITE8(UINT32 address, UINT8 data){ m_program->write_byte(address << 0, data); }
-
+ inline void WRITE8(UINT32 address, UINT8 data){ m_program->write_byte(address << 0, data); }
+
inline UINT64 READAUX(UINT64 address) { return m_io->read_dword(address *4); }
inline void WRITEAUX(UINT64 address, UINT32 data) { m_io->write_dword(address *4, data); }
@@ -827,7 +824,7 @@ private:
int m_delaylinks;
UINT32 m_delayjump;
-// f e d c| b a 9 8| 7 6 5 4| 3 2 1 0
+// f e d c| b a 9 8| 7 6 5 4| 3 2 1 0
// - - - L| Z N C V| U DE AE A2|A1 E2 E1 H
UINT32 m_status32;
@@ -862,7 +859,7 @@ private:
#define STATUS32_CHECK_Z (m_status32 & Z_ZERO_FLAG)
// Condition 0x0c (LE)
-#define CONDITION_LE ((STATUS32_CHECK_Z) || (STATUS32_CHECK_N && !STATUS32_CHECK_V) || (!STATUS32_CHECK_N && STATUS32_CHECK_V)) // Z or (N and /V) or (/N and V)
+#define CONDITION_LE ((STATUS32_CHECK_Z) || (STATUS32_CHECK_N && !STATUS32_CHECK_V) || (!STATUS32_CHECK_N && STATUS32_CHECK_V)) // Z or (N and /V) or (/N and V)
#define CONDITION_EQ (STATUS32_CHECK_Z)
#define CONDITION_CS (STATUS32_CHECK_C)
#define CONDITION_LT ((STATUS32_CHECK_N && !STATUS32_CHECK_V) || (!STATUS32_CHECK_N && STATUS32_CHECK_V))
diff --git a/src/emu/cpu/arcompact/arcompact_common.c b/src/emu/cpu/arcompact/arcompact_common.c
index c2c12208b1e..b03f27e19ff 100644
--- a/src/emu/cpu/arcompact/arcompact_common.c
+++ b/src/emu/cpu/arcompact/arcompact_common.c
@@ -4,7 +4,7 @@
\*********************************/
-// condition codes (basic ones are the same as arc
+// condition codes (basic ones are the same as arc
const char *conditions[0x20] =
{
/* 00 */ "AL", // (aka RA - Always)
@@ -13,7 +13,7 @@ const char *conditions[0x20] =
/* 03 */ "PL", // (aka P - Positive)
/* 04 */ "MI", // (aka N - Negative)
/* 05 */ "CS", // (aka C, LO - Carry set / Lower than) (unsigned)
- /* 06 */ "CC", // (aka CC, NC, HS - Carry Clear / Higher or Same) (unsigned)
+ /* 06 */ "CC", // (aka CC, NC, HS - Carry Clear / Higher or Same) (unsigned)
/* 07 */ "VS", // (aka V - Overflow set)
/* 08 */ "VC", // (aka NV - Overflow clear)
/* 09 */ "GT", // ( - Greater than) (signed)
@@ -44,7 +44,7 @@ const char *conditions[0x20] =
#define UNUSED_REG "unusedreg"
#define AUX_UNUSED_16 \
- /* 0xxx0 */ UNUSED_REG, /* 0xxx1 */ UNUSED_REG, /* 0xxx2 */ UNUSED_REG, /* 0xxx3 */ UNUSED_REG, /* 0xxx4 */ UNUSED_REG, /* 0xxx5 */ UNUSED_REG, /* 0xxx6 */ UNUSED_REG, /* 0xxx7 */ UNUSED_REG, /* 0xxx8 */ UNUSED_REG, /* 0xxx9 */ UNUSED_REG, /* 0xxxa */ UNUSED_REG, /* 0xxxb */ UNUSED_REG, /* 0xxxc */ UNUSED_REG, /* 0xxxd */ UNUSED_REG, /* 0xxxe */ UNUSED_REG, /* 0xxxf */ UNUSED_REG,
+ /* 0xxx0 */ UNUSED_REG, /* 0xxx1 */ UNUSED_REG, /* 0xxx2 */ UNUSED_REG, /* 0xxx3 */ UNUSED_REG, /* 0xxx4 */ UNUSED_REG, /* 0xxx5 */ UNUSED_REG, /* 0xxx6 */ UNUSED_REG, /* 0xxx7 */ UNUSED_REG, /* 0xxx8 */ UNUSED_REG, /* 0xxx9 */ UNUSED_REG, /* 0xxxa */ UNUSED_REG, /* 0xxxb */ UNUSED_REG, /* 0xxxc */ UNUSED_REG, /* 0xxxd */ UNUSED_REG, /* 0xxxe */ UNUSED_REG, /* 0xxxf */ UNUSED_REG,
// the Auxiliary Register set is actually a 2^32 dword address space (so 16 GB / 34-bit)
// this table just allows us to improve the debugger display for some of the common core / internal ones
@@ -125,7 +125,7 @@ const char *auxregnames[0x420] =
AUX_UNUSED_16 /* 0x090 - 0x09f */
AUX_UNUSED_16 /* 0x0a0 - 0x0af */
AUX_UNUSED_16 /* 0x0b0 - 0x0bf */
- // build configuration registers 0x0c0 - 0x0ff
+ // build configuration registers 0x0c0 - 0x0ff
/* 0x0c0 */ "RESERVED AUX 0xc0",/* 0x0c1 */ "RESERVED AUX 0xc1",/* 0x0c2 */ "RESERVED AUX 0xc2",/* 0x0c3 */ "RESERVED AUX 0xc3",/* 0x0c4 */ "RESERVED AUX 0xc4",/* 0x0c5 */ "RESERVED AUX 0xc5",/* 0x0c6 */ "RESERVED AUX 0xc6",/* 0x0c7 */ "RESERVED AUX 0xc7",/* 0x0c8 */ "RESERVED AUX 0xc8",/* 0x0c9 */ "RESERVED AUX 0xc9",/* 0x0ca */ "RESERVED AUX 0xca",/* 0x0cb */ "RESERVED AUX 0xcb",/* 0x0cc */ "RESERVED AUX 0xcc",/* 0x0cd */ "RESERVED AUX 0xcd",/* 0x0ce */ "RESERVED AUX 0xce",/* 0x0cf */ "RESERVED AUX 0xcf",
/* 0x0d0 */ "RESERVED AUX 0xd0",/* 0x0d1 */ "RESERVED AUX 0xd1",/* 0x0d2 */ "RESERVED AUX 0xd2",/* 0x0d3 */ "RESERVED AUX 0xd3",/* 0x0d4 */ "RESERVED AUX 0xd4",/* 0x0d5 */ "RESERVED AUX 0xd5",/* 0x0d6 */ "RESERVED AUX 0xd6",/* 0x0d7 */ "RESERVED AUX 0xd7",/* 0x0d8 */ "RESERVED AUX 0xd8",/* 0x0d9 */ "RESERVED AUX 0xd9",/* 0x0da */ "RESERVED AUX 0xda",/* 0x0db */ "RESERVED AUX 0xdb",/* 0x0dc */ "RESERVED AUX 0xdc",/* 0x0dd */ "RESERVED AUX 0xdd",/* 0x0de */ "RESERVED AUX 0xde",/* 0x0df */ "RESERVED AUX 0xdf",
/* 0x0e0 */ "RESERVED AUX 0xe0",/* 0x0e1 */ "RESERVED AUX 0xe1",/* 0x0e2 */ "RESERVED AUX 0xe2",/* 0x0e3 */ "RESERVED AUX 0xe3",/* 0x0e4 */ "RESERVED AUX 0xe4",/* 0x0e5 */ "RESERVED AUX 0xe5",/* 0x0e6 */ "RESERVED AUX 0xe6",/* 0x0e7 */ "RESERVED AUX 0xe7",/* 0x0e8 */ "RESERVED AUX 0xe8",/* 0x0e9 */ "RESERVED AUX 0xe9",/* 0x0ea */ "RESERVED AUX 0xea",/* 0x0eb */ "RESERVED AUX 0xeb",/* 0x0ec */ "RESERVED AUX 0xec",/* 0x0ed */ "RESERVED AUX 0xed",/* 0x0ee */ "RESERVED AUX 0xee",/* 0x0ef */ "RESERVED AUX 0xef",
@@ -371,8 +371,8 @@ const char *regnames[0x40] =
/* 37 */ "r55(ext)",
/* 38 */ "r56(ext)",
/* 39 */ "r57(M-LO)", // MLO (result registers for optional multply functions)
- /* 3a */ "r58(M-MID)", // MMID
- /* 3b */ "r59(M-HI)", // MHI
+ /* 3a */ "r58(M-MID)", // MMID
+ /* 3b */ "r59(M-HI)", // MHI
/* 3c */ "r60(LP_COUNT)",
/* 3d */ "r61(reserved)",
/* 3e */ "r62(LIMM)", // use Long Immediate Data instead of register
@@ -523,4 +523,3 @@ const char *opcodes_04[0x40] =
/* 3e */ "0x3e",
/* 3f */ "0x3f",
};
-
diff --git a/src/emu/cpu/arcompact/arcompact_execute.c b/src/emu/cpu/arcompact/arcompact_execute.c
index 8e79c587ba1..27deef265c2 100644
--- a/src/emu/cpu/arcompact/arcompact_execute.c
+++ b/src/emu/cpu/arcompact/arcompact_execute.c
@@ -19,7 +19,7 @@ void arcompact_device::execute_run()
{
debugger_instruction_hook(this, m_pc);
-// printf("new pc %04x\n", m_pc);
+// printf("new pc %04x\n", m_pc);
if (m_delayactive)
{
@@ -56,86 +56,65 @@ void arcompact_device::execute_run()
#define GET_01_01_01_BRANCH_ADDR \
INT32 address = (op & 0x00fe0000) >> 17; \
address |= ((op & 0x00008000) >> 15) << 7; \
- if (address & 0x80) address = -0x80 + (address & 0x7f); \
-
+ if (address & 0x80) address = -0x80 + (address & 0x7f);
#define GROUP_0e_GET_h \
h = ((op & 0x0007) << 3); \
- h |= ((op & 0x00e0) >> 5); \
-
+ h |= ((op & 0x00e0) >> 5);
#define COMMON32_GET_breg \
int b_temp = (op & 0x07000000) >> 24; \
int B_temp = (op & 0x00007000) >> 12; \
- int breg = b_temp | (B_temp << 3); \
-
+ int breg = b_temp | (B_temp << 3);
#define COMMON32_GET_creg \
- int creg = (op & 0x00000fc0) >> 6; \
-
+ int creg = (op & 0x00000fc0) >> 6;
#define COMMON32_GET_u6 \
- int u = (op & 0x00000fc0) >> 6; \
-
+ int u = (op & 0x00000fc0) >> 6;
#define COMMON32_GET_areg \
- int areg = (op & 0x0000003f) >> 0; \
-
+ int areg = (op & 0x0000003f) >> 0;
#define COMMON32_GET_areg_reserved \
- int ares = (op & 0x0000003f) >> 0; \
-
+ int ares = (op & 0x0000003f) >> 0;
#define COMMON32_GET_F \
- int F = (op & 0x00008000) >> 15; \
-
+ int F = (op & 0x00008000) >> 15;
#define COMMON32_GET_p \
- int p = (op & 0x00c00000) >> 22; \
-
+ int p = (op & 0x00c00000) >> 22;
#define COMMON32_GET_s12 \
int S_temp = (op & 0x0000003f) >> 0; \
int s_temp = (op & 0x00000fc0) >> 6; \
INT32 S = s_temp | (S_temp<<6); \
- if (S & 0x800) S = -0x800 + (S&0x7ff); /* sign extend */ \
-
+ if (S & 0x800) S = -0x800 + (S&0x7ff); /* sign extend */
#define COMMON32_GET_CONDITION \
UINT8 condition = op & 0x0000001f;
#define COMMON16_GET_breg \
- breg = ((op & 0x0700) >>8); \
-
+ breg = ((op & 0x0700) >>8);
#define COMMON16_GET_creg \
- creg = ((op & 0x00e0) >>5); \
-
+ creg = ((op & 0x00e0) >>5);
#define COMMON16_GET_areg \
- areg = ((op & 0x0007) >>0); \
-
+ areg = ((op & 0x0007) >>0);
#define COMMON16_GET_u3 \
- u = ((op & 0x0007) >>0); \
-
+ u = ((op & 0x0007) >>0);
#define COMMON16_GET_u5 \
- u = ((op & 0x001f) >>0); \
-
+ u = ((op & 0x001f) >>0);
#define COMMON16_GET_u8 \
- u = ((op & 0x00ff) >>0); \
-
+ u = ((op & 0x00ff) >>0);
#define COMMON16_GET_u7 \
- u = ((op & 0x007f) >>0); \
-
+ u = ((op & 0x007f) >>0);
#define COMMON16_GET_s9 \
- s = ((op & 0x01ff) >>0); \
-
+ s = ((op & 0x01ff) >>0);
// registers used in 16-bit opcodes hae a limited range
// and can only address registers r0-r3 and r12-r15
#define REG_16BIT_RANGE(_reg_) \
- if (_reg_>3) _reg_+= 8; \
-
+ if (_reg_>3) _reg_+= 8;
#define GET_LIMM_32 \
limm = (READ16((m_pc + 4) >> 1) << 16); \
- limm |= READ16((m_pc + 6) >> 1); \
-
+ limm |= READ16((m_pc + 6) >> 1);
#define GET_LIMM_16 \
limm = (READ16((m_pc + 2) >> 1) << 16); \
- limm |= READ16((m_pc + 4) >> 1); \
-
+ limm |= READ16((m_pc + 4) >> 1);
#define PC_ALIGNED32 \
(m_pc&0xfffffffc)
@@ -178,7 +157,7 @@ int arcompact_device::check_condition(UINT8 condition)
case 0x1f: fatalerror("unhandled condition check %s", conditions[condition]); return -1;
}
- return -1;
+ return -1;
}
@@ -194,44 +173,44 @@ ARCOMPACT_RETTYPE arcompact_device::get_insruction(OPS_32)
switch (instruction) // 32-bit instructions (with optional extra dword for immediate data)
{
- case 0x00: return arcompact_handle00(PARAMS); // Bcc
- case 0x01: return arcompact_handle01(PARAMS); // BLcc/BRcc
- case 0x02: return arcompact_handle02(PARAMS); // LD r+o
- case 0x03: return arcompact_handle03(PARAMS); // ST r+o
- case 0x04: return arcompact_handle04(PARAMS); // op a,b,c (basecase)
- case 0x05: return arcompact_handle05(PARAMS); // op a,b,c (05 ARC ext)
- case 0x06: return arcompact_handle06(PARAMS); // op a,b,c (06 ARC ext)
- case 0x07: return arcompact_handle07(PARAMS); // op a,b,c (07 User ext)
- case 0x08: return arcompact_handle08(PARAMS); // op a,b,c (08 User ext)
- case 0x09: return arcompact_handle09(PARAMS); // op a,b,c (09 Market ext)
- case 0x0a: return arcompact_handle0a(PARAMS); // op a,b,c (0a Market ext)
- case 0x0b: return arcompact_handle0b(PARAMS); // op a,b,c (0b Market ext)
+ case 0x00: return arcompact_handle00(PARAMS); // Bcc
+ case 0x01: return arcompact_handle01(PARAMS); // BLcc/BRcc
+ case 0x02: return arcompact_handle02(PARAMS); // LD r+o
+ case 0x03: return arcompact_handle03(PARAMS); // ST r+o
+ case 0x04: return arcompact_handle04(PARAMS); // op a,b,c (basecase)
+ case 0x05: return arcompact_handle05(PARAMS); // op a,b,c (05 ARC ext)
+ case 0x06: return arcompact_handle06(PARAMS); // op a,b,c (06 ARC ext)
+ case 0x07: return arcompact_handle07(PARAMS); // op a,b,c (07 User ext)
+ case 0x08: return arcompact_handle08(PARAMS); // op a,b,c (08 User ext)
+ case 0x09: return arcompact_handle09(PARAMS); // op a,b,c (09 Market ext)
+ case 0x0a: return arcompact_handle0a(PARAMS); // op a,b,c (0a Market ext)
+ case 0x0b: return arcompact_handle0b(PARAMS); // op a,b,c (0b Market ext)
}
}
else
{
switch (instruction) // 16-bit instructions
{
- case 0x0c: return arcompact_handle0c(PARAMS); // Load/Add reg-reg
- case 0x0d: return arcompact_handle0d(PARAMS); // Add/Sub/Shft imm
- case 0x0e: return arcompact_handle0e(PARAMS); // Mov/Cmp/Add
- case 0x0f: return arcompact_handle0f(PARAMS); // op_S b,b,c (single 16-bit ops)
- case 0x10: return arcompact_handle10(PARAMS); // LD_S
- case 0x11: return arcompact_handle11(PARAMS); // LDB_S
- case 0x12: return arcompact_handle12(PARAMS); // LDW_S
- case 0x13: return arcompact_handle13(PARAMS); // LSW_S.X
- case 0x14: return arcompact_handle14(PARAMS); // ST_S
- case 0x15: return arcompact_handle15(PARAMS); // STB_S
- case 0x16: return arcompact_handle16(PARAMS); // STW_S
- case 0x17: return arcompact_handle17(PARAMS); // Shift/Sub/Bit
- case 0x18: return arcompact_handle18(PARAMS); // Stack Instr
- case 0x19: return arcompact_handle19(PARAMS); // GP Instr
- case 0x1a: return arcompact_handle1a(PARAMS); // PCL Instr
- case 0x1b: return arcompact_handle1b(PARAMS); // MOV_S
- case 0x1c: return arcompact_handle1c(PARAMS); // ADD_S/CMP_S
- case 0x1d: return arcompact_handle1d(PARAMS); // BRcc_S
- case 0x1e: return arcompact_handle1e(PARAMS); // Bcc_S
- case 0x1f: return arcompact_handle1f(PARAMS); // BL_S
+ case 0x0c: return arcompact_handle0c(PARAMS); // Load/Add reg-reg
+ case 0x0d: return arcompact_handle0d(PARAMS); // Add/Sub/Shft imm
+ case 0x0e: return arcompact_handle0e(PARAMS); // Mov/Cmp/Add
+ case 0x0f: return arcompact_handle0f(PARAMS); // op_S b,b,c (single 16-bit ops)
+ case 0x10: return arcompact_handle10(PARAMS); // LD_S
+ case 0x11: return arcompact_handle11(PARAMS); // LDB_S
+ case 0x12: return arcompact_handle12(PARAMS); // LDW_S
+ case 0x13: return arcompact_handle13(PARAMS); // LSW_S.X
+ case 0x14: return arcompact_handle14(PARAMS); // ST_S
+ case 0x15: return arcompact_handle15(PARAMS); // STB_S
+ case 0x16: return arcompact_handle16(PARAMS); // STW_S
+ case 0x17: return arcompact_handle17(PARAMS); // Shift/Sub/Bit
+ case 0x18: return arcompact_handle18(PARAMS); // Stack Instr
+ case 0x19: return arcompact_handle19(PARAMS); // GP Instr
+ case 0x1a: return arcompact_handle1a(PARAMS); // PCL Instr
+ case 0x1b: return arcompact_handle1b(PARAMS); // MOV_S
+ case 0x1c: return arcompact_handle1c(PARAMS); // ADD_S/CMP_S
+ case 0x1d: return arcompact_handle1d(PARAMS); // BRcc_S
+ case 0x1e: return arcompact_handle1e(PARAMS); // Bcc_S
+ case 0x1f: return arcompact_handle1f(PARAMS); // BL_S
}
}
@@ -501,15 +480,15 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f(OPS_32)
switch (subinstr2)
{
- case 0x00: return arcompact_handle05_2f_00(PARAMS); // SWAP
- case 0x01: return arcompact_handle05_2f_01(PARAMS); // NORM
+ case 0x00: return arcompact_handle05_2f_00(PARAMS); // SWAP
+ case 0x01: return arcompact_handle05_2f_01(PARAMS); // NORM
case 0x02: return arcompact_handle05_2f_02(PARAMS); // SAT16
- case 0x03: return arcompact_handle05_2f_03(PARAMS); // RND16
- case 0x04: return arcompact_handle05_2f_04(PARAMS); // ABSSW
- case 0x05: return arcompact_handle05_2f_05(PARAMS); // ABSS
- case 0x06: return arcompact_handle05_2f_06(PARAMS); // NEGSW
- case 0x07: return arcompact_handle05_2f_07(PARAMS); // NEGS
- case 0x08: return arcompact_handle05_2f_08(PARAMS); // NORMW
+ case 0x03: return arcompact_handle05_2f_03(PARAMS); // RND16
+ case 0x04: return arcompact_handle05_2f_04(PARAMS); // ABSSW
+ case 0x05: return arcompact_handle05_2f_05(PARAMS); // ABSS
+ case 0x06: return arcompact_handle05_2f_06(PARAMS); // NEGSW
+ case 0x07: return arcompact_handle05_2f_07(PARAMS); // NEGS
+ case 0x08: return arcompact_handle05_2f_08(PARAMS); // NORMW
case 0x09: return arcompact_handle05_2f_09(PARAMS); // illegal
case 0x0a: return arcompact_handle05_2f_0a(PARAMS); // illegal
case 0x0b: return arcompact_handle05_2f_0b(PARAMS); // illegal
@@ -935,13 +914,13 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle17(OPS_16)
switch (subinstr)
{
- case 0x00: return arcompact_handle17_00(PARAMS); // ASL_S
- case 0x01: return arcompact_handle17_01(PARAMS); // LSR_S
+ case 0x00: return arcompact_handle17_00(PARAMS); // ASL_S
+ case 0x01: return arcompact_handle17_01(PARAMS); // LSR_S
case 0x02: return arcompact_handle17_02(PARAMS); // ASR_S
- case 0x03: return arcompact_handle17_03(PARAMS); // SUB_S
- case 0x04: return arcompact_handle17_04(PARAMS); // BSET_S
- case 0x05: return arcompact_handle17_05(PARAMS); // BCLR_S
- case 0x06: return arcompact_handle17_06(PARAMS); // BMSK_S
+ case 0x03: return arcompact_handle17_03(PARAMS); // SUB_S
+ case 0x04: return arcompact_handle17_04(PARAMS); // BSET_S
+ case 0x05: return arcompact_handle17_05(PARAMS); // BCLR_S
+ case 0x06: return arcompact_handle17_06(PARAMS); // BMSK_S
case 0x07: return arcompact_handle17_07(PARAMS); // BTST_S
}
@@ -967,7 +946,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18(OPS_16)
return 0;
}
-ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_05(OPS_16)
+ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_05(OPS_16)
{
UINT8 subinstr2 = (op & 0x0700) >> 8;
@@ -975,7 +954,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_05(OPS_16)
{
case 0x00: return arcompact_handle18_05_00(PARAMS); // ADD_S (SP)
case 0x01: return arcompact_handle18_05_01(PARAMS); // SUB_S (SP)
- case 0x02: return arcompact_handle18_05_02(PARAMS); // <illegal 0x18_05_02>
+ case 0x02: return arcompact_handle18_05_02(PARAMS); // <illegal 0x18_05_02>
case 0x03: return arcompact_handle18_05_03(PARAMS); // <illegal 0x18_05_03>
case 0x04: return arcompact_handle18_05_04(PARAMS); // <illegal 0x18_05_04>
case 0x05: return arcompact_handle18_05_05(PARAMS); // <illegal 0x18_05_05>
@@ -986,7 +965,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_05(OPS_16)
return 0;
}
-ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_06(OPS_16)
+ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_06(OPS_16)
{
UINT8 subinstr2 = (op & 0x001f) >> 0;
@@ -1029,7 +1008,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_06(OPS_16)
return 0;
}
-ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_07(OPS_16)
+ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_07(OPS_16)
{
UINT8 subinstr2 = (op & 0x001f) >> 0;
@@ -1135,13 +1114,13 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle1e_03(OPS_16)
switch (subinstr2)
{
case 0x00: return arcompact_handle1e_03_00(PARAMS); // BGT_S
- case 0x01: return arcompact_handle1e_03_01(PARAMS); // BGE_S
+ case 0x01: return arcompact_handle1e_03_01(PARAMS); // BGE_S
case 0x02: return arcompact_handle1e_03_02(PARAMS); // BLT_S
case 0x03: return arcompact_handle1e_03_03(PARAMS); // BLE_S
case 0x04: return arcompact_handle1e_03_04(PARAMS); // BHI_S
case 0x05: return arcompact_handle1e_03_05(PARAMS); // BHS_S
case 0x06: return arcompact_handle1e_03_06(PARAMS); // BLO_S
- case 0x07: return arcompact_handle1e_03_07(PARAMS); // BLS_S
+ case 0x07: return arcompact_handle1e_03_07(PARAMS); // BLS_S
}
return 0;
@@ -1177,7 +1156,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle00_00(OPS_32)
}
else
{
- // m_regs[REG_BLINK] = m_pc + (size >> 0); // don't link
+ // m_regs[REG_BLINK] = m_pc + (size >> 0); // don't link
return realaddress;
}
@@ -1194,7 +1173,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle00_01(OPS_32)
address |= ((op & 0x0000000f) >> 0) << 20;
if (address & 0x800000) address = -0x800000 + (address & 0x7fffff);
int n = (op & 0x00000020) >> 5; op &= ~0x00000020;
-// int res = (op & 0x00000010) >> 4; op &= ~0x00000010; // should be set to 0
+// int res = (op & 0x00000010) >> 4; op &= ~0x00000010; // should be set to 0
UINT32 realaddress = PC_ALIGNED32 + (address * 2);
@@ -1206,7 +1185,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle00_01(OPS_32)
}
else
{
- // m_regs[REG_BLINK] = m_pc + (size >> 0); // don't link
+ // m_regs[REG_BLINK] = m_pc + (size >> 0); // don't link
return realaddress;
}
@@ -1234,9 +1213,9 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle01_00_01dasm(OPS_32)
INT32 address = (op & 0x07fc0000) >> 17;
address |= ((op & 0x0000ffc0) >> 6) << 10;
address |= ((op & 0x0000000f) >> 0) << 20;
- if (address & 0x800000) address = -0x800000 + (address&0x7fffff);
+ if (address & 0x800000) address = -0x800000 + (address&0x7fffff);
int n = (op & 0x00000020) >> 5; op &= ~0x00000020;
-// int res = (op & 0x00000010) >> 4; op &= ~0x00000010;
+// int res = (op & 0x00000010) >> 4; op &= ~0x00000010;
UINT32 realaddress = PC_ALIGNED32 + (address * 2);
@@ -1271,7 +1250,6 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_01_01_00_helper(OPS_32, const char
if ((breg != LIMM_REG) && (creg != LIMM_REG))
{
-
}
else
{
@@ -1305,22 +1283,21 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_01_01_00_helper(OPS_32, const char
UINT32 limm; \
GET_LIMM_32; \
size = 8; \
- \
+ \
if (breg == LIMM_REG) \
b = limm; \
else \
b = m_regs[breg]; \
- \
+ \
if (creg == LIMM_REG) \
c = limm; \
else \
c = m_regs[creg]; \
- } \
-
+ }
#define BR_TAKEJUMP \
/* take jump */ \
UINT32 realaddress = PC_ALIGNED32 + (address * 2); \
- \
+ \
if (n) \
{ \
m_delayactive = 1; \
@@ -1330,8 +1307,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_01_01_00_helper(OPS_32, const char
else \
{ \
return realaddress; \
- } \
-
+ }
ARCOMPACT_RETTYPE arcompact_device::arcompact_handle01_01_00_00(OPS_32) // register - register BREQ
@@ -1343,7 +1319,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle01_01_00_00(OPS_32) // regi
{
BR_TAKEJUMP
}
-
+
return m_pc + (size>>0);
}
@@ -1356,7 +1332,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle01_01_00_01(OPS_32) // regis
{
BR_TAKEJUMP
}
-
+
return m_pc + (size>>0);
}
@@ -1369,20 +1345,20 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle01_01_00_02(OPS_32) // regit
{
BR_TAKEJUMP
}
-
+
return m_pc + (size>>0);
}
-ARCOMPACT_RETTYPE arcompact_device::arcompact_handle01_01_00_03(OPS_32) // register - register BRGE
+ARCOMPACT_RETTYPE arcompact_device::arcompact_handle01_01_00_03(OPS_32) // register - register BRGE
{
BR_REGREG_SETUP
-
+
// BRGE (signed operation)
if ((INT32)b >= (INT32)c)
{
BR_TAKEJUMP
}
-
+
return m_pc + (size>>0);
}
@@ -1395,7 +1371,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle01_01_00_04(OPS_32) // regis
{
BR_TAKEJUMP
}
-
+
return m_pc + (size>>0);
}
@@ -1409,7 +1385,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle01_01_00_05(OPS_32) // regis
{
BR_TAKEJUMP
}
-
+
return m_pc + (size>>0);
}
@@ -1443,33 +1419,32 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_01_01_01_helper(OPS_32, const char
GET_LIMM_32; \
size = 8; \
b = limm; \
- } \
-
+ }
// register -immediate cases
ARCOMPACT_RETTYPE arcompact_device::arcompact_handle01_01_01_00(OPS_32) // BREQ reg-imm
{
BR_REGIMM_SETUP
-
+
// BREQ
if (b == c)
{
BR_TAKEJUMP
}
-
+
return m_pc + (size>>0);
}
ARCOMPACT_RETTYPE arcompact_device::arcompact_handle01_01_01_01(OPS_32) // BRNE reg-imm
{
BR_REGIMM_SETUP
-
+
// BRNE
if (b != c)
{
BR_TAKEJUMP
}
-
+
return m_pc + (size>>0);
}
@@ -1478,26 +1453,26 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle01_01_01_01(OPS_32) // BRNE
ARCOMPACT_RETTYPE arcompact_device::arcompact_handle01_01_01_02(OPS_32) // BRLT reg-imm
{
BR_REGIMM_SETUP
-
+
// BRLT (signed operation)
if ((INT32)b < (INT32)c)
{
BR_TAKEJUMP
}
-
+
return m_pc + (size>>0);
}
ARCOMPACT_RETTYPE arcompact_device::arcompact_handle01_01_01_03(OPS_32)
{
BR_REGIMM_SETUP
-
+
// BRGE (signed operation)
if ((INT32)b >= (INT32)c)
{
BR_TAKEJUMP
}
-
+
return m_pc + (size>>0);
}
@@ -1510,7 +1485,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle01_01_01_04(OPS_32) // regi
{
BR_TAKEJUMP
}
-
+
return m_pc + (size>>0);
}
@@ -1524,7 +1499,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle01_01_01_05(OPS_32) // regis
{
BR_TAKEJUMP
}
-
+
return m_pc + (size>>0);
}
@@ -1547,7 +1522,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle02(OPS_32)
int X = (op & 0x00000040) >> 6; //op &= ~0x00000040;
int Z = (op & 0x00000180) >> 7; //op &= ~0x00000180;
int a = (op & 0x00000600) >> 9; //op &= ~0x00000600;
-// int D = (op & 0x00000800) >> 11;// op &= ~0x00000800; // we don't use the data cache currently
+// int D = (op & 0x00000800) >> 11;// op &= ~0x00000800; // we don't use the data cache currently
UINT32 address = m_regs[breg];
@@ -1635,18 +1610,18 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle03(OPS_32)
{
int size = 4;
UINT32 limm = 0;
- int got_limm = 0;
+ int got_limm = 0;
int S = (op & 0x00008000) >> 15;
int s = (op & 0x00ff0000) >> 16;
if (S) s = -0x100 + s;
COMMON32_GET_breg;
COMMON32_GET_creg;
-
-// int R = (op & 0x00000001) >> 0; // bit 0 is reserved
- int Z = (op & 0x00000006) >> 1;
- int a = (op & 0x00000018) >> 3;
-// int D = (op & 0x00000020) >> 5; // we don't use the data cache currently
+
+// int R = (op & 0x00000001) >> 0; // bit 0 is reserved
+ int Z = (op & 0x00000006) >> 1;
+ int a = (op & 0x00000018) >> 3;
+// int D = (op & 0x00000020) >> 5; // we don't use the data cache currently
UINT32 address = m_regs[breg];
@@ -1738,7 +1713,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_helper(OPS_32, const char
COMMON32_GET_p;
COMMON32_GET_breg;
-
+
if (!b_reserved)
{
if (breg == LIMM_REG)
@@ -1813,24 +1788,24 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_helper(OPS_32, const char
#include "cpu/arcompact/arcompact.inc"
-ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_01(OPS_32)
-{
+ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_01(OPS_32)
+{
return arcompact_handle04_helper(PARAMS, opcodes_04[0x01], /*"ADC"*/ 0,0);
}
-ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_03(OPS_32)
+ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_03(OPS_32)
{
return arcompact_handle04_helper(PARAMS, opcodes_04[0x03], /*"SBC"*/ 0,0);
}
-ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_08(OPS_32)
+ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_08(OPS_32)
{
return arcompact_handle04_helper(PARAMS, opcodes_04[0x08], /*"MAX"*/ 0,0);
}
-ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_09(OPS_32)
+ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_09(OPS_32)
{
return arcompact_handle04_helper(PARAMS, opcodes_04[0x09], /*"MIN"*/ 0,0);
}
@@ -1848,24 +1823,24 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_0c(OPS_32)
}
ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_0d(OPS_32)
-{
+{
return arcompact_handle04_helper(PARAMS, opcodes_04[0x0d], /*"RCMP"*/ 1,0);
}
-ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_10(OPS_32)
-{
+ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_10(OPS_32)
+{
return arcompact_handle04_helper(PARAMS, opcodes_04[0x10], /*"BCLR"*/ 0,0);
}
-ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_11(OPS_32)
-{
+ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_11(OPS_32)
+{
return arcompact_handle04_helper(PARAMS, opcodes_04[0x11], /*"BTST"*/ 0,0);
}
-ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_12(OPS_32)
-{
+ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_12(OPS_32)
+{
return arcompact_handle04_helper(PARAMS, opcodes_04[0x12], /*"BXOR"*/ 0,0);
}
@@ -1874,23 +1849,23 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_12(OPS_32)
-ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_1a(OPS_32)
-{
+ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_1a(OPS_32)
+{
return arcompact_handle04_helper(PARAMS, opcodes_04[0x1a], /*"MPY"*/ 0,0);
} // *
-ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_1b(OPS_32)
-{
+ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_1b(OPS_32)
+{
return arcompact_handle04_helper(PARAMS, opcodes_04[0x1b], /*"MPYH"*/ 0,0);
} // *
-ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_1c(OPS_32)
-{
+ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_1c(OPS_32)
+{
return arcompact_handle04_helper(PARAMS, opcodes_04[0x1c], /*"MPYHU"*/ 0,0);
} // *
-ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_1d(OPS_32)
-{
+ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_1d(OPS_32)
+{
return arcompact_handle04_helper(PARAMS, opcodes_04[0x1d], /*"MPYU"*/ 0,0);
} // *
@@ -1903,7 +1878,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_20_p00(OPS_32)
COMMON32_GET_creg
COMMON32_GET_F
- if (creg == LIMM_REG)
+ if (creg == LIMM_REG)
{
// opcode iiii i--- ppII IIII F--- CCCC CC-- ----
// J limm 0010 0RRR 0010 0000 0RRR 1111 10RR RRRR [LIMM] (creg = LIMM)
@@ -1945,7 +1920,6 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_20_p00(OPS_32)
}
else
{
-
return m_regs[creg];
}
}
@@ -2003,7 +1977,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_20_p11_m0(OPS_32) // Jcc
// opcode iiii i--- ppII IIII F--- cccc ccmq qqqq
// Jcc [c] 0010 0RRR 1110 0000 0RRR CCCC CC0Q QQQQ
// no conditional links to ILINK1, ILINK2?
-
+
c = m_regs[creg];
}
@@ -2026,7 +2000,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_20_p11_m0(OPS_32) // Jcc
}
if (F)
- {
+ {
// if F is set then the destination MUST be ILINK1 or ILINK2
if ((creg == REG_ILINK1) || (creg == REG_ILINK1))
@@ -2037,7 +2011,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_20_p11_m0(OPS_32) // Jcc
{
arcompact_fatal ("fatal arcompact_handle04_20_p11_m0 J %08x (F set but not ILINK1 or ILINK2 used as dst)", op);
- }
+ }
}
@@ -2076,7 +2050,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_23(OPS_32)
ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_28(OPS_32) // LPcc (loop setup)
{
int size = 4;
-// COMMON32_GET_breg; // breg is reserved
+// COMMON32_GET_breg; // breg is reserved
COMMON32_GET_p;
if (p == 0x00)
@@ -2099,7 +2073,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_28(OPS_32) // LPcc (loop
COMMON32_GET_u6
COMMON32_GET_CONDITION
//arcompact_fatal("Lp conditional %s not supported %d", conditions[condition], u);
-
+
// if the loop condition fails then just jump to after the end of the loop, don't set any registers
if (!check_condition(condition))
{
@@ -2124,7 +2098,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_28(OPS_32) // LPcc (loop
ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2a(OPS_32) // Load FROM Auxiliary register TO register
{
int size = 4;
-// UINT32 limm = 0;
+// UINT32 limm = 0;
int got_limm = 0;
COMMON32_GET_p;
@@ -2132,7 +2106,6 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2a(OPS_32) // Load FROM
if (p == 0)
{
-
COMMON32_GET_creg
if (creg == LIMM_REG)
@@ -2142,7 +2115,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2a(OPS_32) // Load FROM
//GET_LIMM_32;
size = 8;
}
-
+
}
else
{
@@ -2176,7 +2149,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_helper(OPS_32, const c
COMMON32_GET_p;
//COMMON32_GET_breg;
-
+
if (p == 0)
{
COMMON32_GET_creg
@@ -2185,7 +2158,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_2f_helper(OPS_32, const c
{
//UINT32 limm;
//GET_LIMM_32;
- size = 8;
+ size = 8;
}
else
{
@@ -2265,7 +2238,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle04_3x_helper(OPS_32, int dsi
}
else
{
- }
+ }
arcompact_log("unimplemented LD %08x (type 04_3x)", op);
return m_pc + (size>>0);
@@ -2313,7 +2286,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_0x_helper(OPS_32, cons
COMMON32_GET_p;
//COMMON32_GET_breg;
-
+
if (p == 0)
{
COMMON32_GET_creg
@@ -2322,7 +2295,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle05_2f_0x_helper(OPS_32, cons
{
//UINT32 limm;
//GET_LIMM_32;
- size = 8;
+ size = 8;
}
else
@@ -2454,7 +2427,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0e_0x_helper(OPS_16, const c
int size = 2;
GROUP_0e_GET_h;
-
+
if (h == LIMM_REG)
{
//UINT32 limm;
@@ -2463,7 +2436,6 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0e_0x_helper(OPS_16, const c
}
else
{
-
}
arcompact_log("unimplemented %s %04x (0x0e_0x group)", optext, op);
@@ -2480,7 +2452,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0e_00(OPS_16) // ADD_s b, b,
GROUP_0e_GET_h;
COMMON16_GET_breg;
REG_16BIT_RANGE(breg);
-
+
if (h == LIMM_REG)
{
UINT32 limm;
@@ -2499,7 +2471,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0e_00(OPS_16) // ADD_s b, b,
}
// 16-bit MOV with extended register range
-ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0e_01(OPS_16) // MOV_S b <- h
+ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0e_01(OPS_16) // MOV_S b <- h
{
int h,breg;
int size = 2;
@@ -2507,7 +2479,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0e_01(OPS_16) // MOV_S b <-
GROUP_0e_GET_h;
COMMON16_GET_breg;
REG_16BIT_RANGE(breg);
-
+
if (h == LIMM_REG)
{
// opcode iiii ibbb hhhI Ihhh
@@ -2543,10 +2515,9 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0e_03(OPS_16) // MOV_S h <-
GROUP_0e_GET_h;
COMMON16_GET_breg;
REG_16BIT_RANGE(breg);
-
+
if (h == LIMM_REG) // no result..
{
-
}
m_regs[h] = m_regs[breg];
@@ -2573,9 +2544,9 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0f_00_02(OPS_16) // JL_S
COMMON16_GET_breg;
REG_16BIT_RANGE(breg);
-
+
m_regs[REG_BLINK] = m_pc + (2 >> 0);
-
+
return m_regs[breg];
}
@@ -2586,11 +2557,11 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0f_00_03(OPS_16) // JL_S.D
COMMON16_GET_breg;
REG_16BIT_RANGE(breg);
-
+
m_delayactive = 1;
m_delayjump = m_regs[breg];
m_delaylinks = 1;
-
+
return m_pc + (2 >> 0);
}
@@ -2616,7 +2587,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle0f_00_07_07(OPS_16) // J_S.D
m_delayactive = 1;
m_delayjump = m_regs[REG_BLINK];
m_delaylinks = 0;
-
+
return m_pc + (2 >> 0);
}
@@ -2679,7 +2650,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle_ld_helper(OPS_16, const cha
ARCOMPACT_RETTYPE arcompact_device::arcompact_handle10(OPS_16)
-{ // LD_S c, [b, u7]
+{ // LD_S c, [b, u7]
int breg, creg, u;
COMMON16_GET_breg;
@@ -2697,7 +2668,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle10(OPS_16)
ARCOMPACT_RETTYPE arcompact_device::arcompact_handle11(OPS_16)
{
- // LDB_S c, [b, u5]
+ // LDB_S c, [b, u5]
int breg, creg, u;
COMMON16_GET_breg;
@@ -2707,7 +2678,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle11(OPS_16)
REG_16BIT_RANGE(breg);
REG_16BIT_RANGE(creg);
-// u <<= 0; // check
+// u <<= 0; // check
m_regs[creg] = READ8((m_regs[breg] + u) >> 0);
return m_pc + (2 >> 0);
@@ -2715,7 +2686,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle11(OPS_16)
ARCOMPACT_RETTYPE arcompact_device::arcompact_handle12(OPS_16)
{
- // LDB_W c, [b, u6]
+ // LDB_W c, [b, u6]
int breg, creg, u;
COMMON16_GET_breg;
@@ -2765,7 +2736,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle15(OPS_16) // STB_S c. [b, u
REG_16BIT_RANGE(breg);
REG_16BIT_RANGE(creg);
-// u <<= 0;
+// u <<= 0;
WRITE8((m_regs[breg] + u) >> 0, m_regs[creg]);
@@ -2833,7 +2804,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_00(OPS_16) // LD_S b, [
return m_pc + (2 >> 0);
}
-ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_01(OPS_16)
+ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_01(OPS_16)
{
return arcompact_handle18_0x_helper(PARAMS, "LDB_S (SP)", 0);
}
@@ -2855,7 +2826,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_02(OPS_16) // ST_S b, [S
return m_pc + (2 >> 0);
}
-ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_03(OPS_16)
+ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_03(OPS_16)
{
return arcompact_handle18_0x_helper(PARAMS, "STB_S (SP)", 1);
}
@@ -2896,13 +2867,13 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_05_01(OPS_16)
return m_pc + (2 >> 0);
}
-// op bits remaining for 0x18_06_xx subgroups 0x0700
+// op bits remaining for 0x18_06_xx subgroups 0x0700
ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_06_01(OPS_16) // POP_S b
{
int breg;
COMMON16_GET_breg;
REG_16BIT_RANGE(breg);
-
+
m_regs[breg] = READ32(m_regs[REG_SP] >> 2);
m_regs[REG_SP] += 4;
@@ -2918,15 +2889,15 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_06_11(OPS_16) // POP_S bl
return m_pc + (2 >> 0);
}
-// op bits remaining for 0x18_07_xx subgroups 0x0700
+// op bits remaining for 0x18_07_xx subgroups 0x0700
ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_07_01(OPS_16) // PUSH_S b
{
int breg;
COMMON16_GET_breg;
REG_16BIT_RANGE(breg);
-
+
m_regs[REG_SP] -= 4;
-
+
WRITE32(m_regs[REG_SP] >> 2, m_regs[breg]);
return m_pc + (2 >> 0);
@@ -2938,7 +2909,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_07_11(OPS_16) // PUSH_S [
// breg bits are reserved
m_regs[REG_SP] -= 4;
-
+
WRITE32(m_regs[REG_SP] >> 2, m_regs[REG_BLINK]);
return m_pc + (2 >> 0);
@@ -3058,7 +3029,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle1d_00(OPS_16) // BREQ_S b,0,
if (!m_regs[breg])
{
- int s = (op & 0x007f) >> 0; op &= ~0x007f;
+ int s = (op & 0x007f) >> 0; op &= ~0x007f;
if (s & 0x40) s = -0x40 + (s & 0x3f);
UINT32 realaddress = PC_ALIGNED32 + (s * 2);
//m_regs[REG_BLINK] = m_pc + (2 >> 0); // don't link
@@ -3077,7 +3048,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle1d_01(OPS_16) // BRNE_S b,0,
if (m_regs[breg])
{
- int s = (op & 0x007f) >> 0; op &= ~0x007f;
+ int s = (op & 0x007f) >> 0; op &= ~0x007f;
if (s & 0x40) s = -0x40 + (s & 0x3f);
UINT32 realaddress = PC_ALIGNED32 + (s * 2);
//m_regs[REG_BLINK] = m_pc + (2 >> 0); // don't link
@@ -3098,7 +3069,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle1e_0x_helper(OPS_16, const c
ARCOMPACT_RETTYPE arcompact_device::arcompact_handle1e_00(OPS_16) // B_S s10 (branch always)
{
- int s = (op & 0x01ff) >> 0; op &= ~0x01ff;
+ int s = (op & 0x01ff) >> 0; op &= ~0x01ff;
if (s & 0x100) s = -0x100 + (s & 0xff);
UINT32 realaddress = PC_ALIGNED32 + (s * 2);
//m_regs[REG_BLINK] = m_pc + (2 >> 0); // don't link
@@ -3109,7 +3080,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle1e_01(OPS_16) // BEQ_S s10 (
{
if (STATUS32_CHECK_Z)
{
- int s = (op & 0x01ff) >> 0; op &= ~0x01ff;
+ int s = (op & 0x01ff) >> 0; op &= ~0x01ff;
if (s & 0x100) s = -0x100 + (s & 0xff);
UINT32 realaddress = PC_ALIGNED32 + (s * 2);
//m_regs[REG_BLINK] = m_pc + (2 >> 0); // don't link
@@ -3123,7 +3094,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle1e_02(OPS_16) // BNE_S s10
{
if (!STATUS32_CHECK_Z)
{
- int s = (op & 0x01ff) >> 0; op &= ~0x01ff;
+ int s = (op & 0x01ff) >> 0; op &= ~0x01ff;
if (s & 0x100) s = -0x100 + (s & 0xff);
UINT32 realaddress = PC_ALIGNED32 + (s * 2);
//m_regs[REG_BLINK] = m_pc + (2 >> 0); // don't link
@@ -3146,7 +3117,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle1e_03_02(OPS_16) // BLT_S
{
if (CONDITION_LT)
{
- int s = (op & 0x003f) >> 0; op &= ~0x003f;
+ int s = (op & 0x003f) >> 0; op &= ~0x003f;
if (s & 0x020) s = -0x20 + (s & 0x1f);
UINT32 realaddress = PC_ALIGNED32 + (s * 2);
//m_regs[REG_BLINK] = m_pc + (2 >> 0); // don't link
@@ -3160,7 +3131,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle1e_03_03(OPS_16) // BLE_S
{
if (CONDITION_LE)
{
- int s = (op & 0x003f) >> 0; op &= ~0x003f;
+ int s = (op & 0x003f) >> 0; op &= ~0x003f;
if (s & 0x020) s = -0x20 + (s & 0x1f);
UINT32 realaddress = PC_ALIGNED32 + (s * 2);
//m_regs[REG_BLINK] = m_pc + (2 >> 0); // don't link
@@ -3177,7 +3148,7 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle1e_03_07(OPS_16) { return a
ARCOMPACT_RETTYPE arcompact_device::arcompact_handle1f(OPS_16) // BL_S s13
{
- int s = (op & 0x07ff) >> 0; op &= ~0x07ff;
+ int s = (op & 0x07ff) >> 0; op &= ~0x07ff;
if (s & 0x400) s = -0x400 + (s & 0x3ff);
UINT32 realaddress = PC_ALIGNED32 + (s * 4);
@@ -3600,6 +3571,3 @@ ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_07_1c(OPS_16) { arcompac
ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_07_1d(OPS_16) { arcompact_fatal("<illegal 0x18_07_1d> (%04x)", op); return m_pc + (2 >> 0);}
ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_07_1e(OPS_16) { arcompact_fatal("<illegal 0x18_07_1e> (%04x)", op); return m_pc + (2 >> 0);}
ARCOMPACT_RETTYPE arcompact_device::arcompact_handle18_07_1f(OPS_16) { arcompact_fatal("<illegal 0x18_07_1f> (%04x)", op); return m_pc + (2 >> 0);}
-
-
-
diff --git a/src/emu/cpu/arcompact/arcompactdasm.c b/src/emu/cpu/arcompact/arcompactdasm.c
index 54829b61729..f1ff19942a1 100644
--- a/src/emu/cpu/arcompact/arcompactdasm.c
+++ b/src/emu/cpu/arcompact/arcompactdasm.c
@@ -41,48 +41,48 @@ CPU_DISASSEMBLE(arcompact)
switch (instruction) // 32-bit instructions (with optional extra dword for immediate data)
{
- case 0x00: size = arcompact_handle00_dasm(DASM_PARAMS); break; // Bcc
- case 0x01: size = arcompact_handle01_dasm(DASM_PARAMS); break; // BLcc/BRcc
- case 0x02: size = arcompact_handle02_dasm(DASM_PARAMS); break; // LD r+o
- case 0x03: size = arcompact_handle03_dasm(DASM_PARAMS); break; // ST r+o
- case 0x04: size = arcompact_handle04_dasm(DASM_PARAMS); break; // op a,b,c (basecase)
- case 0x05: size = arcompact_handle05_dasm(DASM_PARAMS); break; // op a,b,c (05 ARC ext)
- case 0x06: size = arcompact_handle06_dasm(DASM_PARAMS); break; // op a,b,c (06 ARC ext)
- case 0x07: size = arcompact_handle07_dasm(DASM_PARAMS); break; // op a,b,c (07 User ext)
- case 0x08: size = arcompact_handle08_dasm(DASM_PARAMS); break; // op a,b,c (08 User ext)
- case 0x09: size = arcompact_handle09_dasm(DASM_PARAMS); break; // op a,b,c (09 Market ext)
- case 0x0a: size = arcompact_handle0a_dasm(DASM_PARAMS); break; // op a,b,c (0a Market ext)
- case 0x0b: size = arcompact_handle0b_dasm(DASM_PARAMS); break; // op a,b,c (0b Market ext)
+ case 0x00: size = arcompact_handle00_dasm(DASM_PARAMS); break; // Bcc
+ case 0x01: size = arcompact_handle01_dasm(DASM_PARAMS); break; // BLcc/BRcc
+ case 0x02: size = arcompact_handle02_dasm(DASM_PARAMS); break; // LD r+o
+ case 0x03: size = arcompact_handle03_dasm(DASM_PARAMS); break; // ST r+o
+ case 0x04: size = arcompact_handle04_dasm(DASM_PARAMS); break; // op a,b,c (basecase)
+ case 0x05: size = arcompact_handle05_dasm(DASM_PARAMS); break; // op a,b,c (05 ARC ext)
+ case 0x06: size = arcompact_handle06_dasm(DASM_PARAMS); break; // op a,b,c (06 ARC ext)
+ case 0x07: size = arcompact_handle07_dasm(DASM_PARAMS); break; // op a,b,c (07 User ext)
+ case 0x08: size = arcompact_handle08_dasm(DASM_PARAMS); break; // op a,b,c (08 User ext)
+ case 0x09: size = arcompact_handle09_dasm(DASM_PARAMS); break; // op a,b,c (09 Market ext)
+ case 0x0a: size = arcompact_handle0a_dasm(DASM_PARAMS); break; // op a,b,c (0a Market ext)
+ case 0x0b: size = arcompact_handle0b_dasm(DASM_PARAMS); break; // op a,b,c (0b Market ext)
}
}
else
- {
+ {
size = 2;
op &= ~0xf800;
switch (instruction) // 16-bit instructions
{
- case 0x0c: size = arcompact_handle0c_dasm(DASM_PARAMS); break; // Load/Add reg-reg
- case 0x0d: size = arcompact_handle0d_dasm(DASM_PARAMS); break; // Add/Sub/Shft imm
- case 0x0e: size = arcompact_handle0e_dasm(DASM_PARAMS); break; // Mov/Cmp/Add
- case 0x0f: size = arcompact_handle0f_dasm(DASM_PARAMS); break; // op_S b,b,c (single 16-bit ops)
- case 0x10: size = arcompact_handle10_dasm(DASM_PARAMS); break; // LD_S
- case 0x11: size = arcompact_handle11_dasm(DASM_PARAMS); break; // LDB_S
- case 0x12: size = arcompact_handle12_dasm(DASM_PARAMS); break; // LDW_S
- case 0x13: size = arcompact_handle13_dasm(DASM_PARAMS); break; // LSW_S.X
- case 0x14: size = arcompact_handle14_dasm(DASM_PARAMS); break; // ST_S
- case 0x15: size = arcompact_handle15_dasm(DASM_PARAMS); break; // STB_S
- case 0x16: size = arcompact_handle16_dasm(DASM_PARAMS); break; // STW_S
- case 0x17: size = arcompact_handle17_dasm(DASM_PARAMS); break; // Shift/Sub/Bit
- case 0x18: size = arcompact_handle18_dasm(DASM_PARAMS); break; // Stack Instr
- case 0x19: size = arcompact_handle19_dasm(DASM_PARAMS); break; // GP Instr
- case 0x1a: size = arcompact_handle1a_dasm(DASM_PARAMS); break; // PCL Instr
- case 0x1b: size = arcompact_handle1b_dasm(DASM_PARAMS); break; // MOV_S
- case 0x1c: size = arcompact_handle1c_dasm(DASM_PARAMS); break; // ADD_S/CMP_S
- case 0x1d: size = arcompact_handle1d_dasm(DASM_PARAMS); break; // BRcc_S
- case 0x1e: size = arcompact_handle1e_dasm(DASM_PARAMS); break; // Bcc_S
- case 0x1f: size = arcompact_handle1f_dasm(DASM_PARAMS); break; // BL_S
+ case 0x0c: size = arcompact_handle0c_dasm(DASM_PARAMS); break; // Load/Add reg-reg
+ case 0x0d: size = arcompact_handle0d_dasm(DASM_PARAMS); break; // Add/Sub/Shft imm
+ case 0x0e: size = arcompact_handle0e_dasm(DASM_PARAMS); break; // Mov/Cmp/Add
+ case 0x0f: size = arcompact_handle0f_dasm(DASM_PARAMS); break; // op_S b,b,c (single 16-bit ops)
+ case 0x10: size = arcompact_handle10_dasm(DASM_PARAMS); break; // LD_S
+ case 0x11: size = arcompact_handle11_dasm(DASM_PARAMS); break; // LDB_S
+ case 0x12: size = arcompact_handle12_dasm(DASM_PARAMS); break; // LDW_S
+ case 0x13: size = arcompact_handle13_dasm(DASM_PARAMS); break; // LSW_S.X
+ case 0x14: size = arcompact_handle14_dasm(DASM_PARAMS); break; // ST_S
+ case 0x15: size = arcompact_handle15_dasm(DASM_PARAMS); break; // STB_S
+ case 0x16: size = arcompact_handle16_dasm(DASM_PARAMS); break; // STW_S
+ case 0x17: size = arcompact_handle17_dasm(DASM_PARAMS); break; // Shift/Sub/Bit
+ case 0x18: size = arcompact_handle18_dasm(DASM_PARAMS); break; // Stack Instr
+ case 0x19: size = arcompact_handle19_dasm(DASM_PARAMS); break; // GP Instr
+ case 0x1a: size = arcompact_handle1a_dasm(DASM_PARAMS); break; // PCL Instr
+ case 0x1b: size = arcompact_handle1b_dasm(DASM_PARAMS); break; // MOV_S
+ case 0x1c: size = arcompact_handle1c_dasm(DASM_PARAMS); break; // ADD_S/CMP_S
+ case 0x1d: size = arcompact_handle1d_dasm(DASM_PARAMS); break; // BRcc_S
+ case 0x1e: size = arcompact_handle1e_dasm(DASM_PARAMS); break; // Bcc_S
+ case 0x1f: size = arcompact_handle1f_dasm(DASM_PARAMS); break; // BL_S
}
}
diff --git a/src/emu/cpu/arcompact/arcompactdasm_dispatch.c b/src/emu/cpu/arcompact/arcompactdasm_dispatch.c
index 172c00893f2..b510cb28c41 100644
--- a/src/emu/cpu/arcompact/arcompactdasm_dispatch.c
+++ b/src/emu/cpu/arcompact/arcompactdasm_dispatch.c
@@ -141,9 +141,9 @@ int arcompact_handle04_dasm(DASM_OPS_32)
// 00100 bbb 00 iiiiii F BBB CCCCCC A AAAAA General Operations *UN*Conditional Register to Register
// 00100 bbb 01 iiiiii F BBB UUUUUU A AAAAA General Operations *UN*Conditional Register (Unsigned 6-bit IMM)
// 00100 bbb 10 iiiiii F BBB ssssss S SSSSS General Operations *UN*Conditional Register (Signed 12-bit IMM)
-
- // 00100 bbb 11 iiiiii F BBB CCCCCC 0 QQQQQ General Operations Conditional Register
- // 00100 bbb 11 iiiiii F BBB UUUUUU 1 QQQQQ General Operations Conditional Register (Unsigned 6-bit IMM)
+
+ // 00100 bbb 11 iiiiii F BBB CCCCCC 0 QQQQQ General Operations Conditional Register
+ // 00100 bbb 11 iiiiii F BBB UUUUUU 1 QQQQQ General Operations Conditional Register (Unsigned 6-bit IMM)
UINT8 subinstr = (op & 0x003f0000) >> 16;
op &= ~0x003f0000;
@@ -304,15 +304,15 @@ int arcompact_handle05_2f_dasm(DASM_OPS_32)
switch (subinstr2)
{
- case 0x00: size = arcompact_handle05_2f_00_dasm(DASM_PARAMS); break; // SWAP
- case 0x01: size = arcompact_handle05_2f_01_dasm(DASM_PARAMS); break; // NORM
+ case 0x00: size = arcompact_handle05_2f_00_dasm(DASM_PARAMS); break; // SWAP
+ case 0x01: size = arcompact_handle05_2f_01_dasm(DASM_PARAMS); break; // NORM
case 0x02: size = arcompact_handle05_2f_02_dasm(DASM_PARAMS); break; // SAT16
- case 0x03: size = arcompact_handle05_2f_03_dasm(DASM_PARAMS); break; // RND16
- case 0x04: size = arcompact_handle05_2f_04_dasm(DASM_PARAMS); break; // ABSSW
- case 0x05: size = arcompact_handle05_2f_05_dasm(DASM_PARAMS); break; // ABSS
- case 0x06: size = arcompact_handle05_2f_06_dasm(DASM_PARAMS); break; // NEGSW
- case 0x07: size = arcompact_handle05_2f_07_dasm(DASM_PARAMS); break; // NEGS
- case 0x08: size = arcompact_handle05_2f_08_dasm(DASM_PARAMS); break; // NORMW
+ case 0x03: size = arcompact_handle05_2f_03_dasm(DASM_PARAMS); break; // RND16
+ case 0x04: size = arcompact_handle05_2f_04_dasm(DASM_PARAMS); break; // ABSSW
+ case 0x05: size = arcompact_handle05_2f_05_dasm(DASM_PARAMS); break; // ABSS
+ case 0x06: size = arcompact_handle05_2f_06_dasm(DASM_PARAMS); break; // NEGSW
+ case 0x07: size = arcompact_handle05_2f_07_dasm(DASM_PARAMS); break; // NEGS
+ case 0x08: size = arcompact_handle05_2f_08_dasm(DASM_PARAMS); break; // NORMW
case 0x09: size = arcompact_handle05_2f_09_dasm(DASM_PARAMS); break; // illegal
case 0x0a: size = arcompact_handle05_2f_0a_dasm(DASM_PARAMS); break; // illegal
case 0x0b: size = arcompact_handle05_2f_0b_dasm(DASM_PARAMS); break; // illegal
@@ -759,13 +759,13 @@ int arcompact_handle17_dasm(DASM_OPS_16)
switch (subinstr)
{
- case 0x00: size = arcompact_handle17_00_dasm(DASM_PARAMS); break; // ASL_S
- case 0x01: size = arcompact_handle17_01_dasm(DASM_PARAMS); break; // LSR_S
+ case 0x00: size = arcompact_handle17_00_dasm(DASM_PARAMS); break; // ASL_S
+ case 0x01: size = arcompact_handle17_01_dasm(DASM_PARAMS); break; // LSR_S
case 0x02: size = arcompact_handle17_02_dasm(DASM_PARAMS); break; // ASR_S
- case 0x03: size = arcompact_handle17_03_dasm(DASM_PARAMS); break; // SUB_S
- case 0x04: size = arcompact_handle17_04_dasm(DASM_PARAMS); break; // BSET_S
- case 0x05: size = arcompact_handle17_05_dasm(DASM_PARAMS); break; // BCLR_S
- case 0x06: size = arcompact_handle17_06_dasm(DASM_PARAMS); break; // BMSK_S
+ case 0x03: size = arcompact_handle17_03_dasm(DASM_PARAMS); break; // SUB_S
+ case 0x04: size = arcompact_handle17_04_dasm(DASM_PARAMS); break; // BSET_S
+ case 0x05: size = arcompact_handle17_05_dasm(DASM_PARAMS); break; // BCLR_S
+ case 0x06: size = arcompact_handle17_06_dasm(DASM_PARAMS); break; // BMSK_S
case 0x07: size = arcompact_handle17_07_dasm(DASM_PARAMS); break; // BTST_S
}
@@ -795,7 +795,7 @@ int arcompact_handle18_dasm(DASM_OPS_16)
return size;
}
-int arcompact_handle18_05_dasm(DASM_OPS_16)
+int arcompact_handle18_05_dasm(DASM_OPS_16)
{
int size = 2;
UINT8 subinstr2 = (op & 0x0700) >> 8;
@@ -805,7 +805,7 @@ int arcompact_handle18_05_dasm(DASM_OPS_16)
{
case 0x00: size = arcompact_handle18_05_00_dasm(DASM_PARAMS); break; // ADD_S (SP)
case 0x01: size = arcompact_handle18_05_01_dasm(DASM_PARAMS); break; // SUB_S (SP)
- case 0x02: size = arcompact_handle18_05_02_dasm(DASM_PARAMS); break; // <illegal 0x18_05_02>
+ case 0x02: size = arcompact_handle18_05_02_dasm(DASM_PARAMS); break; // <illegal 0x18_05_02>
case 0x03: size = arcompact_handle18_05_03_dasm(DASM_PARAMS); break; // <illegal 0x18_05_03>
case 0x04: size = arcompact_handle18_05_04_dasm(DASM_PARAMS); break; // <illegal 0x18_05_04>
case 0x05: size = arcompact_handle18_05_05_dasm(DASM_PARAMS); break; // <illegal 0x18_05_05>
@@ -816,7 +816,7 @@ int arcompact_handle18_05_dasm(DASM_OPS_16)
return size;
}
-int arcompact_handle18_06_dasm(DASM_OPS_16)
+int arcompact_handle18_06_dasm(DASM_OPS_16)
{
int size = 2;
UINT8 subinstr2 = (op & 0x001f) >> 0;
@@ -861,7 +861,7 @@ int arcompact_handle18_06_dasm(DASM_OPS_16)
return size;
}
-int arcompact_handle18_07_dasm(DASM_OPS_16)
+int arcompact_handle18_07_dasm(DASM_OPS_16)
{
int size = 2;
UINT8 subinstr2 = (op & 0x001f) >> 0;
@@ -968,7 +968,6 @@ int arcompact_handle1e_dasm(DASM_OPS_16)
int arcompact_handle1e_03_dasm(DASM_OPS_16)
{
-
int size = 2;
UINT8 subinstr2 = (op & 0x01c0) >> 6;
op &= ~0x01c0;
@@ -976,13 +975,13 @@ int arcompact_handle1e_03_dasm(DASM_OPS_16)
switch (subinstr2)
{
case 0x00: size = arcompact_handle1e_03_00_dasm(DASM_PARAMS); break; // BGT_S
- case 0x01: size = arcompact_handle1e_03_01_dasm(DASM_PARAMS); break; // BGE_S
+ case 0x01: size = arcompact_handle1e_03_01_dasm(DASM_PARAMS); break; // BGE_S
case 0x02: size = arcompact_handle1e_03_02_dasm(DASM_PARAMS); break; // BLT_S
case 0x03: size = arcompact_handle1e_03_03_dasm(DASM_PARAMS); break; // BLE_S
case 0x04: size = arcompact_handle1e_03_04_dasm(DASM_PARAMS); break; // BHI_S
case 0x05: size = arcompact_handle1e_03_05_dasm(DASM_PARAMS); break; // BHS_S
case 0x06: size = arcompact_handle1e_03_06_dasm(DASM_PARAMS); break; // BLO_S
- case 0x07: size = arcompact_handle1e_03_07_dasm(DASM_PARAMS); break; // BLS_S
+ case 0x07: size = arcompact_handle1e_03_07_dasm(DASM_PARAMS); break; // BLS_S
}
return size;
diff --git a/src/emu/cpu/arcompact/arcompactdasm_dispatch.h b/src/emu/cpu/arcompact/arcompactdasm_dispatch.h
index f317e0ffb8e..5e30a2e8488 100644
--- a/src/emu/cpu/arcompact/arcompactdasm_dispatch.h
+++ b/src/emu/cpu/arcompact/arcompactdasm_dispatch.h
@@ -12,8 +12,7 @@
#define GET_LIMM_32 \
limm = oprom[6] | (oprom[7] << 8); \
- limm |= (oprom[4] << 16) | (oprom[5] << 24); \
-
+ limm |= (oprom[4] << 16) | (oprom[5] << 24);
int arcompact_handle00_dasm(DASM_OPS_32);
diff --git a/src/emu/cpu/arcompact/arcompactdasm_ops.c b/src/emu/cpu/arcompact/arcompactdasm_ops.c
index 4cdf09a37a0..842dafe3bd8 100644
--- a/src/emu/cpu/arcompact/arcompactdasm_ops.c
+++ b/src/emu/cpu/arcompact/arcompactdasm_ops.c
@@ -31,87 +31,68 @@ static void ATTR_PRINTF(1,2) print(const char *fmt, ...)
#define GROUP_0e_GET_h \
h = ((op & 0x0007) << 3); \
- h |= ((op & 0x00e0) >> 5); \
- op &= ~0x00e7; \
-
+ h |= ((op & 0x00e0) >> 5); \
+ op &= ~0x00e7;
#define COMMON32_GET_breg \
int b_temp = (op & 0x07000000) >> 24; op &= ~0x07000000; \
int B_temp = (op & 0x00007000) >> 12; op &= ~0x00007000; \
- int breg = b_temp | (B_temp << 3); \
-
+ int breg = b_temp | (B_temp << 3);
#define COMMON32_GET_creg \
- int creg = (op & 0x00000fc0) >> 6; op &= ~0x00000fc0; \
-
+ int creg = (op & 0x00000fc0) >> 6; op &= ~0x00000fc0;
#define COMMON32_GET_u6 \
- int u = (op & 0x00000fc0) >> 6; op &= ~0x00000fc0; \
-
+ int u = (op & 0x00000fc0) >> 6; op &= ~0x00000fc0;
#define COMMON32_GET_areg \
- int areg = (op & 0x0000003f) >> 0; op &= ~0x0000003f; \
-
+ int areg = (op & 0x0000003f) >> 0; op &= ~0x0000003f;
#define COMMON32_GET_areg_reserved \
- int ares = (op & 0x0000003f) >> 0; op &= ~0x0000003f; \
-
+ int ares = (op & 0x0000003f) >> 0; op &= ~0x0000003f;
#define COMMON32_GET_F \
- int F = (op & 0x00008000) >> 15; op &= ~0x00008000; \
-
+ int F = (op & 0x00008000) >> 15; op &= ~0x00008000;
#define COMMON32_GET_p \
- int p = (op & 0x00c00000) >> 22; op &= ~0x00c00000; \
-
+ int p = (op & 0x00c00000) >> 22; op &= ~0x00c00000;
#define COMMON32_GET_s12 \
int S_temp = (op & 0x0000003f) >> 0; op &= ~0x0000003f; \
int s_temp = (op & 0x00000fc0) >> 6; op &= ~0x00000fc0; \
- int S = s_temp | (S_temp<<6); \
-
+ int S = s_temp | (S_temp<<6);
#define COMMON32_GET_CONDITION \
UINT8 condition = op & 0x0000001f; op &= ~0x0000001f;
#define COMMON16_GET_breg \
breg = ((op & 0x0700) >>8); \
- op &= ~0x0700; \
-
+ op &= ~0x0700;
#define COMMON16_GET_creg \
creg = ((op & 0x00e0) >>5); \
- op &= ~0x00e0; \
-
+ op &= ~0x00e0;
#define COMMON16_GET_areg \
areg = ((op & 0x0007) >>0); \
- op &= ~0x0007; \
-
+ op &= ~0x0007;
#define COMMON16_GET_u3 \
u = ((op & 0x0007) >>0); \
- op &= ~0x0007; \
-
+ op &= ~0x0007;
#define COMMON16_GET_u5 \
u = ((op & 0x001f) >>0); \
- op &= ~0x001f; \
-
+ op &= ~0x001f;
#define COMMON16_GET_u8 \
u = ((op & 0x00ff) >>0); \
- op &= ~0x00ff; \
-
+ op &= ~0x00ff;
#define COMMON16_GET_u7 \
u = ((op & 0x007f) >>0); \
- op &= ~0x007f; \
-
+ op &= ~0x007f;
#define COMMON16_GET_s9 \
s = ((op & 0x01ff) >>0); \
- op &= ~0x01ff; \
-
+ op &= ~0x01ff;
// registers used in 16-bit opcodes hae a limited range
// and can only address registers r0-r3 and r12-r15
#define REG_16BIT_RANGE(_reg_) \
- if (_reg_>3) _reg_+= 8; \
-
+ if (_reg_>3) _reg_+= 8;
// this is as messed up as the rest of the 16-bit alignment in LE mode...
#define GET_LIMM \
limm = oprom[4] | (oprom[5] << 8); \
- limm |= (oprom[2] << 16) | (oprom[3] << 24); \
-
+ limm |= (oprom[2] << 16) | (oprom[3] << 24);
#define PC_ALIGNED32 \
(pc&0xfffffffc)
@@ -163,7 +144,7 @@ int arcompact_handle01_00_00dasm(DASM_OPS_32)
// 00001 sssssssss 00 SSSSSSSSSS N QQQQQ
INT32 address = (op & 0x07fc0000) >> 17;
address |= ((op & 0x0000ffc0) >> 6) << 10;
- if (address & 0x800000) address = -0x800000 + (address&0x7fffff);
+ if (address & 0x800000) address = -0x800000 + (address&0x7fffff);
int n = (op & 0x00000020) >> 5; op &= ~0x00000020;
COMMON32_GET_CONDITION
@@ -180,7 +161,7 @@ int arcompact_handle01_00_01dasm(DASM_OPS_32)
INT32 address = (op & 0x07fc0000) >> 17;
address |= ((op & 0x0000ffc0) >> 6) << 10;
address |= ((op & 0x0000000f) >> 0) << 20;
- if (address & 0x800000) address = -0x800000 + (address&0x7fffff);
+ if (address & 0x800000) address = -0x800000 + (address&0x7fffff);
int n = (op & 0x00000020) >> 5; op &= ~0x00000020;
int res = (op & 0x00000010) >> 4; op &= ~0x00000010;
@@ -265,7 +246,7 @@ int arcompact_01_01_01_helper(DASM_OPS_32, const char* optext)
op &= ~0x07007fe0;
print("%s%s %s, 0x%02x %08x (%08x)", optext, delaybit[n], regnames[breg], u, PC_ALIGNED32 + (address * 2), op & ~0xf8fe800f);
-
+
return size;
}
@@ -327,7 +308,7 @@ int arcompact_handle03_dasm(DASM_OPS_32)
{
int size = 4;
UINT32 limm = 0;
- int got_limm = 0;
+ int got_limm = 0;
// bitpos
// 1111 1111 1111 1111 0000 0000 0000 0000
// fedc ba98 7654 3210 fedc ba98 7654 3210
@@ -401,7 +382,7 @@ int arcompact_handle04_p00_helper_dasm(DASM_OPS_32, const char* optext, int igno
output += sprintf(output, "%s", optext);
output += sprintf(output, "%s", flagbit[F]);
- // output += sprintf( output, " p(%d)", p);
+ // output += sprintf( output, " p(%d)", p);
if ((!b_reserved) && (breg == LIMM_REG))
@@ -429,7 +410,7 @@ int arcompact_handle04_p00_helper_dasm(DASM_OPS_32, const char* optext, int igno
}
else if (ignore_dst == 1) // certain opcode types ignore the 'a' field entirely, it should be set to 0.
{
- if (areg) output += sprintf(output, " <reserved %d> <-", areg);
+ if (areg) output += sprintf(output, " <reserved %d> <-", areg);
}
else if (ignore_dst == 2) // for multiply operations areg should always be set to LIMM
{
@@ -464,7 +445,7 @@ int arcompact_handle04_p01_helper_dasm(DASM_OPS_32, const char* optext, int igno
// 0010 0bbb 01ii iiii FBBB uuuu uuAA AAAA
int size = 4;
UINT32 limm = 0;
-// int got_limm = 0;
+// int got_limm = 0;
COMMON32_GET_breg;
COMMON32_GET_F;
@@ -473,14 +454,14 @@ int arcompact_handle04_p01_helper_dasm(DASM_OPS_32, const char* optext, int igno
output += sprintf(output, "%s", optext);
output += sprintf(output, "%s", flagbit[F]);
- // output += sprintf( output, " p(%d)", p);
+ // output += sprintf( output, " p(%d)", p);
if ((!b_reserved) && (breg == LIMM_REG))
{
GET_LIMM_32;
size = 8;
-// got_limm = 1;
+// got_limm = 1;
}
// areg can be LIMM too, but in that case LIMM indicates 'no destination' rather than an actual LIMM value following
@@ -492,7 +473,7 @@ int arcompact_handle04_p01_helper_dasm(DASM_OPS_32, const char* optext, int igno
}
else if (ignore_dst == 1) // certain opcode types ignore the 'a' field entirely, it should be set to 0.
{
- if (areg) output += sprintf(output, " <reserved %d> <-", areg);
+ if (areg) output += sprintf(output, " <reserved %d> <-", areg);
}
else if (ignore_dst == 2) // for multiply operations areg should always be set to LIMM
{
@@ -530,7 +511,7 @@ int arcompact_handle04_p10_helper_dasm(DASM_OPS_32, const char* optext, int b_re
output += sprintf(output, "%s", optext);
output += sprintf(output, "%s", flagbit[F]);
- // output += sprintf( output, " p(%d)", p);
+ // output += sprintf( output, " p(%d)", p);
if (!b_reserved)
@@ -570,7 +551,7 @@ int arcompact_handle04_p11_m0_helper_dasm(DASM_OPS_32, const char* optext, int b
output += sprintf(output, "%s", optext);
output += sprintf(output, "%s", flagbit[F]);
- // output += sprintf( output, " p(%d)", p);
+ // output += sprintf( output, " p(%d)", p);
if (!b_reserved)
{
@@ -594,7 +575,7 @@ int arcompact_handle04_p11_m0_helper_dasm(DASM_OPS_32, const char* optext, int b
output += sprintf(output, " Cond<%s> ", conditions[condition]);
-
+
if (creg == LIMM_REG)
{
@@ -626,7 +607,7 @@ int arcompact_handle04_p11_m1_helper_dasm(DASM_OPS_32, const char* optext, int b
output += sprintf(output, "%s", optext);
output += sprintf(output, "%s", flagbit[F]);
- // output += sprintf( output, " p(%d)", p);
+ // output += sprintf( output, " p(%d)", p);
if (!b_reserved)
{
@@ -685,52 +666,52 @@ int arcompact_handle04_helper_dasm(DASM_OPS_32, const char* optext, int ignore_d
return 0;
}
-int arcompact_handle04_00_dasm(DASM_OPS_32)
+int arcompact_handle04_00_dasm(DASM_OPS_32)
{
return arcompact_handle04_helper_dasm(DASM_PARAMS, "ADD", 0,0);
}
-int arcompact_handle04_01_dasm(DASM_OPS_32)
-{
+int arcompact_handle04_01_dasm(DASM_OPS_32)
+{
return arcompact_handle04_helper_dasm(DASM_PARAMS, "ADC", 0,0);
}
-int arcompact_handle04_02_dasm(DASM_OPS_32)
-{
+int arcompact_handle04_02_dasm(DASM_OPS_32)
+{
return arcompact_handle04_helper_dasm(DASM_PARAMS, "SUB", 0,0);
}
-int arcompact_handle04_03_dasm(DASM_OPS_32)
+int arcompact_handle04_03_dasm(DASM_OPS_32)
{
return arcompact_handle04_helper_dasm(DASM_PARAMS, "SBC", 0,0);
}
-int arcompact_handle04_04_dasm(DASM_OPS_32)
+int arcompact_handle04_04_dasm(DASM_OPS_32)
{
return arcompact_handle04_helper_dasm(DASM_PARAMS, "AND", 0,0);
}
-int arcompact_handle04_05_dasm(DASM_OPS_32)
+int arcompact_handle04_05_dasm(DASM_OPS_32)
{
return arcompact_handle04_helper_dasm(DASM_PARAMS, "OR", 0,0);
}
-int arcompact_handle04_06_dasm(DASM_OPS_32)
+int arcompact_handle04_06_dasm(DASM_OPS_32)
{
return arcompact_handle04_helper_dasm(DASM_PARAMS, "BIC", 0,0);
}
-int arcompact_handle04_07_dasm(DASM_OPS_32)
+int arcompact_handle04_07_dasm(DASM_OPS_32)
{
return arcompact_handle04_helper_dasm(DASM_PARAMS, "XOR", 0,0);
}
-int arcompact_handle04_08_dasm(DASM_OPS_32)
+int arcompact_handle04_08_dasm(DASM_OPS_32)
{
return arcompact_handle04_helper_dasm(DASM_PARAMS, "MAX", 0,0);
}
-int arcompact_handle04_09_dasm(DASM_OPS_32)
+int arcompact_handle04_09_dasm(DASM_OPS_32)
{
return arcompact_handle04_helper_dasm(DASM_PARAMS, "MIN", 0,0);
}
@@ -752,87 +733,87 @@ int arcompact_handle04_0c_dasm(DASM_OPS_32)
}
int arcompact_handle04_0d_dasm(DASM_OPS_32)
-{
+{
return arcompact_handle04_helper_dasm(DASM_PARAMS, "RCMP", 1,0);
}
int arcompact_handle04_0e_dasm(DASM_OPS_32)
-{
+{
return arcompact_handle04_helper_dasm(DASM_PARAMS, "RSUB", 0,0);
}
-int arcompact_handle04_0f_dasm(DASM_OPS_32)
-{
+int arcompact_handle04_0f_dasm(DASM_OPS_32)
+{
return arcompact_handle04_helper_dasm(DASM_PARAMS, "BSET", 0,0);
}
-int arcompact_handle04_10_dasm(DASM_OPS_32)
-{
+int arcompact_handle04_10_dasm(DASM_OPS_32)
+{
return arcompact_handle04_helper_dasm(DASM_PARAMS, "BCLR", 0,0);
}
-int arcompact_handle04_11_dasm(DASM_OPS_32)
-{
+int arcompact_handle04_11_dasm(DASM_OPS_32)
+{
return arcompact_handle04_helper_dasm(DASM_PARAMS, "BTST", 0,0);
}
-int arcompact_handle04_12_dasm(DASM_OPS_32)
-{
+int arcompact_handle04_12_dasm(DASM_OPS_32)
+{
return arcompact_handle04_helper_dasm(DASM_PARAMS, "BXOR", 0,0);
}
-int arcompact_handle04_13_dasm(DASM_OPS_32)
-{
+int arcompact_handle04_13_dasm(DASM_OPS_32)
+{
return arcompact_handle04_helper_dasm(DASM_PARAMS, "BMSK", 0,0);
}
-int arcompact_handle04_14_dasm(DASM_OPS_32)
-{
+int arcompact_handle04_14_dasm(DASM_OPS_32)
+{
return arcompact_handle04_helper_dasm(DASM_PARAMS, "ADD1", 0,0);
}
-int arcompact_handle04_15_dasm(DASM_OPS_32)
-{
+int arcompact_handle04_15_dasm(DASM_OPS_32)
+{
return arcompact_handle04_helper_dasm(DASM_PARAMS, "ADD2", 0,0);
}
-int arcompact_handle04_16_dasm(DASM_OPS_32)
-{
+int arcompact_handle04_16_dasm(DASM_OPS_32)
+{
return arcompact_handle04_helper_dasm(DASM_PARAMS, "ADD3", 0,0);
}
-int arcompact_handle04_17_dasm(DASM_OPS_32)
-{
+int arcompact_handle04_17_dasm(DASM_OPS_32)
+{
return arcompact_handle04_helper_dasm(DASM_PARAMS, "SUB1", 0,0);
}
-int arcompact_handle04_18_dasm(DASM_OPS_32)
-{
+int arcompact_handle04_18_dasm(DASM_OPS_32)
+{
return arcompact_handle04_helper_dasm(DASM_PARAMS, "SUB2", 0,0);
}
-int arcompact_handle04_19_dasm(DASM_OPS_32)
-{
+int arcompact_handle04_19_dasm(DASM_OPS_32)
+{
return arcompact_handle04_helper_dasm(DASM_PARAMS, "SUB3", 0,0);
}
-int arcompact_handle04_1a_dasm(DASM_OPS_32)
-{
+int arcompact_handle04_1a_dasm(DASM_OPS_32)
+{
return arcompact_handle04_helper_dasm(DASM_PARAMS, "MPY", 0,0);
} // *
-int arcompact_handle04_1b_dasm(DASM_OPS_32)
-{
+int arcompact_handle04_1b_dasm(DASM_OPS_32)
+{
return arcompact_handle04_helper_dasm(DASM_PARAMS, "MPYH", 0,0);
} // *
-int arcompact_handle04_1c_dasm(DASM_OPS_32)
-{
+int arcompact_handle04_1c_dasm(DASM_OPS_32)
+{
return arcompact_handle04_helper_dasm(DASM_PARAMS, "MPYHU", 0,0);
} // *
-int arcompact_handle04_1d_dasm(DASM_OPS_32)
-{
+int arcompact_handle04_1d_dasm(DASM_OPS_32)
+{
return arcompact_handle04_helper_dasm(DASM_PARAMS, "MPYU", 0,0);
} // *
@@ -890,7 +871,7 @@ int arcompact_handle04_28_dasm(DASM_OPS_32) // LPcc (loop setup)
output += sprintf(output, "LP<%s> (start %08x, end %08x)", conditions[condition], pc + 4, PC_ALIGNED32 + u*2);
int unused = (op & 0x00000020)>>5;
- if (unused==0) output += sprintf(output, "(unused bit not set)");
+ if (unused==0) output += sprintf(output, "(unused bit not set)");
}
@@ -908,11 +889,9 @@ int arcompact_handle04_28_dasm(DASM_OPS_32) // LPcc (loop setup)
output += sprintf( output, "[%03x]", auxreg); \
} \
else \
- output += sprintf( output, "[%03x]", auxreg); \
-
+ output += sprintf( output, "[%03x]", auxreg);
int arcompact_handle04_2a_dasm(DASM_OPS_32) // Load FROM Auxiliary register TO register
{
-
// pp F
// 0010 0bbb 0010 1010 0BBB CCCC CCRR RRRR
// 0010 0bbb 0010 1010 0BBB 1111 10RR RRRR
@@ -930,9 +909,9 @@ int arcompact_handle04_2a_dasm(DASM_OPS_32) // Load FROM Auxiliary register TO
output += sprintf( output, "LR");
if (F) output += sprintf( output, ".<F set, illegal>");
-// output += sprintf( output, " p(%d)", p);
-
-
+// output += sprintf( output, " p(%d)", p);
+
+
if (breg == LIMM_REG)
{
@@ -947,7 +926,6 @@ int arcompact_handle04_2a_dasm(DASM_OPS_32) // Load FROM Auxiliary register TO
if (p == 0)
{
-
COMMON32_GET_creg
COMMON32_GET_areg_reserved
@@ -960,7 +938,7 @@ int arcompact_handle04_2a_dasm(DASM_OPS_32) // Load FROM Auxiliary register TO
}
output += sprintf( output, "(%08x) ", limm );
-
+
}
else
{
@@ -976,7 +954,7 @@ int arcompact_handle04_2a_dasm(DASM_OPS_32) // Load FROM Auxiliary register TO
int auxreg = u;
PRINT_AUX_REGNAME
-
+
if (ares) output += sprintf( output, "reserved(%02x) ", ares );
}
else if (p == 2)
@@ -996,7 +974,7 @@ int arcompact_handle04_2a_dasm(DASM_OPS_32) // Load FROM Auxiliary register TO
}
int arcompact_handle04_2b_dasm(DASM_OPS_32) // Store TO Auxiliary register FROM register
-{
+{
// code at ~ 40073DFE in leapster bios is manually setting up a loop this way
// rather than using the lPcc opcode
@@ -1010,9 +988,9 @@ int arcompact_handle04_2b_dasm(DASM_OPS_32) // Store TO Auxiliary register FROM
output += sprintf( output, "SR");
if (F) output += sprintf( output, ".<F set, illegal>");
-// output += sprintf( output, " p(%d)", p);
-
-
+// output += sprintf( output, " p(%d)", p);
+
+
if (breg == LIMM_REG)
{
@@ -1031,7 +1009,6 @@ int arcompact_handle04_2b_dasm(DASM_OPS_32) // Store TO Auxiliary register FROM
if (p == 0)
{
-
COMMON32_GET_creg
COMMON32_GET_areg_reserved
@@ -1095,7 +1072,7 @@ int arcompact_handle04_29_dasm(DASM_OPS_32)
int arcompact_handle04_2f_helper_dasm(DASM_OPS_32, const char* optext)
{
- //
+ //
// 0010 0bbb pp10 1111 FBBB CCCC CCII IIII
int size = 4;
@@ -1105,8 +1082,8 @@ int arcompact_handle04_2f_helper_dasm(DASM_OPS_32, const char* optext)
output += sprintf( output, "%s", optext);
output += sprintf( output, "%s", flagbit[F]);
-// output += sprintf( output, " p(%d)", p);
-
+// output += sprintf( output, " p(%d)", p);
+
if (breg == LIMM_REG)
{
output += sprintf(output, " <no dst>, ");
@@ -1125,7 +1102,7 @@ int arcompact_handle04_2f_helper_dasm(DASM_OPS_32, const char* optext)
{
UINT32 limm;
GET_LIMM_32;
- size = 8;
+ size = 8;
output += sprintf( output, "(%08x) ", limm );
}
@@ -1232,11 +1209,11 @@ int arcompact_handle04_3x_helper_dasm(DASM_OPS_32, int dsize, int extend)
else
{
output += sprintf( output, "%s]", regnames[creg]);
- }
+ }
return size;
-
+
}
@@ -1279,7 +1256,7 @@ int arcompact_handle05_29_dasm(DASM_OPS_32) { return arcompact_handle04_helper_
int arcompact_handle05_2f_0x_helper_dasm(DASM_OPS_32, const char* optext)
{
- //
+ //
// 0010 1bbb pp10 1111 FBBB CCCC CCII IIII when pp == 0x00
// or
// 0010 1bbb pp10 1111 FBBB UUUU UUII IIII when pp == 0x01
@@ -1293,9 +1270,9 @@ int arcompact_handle05_2f_0x_helper_dasm(DASM_OPS_32, const char* optext)
output += sprintf( output, "%s", optext);
output += sprintf( output, "%s", flagbit[F]);
-// output += sprintf( output, " p(%d)", p);
-
-
+// output += sprintf( output, " p(%d)", p);
+
+
output += sprintf(output, " %s, ", regnames[breg]);
if (p == 0)
@@ -1306,7 +1283,7 @@ int arcompact_handle05_2f_0x_helper_dasm(DASM_OPS_32, const char* optext)
{
UINT32 limm;
GET_LIMM_32;
- size = 8;
+ size = 8;
output += sprintf( output, "(%08x) ", limm );
}
@@ -1469,7 +1446,7 @@ int arcompact_handle0e_0x_helper_dasm(DASM_OPS_16, const char* optext, int revop
GROUP_0e_GET_h;
COMMON16_GET_breg;
REG_16BIT_RANGE(breg);
-
+
if (h == LIMM_REG)
{
UINT32 limm;
@@ -1517,7 +1494,7 @@ int arcompact_handle0f_00_0x_helper_dasm(DASM_OPS_16, const char* optext)
COMMON16_GET_breg;
REG_16BIT_RANGE(breg);
-
+
print("%s %s", optext, regnames[breg]);
return 2;
@@ -1724,7 +1701,7 @@ int arcompact_handle17_07_dasm(DASM_OPS_16)
}
-// op bits remaining for 0x18_xx subgroups 0x071f
+// op bits remaining for 0x18_xx subgroups 0x071f
int arcompact_handle18_0x_helper_dasm(DASM_OPS_16, const char* optext, int st, int format)
{
@@ -1746,27 +1723,27 @@ int arcompact_handle18_0x_helper_dasm(DASM_OPS_16, const char* optext, int st, i
return 2;
}
-int arcompact_handle18_00_dasm(DASM_OPS_16)
+int arcompact_handle18_00_dasm(DASM_OPS_16)
{
return arcompact_handle18_0x_helper_dasm(DASM_PARAMS, "LD_S", 0,0);
}
-int arcompact_handle18_01_dasm(DASM_OPS_16)
+int arcompact_handle18_01_dasm(DASM_OPS_16)
{
return arcompact_handle18_0x_helper_dasm(DASM_PARAMS, "LDB_S", 0,0);
}
-int arcompact_handle18_02_dasm(DASM_OPS_16)
+int arcompact_handle18_02_dasm(DASM_OPS_16)
{
return arcompact_handle18_0x_helper_dasm(DASM_PARAMS, "ST_S", 1,0);
}
-int arcompact_handle18_03_dasm(DASM_OPS_16)
+int arcompact_handle18_03_dasm(DASM_OPS_16)
{
return arcompact_handle18_0x_helper_dasm(DASM_PARAMS, "STB_S", 1,0);
}
-int arcompact_handle18_04_dasm(DASM_OPS_16)
+int arcompact_handle18_04_dasm(DASM_OPS_16)
{
return arcompact_handle18_0x_helper_dasm(DASM_PARAMS, "ADD_S", 1,1); // check format
}
@@ -1791,8 +1768,8 @@ int arcompact_handle18_05_01_dasm(DASM_OPS_16)
return 2;
}
-// op bits remaining for 0x18_06_xx subgroups 0x0700
-int arcompact_handle18_06_01_dasm(DASM_OPS_16)
+// op bits remaining for 0x18_06_xx subgroups 0x0700
+int arcompact_handle18_06_01_dasm(DASM_OPS_16)
{
int breg;
COMMON16_GET_breg
@@ -1803,7 +1780,7 @@ int arcompact_handle18_06_01_dasm(DASM_OPS_16)
return 2;
}
-int arcompact_handle18_06_11_dasm(DASM_OPS_16)
+int arcompact_handle18_06_11_dasm(DASM_OPS_16)
{
int res = (op & 0x0700) >> 8;
op &= ~0x0700; // all bits now used
@@ -1816,8 +1793,8 @@ int arcompact_handle18_06_11_dasm(DASM_OPS_16)
return 2;
}
-// op bits remaining for 0x18_07_xx subgroups 0x0700
-int arcompact_handle18_07_01_dasm(DASM_OPS_16)
+// op bits remaining for 0x18_07_xx subgroups 0x0700
+int arcompact_handle18_07_01_dasm(DASM_OPS_16)
{
int breg;
COMMON16_GET_breg
@@ -1829,7 +1806,7 @@ int arcompact_handle18_07_01_dasm(DASM_OPS_16)
}
-int arcompact_handle18_07_11_dasm(DASM_OPS_16)
+int arcompact_handle18_07_11_dasm(DASM_OPS_16)
{
int res = (op & 0x0700) >> 8;
op &= ~0x0700; // all bits now used
@@ -1921,7 +1898,7 @@ int arcompact_handle1d_helper_dasm(DASM_OPS_16, const char* optext)
COMMON16_GET_breg;
REG_16BIT_RANGE(breg);
- int s = (op & 0x007f) >> 0; op &= ~0x007f;
+ int s = (op & 0x007f) >> 0; op &= ~0x007f;
if (s & 0x40) s = -0x40 + (s & 0x3f);
print("%s %s, 0 to 0x%08x", optext, regnames[breg], PC_ALIGNED32 + s*2);
@@ -1935,7 +1912,7 @@ int arcompact_handle1d_01_dasm(DASM_OPS_16) { return arcompact_handle1d_helper_
int arcompact_handle1e_0x_helper_dasm(DASM_OPS_16, const char* optext)
{
- int s = (op & 0x01ff) >> 0; op &= ~0x01ff;
+ int s = (op & 0x01ff) >> 0; op &= ~0x01ff;
if (s & 0x100) s = -0x100 + (s & 0xff);
print("%s %08x", optext, PC_ALIGNED32 + s*2);
@@ -1950,7 +1927,7 @@ int arcompact_handle1e_02_dasm(DASM_OPS_16) { return arcompact_handle1e_0x_help
int arcompact_handle1e_03_0x_helper_dasm(DASM_OPS_16, const char* optext)
{
- int s = (op & 0x003f) >> 0; op &= ~0x003f;
+ int s = (op & 0x003f) >> 0; op &= ~0x003f;
if (s & 0x020) s = -0x20 + (s & 0x1f);
print("%s %08x", optext, PC_ALIGNED32 + s*2);
@@ -1968,7 +1945,7 @@ int arcompact_handle1e_03_07_dasm(DASM_OPS_16) { return arcompact_handle1e_03_0
int arcompact_handle1f_dasm(DASM_OPS_16)
{
- int s = (op & 0x07ff) >> 0; op &= ~0x07ff;
+ int s = (op & 0x07ff) >> 0; op &= ~0x07ff;
if (s & 0x400) s = -0x400 + (s & 0x3ff);
print("BL_S %08x", PC_ALIGNED32 + (s*4));
@@ -2389,4 +2366,3 @@ int arcompact_handle18_07_1c_dasm(DASM_OPS_16) { print("<illegal 0x18_07_1c> (%
int arcompact_handle18_07_1d_dasm(DASM_OPS_16) { print("<illegal 0x18_07_1d> (%04x)", op); return 2;}
int arcompact_handle18_07_1e_dasm(DASM_OPS_16) { print("<illegal 0x18_07_1e> (%04x)", op); return 2;}
int arcompact_handle18_07_1f_dasm(DASM_OPS_16) { print("<illegal 0x18_07_1f> (%04x)", op); return 2;}
-
diff --git a/src/emu/cpu/arcompact/arcompactdasm_ops.h b/src/emu/cpu/arcompact/arcompactdasm_ops.h
index 5bdd6c67a3b..d853899faa6 100644
--- a/src/emu/cpu/arcompact/arcompactdasm_ops.h
+++ b/src/emu/cpu/arcompact/arcompactdasm_ops.h
@@ -15,8 +15,7 @@
#define GET_LIMM_32 \
limm = oprom[6] | (oprom[7] << 8); \
- limm |= (oprom[4] << 16) | (oprom[5] << 24); \
-
+ limm |= (oprom[4] << 16) | (oprom[5] << 24);
int arcompact_handle00_00_dasm(DASM_OPS_32);
int arcompact_handle00_01_dasm(DASM_OPS_32);
@@ -367,7 +366,7 @@ int arcompact_handle04_2f_3f_3a_dasm(DASM_OPS_32);
int arcompact_handle04_2f_3f_3b_dasm(DASM_OPS_32);
int arcompact_handle04_2f_3f_3c_dasm(DASM_OPS_32);
int arcompact_handle04_2f_3f_3d_dasm(DASM_OPS_32);
-int arcompact_handle04_2f_3f_3e_dasm(DASM_OPS_32);
+int arcompact_handle04_2f_3f_3e_dasm(DASM_OPS_32);
int arcompact_handle04_2f_3f_3f_dasm(DASM_OPS_32);
int arcompact_handle05_2f_00_dasm(DASM_OPS_32);
@@ -632,7 +631,7 @@ int arcompact_handle18_07_15_dasm(DASM_OPS_16);
int arcompact_handle18_07_16_dasm(DASM_OPS_16);
int arcompact_handle18_07_17_dasm(DASM_OPS_16);
int arcompact_handle18_07_18_dasm(DASM_OPS_16);
-int arcompact_handle18_07_19_dasm(DASM_OPS_16);
+int arcompact_handle18_07_19_dasm(DASM_OPS_16);
int arcompact_handle18_07_1a_dasm(DASM_OPS_16);
int arcompact_handle18_07_1b_dasm(DASM_OPS_16);
int arcompact_handle18_07_1c_dasm(DASM_OPS_16);