diff options
Diffstat (limited to 'src/devices')
-rw-r--r-- | src/devices/cpu/m6502/dm6502mtu.lst | 20 | ||||
-rw-r--r-- | src/devices/cpu/m6502/m6502.cpp | 14 | ||||
-rw-r--r-- | src/devices/cpu/m6502/m6502mtu.cpp | 76 | ||||
-rw-r--r-- | src/devices/cpu/m6502/m6502mtu.h | 151 | ||||
-rw-r--r-- | src/devices/cpu/m6502/om6502mtu.lst | 2007 | ||||
-rw-r--r-- | src/devices/machine/upd765.cpp | 2 |
6 files changed, 2264 insertions, 6 deletions
diff --git a/src/devices/cpu/m6502/dm6502mtu.lst b/src/devices/cpu/m6502/dm6502mtu.lst new file mode 100644 index 00000000000..fb3f52e0c2a --- /dev/null +++ b/src/devices/cpu/m6502/dm6502mtu.lst @@ -0,0 +1,20 @@ +# license:BSD-3-Clause +# copyright-holders:Olivier Galibert +# m6502 MTU - external circuitry for transparent banking handling +brk_mtu_imp ora_mtu_idx kil_mtu_non slo_mtu_idx nop_mtu_zpg ora_mtu_zpg asl_mtu_zpg slo_mtu_zpg php_mtu_imp ora_mtu_imm asl_mtu_acc anc_mtu_imm nop_mtu_aba ora_mtu_aba asl_mtu_aba slo_mtu_aba +bpl_mtu_rel ora_mtu_idy kil_mtu_non slo_mtu_idy nop_mtu_zpx ora_mtu_zpx asl_mtu_zpx slo_mtu_zpx clc_mtu_imp ora_mtu_aby nop_mtu_imp slo_mtu_aby nop_mtu_abx ora_mtu_abx asl_mtu_abx slo_mtu_abx +jsr_mtu_adr and_mtu_idx kil_mtu_non rla_mtu_idx bit_mtu_zpg and_mtu_zpg rol_mtu_zpg rla_mtu_zpg plp_mtu_imp and_mtu_imm rol_mtu_acc anc_mtu_imm bit_mtu_aba and_mtu_aba rol_mtu_aba rla_mtu_aba +bmi_mtu_rel and_mtu_idy kil_mtu_non rla_mtu_idy nop_mtu_zpx and_mtu_zpx rol_mtu_zpx rla_mtu_zpx sec_mtu_imp and_mtu_aby nop_mtu_imp rla_mtu_aby nop_mtu_abx and_mtu_abx rol_mtu_abx rla_mtu_abx +rti_mtu_imp eor_mtu_idx kil_mtu_non sre_mtu_idx nop_mtu_zpg eor_mtu_zpg lsr_mtu_zpg sre_mtu_zpg pha_mtu_imp eor_mtu_imm lsr_mtu_acc asr_mtu_imm jmp_mtu_adr eor_mtu_aba lsr_mtu_aba sre_mtu_aba +bvc_mtu_rel eor_mtu_idy kil_mtu_non sre_mtu_idy nop_mtu_zpx eor_mtu_zpx lsr_mtu_zpx sre_mtu_zpx cli_mtu_imp eor_mtu_aby nop_mtu_imp sre_mtu_aby nop_mtu_abx eor_mtu_abx lsr_mtu_abx sre_mtu_abx +rts_mtu_imp adc_mtu_idx kil_mtu_non rra_mtu_idx nop_mtu_zpg adc_mtu_zpg ror_mtu_zpg rra_mtu_zpg pla_mtu_imp adc_mtu_imm ror_mtu_acc arr_mtu_imm jmp_mtu_ind adc_mtu_aba ror_mtu_aba rra_mtu_aba +bvs_mtu_rel adc_mtu_idy kil_mtu_non rra_mtu_idy nop_mtu_zpx adc_mtu_zpx ror_mtu_zpx rra_mtu_zpx sei_mtu_imp adc_mtu_aby nop_mtu_imp rra_mtu_aby nop_mtu_abx adc_mtu_abx ror_mtu_abx rra_mtu_abx +nop_mtu_imm sta_mtu_idx nop_mtu_imm sax_mtu_idx sty_mtu_zpg sta_mtu_zpg stx_mtu_zpg sax_mtu_zpg dey_mtu_imp nop_mtu_imm txa_mtu_imp ane_mtu_imm sty_mtu_aba sta_mtu_aba stx_mtu_aba sax_mtu_aba +bcc_mtu_rel sta_mtu_idy kil_mtu_non sha_mtu_idy sty_mtu_zpx sta_mtu_zpx stx_mtu_zpy sax_mtu_zpy tya_mtu_imp sta_mtu_aby txs_mtu_imp shs_mtu_aby shy_mtu_abx sta_mtu_abx shx_mtu_aby sha_mtu_aby +ldy_mtu_imm lda_mtu_idx ldx_mtu_imm lax_mtu_idx ldy_mtu_zpg lda_mtu_zpg ldx_mtu_zpg lax_mtu_zpg tay_mtu_imp lda_mtu_imm tax_mtu_imp lxa_mtu_imm ldy_mtu_aba lda_mtu_aba ldx_mtu_aba lax_mtu_aba +bcs_mtu_rel lda_mtu_idy kil_mtu_non lax_mtu_idy ldy_mtu_zpx lda_mtu_zpx ldx_mtu_zpy lax_mtu_zpy clv_mtu_imp lda_mtu_aby tsx_mtu_imp las_mtu_aby ldy_mtu_abx lda_mtu_abx ldx_mtu_aby lax_mtu_aby +cpy_mtu_imm cmp_mtu_idx nop_mtu_imm dcp_mtu_idx cpy_mtu_zpg cmp_mtu_zpg dec_mtu_zpg dcp_mtu_zpg iny_mtu_imp cmp_mtu_imm dex_mtu_imp sbx_mtu_imm cpy_mtu_aba cmp_mtu_aba dec_mtu_aba dcp_mtu_aba +bne_mtu_rel cmp_mtu_idy kil_mtu_non dcp_mtu_idy nop_mtu_zpx cmp_mtu_zpx dec_mtu_zpx dcp_mtu_zpx cld_mtu_imp cmp_mtu_aby nop_mtu_imp dcp_mtu_aby nop_mtu_abx cmp_mtu_abx dec_mtu_abx dcp_mtu_abx +cpx_mtu_imm sbc_mtu_idx nop_mtu_imm isb_mtu_idx cpx_mtu_zpg sbc_mtu_zpg inc_mtu_zpg isb_mtu_zpg inx_mtu_imp sbc_mtu_imm nop_mtu_imp sbc_mtu_imm cpx_mtu_aba sbc_mtu_aba inc_mtu_aba isb_mtu_aba +beq_mtu_rel sbc_mtu_idy kil_mtu_non isb_mtu_idy nop_mtu_zpx sbc_mtu_zpx inc_mtu_zpx isb_mtu_zpx sed_mtu_imp sbc_mtu_aby nop_mtu_imp isb_mtu_aby nop_mtu_abx sbc_mtu_abx inc_mtu_abx isb_mtu_abx +reset_mtu diff --git a/src/devices/cpu/m6502/m6502.cpp b/src/devices/cpu/m6502/m6502.cpp index 5db4186ebd9..3817ab33187 100644 --- a/src/devices/cpu/m6502/m6502.cpp +++ b/src/devices/cpu/m6502/m6502.cpp @@ -43,12 +43,14 @@ void m6502_device::device_start() void m6502_device::init() { - space(AS_PROGRAM).cache(mintf->cprogram); - space(has_space(AS_OPCODES) ? AS_OPCODES : AS_PROGRAM).cache(mintf->csprogram); - if(space(AS_PROGRAM).addr_width() > 14) - space(AS_PROGRAM).specific(mintf->program); - else - space(AS_PROGRAM).specific(mintf->program14); + if(mintf) { + space(AS_PROGRAM).cache(mintf->cprogram); + space(has_space(AS_OPCODES) ? AS_OPCODES : AS_PROGRAM).cache(mintf->csprogram); + if(space(AS_PROGRAM).addr_width() > 14) + space(AS_PROGRAM).specific(mintf->program); + else + space(AS_PROGRAM).specific(mintf->program14); + } sync_w.resolve_safe(); diff --git a/src/devices/cpu/m6502/m6502mtu.cpp b/src/devices/cpu/m6502/m6502mtu.cpp new file mode 100644 index 00000000000..917ca93158e --- /dev/null +++ b/src/devices/cpu/m6502/m6502mtu.cpp @@ -0,0 +1,76 @@ +// license:BSD-3-Clause +// copyright-holders:Olivier Galibert +/*************************************************************************** + + m6502mtu.cpp + + M6502 with MTU external banking hardware + +***************************************************************************/ + +#include "emu.h" +#include "m6502mtu.h" + +DEFINE_DEVICE_TYPE(M6502MTU, m6502mtu_device, "m6502mtu", "M6502 with MTU banking") + +m6502mtu_device::m6502mtu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : + m6502_device(mconfig, M6502MTU, tag, owner, clock) +{ + program_config.m_addr_width = 18; + sprogram_config.m_addr_width = 18; +} + +void m6502mtu_device::device_start() +{ + mintf = nullptr; + space(AS_PROGRAM).specific(cprogram); + space(has_space(AS_OPCODES) ? AS_OPCODES : AS_PROGRAM).specific(csprogram); + + save_item(NAME(low_instruction)); + save_item(NAME(interrupt_mode)); + save_item(NAME(pbank)); + save_item(NAME(dbank)); + + init(); +} + +void m6502mtu_device::device_reset() +{ + m6502_device::device_reset(); + pbank = 0; + dbank = 0; + low_instruction = false; + interrupt_mode = false; +} + + +void m6502mtu_device::prefetchd() +{ + sync = true; + sync_w(ASSERT_LINE); + NPC = PC; + low_instruction = PC < 0x200; + IR = csprogram.read_byte(low_instruction || interrupt_mode ? PC : PC | pbank); + sync = false; + sync_w(CLEAR_LINE); + + if((nmi_pending || ((irq_state || apu_irq_state) && !(P & F_I))) && !inhibit_interrupts) { + irq_taken = true; + IR = 0x00; + } else + PC++; +} + +void m6502mtu_device::prefetchd_noirq() +{ + sync = true; + sync_w(ASSERT_LINE); + NPC = PC; + low_instruction = PC < 0x200; + IR = csprogram.read_byte(low_instruction || interrupt_mode ? PC : PC | pbank); + sync = false; + sync_w(CLEAR_LINE); + PC++; +} + +#include "cpu/m6502/m6502mtu.hxx" diff --git a/src/devices/cpu/m6502/m6502mtu.h b/src/devices/cpu/m6502/m6502mtu.h new file mode 100644 index 00000000000..066ed1cab58 --- /dev/null +++ b/src/devices/cpu/m6502/m6502mtu.h @@ -0,0 +1,151 @@ +// license:BSD-3-Clause +// copyright-holders:Olivier Galibert +/*************************************************************************** + + m6502mtu.h + + M6502 with MTU external banking hardware + +***************************************************************************/ + +#ifndef MAME_CPU_M6502_M6502MTU_H +#define MAME_CPU_M6502_M6502MTU_H + +#include "m6502.h" + +class m6502mtu_device : public m6502_device { +public: + m6502mtu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + virtual void do_exec_full() override; + virtual void do_exec_partial() override; + + void set_pbank(u32 bank) { pbank = bank << 16; } + void set_dbank(u32 bank) { dbank = bank << 16; } + +protected: + virtual void device_start() override; + virtual void device_reset() override; + + memory_access<18, 0, 0, ENDIANNESS_LITTLE>::specific cprogram; + memory_access<18, 0, 0, ENDIANNESS_LITTLE>::specific csprogram; + + bool low_instruction, interrupt_mode; + u32 pbank, dbank; + + uint8_t readd(uint16_t adr) { return cprogram.read_byte(low_instruction || interrupt_mode ? adr : adr | pbank); } + void writed(uint16_t adr, uint8_t val) { cprogram.write_byte(low_instruction || interrupt_mode ? adr : adr | pbank, val); } + uint8_t readi(uint16_t adr) { return cprogram.read_byte(adr | dbank); } + void writei(uint16_t adr, uint8_t val) { cprogram.write_byte(adr | dbank, val); } + uint8_t readil(uint16_t adr) { return cprogram.read_byte(low_instruction ? adr | dbank : adr); } + void writeil(uint16_t adr, uint8_t val) { cprogram.write_byte(low_instruction ? adr | dbank : adr, val); } + uint8_t readd_arg(uint16_t adr) { return readd(adr); } + uint8_t readd_pc() { return readd(PC++); } + uint8_t readd_pc_noinc() { return readd(PC); } + void prefetchd(); + void prefetchd_noirq(); + + void interrupt_mode_on() { interrupt_mode = true; } + void interrupt_mode_off() { interrupt_mode = false; } + +#define O(o) void o ## _full(); void o ## _partial() + + // NMOS 6502 opcodes + // documented opcodes + O(adc_mtu_aba); O(adc_mtu_abx); O(adc_mtu_aby); O(adc_mtu_idx); O(adc_mtu_idy); O(adc_mtu_imm); O(adc_mtu_zpg); O(adc_mtu_zpx); + O(and_mtu_aba); O(and_mtu_abx); O(and_mtu_aby); O(and_mtu_imm); O(and_mtu_idx); O(and_mtu_idy); O(and_mtu_zpg); O(and_mtu_zpx); + O(asl_mtu_aba); O(asl_mtu_abx); O(asl_mtu_acc); O(asl_mtu_zpg); O(asl_mtu_zpx); + O(bcc_mtu_rel); + O(bcs_mtu_rel); + O(beq_mtu_rel); + O(bit_mtu_aba); O(bit_mtu_zpg); + O(bmi_mtu_rel); + O(bne_mtu_rel); + O(bpl_mtu_rel); + O(brk_mtu_imp); + O(bvc_mtu_rel); + O(bvs_mtu_rel); + O(clc_mtu_imp); + O(cld_mtu_imp); + O(cli_mtu_imp); + O(clv_mtu_imp); + O(cmp_mtu_aba); O(cmp_mtu_abx); O(cmp_mtu_aby); O(cmp_mtu_idx); O(cmp_mtu_idy); O(cmp_mtu_imm); O(cmp_mtu_zpg); O(cmp_mtu_zpx); + O(cpx_mtu_aba); O(cpx_mtu_imm); O(cpx_mtu_zpg); + O(cpy_mtu_aba); O(cpy_mtu_imm); O(cpy_mtu_zpg); + O(dec_mtu_aba); O(dec_mtu_abx); O(dec_mtu_zpg); O(dec_mtu_zpx); + O(dex_mtu_imp); + O(dey_mtu_imp); + O(eor_mtu_aba); O(eor_mtu_abx); O(eor_mtu_aby); O(eor_mtu_idx); O(eor_mtu_idy); O(eor_mtu_imm); O(eor_mtu_zpg); O(eor_mtu_zpx); + O(inc_mtu_aba); O(inc_mtu_abx); O(inc_mtu_zpg); O(inc_mtu_zpx); + O(inx_mtu_imp); + O(iny_mtu_imp); + O(jmp_mtu_adr); O(jmp_mtu_ind); + O(jsr_mtu_adr); + O(lda_mtu_aba); O(lda_mtu_abx); O(lda_mtu_aby); O(lda_mtu_idx); O(lda_mtu_idy); O(lda_mtu_imm); O(lda_mtu_zpg); O(lda_mtu_zpx); + O(ldx_mtu_aba); O(ldx_mtu_aby); O(ldx_mtu_imm); O(ldx_mtu_zpg); O(ldx_mtu_zpy); + O(ldy_mtu_aba); O(ldy_mtu_abx); O(ldy_mtu_imm); O(ldy_mtu_zpg); O(ldy_mtu_zpx); + O(lsr_mtu_aba); O(lsr_mtu_abx); O(lsr_mtu_acc); O(lsr_mtu_zpg); O(lsr_mtu_zpx); + O(nop_mtu_imp); + O(ora_mtu_aba); O(ora_mtu_abx); O(ora_mtu_aby); O(ora_mtu_imm); O(ora_mtu_idx); O(ora_mtu_idy); O(ora_mtu_zpg); O(ora_mtu_zpx); + O(pha_mtu_imp); + O(php_mtu_imp); + O(pla_mtu_imp); + O(plp_mtu_imp); + O(rol_mtu_aba); O(rol_mtu_abx); O(rol_mtu_acc); O(rol_mtu_zpg); O(rol_mtu_zpx); + O(ror_mtu_aba); O(ror_mtu_abx); O(ror_mtu_acc); O(ror_mtu_zpg); O(ror_mtu_zpx); + O(rti_mtu_imp); + O(rts_mtu_imp); + O(sbc_mtu_aba); O(sbc_mtu_abx); O(sbc_mtu_aby); O(sbc_mtu_idx); O(sbc_mtu_idy); O(sbc_mtu_imm); O(sbc_mtu_zpg); O(sbc_mtu_zpx); + O(sec_mtu_imp); + O(sed_mtu_imp); + O(sei_mtu_imp); + O(sta_mtu_aba); O(sta_mtu_abx); O(sta_mtu_aby); O(sta_mtu_idx); O(sta_mtu_idy); O(sta_mtu_zpg); O(sta_mtu_zpx); + O(stx_mtu_aba); O(stx_mtu_zpg); O(stx_mtu_zpy); + O(sty_mtu_aba); O(sty_mtu_zpg); O(sty_mtu_zpx); + O(tax_mtu_imp); + O(tay_mtu_imp); + O(tsx_mtu_imp); + O(txa_mtu_imp); + O(txs_mtu_imp); + O(tya_mtu_imp); + + // exceptions + O(reset_mtu); + + // undocumented reliable instructions + O(dcp_mtu_aba); O(dcp_mtu_abx); O(dcp_mtu_aby); O(dcp_mtu_idx); O(dcp_mtu_idy); O(dcp_mtu_zpg); O(dcp_mtu_zpx); + O(isb_mtu_aba); O(isb_mtu_abx); O(isb_mtu_aby); O(isb_mtu_idx); O(isb_mtu_idy); O(isb_mtu_zpg); O(isb_mtu_zpx); + O(lax_mtu_aba); O(lax_mtu_aby); O(lax_mtu_idx); O(lax_mtu_idy); O(lax_mtu_zpg); O(lax_mtu_zpy); + O(rla_mtu_aba); O(rla_mtu_abx); O(rla_mtu_aby); O(rla_mtu_idx); O(rla_mtu_idy); O(rla_mtu_zpg); O(rla_mtu_zpx); + O(rra_mtu_aba); O(rra_mtu_abx); O(rra_mtu_aby); O(rra_mtu_idx); O(rra_mtu_idy); O(rra_mtu_zpg); O(rra_mtu_zpx); + O(sax_mtu_aba); O(sax_mtu_idx); O(sax_mtu_zpg); O(sax_mtu_zpy); + O(sbx_mtu_imm); + O(sha_mtu_aby); O(sha_mtu_idy); + O(shs_mtu_aby); + O(shx_mtu_aby); + O(shy_mtu_abx); + O(slo_mtu_aba); O(slo_mtu_abx); O(slo_mtu_aby); O(slo_mtu_idx); O(slo_mtu_idy); O(slo_mtu_zpg); O(slo_mtu_zpx); + O(sre_mtu_aba); O(sre_mtu_abx); O(sre_mtu_aby); O(sre_mtu_idx); O(sre_mtu_idy); O(sre_mtu_zpg); O(sre_mtu_zpx); + + // undocumented unreliable instructions + // behaviour differs between visual6502 and online docs, which + // is a clear sign reliability is not to be expected + // implemented version follows visual6502 + O(anc_mtu_imm); + O(ane_mtu_imm); + O(arr_mtu_imm); + O(asr_mtu_imm); + O(las_mtu_aby); + O(lxa_mtu_imm); + + // nop variants + O(nop_mtu_imm); O(nop_mtu_aba); O(nop_mtu_abx); O(nop_mtu_zpg); O(nop_mtu_zpx); + + // system killers + O(kil_mtu_non); + +#undef O +}; + +DECLARE_DEVICE_TYPE(M6502MTU, m6502mtu_device); + +#endif // MAME_CPU_M6502_M6502MTU_H diff --git a/src/devices/cpu/m6502/om6502mtu.lst b/src/devices/cpu/m6502/om6502mtu.lst new file mode 100644 index 00000000000..b30d0bc940a --- /dev/null +++ b/src/devices/cpu/m6502/om6502mtu.lst @@ -0,0 +1,2007 @@ +# license:BSD-3-Clause +# copyright-holders:Olivier Galibert +# NMOS 6502 opcodes, with modifications for the MTU-130/Monomeg external banking circuitry + +# Rules: +# +# A "low" instruction is an instruction for which the first byte +# (prefetch address) is at an address < 0x200. +# +# A memory access is indirect if: +# It's the data read/write part of a (abs, X) access +# It's the data read/write part of a (abs), Y access +# It's the data read/write part of a abs, abs,X or abs,Y access in a low instruction +# +# All other accesses are direct +# +# The address bus is 18 bits, with the two top bits being the bank. +# +# BRK and taking an interrupt activates the interrupt mode. Prefetching rti deactivates it. +# +# Two bank numbers are programmable, called "program" and "data". +# +# Direct accesses use the program bank unless in interrupt mode or +# for a low instruction where bank 0 is used instead. +# +# Indirect accesses use the data bank. +# +# At the opcode level we qualify each access depending on its +# category, always direct, always indirect, or indirect if in a low +# instruction. Prefetch takes care of detecting the low instructions. +# Interrupt mode is directly toggled in the brk and rti opcodes. +# +# readd/writei = direct memory access +# readi/writei = indirect memory access +# readil/writeil = indirect memory access for low instructions, direct otherwise + +# documented opcodes + +adc_mtu_aba + TMP = readd_pc(); + TMP = set_h(TMP, readd_pc()); + TMP2 = readil(TMP); + do_adc(TMP2); + prefetchd(); + +adc_mtu_abx + TMP = readd_pc(); + TMP = set_h(TMP, readd_pc()); + if(page_changing(TMP, X)) { + readd(set_l(TMP, TMP+X)); + } + TMP += X; + TMP2 = readil(TMP); + do_adc(TMP2); + prefetchd(); + +adc_mtu_aby + TMP = readd_pc(); + TMP = set_h(TMP, readd_pc()); + if(page_changing(TMP, Y)) { + readd(set_l(TMP, TMP+Y)); + } + TMP += Y; + TMP2 = readil(TMP); + do_adc(TMP2); + prefetchd(); + +adc_mtu_idx + TMP2 = readd_pc(); + readd(TMP2); + TMP2 += X; + TMP = readd(TMP2 & 0xff); + TMP = set_h(TMP, readd((TMP2+1) & 0xff)); + do_adc(readi(TMP)); + prefetchd(); + +adc_mtu_idy + TMP2 = readd_pc(); + TMP = readd(TMP2); + TMP = set_h(TMP, readd((TMP2+1) & 0xff)); + if(page_changing(TMP, Y)) { + readi(set_l(TMP, TMP+Y)); + } + do_adc(readi(TMP+Y)); + prefetchd(); + +adc_mtu_imm + TMP = readd_pc(); + do_adc(TMP); + prefetchd(); + +adc_mtu_zpg + TMP = readd_pc(); + TMP2 = readd(TMP); + do_adc(TMP2); + prefetchd(); + +adc_mtu_zpx + TMP = readd_pc(); + readd(TMP); + TMP2 = readd(uint8_t(TMP+X)); + do_adc(TMP2); + prefetchd(); + +and_mtu_aba + TMP = readd_pc(); + TMP = set_h(TMP, readd_pc()); + A &= readil(TMP); + set_nz(A); + prefetchd(); + +and_mtu_abx + TMP = readd_pc(); + TMP = set_h(TMP, readd_pc()); + if(page_changing(TMP, X)) { + readil(set_l(TMP, TMP+X)); + } + TMP += X; + A &= readil(TMP); + set_nz(A); + prefetchd(); + +and_mtu_aby + TMP = readd_pc(); + TMP = set_h(TMP, readd_pc()); + if(page_changing(TMP, Y)) { + readil(set_l(TMP, TMP+Y)); + } + TMP += Y; + A &= readil(TMP); + set_nz(A); + prefetchd(); + +and_mtu_imm + A &= readd_pc(); + set_nz(A); + prefetchd(); + +and_mtu_idx + TMP2 = readd_pc(); + readd(TMP2); + TMP2 += X; + TMP = readd(TMP2 & 0xff); + TMP = set_h(TMP, readd((TMP2+1) & 0xff)); + A &= readi(TMP); + set_nz(A); + prefetchd(); + +and_mtu_idy + TMP2 = readd_pc(); + TMP = readd(TMP2); + TMP = set_h(TMP, readd((TMP2+1) & 0xff)); + if(page_changing(TMP, Y)) { + readi(set_l(TMP, TMP+Y)); + } + A &= readi(TMP+Y); + set_nz(A); + prefetchd(); + +and_mtu_zpg + TMP = readd_pc(); + A &= readd(TMP); + set_nz(A); + prefetchd(); + +and_mtu_zpx + TMP = readd_pc(); + readd(TMP); + A &= readd(uint8_t(TMP+X)); + set_nz(A); + prefetchd(); + +asl_mtu_aba + TMP = readd_pc(); + TMP = set_h(TMP, readd_pc()); + TMP2 = readil(TMP); + writeil(TMP, TMP2); + TMP2 = do_asl(TMP2); + writeil(TMP, TMP2); + prefetchd(); + +asl_mtu_abx + TMP = readd_pc(); + TMP = set_h(TMP, readd_pc()); + readil(set_l(TMP, TMP+X)); + TMP += X; + TMP2 = readil(TMP); + writeil(TMP, TMP2); + TMP2 = do_asl(TMP2); + writeil(TMP, TMP2); + prefetchd(); + +asl_mtu_acc + readd_pc_noinc(); + A = do_asl(A); + prefetchd(); + +asl_mtu_zpg + TMP = readd_pc(); + TMP2 = readd(TMP); + writed(TMP, TMP2); + TMP2 = do_asl(TMP2); + writed(TMP, TMP2); + prefetchd(); + +asl_mtu_zpx + TMP = readd_pc(); + readd(TMP); + TMP = uint8_t(TMP+X); + TMP2 = readd(TMP); + writed(TMP, TMP2); + TMP2 = do_asl(TMP2); + writed(TMP, TMP2); + prefetchd(); + +bcc_mtu_rel + TMP = readd_pc(); + if(!(P & F_C)) { + readd_pc_noinc(); + if(page_changing(PC, int8_t(TMP))) { + readd_arg(set_l(PC, PC+int8_t(TMP))); + } + PC += int8_t(TMP); + } + prefetchd(); + +bcs_mtu_rel + TMP = readd_pc(); + if(P & F_C) { + readd_pc_noinc(); + if(page_changing(PC, int8_t(TMP))) { + readd_arg(set_l(PC, PC+int8_t(TMP))); + } + PC += int8_t(TMP); + } + prefetchd(); + +beq_mtu_rel + TMP = readd_pc(); + if(P & F_Z) { + readd_pc_noinc(); + if(page_changing(PC, int8_t(TMP))) { + readd_arg(set_l(PC, PC+int8_t(TMP))); + } + PC += int8_t(TMP); + } + prefetchd(); + +bit_mtu_aba + TMP = readd_pc(); + TMP = set_h(TMP, readd_pc()); + do_bit(readil(TMP)); + prefetchd(); + +bit_mtu_zpg + TMP = readd_pc(); + do_bit(readd(TMP)); + prefetchd(); + +bmi_mtu_rel + TMP = readd_pc(); + if(P & F_N) { + readd_pc_noinc(); + if(page_changing(PC, int8_t(TMP))) { + readd_arg(set_l(PC, PC+int8_t(TMP))); + } + PC += int8_t(TMP); + } + prefetchd(); + +bne_mtu_rel + TMP = readd_pc(); + if(!(P & F_Z)) { + readd_pc_noinc(); + if(page_changing(PC, int8_t(TMP))) { + readd_arg(set_l(PC, PC+int8_t(TMP))); + } + PC += int8_t(TMP); + } + prefetchd(); + +bpl_mtu_rel + TMP = readd_pc(); + if(!(P & F_N)) { + readd_pc_noinc(); + if(page_changing(PC, int8_t(TMP))) { + readd_arg(set_l(PC, PC+int8_t(TMP))); + } + PC += int8_t(TMP); + } + prefetchd(); + +brk_mtu_imp + // The 6502 bug when a nmi occurs in a brk is reproduced (case !irq_taken && nmi_pending) + if(irq_taken) { + readd_pc_noinc(); + } else { + readd_pc(); + } + writed(SP, PC >> 8); + dec_SP(); + writed(SP, PC); + dec_SP(); + writed(SP, irq_taken ? P & ~F_B : P); + dec_SP(); + // Interrupt taken is detected by the sequence of three writes, so is active now + interrupt_mode_on(); + if(nmi_pending) { + PC = readd_arg(0xfffa); + PC = set_h(PC, readd_arg(0xfffb)); + nmi_pending = false; + standard_irq_callback(NMI_LINE); + } else { + PC = readd_arg(0xfffe); + PC = set_h(PC, readd_arg(0xffff)); + if(irq_taken) + standard_irq_callback(IRQ_LINE); + } + irq_taken = false; + P |= F_I; // Do *not* move after the prefetch + prefetchd(); + inst_state = -1; + +bvc_mtu_rel + TMP = readd_pc(); + if(!(P & F_V)) { + readd_pc_noinc(); + if(page_changing(PC, int8_t(TMP))) { + readd_arg(set_l(PC, PC+int8_t(TMP))); + } + PC += int8_t(TMP); + } + prefetchd(); + +bvs_mtu_rel + TMP = readd_pc(); + if(P & F_V) { + readd_pc_noinc(); + if(page_changing(PC, int8_t(TMP))) { + readd_arg(set_l(PC, PC+int8_t(TMP))); + } + PC += int8_t(TMP); + } + prefetchd(); + +clc_mtu_imp + readd_pc_noinc(); + P &= ~F_C; + prefetchd(); + +cld_mtu_imp + readd_pc_noinc(); + P &= ~F_D; + prefetchd(); + +cli_mtu_imp + readd_pc_noinc(); + prefetchd(); + P &= ~F_I; // Do *not* move it before the prefetch + +clv_mtu_imp + readd_pc_noinc(); + P &= ~F_V; + prefetchd(); + +cmp_mtu_aba + TMP = readd_pc(); + TMP = set_h(TMP, readd_pc()); + TMP2 = readil(TMP); + do_cmp(A, TMP2); + prefetchd(); + +cmp_mtu_abx + TMP = readd_pc(); + TMP = set_h(TMP, readd_pc()); + if(page_changing(TMP, X)) { + readil(set_l(TMP, TMP+X)); + } + TMP += X; + TMP2 = readil(TMP); + do_cmp(A, TMP2); + prefetchd(); + +cmp_mtu_aby + TMP = readd_pc(); + TMP = set_h(TMP, readd_pc()); + if(page_changing(TMP, Y)) { + readil(set_l(TMP, TMP+Y)); + } + TMP += Y; + TMP2 = readil(TMP); + do_cmp(A, TMP2); + prefetchd(); + +cmp_mtu_idx + TMP2 = readd_pc(); + readd(TMP2); + TMP2 += X; + TMP = readd(TMP2 & 0xff); + TMP = set_h(TMP, readd((TMP2+1) & 0xff)); + do_cmp(A, readi(TMP)); + prefetchd(); + +cmp_mtu_idy + TMP2 = readd_pc(); + TMP = readd(TMP2); + TMP = set_h(TMP, readd((TMP2+1) & 0xff)); + if(page_changing(TMP, Y)) { + readi(set_l(TMP, TMP+Y)); + } + do_cmp(A, readi(TMP+Y)); + prefetchd(); + +cmp_mtu_imm + TMP = readd_pc(); + do_cmp(A, TMP); + prefetchd(); + +cmp_mtu_zpg + TMP = readd_pc(); + TMP2 = readd(TMP); + do_cmp(A, TMP2); + prefetchd(); + +cmp_mtu_zpx + TMP = readd_pc(); + readd(TMP); + TMP2 = readd(uint8_t(TMP+X)); + do_cmp(A, TMP2); + prefetchd(); + +cpx_mtu_aba + TMP = readd_pc(); + TMP = set_h(TMP, readd_pc()); + TMP2 = readil(TMP); + do_cmp(X, TMP2); + prefetchd(); + +cpx_mtu_imm + TMP = readd_pc(); + do_cmp(X, TMP); + prefetchd(); + +cpx_mtu_zpg + TMP = readd_pc(); + TMP2 = readd(TMP); + do_cmp(X, TMP2); + prefetchd(); + +cpy_mtu_aba + TMP = readd_pc(); + TMP = set_h(TMP, readd_pc()); + TMP2 = readil(TMP); + do_cmp(Y, TMP2); + prefetchd(); + +cpy_mtu_imm + TMP = readd_pc(); + do_cmp(Y, TMP); + prefetchd(); + +cpy_mtu_zpg + TMP = readd_pc(); + TMP2 = readd(TMP); + do_cmp(Y, TMP2); + prefetchd(); + +dec_mtu_aba + TMP = readd_pc(); + TMP = set_h(TMP, readd_pc()); + TMP2 = readil(TMP); + writeil(TMP, TMP2); + TMP2--; + set_nz(TMP2); + writeil(TMP, TMP2); + prefetchd(); + +dec_mtu_abx + TMP = readd_pc(); + TMP = set_h(TMP, readd_pc()); + readil(set_l(TMP, TMP+X)); + TMP += X; + TMP2 = readil(TMP); + writeil(TMP, TMP2); + TMP2--; + set_nz(TMP2); + writeil(TMP, TMP2); + prefetchd(); + +dec_mtu_zpg + TMP = readd_pc(); + TMP2 = readd(TMP); + writed(TMP, TMP2); + TMP2--; + set_nz(TMP2); + writed(TMP, TMP2); + prefetchd(); + +dec_mtu_zpx + TMP = readd_pc(); + readd(TMP); + TMP = uint8_t(TMP+X); + TMP2 = readd(TMP); + writed(TMP, TMP2); + TMP2--; + set_nz(TMP2); + writed(TMP, TMP2); + prefetchd(); + +dex_mtu_imp + readd_pc_noinc(); + X--; + set_nz(X); + prefetchd(); + +dey_mtu_imp + readd_pc_noinc(); + Y--; + set_nz(Y); + prefetchd(); + +eor_mtu_aba + TMP = readd_pc(); + TMP = set_h(TMP, readd_pc()); + A ^= readil(TMP); + set_nz(A); + prefetchd(); + +eor_mtu_abx + TMP = readd_pc(); + TMP = set_h(TMP, readd_pc()); + if(page_changing(TMP, X)) { + readil(set_l(TMP, TMP+X)); + } + TMP += X; + A ^= readil(TMP); + set_nz(A); + prefetchd(); + +eor_mtu_aby + TMP = readd_pc(); + TMP = set_h(TMP, readd_pc()); + if(page_changing(TMP, Y)) { + readil(set_l(TMP, TMP+Y)); + } + TMP += Y; + A ^= readil(TMP); + set_nz(A); + prefetchd(); + +eor_mtu_idx + TMP2 = readd_pc(); + readd(TMP2); + TMP2 += X; + TMP = readd(TMP2 & 0xff); + TMP = set_h(TMP, readd((TMP2+1) & 0xff)); + A ^= readi(TMP); + set_nz(A); + prefetchd(); + +eor_mtu_idy + TMP2 = readd_pc(); + TMP = readd(TMP2); + TMP = set_h(TMP, readd((TMP2+1) & 0xff)); + if(page_changing(TMP, Y)) { + readi(set_l(TMP, TMP+Y)); + } + A ^= readi(TMP+Y); + set_nz(A); + prefetchd(); + +eor_mtu_imm + A ^= readd_pc(); + set_nz(A); + prefetchd(); + +eor_mtu_zpg + TMP = readd_pc(); + A ^= readd(TMP); + set_nz(A); + prefetchd(); + +eor_mtu_zpx + TMP = readd_pc(); + readd(TMP); + A ^= readd(uint8_t(TMP+X)); + set_nz(A); + prefetchd(); + +inc_mtu_aba + TMP = readd_pc(); + TMP = set_h(TMP, readd_pc()); + TMP2 = readil(TMP); + writeil(TMP, TMP2); + TMP2++; + set_nz(TMP2); + writeil(TMP, TMP2); + prefetchd(); + +inc_mtu_abx + TMP = readd_pc(); + TMP = set_h(TMP, readd_pc()); + readil(set_l(TMP, TMP+X)); + TMP += X; + TMP2 = readil(TMP); + writeil(TMP, TMP2); + TMP2++; + set_nz(TMP2); + writeil(TMP, TMP2); + prefetchd(); + +inc_mtu_zpg + TMP = readd_pc(); + TMP2 = readd(TMP); + writed(TMP, TMP2); + TMP2++; + set_nz(TMP2); + writed(TMP, TMP2); + prefetchd(); + +inc_mtu_zpx + TMP = readd_pc(); + readd(TMP); + TMP = uint8_t(TMP+X); + TMP2 = readd(TMP); + writed(TMP, TMP2); + TMP2++; + set_nz(TMP2); + writed(TMP, TMP2); + prefetchd(); + +inx_mtu_imp + readd_pc_noinc(); + X++; + set_nz(X); + prefetchd(); + +iny_mtu_imp + readd_pc_noinc(); + Y++; + set_nz(Y); + prefetchd(); + +jmp_mtu_adr + TMP = readd_pc(); + TMP = set_h(TMP, readd_pc()); + PC = TMP; + prefetchd(); + +jmp_mtu_ind + TMP = readd_pc(); + TMP = set_h(TMP, readd_pc()); + PC = readd(TMP); + PC = set_h(PC, readd(set_l(TMP, TMP+1))); + prefetchd(); + +jsr_mtu_adr + TMP = readd_pc(); + readd(SP); + writed(SP, PC>>8); + dec_SP(); + writed(SP, PC); + dec_SP(); + TMP = set_h(TMP, readd_pc()); + PC = TMP; + prefetchd(); + +lda_mtu_aba + TMP = readd_pc(); + TMP = set_h(TMP, readd_pc()); + A = readil(TMP); + set_nz(A); + prefetchd(); + +lda_mtu_abx + TMP = readd_pc(); + TMP = set_h(TMP, readd_pc()); + if(page_changing(TMP, X)) { + readil(set_l(TMP, TMP+X)); + } + A = readil(TMP + X); + set_nz(A); + prefetchd(); + +lda_mtu_aby + TMP = readd_pc(); + TMP = set_h(TMP, readd_pc()); + if(page_changing(TMP, Y)) { + readil(set_l(TMP, TMP+Y)); + } + A = readil(TMP + Y); + set_nz(A); + prefetchd(); + +lda_mtu_idx + TMP2 = readd_pc(); + readd(TMP2); + TMP2 += X; + TMP = readd(TMP2 & 0xff); + TMP = set_h(TMP, readd((TMP2+1) & 0xff)); + A = readi(TMP); + set_nz(A); + prefetchd(); + +lda_mtu_idy + TMP2 = readd_pc(); + TMP = readd(TMP2); + TMP = set_h(TMP, readd((TMP2+1) & 0xff)); + if(page_changing(TMP, Y)) { + readi(set_l(TMP, TMP+Y)); + } + A = readi(TMP+Y); + set_nz(A); + prefetchd(); + +lda_mtu_imm + A = readd_pc(); + set_nz(A); + prefetchd(); + +lda_mtu_zpg + TMP = readd_pc(); + A = readd(TMP); + set_nz(A); + prefetchd(); + +lda_mtu_zpx + TMP = readd_pc(); + readd(TMP); + A = readd(uint8_t(TMP+X)); + set_nz(A); + prefetchd(); + +ldx_mtu_aba + TMP = readd_pc(); + TMP = set_h(TMP, readd_pc()); + X = readil(TMP); + set_nz(X); + prefetchd(); + +ldx_mtu_aby + TMP = readd_pc(); + TMP = set_h(TMP, readd_pc()); + if(page_changing(TMP, Y)) { + readil(set_l(TMP, TMP+Y)); + } + X = readil(TMP + Y); + set_nz(X); + prefetchd(); + +ldx_mtu_imm + X = readd_pc(); + set_nz(X); + prefetchd(); + +ldx_mtu_zpg + TMP = readd_pc(); + X = readd(TMP); + set_nz(X); + prefetchd(); + +ldx_mtu_zpy + TMP = readd_pc(); + readd(TMP); + X = readd(uint8_t(TMP+Y)); + set_nz(X); + prefetchd(); + +ldy_mtu_aba + TMP = readd_pc(); + TMP = set_h(TMP, readd_pc()); + Y = readil(TMP); + set_nz(Y); + prefetchd(); + +ldy_mtu_abx + TMP = readd_pc(); + TMP = set_h(TMP, readd_pc()); + if(page_changing(TMP, X)) { + readil(set_l(TMP, TMP+X)); + } + TMP += X; + Y = readil(TMP); + set_nz(Y); + prefetchd(); + +ldy_mtu_imm + Y = readd_pc(); + set_nz(Y); + prefetchd(); + +ldy_mtu_zpg + TMP = readd_pc(); + Y = readd(TMP); + set_nz(Y); + prefetchd(); + +ldy_mtu_zpx + TMP = readd_pc(); + readd(TMP); + Y = readd(uint8_t(TMP+X)); + set_nz(Y); + prefetchd(); + +lsr_mtu_aba + TMP = readd_pc(); + TMP = set_h(TMP, readd_pc()); + TMP2 = readil(TMP); + writeil(TMP, TMP2); + TMP2 = do_lsr(TMP2); + writeil(TMP, TMP2); + prefetchd(); + +lsr_mtu_abx + TMP = readd_pc(); + TMP = set_h(TMP, readd_pc()); + readil(set_l(TMP, TMP+X)); + TMP += X; + TMP2 = readil(TMP); + writeil(TMP, TMP2); + TMP2 = do_lsr(TMP2); + writeil(TMP, TMP2); + prefetchd(); + +lsr_mtu_acc + readd_pc_noinc(); + A = do_lsr(A); + prefetchd(); + +lsr_mtu_zpg + TMP = readd_pc(); + TMP2 = readd(TMP); + writed(TMP, TMP2); + TMP2 = do_lsr(TMP2); + writed(TMP, TMP2); + prefetchd(); + +lsr_mtu_zpx + TMP = readd_pc(); + readd(TMP); + TMP = uint8_t(TMP+X); + TMP2 = readd(TMP); + writed(TMP, TMP2); + TMP2 = do_lsr(TMP2); + writed(TMP, TMP2); + prefetchd(); + +nop_mtu_imp + readd_pc_noinc(); + prefetchd(); + +ora_mtu_aba + TMP = readd_pc(); + TMP = set_h(TMP, readd_pc()); + A |= readil(TMP); + set_nz(A); + prefetchd(); + +ora_mtu_abx + TMP = readd_pc(); + TMP = set_h(TMP, readd_pc()); + if(page_changing(TMP, X)) { + readil(set_l(TMP, TMP+X)); + } + TMP += X; + A |= readil(TMP); + set_nz(A); + prefetchd(); + +ora_mtu_aby + TMP = readd_pc(); + TMP = set_h(TMP, readd_pc()); + if(page_changing(TMP, Y)) { + readil(set_l(TMP, TMP+Y)); + } + TMP += Y; + A |= readil(TMP); + set_nz(A); + prefetchd(); + +ora_mtu_imm + A |= readd_pc(); + set_nz(A); + prefetchd(); + +ora_mtu_idx + TMP2 = readd_pc(); + readd(TMP2); + TMP2 += X; + TMP = readd(TMP2 & 0xff); + TMP = set_h(TMP, readd((TMP2+1) & 0xff)); + A |= readi(TMP); + set_nz(A); + prefetchd(); + +ora_mtu_idy + TMP2 = readd_pc(); + TMP = readd(TMP2); + TMP = set_h(TMP, readd((TMP2+1) & 0xff)); + if(page_changing(TMP, Y)) { + readi(set_l(TMP, TMP+Y)); + } + A |= readi(TMP+Y); + set_nz(A); + prefetchd(); + +ora_mtu_zpg + TMP = readd_pc(); + A |= readd(TMP); + set_nz(A); + prefetchd(); + +ora_mtu_zpx + TMP = readd_pc(); + readd(TMP); + A |= readd(uint8_t(TMP+X)); + set_nz(A); + prefetchd(); + +pha_mtu_imp + readd_pc_noinc(); + writed(SP, A); + dec_SP(); + prefetchd(); + +php_mtu_imp + readd_pc_noinc(); + writed(SP, P); + dec_SP(); + prefetchd(); + +pla_mtu_imp + readd_pc_noinc(); + readd(SP); + inc_SP(); + A = readd(SP); + set_nz(A); + prefetchd(); + +plp_mtu_imp + readd_pc_noinc(); + readd(SP); + inc_SP(); + TMP = readd(SP) | (F_B|F_E); + prefetchd(); + P = TMP; // Do *not* move it before the prefetch + +rol_mtu_aba + TMP = readd_pc(); + TMP = set_h(TMP, readd_pc()); + TMP2 = readil(TMP); + writeil(TMP, TMP2); + TMP2 = do_rol(TMP2); + writeil(TMP, TMP2); + prefetchd(); + +rol_mtu_abx + TMP = readd_pc(); + TMP = set_h(TMP, readd_pc()); + readil(set_l(TMP, TMP+X)); + TMP += X; + TMP2 = readil(TMP); + writeil(TMP, TMP2); + TMP2 = do_rol(TMP2); + writeil(TMP, TMP2); + prefetchd(); + +rol_mtu_acc + readd_pc_noinc(); + A = do_rol(A); + prefetchd(); + +rol_mtu_zpg + TMP = readd_pc(); + TMP2 = readd(TMP); + writed(TMP, TMP2); + TMP2 = do_rol(TMP2); + writed(TMP, TMP2); + prefetchd(); + +rol_mtu_zpx + TMP = readd_pc(); + readd(TMP); + TMP = uint8_t(TMP+X); + TMP2 = readd(TMP); + writed(TMP, TMP2); + TMP2 = do_rol(TMP2); + writed(TMP, TMP2); + prefetchd(); + +ror_mtu_aba + TMP = readd_pc(); + TMP = set_h(TMP, readd_pc()); + TMP2 = readil(TMP); + writeil(TMP, TMP2); + TMP2 = do_ror(TMP2); + writeil(TMP, TMP2); + prefetchd(); + +ror_mtu_abx + TMP = readd_pc(); + TMP = set_h(TMP, readd_pc()); + readil(set_l(TMP, TMP+X)); + TMP += X; + TMP2 = readil(TMP); + writeil(TMP, TMP2); + TMP2 = do_ror(TMP2); + writeil(TMP, TMP2); + prefetchd(); + +ror_mtu_acc + readd_pc_noinc(); + A = do_ror(A); + prefetchd(); + +ror_mtu_zpg + TMP = readd_pc(); + TMP2 = readd(TMP); + writed(TMP, TMP2); + TMP2 = do_ror(TMP2); + writed(TMP, TMP2); + prefetchd(); + +ror_mtu_zpx + TMP = readd_pc(); + readd(TMP); + TMP = uint8_t(TMP+X); + TMP2 = readd(TMP); + writed(TMP, TMP2); + TMP2 = do_ror(TMP2); + writed(TMP, TMP2); + prefetchd(); + +rti_mtu_imp + interrupt_mode_off(); + readd_pc_noinc(); + readd(SP); + inc_SP(); + P = readd(SP) | (F_B|F_E); + inc_SP(); + PC = readd(SP); + inc_SP(); + PC = set_h(PC, readd(SP)); + prefetchd(); + +rts_mtu_imp + readd_pc_noinc(); + readd(SP); + inc_SP(); + PC = readd(SP); + inc_SP(); + PC = set_h(PC, readd(SP)); + readd_pc(); + prefetchd(); + +sbc_mtu_aba + TMP = readd_pc(); + TMP = set_h(TMP, readd_pc()); + TMP2 = readil(TMP); + do_sbc(TMP2); + prefetchd(); + +sbc_mtu_abx + TMP = readd_pc(); + TMP = set_h(TMP, readd_pc()); + if(page_changing(TMP, X)) { + readil(set_l(TMP, TMP+X)); + } + TMP += X; + TMP2 = readil(TMP); + do_sbc(TMP2); + prefetchd(); + +sbc_mtu_aby + TMP = readd_pc(); + TMP = set_h(TMP, readd_pc()); + if(page_changing(TMP, Y)) { + readil(set_l(TMP, TMP+Y)); + } + TMP += Y; + TMP2 = readil(TMP); + do_sbc(TMP2); + prefetchd(); + +sbc_mtu_idx + TMP2 = readd_pc(); + readd(TMP2); + TMP2 += X; + TMP = readd(TMP2 & 0xff); + TMP = set_h(TMP, readd((TMP2+1) & 0xff)); + do_sbc(readi(TMP)); + prefetchd(); + +sbc_mtu_idy + TMP2 = readd_pc(); + TMP = readd(TMP2); + TMP = set_h(TMP, readd((TMP2+1) & 0xff)); + if(page_changing(TMP, Y)) { + readi(set_l(TMP, TMP+Y)); + } + do_sbc(readi(TMP+Y)); + prefetchd(); + +sbc_mtu_imm + TMP = readd_pc(); + do_sbc(TMP); + prefetchd(); + +sbc_mtu_zpg + TMP = readd_pc(); + TMP2 = readd(TMP); + do_sbc(TMP2); + prefetchd(); + +sbc_mtu_zpx + TMP = readd_pc(); + readd(TMP); + TMP2 = readd(uint8_t(TMP+X)); + do_sbc(TMP2); + prefetchd(); + +sec_mtu_imp + readd_pc_noinc(); + P |= F_C; + prefetchd(); + +sed_mtu_imp + readd_pc_noinc(); + P |= F_D; + prefetchd(); + +sei_mtu_imp + readd_pc_noinc(); + prefetchd(); + P |= F_I; // Do *not* move it before the prefetch + +sta_mtu_aba + TMP = readd_pc(); + TMP = set_h(TMP, readd_pc()); + writeil(TMP, A); + prefetchd(); + +sta_mtu_abx + TMP = readd_pc(); + TMP = set_h(TMP, readd_pc()); + readil(set_l(TMP, TMP+X)); + writeil(TMP+X, A); + prefetchd(); + +sta_mtu_aby + TMP = readd_pc(); + TMP = set_h(TMP, readd_pc()); + readil(set_l(TMP, TMP+Y)); + writeil(TMP+Y, A); + prefetchd(); + +sta_mtu_idx + TMP2 = readd_pc(); + readd(TMP2); + TMP2 += X; + TMP = readd(TMP2 & 0xff); + TMP = set_h(TMP, readd((TMP2+1) & 0xff)); + writei(TMP, A); + prefetchd(); + +sta_mtu_idy + TMP2 = readd_pc(); + TMP = readd(TMP2); + TMP = set_h(TMP, readd((TMP2+1) & 0xff)); + readi(set_l(TMP, TMP+Y)); + writei(TMP+Y, A); + prefetchd(); + +sta_mtu_zpg + TMP = readd_pc(); + writed(TMP, A); + prefetchd(); + +sta_mtu_zpx + TMP = readd_pc(); + readd(TMP); + writed(uint8_t(TMP+X), A); + prefetchd(); + +stx_mtu_aba + TMP = readd_pc(); + TMP = set_h(TMP, readd_pc()); + writeil(TMP, X); + prefetchd(); + +stx_mtu_zpg + TMP = readd_pc(); + writed(TMP, X); + prefetchd(); + +stx_mtu_zpy + TMP = readd_pc(); + readd(TMP); + writed(uint8_t(TMP+Y), X); + prefetchd(); + +sty_mtu_aba + TMP = readd_pc(); + TMP = set_h(TMP, readd_pc()); + writeil(TMP, Y); + prefetchd(); + +sty_mtu_zpg + TMP = readd_pc(); + writed(TMP, Y); + prefetchd(); + +sty_mtu_zpx + TMP = readd_pc(); + readd(TMP); + writed(uint8_t(TMP+X), Y); + prefetchd(); + +tax_mtu_imp + readd_pc_noinc(); + X = A; + set_nz(X); + prefetchd(); + +tay_mtu_imp + readd_pc_noinc(); + Y = A; + set_nz(Y); + prefetchd(); + +tsx_mtu_imp + readd_pc_noinc(); + X = SP; + set_nz(X); + prefetchd(); + +txa_mtu_imp + readd_pc_noinc(); + A = X; + set_nz(A); + prefetchd(); + +txs_mtu_imp + readd_pc_noinc(); + SP = set_l(SP, X); + prefetchd(); + +tya_mtu_imp + readd_pc_noinc(); + A = Y; + set_nz(A); + prefetchd(); + +# exceptions +reset_mtu + readd_pc_noinc(); + readd_pc_noinc(); + readd(SP); dec_SP(); + readd(SP); dec_SP(); + readd(SP); dec_SP(); + P |= F_I; PC = readd_arg(0xfffc); + PC = set_h(PC, readd_arg(0xfffd)); + prefetchd(); + inst_state = -1; + + +# undocumented reliable instructions +dcp_mtu_aba + TMP = readd_pc(); + TMP = set_h(TMP, readd_pc()); + TMP2 = readil(TMP); + writeil(TMP, TMP2); + TMP2--; + writeil(TMP, TMP2); + do_cmp(A, TMP2); + prefetchd(); + +dcp_mtu_abx + TMP = readd_pc(); + TMP = set_h(TMP, readd_pc()); + readil(set_l(TMP, TMP+X)); + TMP += X; + TMP2 = readil(TMP); + writeil(TMP, TMP2); + TMP2--; + writeil(TMP, TMP2); + do_cmp(A, TMP2); + prefetchd(); + +dcp_mtu_aby + TMP = readd_pc(); + TMP = set_h(TMP, readd_pc()); + readil(set_l(TMP, TMP+Y)); + TMP += Y; + TMP2 = readil(TMP); + writeil(TMP, TMP2); + TMP2--; + writeil(TMP, TMP2); + do_cmp(A, TMP2); + prefetchd(); + +dcp_mtu_idx + TMP2 = readd_pc(); + readd(TMP2); + TMP2 += X; + TMP = readd(TMP2 & 0xff); + TMP = set_h(TMP, readd((TMP2+1) & 0xff)); + TMP2 = readd(TMP); + writei(TMP, TMP2); + TMP2--; + writei(TMP, TMP2); + do_cmp(A, TMP2); + prefetchd(); + +dcp_mtu_idy + TMP2 = readd_pc(); + TMP = readd(TMP2); + TMP = set_h(TMP, readd((TMP2+1) & 0xff)); + readd(set_l(TMP, TMP+Y)); + TMP += Y; + TMP2 = readi(TMP); + writei(TMP, TMP2); + TMP2--; + writei(TMP, TMP2); + do_cmp(A, TMP2); + prefetchd(); + +dcp_mtu_zpg + TMP = readd_pc(); + TMP2 = readd(TMP); + writed(TMP, TMP2); + TMP2--; + writed(TMP, TMP2); + do_cmp(A, TMP2); + prefetchd(); + +dcp_mtu_zpx + TMP = readd_pc(); + readd(TMP); + TMP = uint8_t(TMP+X); + TMP2 = readd(TMP); + writed(TMP, TMP2); + TMP2--; + writed(TMP, TMP2); + do_cmp(A, TMP2); + prefetchd(); + +isb_mtu_aba + TMP = readd_pc(); + TMP = set_h(TMP, readd_pc()); + TMP2 = readil(TMP); + writeil(TMP, TMP2); + TMP2++; + writeil(TMP, TMP2); + do_sbc(TMP2); + prefetchd(); + +isb_mtu_abx + TMP = readd_pc(); + TMP = set_h(TMP, readd_pc()); + readil(set_l(TMP, TMP+X)); + TMP += X; + TMP2 = readil(TMP); + writeil(TMP, TMP2); + TMP2++; + writeil(TMP, TMP2); + do_sbc(TMP2); + prefetchd(); + +isb_mtu_aby + TMP = readd_pc(); + TMP = set_h(TMP, readd_pc()); + readil(set_l(TMP, TMP+Y)); + TMP += Y; + TMP2 = readil(TMP); + writeil(TMP, TMP2); + TMP2++; + writeil(TMP, TMP2); + do_sbc(TMP2); + prefetchd(); + +isb_mtu_idx + TMP2 = readd_pc(); + readd(TMP2); + TMP2 += X; + TMP = readd(TMP2 & 0xff); + TMP = set_h(TMP, readd((TMP2+1) & 0xff)); + TMP2 = readi(TMP); + writei(TMP, TMP2); + TMP2++; + writei(TMP, TMP2); + do_sbc(TMP2); + prefetchd(); + +isb_mtu_idy + TMP2 = readd_pc(); + TMP = readd(TMP2); + TMP = set_h(TMP, readd((TMP2+1) & 0xff)); + readd(set_l(TMP, TMP+Y)); + TMP += Y; + TMP2 = readi(TMP); + writei(TMP, TMP2); + TMP2++; + writei(TMP, TMP2); + do_sbc(TMP2); + prefetchd(); + +isb_mtu_zpg + TMP = readd_pc(); + TMP2 = readd(TMP); + writed(TMP, TMP2); + TMP2++; + writed(TMP, TMP2); + do_sbc(TMP2); + prefetchd(); + +isb_mtu_zpx + TMP = readd_pc(); + readd(TMP); + TMP = uint8_t(TMP+X); + TMP2 = readd(TMP); + writed(TMP, TMP2); + TMP2++; + writed(TMP, TMP2); + do_sbc(TMP2); + prefetchd(); + +lax_mtu_aba + TMP = readd_pc(); + TMP = set_h(TMP, readd_pc()); + A = X = readil(TMP); + set_nz(A); + prefetchd(); + +lax_mtu_aby + TMP = readd_pc(); + TMP = set_h(TMP, readd_pc()); + if(page_changing(TMP, Y)) { + readil(set_l(TMP, TMP+Y)); + } + A = X = readil(TMP+Y); + set_nz(A); + prefetchd(); + +lax_mtu_idx + TMP2 = readd_pc(); + readd(TMP2); + TMP2 += X; + TMP = readd(TMP2 & 0xff); + TMP = set_h(TMP, readd((TMP2+1) & 0xff)); + A = X = readi(TMP); + set_nz(A); + prefetchd(); + +lax_mtu_idy + TMP2 = readd_pc(); + TMP = readd(TMP2); + TMP = set_h(TMP, readd((TMP2+1) & 0xff)); + if(page_changing(TMP, Y)) { + readi(set_l(TMP, TMP+Y)); + } + A = X = readi(TMP+Y); + set_nz(A); + prefetchd(); + +lax_mtu_zpg + TMP = readd_pc(); + A = X = readd(TMP); + set_nz(A); + prefetchd(); + +lax_mtu_zpy + TMP = readd_pc(); + readd(TMP); + TMP = uint8_t(TMP+Y); + A = X = readd(TMP); + set_nz(A); + prefetchd(); + +rla_mtu_aba + TMP = readd_pc(); + TMP = set_h(TMP, readd_pc()); + TMP2 = readil(TMP); + writeil(TMP, TMP2); + TMP2 = do_rol(TMP2); + writeil(TMP, TMP2); + A &= TMP2; + set_nz(A); + prefetchd(); + +rla_mtu_abx + TMP = readd_pc(); + TMP = set_h(TMP, readd_pc()); + readil(set_l(TMP, TMP+X)); + TMP += X; + TMP2 = readil(TMP); + writeil(TMP, TMP2); + TMP2 = do_rol(TMP2); + writeil(TMP, TMP2); + A &= TMP2; + set_nz(A); + prefetchd(); + +rla_mtu_aby + TMP = readd_pc(); + TMP = set_h(TMP, readd_pc()); + readil(set_l(TMP, TMP+Y)); + TMP += Y; + TMP2 = readil(TMP); + writeil(TMP, TMP2); + TMP2 = do_rol(TMP2); + writeil(TMP, TMP2); + A &= TMP2; + set_nz(A); + prefetchd(); + +rla_mtu_idx + TMP2 = readd_pc(); + readd(TMP2); + TMP2 += X; + TMP = readd(TMP2 & 0xff); + TMP = set_h(TMP, readd((TMP2+1) & 0xff)); + TMP2 = readi(TMP); + writei(TMP, TMP2); + TMP2 = do_rol(TMP2); + writei(TMP, TMP2); + A &= TMP2; + set_nz(A); + prefetchd(); + +rla_mtu_idy + TMP2 = readd_pc(); + TMP = readd(TMP2); + TMP = set_h(TMP, readd((TMP2+1) & 0xff)); + readd(set_l(TMP, TMP+Y)); + TMP += Y; + TMP2 = readi(TMP); + writei(TMP, TMP2); + TMP2 = do_rol(TMP2); + writei(TMP, TMP2); + A &= TMP2; + set_nz(A); + prefetchd(); + +rla_mtu_zpg + TMP = readd_pc(); + TMP2 = readd(TMP); + writed(TMP, TMP2); + TMP2 = do_rol(TMP2); + writed(TMP, TMP2); + A &= TMP2; + set_nz(A); + prefetchd(); + +rla_mtu_zpx + TMP = readd_pc(); + readd(TMP); + TMP = uint8_t(TMP+X); + TMP2 = readd(TMP); + writed(TMP, TMP2); + TMP2 = do_rol(TMP2); + writed(TMP, TMP2); + A &= TMP2; + set_nz(A); + prefetchd(); + +rra_mtu_aba + TMP = readd_pc(); + TMP = set_h(TMP, readd_pc()); + TMP2 = readil(TMP); + writeil(TMP, TMP2); + TMP2 = do_ror(TMP2); + writeil(TMP, TMP2); + do_adc(TMP2); + prefetchd(); + +rra_mtu_abx + TMP = readd_pc(); + TMP = set_h(TMP, readd_pc()); + readil(set_l(TMP, TMP+X)); + TMP += X; + TMP2 = readil(TMP); + writeil(TMP, TMP2); + TMP2 = do_ror(TMP2); + writeil(TMP, TMP2); + do_adc(TMP2); + prefetchd(); + +rra_mtu_aby + TMP = readd_pc(); + TMP = set_h(TMP, readd_pc()); + readil(set_l(TMP, TMP+Y)); + TMP += Y; + TMP2 = readil(TMP); + writeil(TMP, TMP2); + TMP2 = do_ror(TMP2); + writeil(TMP, TMP2); + do_adc(TMP2); + prefetchd(); + +rra_mtu_idx + TMP2 = readd_pc(); + readd(TMP2); + TMP2 += X; + TMP = readd(TMP2 & 0xff); + TMP = set_h(TMP, readd((TMP2+1) & 0xff)); + TMP2 = readi(TMP); + writei(TMP, TMP2); + TMP2 = do_ror(TMP2); + writei(TMP, TMP2); + do_adc(TMP2); + prefetchd(); + +rra_mtu_idy + TMP2 = readd_pc(); + TMP = readd(TMP2); + TMP = set_h(TMP, readd((TMP2+1) & 0xff)); + readd(set_l(TMP, TMP+Y)); + TMP += Y; + TMP2 = readi(TMP); + writei(TMP, TMP2); + TMP2 = do_ror(TMP2); + writei(TMP, TMP2); + do_adc(TMP2); + prefetchd(); + +rra_mtu_zpg + TMP = readd_pc(); + TMP2 = readd(TMP); + writed(TMP, TMP2); + TMP2 = do_ror(TMP2); + writed(TMP, TMP2); + do_adc(TMP2); + prefetchd(); + +rra_mtu_zpx + TMP = readd_pc(); + readd(TMP); + TMP = uint8_t(TMP+X); + TMP2 = readd(TMP); + writed(TMP, TMP2); + TMP2 = do_ror(TMP2); + writed(TMP, TMP2); + do_adc(TMP2); + prefetchd(); + +sax_mtu_aba + TMP = readd_pc(); + TMP = set_h(TMP, readd_pc()); + TMP2 = A & X; + writeil(TMP, TMP2); + prefetchd(); + +sax_mtu_idx + TMP2 = readd_pc(); + readd(TMP2); + TMP2 += X; + TMP = readd(TMP2 & 0xff); + TMP = set_h(TMP, readd((TMP2+1) & 0xff)); + TMP2 = A & X; + writei(TMP, TMP2); + prefetchd(); + +sax_mtu_zpg + TMP = readd_pc(); + TMP2 = A & X; + writed(TMP, TMP2); + prefetchd(); + +sax_mtu_zpy + TMP = readd_pc(); + readd(TMP); + TMP = uint8_t(TMP+Y); + TMP2 = A & X; + writed(TMP, TMP2); + prefetchd(); + +sbx_mtu_imm + TMP2 = readd_pc(); + X &= A; + if(X < TMP2) + P &= ~F_C; + else + P |= F_C; + X -= TMP2; + set_nz(X); + prefetchd(); + +sha_mtu_aby + TMP = readd_pc(); + TMP = set_h(TMP, readd_pc()); + readil(set_l(TMP, TMP+Y)); + TMP2 = A & X & ((TMP >> 8)+1); + if(page_changing(TMP, Y)) + TMP = set_h(TMP+Y, TMP2); + else + TMP += Y; + writeil(TMP, TMP2); + prefetchd(); + +sha_mtu_idy + TMP2 = readd_pc(); + TMP = readd(TMP2); + TMP = set_h(TMP, readd((TMP2+1) & 0xff)); + readi(set_l(TMP, TMP+Y)); + TMP2 = A & X & ((TMP >> 8)+1); + if(page_changing(TMP, Y)) + TMP = set_h(TMP+Y, TMP2); + else + TMP += Y; + writei(TMP, TMP2); + prefetchd(); + +shs_mtu_aby + TMP = readd_pc(); + TMP = set_h(TMP, readd_pc()); + readil(set_l(TMP, TMP+Y)); + SP = set_l(SP, A & X); + TMP2 = A & X & ((TMP >> 8)+1); + if(page_changing(TMP, Y)) + TMP = set_h(TMP+Y, TMP2); + else + TMP += Y; + writeil(TMP, TMP2); + prefetchd(); + +shx_mtu_aby + TMP = readd_pc(); + TMP = set_h(TMP, readd_pc()); + readil(set_l(TMP, TMP+Y)); + TMP2 = X & ((TMP >> 8)+1); + if(page_changing(TMP, Y)) + TMP = set_h(TMP+Y, TMP2); + else + TMP += Y; + writeil(TMP, TMP2); + prefetchd(); + +shy_mtu_abx + TMP = readd_pc(); + TMP = set_h(TMP, readd_pc()); + readil(set_l(TMP, TMP+X)); + TMP2 = Y & ((TMP >> 8)+1); + if(page_changing(TMP, X)) + TMP = set_h(TMP+X, TMP2); + else + TMP += X; + writeil(TMP, TMP2); + prefetchd(); + +slo_mtu_aba + TMP = readd_pc(); + TMP = set_h(TMP, readd_pc()); + TMP2 = readil(TMP); + writeil(TMP, TMP2); + TMP2 = do_asl(TMP2); + writeil(TMP, TMP2); + A |= TMP2; + set_nz(A); + prefetchd(); + +slo_mtu_abx + TMP = readd_pc(); + TMP = set_h(TMP, readd_pc()); + readil(set_l(TMP, TMP+X)); + TMP += X; + TMP2 = readil(TMP); + writeil(TMP, TMP2); + TMP2 = do_asl(TMP2); + writeil(TMP, TMP2); + A |= TMP2; + set_nz(A); + prefetchd(); + +slo_mtu_aby + TMP = readd_pc(); + TMP = set_h(TMP, readd_pc()); + readil(set_l(TMP, TMP+Y)); + TMP += Y; + TMP2 = readil(TMP); + writeil(TMP, TMP2); + TMP2 = do_asl(TMP2); + writeil(TMP, TMP2); + A |= TMP2; + set_nz(A); + prefetchd(); + +slo_mtu_idx + TMP2 = readd_pc(); + readd(TMP2); + TMP2 += X; + TMP = readd(TMP2 & 0xff); + TMP = set_h(TMP, readd((TMP2+1) & 0xff)); + TMP2 = readi(TMP); + writei(TMP, TMP2); + TMP2 = do_asl(TMP2); + writei(TMP, TMP2); + A |= TMP2; + set_nz(A); + prefetchd(); + +slo_mtu_idy + TMP2 = readd_pc(); + TMP = readd(TMP2); + TMP = set_h(TMP, readd((TMP2+1) & 0xff)); + readd(set_l(TMP, TMP+Y)); + TMP += Y; + TMP2 = readi(TMP); + writei(TMP, TMP2); + TMP2 = do_asl(TMP2); + writei(TMP, TMP2); + A |= TMP2; + set_nz(A); + prefetchd(); + +slo_mtu_zpg + TMP = readd_pc(); + TMP2 = readd(TMP); + writed(TMP, TMP2); + TMP2 = do_asl(TMP2); + writed(TMP, TMP2); + A |= TMP2; + set_nz(A); + prefetchd(); + +slo_mtu_zpx + TMP = readd_pc(); + readd(TMP); + TMP = uint8_t(TMP+X); + TMP2 = readd(TMP); + writed(TMP, TMP2); + TMP2 = do_asl(TMP2); + writed(TMP, TMP2); + A |= TMP2; + set_nz(A); + prefetchd(); + +sre_mtu_aba + TMP = readd_pc(); + TMP = set_h(TMP, readd_pc()); + TMP2 = readil(TMP); + writeil(TMP, TMP2); + TMP2 = do_lsr(TMP2); + writeil(TMP, TMP2); + A ^= TMP2; + set_nz(A); + prefetchd(); + +sre_mtu_abx + TMP = readd_pc(); + TMP = set_h(TMP, readd_pc()); + readil(set_l(TMP, TMP+X)); + TMP += X; + TMP2 = readil(TMP); + writeil(TMP, TMP2); + TMP2 = do_lsr(TMP2); + writeil(TMP, TMP2); + A ^= TMP2; + set_nz(A); + prefetchd(); + +sre_mtu_aby + TMP = readd_pc(); + TMP = set_h(TMP, readd_pc()); + readil(set_l(TMP, TMP+Y)); + TMP += Y; + TMP2 = readil(TMP); + writeil(TMP, TMP2); + TMP2 = do_lsr(TMP2); + writeil(TMP, TMP2); + A ^= TMP2; + set_nz(A); + prefetchd(); + +sre_mtu_idx + TMP2 = readd_pc(); + readd(TMP2); + TMP2 += X; + TMP = readd(TMP2 & 0xff); + TMP = set_h(TMP, readd((TMP2+1) & 0xff)); + TMP2 = readi(TMP); + writei(TMP, TMP2); + TMP2 = do_lsr(TMP2); + writei(TMP, TMP2); + A ^= TMP2; + set_nz(A); + prefetchd(); + +sre_mtu_idy + TMP2 = readd_pc(); + TMP = readd(TMP2); + TMP = set_h(TMP, readd((TMP2+1) & 0xff)); + readd(set_l(TMP, TMP+Y)); + TMP += Y; + TMP2 = readi(TMP); + writei(TMP, TMP2); + TMP2 = do_lsr(TMP2); + writei(TMP, TMP2); + A ^= TMP2; + set_nz(A); + prefetchd(); + +sre_mtu_zpg + TMP = readd_pc(); + TMP2 = readd(TMP); + writed(TMP, TMP2); + TMP2 = do_lsr(TMP2); + writed(TMP, TMP2); + A ^= TMP2; + set_nz(A); + prefetchd(); + +sre_mtu_zpx + TMP = readd_pc(); + readd(TMP); + TMP = uint8_t(TMP+X); + TMP2 = readd(TMP); + writed(TMP, TMP2); + TMP2 = do_lsr(TMP2); + writed(TMP, TMP2); + A ^= TMP2; + set_nz(A); + prefetchd(); + +# undocumented unreliable instructions +anc_mtu_imm + A &= readd_pc(); + set_nz(A); + if(A & 0x80) + P |= F_C; + else + P &= ~F_C; + prefetchd(); + +ane_mtu_imm + TMP2 = readd_pc(); + A &= TMP2 & X; + set_nz(A); + prefetchd(); + +asr_mtu_imm + A &= readd_pc(); + A = do_lsr(A); + prefetchd(); + +arr_mtu_imm + A &= readd_pc(); + do_arr(); + prefetchd(); + +las_mtu_aby + TMP = readd_pc(); + TMP = set_h(TMP, readd_pc()); + if(page_changing(TMP, Y)) { + readil(set_l(TMP, TMP+Y)); + } + TMP2 = readil(TMP+Y); + A = TMP2 | 0x51; + X = 0xff; + set_nz(TMP2); + prefetchd(); + +lxa_mtu_imm + A = X = readd_pc(); + set_nz(A); + prefetchd(); + +# nop variants +nop_mtu_aba + TMP = readd_pc(); + TMP = set_h(TMP, readd_pc()); + readil(TMP); + prefetchd(); + +nop_mtu_abx + TMP = readd_pc(); + TMP = set_h(TMP, readd_pc()); + if(page_changing(TMP, X)) { + readil(set_l(TMP, TMP+X)); + } + readil(TMP + X); + prefetchd(); + +nop_mtu_imm + readd_pc(); + prefetchd(); + +nop_mtu_zpg + TMP = readd_pc(); + readd(TMP); + prefetchd(); + +nop_mtu_zpx + TMP = readd_pc(); + readd(TMP); + readd(uint8_t(TMP+X)); + prefetchd(); + +# system killers +kil_mtu_non + readd_pc(); + readd(0xffff); + readd(0xfffe); + readd(0xfffe); + for(;;) { + readd(0xffff); + } diff --git a/src/devices/machine/upd765.cpp b/src/devices/machine/upd765.cpp index 4996093e0bd..acf4182fecc 100644 --- a/src/devices/machine/upd765.cpp +++ b/src/devices/machine/upd765.cpp @@ -548,6 +548,8 @@ uint8_t upd765_family_device::fifo_r() uint8_t r = 0xff; switch(main_phase) { case PHASE_CMD: + if(machine().side_effects_disabled()) + return 0x00; if(command_pos) fifo_w(0xff); LOGFIFO("fifo_r in command phase\n"); |