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-rw-r--r--src/devices/machine/6525tpi.cpp22
-rw-r--r--src/devices/machine/6525tpi.h16
-rw-r--r--src/devices/machine/68153bim.cpp13
-rw-r--r--src/devices/machine/6821pia.cpp4
-rw-r--r--src/devices/machine/6821pia.h11
-rw-r--r--src/devices/machine/68307.cpp25
-rw-r--r--src/devices/machine/68307.h2
-rw-r--r--src/devices/machine/68340.cpp9
-rw-r--r--src/devices/machine/68340.h2
-rw-r--r--src/devices/machine/68340dma.cpp5
-rw-r--r--src/devices/machine/68340dma.h1
-rw-r--r--src/devices/machine/68340ser.cpp5
-rw-r--r--src/devices/machine/68340ser.h7
-rw-r--r--src/devices/machine/68340sim.cpp6
-rw-r--r--src/devices/machine/68340sim.h1
-rw-r--r--src/devices/machine/68340tmu.cpp10
-rw-r--r--src/devices/machine/68340tmu.h11
-rw-r--r--src/devices/machine/6840ptm.cpp4
-rw-r--r--src/devices/machine/6840ptm.h4
-rw-r--r--src/devices/machine/6850acia.cpp64
-rw-r--r--src/devices/machine/6850acia.h12
-rw-r--r--src/devices/machine/74157.cpp20
-rw-r--r--src/devices/machine/74157.h17
-rw-r--r--src/devices/machine/74165.cpp7
-rw-r--r--src/devices/machine/74166.cpp7
-rw-r--r--src/devices/machine/7474.h15
-rw-r--r--src/devices/machine/8042kbdc.cpp22
-rw-r--r--src/devices/machine/8042kbdc.h5
-rw-r--r--src/devices/machine/8364_paula.h14
-rw-r--r--src/devices/machine/adc0808.cpp14
-rw-r--r--src/devices/machine/adc0808.h8
-rw-r--r--src/devices/machine/adc0844.cpp6
-rw-r--r--src/devices/machine/adc0844.h6
-rw-r--r--src/devices/machine/aic6250.cpp17
-rw-r--r--src/devices/machine/aic6250.h13
-rw-r--r--src/devices/machine/aicartc.h7
-rw-r--r--src/devices/machine/akiko.cpp5
-rw-r--r--src/devices/machine/am9513.cpp8
-rw-r--r--src/devices/machine/am9513.h8
-rw-r--r--src/devices/machine/am9517a.cpp65
-rw-r--r--src/devices/machine/am9517a.h51
-rw-r--r--src/devices/machine/am9519.cpp8
-rw-r--r--src/devices/machine/am9519.h8
-rw-r--r--src/devices/machine/appldriv.h29
-rw-r--r--src/devices/machine/applefdc.h32
-rw-r--r--src/devices/machine/at29x.cpp4
-rw-r--r--src/devices/machine/at29x.h4
-rw-r--r--src/devices/machine/at_keybc.cpp24
-rw-r--r--src/devices/machine/at_keybc.h16
-rw-r--r--src/devices/machine/atapicdr.cpp10
-rw-r--r--src/devices/machine/ay31015.cpp70
-rw-r--r--src/devices/machine/ay31015.h20
-rw-r--r--src/devices/machine/bankdev.cpp18
-rw-r--r--src/devices/machine/bankdev.h42
-rw-r--r--src/devices/machine/clock.h8
-rw-r--r--src/devices/machine/com8116.cpp29
-rw-r--r--src/devices/machine/com8116.h22
-rw-r--r--src/devices/machine/cr511b.cpp14
-rw-r--r--src/devices/machine/cs4031.cpp80
-rw-r--r--src/devices/machine/cs4031.h72
-rw-r--r--src/devices/machine/diablo_hd.cpp15
-rw-r--r--src/devices/machine/diablo_hd.h3
-rw-r--r--src/devices/machine/dp8390.h33
-rw-r--r--src/devices/machine/dp83932c.cpp153
-rw-r--r--src/devices/machine/dp83932c.h111
-rw-r--r--src/devices/machine/ds1204.h3
-rw-r--r--src/devices/machine/ds1205.h3
-rw-r--r--src/devices/machine/ds128x.cpp58
-rw-r--r--src/devices/machine/ds128x.h25
-rw-r--r--src/devices/machine/ds1315.cpp16
-rw-r--r--src/devices/machine/ds1315.h10
-rw-r--r--src/devices/machine/ds75160a.h12
-rw-r--r--src/devices/machine/f3853.cpp353
-rw-r--r--src/devices/machine/f3853.h168
-rw-r--r--src/devices/machine/fdc37c665gt.cpp9
-rw-r--r--src/devices/machine/fdc37c93x.cpp4
-rw-r--r--src/devices/machine/gen_fifo.h11
-rw-r--r--src/devices/machine/genpc.cpp60
-rw-r--r--src/devices/machine/genpc.h29
-rw-r--r--src/devices/machine/hdc92x4.cpp4
-rw-r--r--src/devices/machine/hdc92x4.h4
-rw-r--r--src/devices/machine/i2cmem.cpp121
-rw-r--r--src/devices/machine/i2cmem.h89
-rw-r--r--src/devices/machine/i7220.cpp65
-rw-r--r--src/devices/machine/i8087.cpp14
-rw-r--r--src/devices/machine/i8087.h13
-rw-r--r--src/devices/machine/i8155.cpp26
-rw-r--r--src/devices/machine/i8155.h14
-rw-r--r--src/devices/machine/i82357.cpp307
-rw-r--r--src/devices/machine/i82357.h91
-rw-r--r--src/devices/machine/i82371sb.cpp25
-rw-r--r--src/devices/machine/i82371sb.h1
-rw-r--r--src/devices/machine/i8251.cpp8
-rw-r--r--src/devices/machine/i8251.h8
-rw-r--r--src/devices/machine/i8271.cpp37
-rw-r--r--src/devices/machine/i8271.h18
-rw-r--r--src/devices/machine/idectrl.cpp13
-rw-r--r--src/devices/machine/idectrl.h6
-rw-r--r--src/devices/machine/idehd.cpp7
-rw-r--r--src/devices/machine/ie15.cpp32
-rw-r--r--src/devices/machine/ie15_kbd.cpp5
-rw-r--r--src/devices/machine/input_merger.h22
-rw-r--r--src/devices/machine/ins8154.cpp71
-rw-r--r--src/devices/machine/ins8154.h13
-rw-r--r--src/devices/machine/ins8250.cpp2
-rw-r--r--src/devices/machine/intelfsh.h8
-rw-r--r--src/devices/machine/k054321.cpp2
-rw-r--r--src/devices/machine/keyboard.cpp6
-rw-r--r--src/devices/machine/ldp1000.h7
-rw-r--r--src/devices/machine/ldp1450.h7
-rw-r--r--src/devices/machine/ldpr8210.h2
-rw-r--r--src/devices/machine/ldstub.cpp8
-rw-r--r--src/devices/machine/ldstub.h21
-rw-r--r--src/devices/machine/ldv1000.cpp5
-rw-r--r--src/devices/machine/ldv1000.h6
-rw-r--r--src/devices/machine/ldvp931.cpp80
-rw-r--r--src/devices/machine/ldvp931.h18
-rw-r--r--src/devices/machine/legscsi.h2
-rw-r--r--src/devices/machine/mb8421.cpp16
-rw-r--r--src/devices/machine/mb8421.h16
-rw-r--r--src/devices/machine/mc146818.cpp12
-rw-r--r--src/devices/machine/mc146818.h8
-rw-r--r--src/devices/machine/mc6843.h2
-rw-r--r--src/devices/machine/mc6852.cpp7
-rw-r--r--src/devices/machine/mc6852.h32
-rw-r--r--src/devices/machine/mc6854.cpp4
-rw-r--r--src/devices/machine/mc6854.h4
-rw-r--r--src/devices/machine/mc68681.cpp35
-rw-r--r--src/devices/machine/mc68681.h37
-rw-r--r--src/devices/machine/mccs1850.h22
-rw-r--r--src/devices/machine/mcf5206e.cpp2
-rw-r--r--src/devices/machine/mcf5206e.h9
-rw-r--r--src/devices/machine/meters.h5
-rw-r--r--src/devices/machine/microtch.h12
-rw-r--r--src/devices/machine/mm5740.h38
-rw-r--r--src/devices/machine/mm58167.cpp4
-rw-r--r--src/devices/machine/mm58167.h13
-rw-r--r--src/devices/machine/mm58274c.cpp4
-rw-r--r--src/devices/machine/mm58274c.h17
-rw-r--r--src/devices/machine/mm74c922.h44
-rw-r--r--src/devices/machine/mos6526.cpp12
-rw-r--r--src/devices/machine/mos6526.h61
-rw-r--r--src/devices/machine/mos6530.h21
-rw-r--r--src/devices/machine/mos6530n.h128
-rw-r--r--src/devices/machine/mos6551.cpp36
-rw-r--r--src/devices/machine/mos6551.h6
-rw-r--r--src/devices/machine/mos6702.cpp4
-rw-r--r--src/devices/machine/mos6702.h14
-rw-r--r--src/devices/machine/mos8706.h11
-rw-r--r--src/devices/machine/mos8722.cpp2
-rw-r--r--src/devices/machine/mos8722.h2
-rw-r--r--src/devices/machine/mos8726.cpp4
-rw-r--r--src/devices/machine/mos8726.h15
-rw-r--r--src/devices/machine/mpu401.cpp10
-rw-r--r--src/devices/machine/msm58321.h31
-rw-r--r--src/devices/machine/msm6242.h5
-rw-r--r--src/devices/machine/myb3k_kbd.h21
-rw-r--r--src/devices/machine/ncr5380.h3
-rw-r--r--src/devices/machine/ncr5380n.cpp116
-rw-r--r--src/devices/machine/ncr5380n.h45
-rw-r--r--src/devices/machine/ncr5385.cpp4
-rw-r--r--src/devices/machine/ncr5385.h13
-rw-r--r--src/devices/machine/ncr5390.cpp337
-rw-r--r--src/devices/machine/ncr5390.h135
-rw-r--r--src/devices/machine/ncr539x.cpp4
-rw-r--r--src/devices/machine/ncr539x.h11
-rw-r--r--src/devices/machine/netlist.cpp375
-rw-r--r--src/devices/machine/netlist.h74
-rw-r--r--src/devices/machine/nmc9306.h11
-rw-r--r--src/devices/machine/nsc810.cpp4
-rw-r--r--src/devices/machine/nsc810.h63
-rw-r--r--src/devices/machine/nscsi_bus.cpp67
-rw-r--r--src/devices/machine/nscsi_bus.h28
-rw-r--r--src/devices/machine/nscsi_cb.h46
-rw-r--r--src/devices/machine/nscsi_cd.cpp296
-rw-r--r--src/devices/machine/nscsi_cd.h12
-rw-r--r--src/devices/machine/nscsi_hd.cpp147
-rw-r--r--src/devices/machine/nscsi_hd.h3
-rw-r--r--src/devices/machine/output_latch.h25
-rw-r--r--src/devices/machine/pc_fdc.cpp2
-rw-r--r--src/devices/machine/pc_lpt.cpp8
-rw-r--r--src/devices/machine/pckeybrd.h25
-rw-r--r--src/devices/machine/pdc.cpp3
-rw-r--r--src/devices/machine/pic8259.h4
-rw-r--r--src/devices/machine/pit8253.cpp11
-rw-r--r--src/devices/machine/pit8253.h6
-rw-r--r--src/devices/machine/pla.h21
-rw-r--r--src/devices/machine/pxa255.cpp26
-rw-r--r--src/devices/machine/rtc65271.cpp8
-rw-r--r--src/devices/machine/rtc65271.h8
-rw-r--r--src/devices/machine/scc2698b.cpp5
-rw-r--r--src/devices/machine/scnxx562.cpp9
-rw-r--r--src/devices/machine/sis85c496.cpp27
-rw-r--r--src/devices/machine/smc91c9x.cpp1141
-rw-r--r--src/devices/machine/smc91c9x.h252
-rw-r--r--src/devices/machine/smpc.cpp2
-rw-r--r--src/devices/machine/sonydriv.h18
-rw-r--r--src/devices/machine/spg110.cpp669
-rw-r--r--src/devices/machine/spg110.h220
-rw-r--r--src/devices/machine/spg2xx.cpp2451
-rw-r--r--src/devices/machine/spg2xx.h434
-rw-r--r--src/devices/machine/spg2xx_audio.cpp1258
-rw-r--r--src/devices/machine/spg2xx_audio.h372
-rw-r--r--src/devices/machine/spg2xx_io.cpp1313
-rw-r--r--src/devices/machine/spg2xx_io.h183
-rw-r--r--src/devices/machine/strata.cpp20
-rw-r--r--src/devices/machine/strata.h12
-rw-r--r--src/devices/machine/stvcd.cpp18
-rw-r--r--src/devices/machine/tc009xlvc.cpp2
-rw-r--r--src/devices/machine/terminal.cpp21
-rw-r--r--src/devices/machine/terminal.h2
-rw-r--r--src/devices/machine/ticket.h16
-rw-r--r--src/devices/machine/timekpr.cpp264
-rw-r--r--src/devices/machine/timekpr.h68
-rw-r--r--src/devices/machine/timer.h58
-rw-r--r--src/devices/machine/tmp68301.cpp62
-rw-r--r--src/devices/machine/tmp68301.h24
-rw-r--r--src/devices/machine/tms5501.cpp3
-rw-r--r--src/devices/machine/tms9901.cpp111
-rw-r--r--src/devices/machine/tms9901.h15
-rw-r--r--src/devices/machine/tms9902.cpp127
-rw-r--r--src/devices/machine/tms9902.h4
-rw-r--r--src/devices/machine/tms9914.cpp4
-rw-r--r--src/devices/machine/tms9914.h5
-rw-r--r--src/devices/machine/tube.cpp8
-rw-r--r--src/devices/machine/tube.h8
-rw-r--r--src/devices/machine/upd7002.cpp6
-rw-r--r--src/devices/machine/upd7002.h6
-rw-r--r--src/devices/machine/upd765.cpp139
-rw-r--r--src/devices/machine/upd765.h43
-rw-r--r--src/devices/machine/wd1010.cpp583
-rw-r--r--src/devices/machine/wd1010.h143
-rw-r--r--src/devices/machine/wd11c00_17.cpp9
-rw-r--r--src/devices/machine/wd11c00_17.h1
-rw-r--r--src/devices/machine/wd2010.cpp10
-rw-r--r--src/devices/machine/wd2010.h4
-rw-r--r--src/devices/machine/wd33c93.cpp984
-rw-r--r--src/devices/machine/wd33c93.h112
-rw-r--r--src/devices/machine/wd33c9x.cpp1064
-rw-r--r--src/devices/machine/wd33c9x.h32
-rw-r--r--src/devices/machine/wd7600.cpp128
-rw-r--r--src/devices/machine/wd7600.h88
-rw-r--r--src/devices/machine/x2201.cpp11
-rw-r--r--src/devices/machine/x2201.h1
-rw-r--r--src/devices/machine/xc1700e.cpp91
-rw-r--r--src/devices/machine/xc1700e.h118
-rw-r--r--src/devices/machine/ym2148.cpp4
-rw-r--r--src/devices/machine/ym2148.h4
-rw-r--r--src/devices/machine/z80scc.cpp14
-rw-r--r--src/devices/machine/z80scc.h1
-rw-r--r--src/devices/machine/z80sio.cpp20
251 files changed, 10910 insertions, 7902 deletions
diff --git a/src/devices/machine/6525tpi.cpp b/src/devices/machine/6525tpi.cpp
index a82b09d104c..83d28fc0355 100644
--- a/src/devices/machine/6525tpi.cpp
+++ b/src/devices/machine/6525tpi.cpp
@@ -294,12 +294,12 @@ WRITE_LINE_MEMBER( tpi6525_device::i4_w )
}
}
-READ8_MEMBER( tpi6525_device::pa_r )
+uint8_t tpi6525_device::pa_r()
{
uint8_t data = m_in_a;
if (!m_in_pa_cb.isnull())
- data = m_in_pa_cb(offset);
+ data = m_in_pa_cb();
data = (data & ~m_ddr_a) | (m_ddr_a & m_port_a);
@@ -307,18 +307,18 @@ READ8_MEMBER( tpi6525_device::pa_r )
}
-WRITE8_MEMBER( tpi6525_device::pa_w )
+void tpi6525_device::pa_w(uint8_t data)
{
m_in_a = data;
}
-READ8_MEMBER( tpi6525_device::pb_r )
+uint8_t tpi6525_device::pb_r()
{
uint8_t data = m_in_b;
if (!m_in_pb_cb.isnull())
- data = m_in_pb_cb(offset);
+ data = m_in_pb_cb();
data = (data & ~m_ddr_b) | (m_ddr_b & m_port_b);
@@ -326,18 +326,18 @@ READ8_MEMBER( tpi6525_device::pb_r )
}
-WRITE8_MEMBER( tpi6525_device::pb_w )
+void tpi6525_device::pb_w(uint8_t data)
{
m_in_b = data;
}
-READ8_MEMBER( tpi6525_device::pc_r )
+uint8_t tpi6525_device::pc_r()
{
uint8_t data = m_in_c;
if (!m_in_pc_cb.isnull())
- data &= m_in_pc_cb(offset);
+ data &= m_in_pc_cb();
data = (data & ~m_ddr_c) | (m_ddr_c & m_port_c);
@@ -345,13 +345,13 @@ READ8_MEMBER( tpi6525_device::pc_r )
}
-WRITE8_MEMBER( tpi6525_device::pc_w )
+void tpi6525_device::pc_w(uint8_t data)
{
m_in_c = data;
}
-READ8_MEMBER( tpi6525_device::read )
+uint8_t tpi6525_device::read(offs_t offset)
{
uint8_t data = 0xff;
@@ -466,7 +466,7 @@ READ8_MEMBER( tpi6525_device::read )
}
-WRITE8_MEMBER( tpi6525_device::write )
+void tpi6525_device::write(offs_t offset, uint8_t data)
{
DBG_LOG(machine(), 2, "tpi6525", ("%s write %.2x %.2x\n", tag(), offset, data));
diff --git a/src/devices/machine/6525tpi.h b/src/devices/machine/6525tpi.h
index 5e1ec394fe4..4052662d50a 100644
--- a/src/devices/machine/6525tpi.h
+++ b/src/devices/machine/6525tpi.h
@@ -53,8 +53,8 @@ public:
auto out_ca_cb() { return m_out_ca_cb.bind(); }
auto out_cb_cb() { return m_out_cb_cb.bind(); }
- DECLARE_READ8_MEMBER( read );
- DECLARE_WRITE8_MEMBER( write );
+ uint8_t read(offs_t offset);
+ void write(offs_t offset, uint8_t data);
DECLARE_WRITE_LINE_MEMBER( i0_w );
DECLARE_WRITE_LINE_MEMBER( i1_w );
@@ -62,12 +62,12 @@ public:
DECLARE_WRITE_LINE_MEMBER( i3_w );
DECLARE_WRITE_LINE_MEMBER( i4_w );
- DECLARE_READ8_MEMBER( pa_r );
- DECLARE_READ8_MEMBER( pb_r );
- DECLARE_READ8_MEMBER( pc_r );
- DECLARE_WRITE8_MEMBER( pa_w );
- DECLARE_WRITE8_MEMBER( pb_w );
- DECLARE_WRITE8_MEMBER( pc_w );
+ uint8_t pa_r();
+ uint8_t pb_r();
+ uint8_t pc_r();
+ void pa_w(uint8_t data);
+ void pb_w(uint8_t data);
+ void pc_w(uint8_t data);
WRITE_LINE_MEMBER( pb0_w ) { port_line_w(m_in_b, 0, state); }
WRITE_LINE_MEMBER( pb1_w ) { port_line_w(m_in_b, 1, state); }
diff --git a/src/devices/machine/68153bim.cpp b/src/devices/machine/68153bim.cpp
index 30be9ea5e81..8df821a813e 100644
--- a/src/devices/machine/68153bim.cpp
+++ b/src/devices/machine/68153bim.cpp
@@ -67,12 +67,13 @@ DEFINE_DEVICE_TYPE(EI68C153, ei68c153_device, "ei68c153", "EPIC
// device_add_mconfig - add device configuration
//-------------------------------------------------
-MACHINE_CONFIG_START(bim68153_device::device_add_mconfig)
- MCFG_DEVICE_ADD(CHN0_TAG, MC68153_CHANNEL, 0)
- MCFG_DEVICE_ADD(CHN1_TAG, MC68153_CHANNEL, 0)
- MCFG_DEVICE_ADD(CHN2_TAG, MC68153_CHANNEL, 0)
- MCFG_DEVICE_ADD(CHN3_TAG, MC68153_CHANNEL, 0)
-MACHINE_CONFIG_END
+void bim68153_device::device_add_mconfig(machine_config &config)
+{
+ MC68153_CHANNEL(config, m_chn[0], 0);
+ MC68153_CHANNEL(config, m_chn[1], 0);
+ MC68153_CHANNEL(config, m_chn[2], 0);
+ MC68153_CHANNEL(config, m_chn[3], 0);
+}
//**************************************************************************
// LIVE DEVICE
diff --git a/src/devices/machine/6821pia.cpp b/src/devices/machine/6821pia.cpp
index 3bf21c9483b..60efe473f19 100644
--- a/src/devices/machine/6821pia.cpp
+++ b/src/devices/machine/6821pia.cpp
@@ -576,7 +576,7 @@ uint8_t pia6821_device::control_b_r()
// read
//-------------------------------------------------
-uint8_t pia6821_device::reg_r(uint8_t offset)
+uint8_t pia6821_device::read(offs_t offset)
{
uint8_t ret;
@@ -846,7 +846,7 @@ void pia6821_device::control_b_w(uint8_t data)
// write
//-------------------------------------------------
-void pia6821_device::reg_w(uint8_t offset, uint8_t data)
+void pia6821_device::write(offs_t offset, uint8_t data)
{
switch (offset & 0x03)
{
diff --git a/src/devices/machine/6821pia.h b/src/devices/machine/6821pia.h
index b31bf03183c..8457399cf1a 100644
--- a/src/devices/machine/6821pia.h
+++ b/src/devices/machine/6821pia.h
@@ -55,13 +55,10 @@ public:
auto irqa_handler() { return m_irqa_handler.bind(); }
auto irqb_handler() { return m_irqb_handler.bind(); }
- uint8_t reg_r(uint8_t offset);
- void reg_w(uint8_t offset, uint8_t data);
-
- DECLARE_READ8_MEMBER( read ) { return reg_r(offset); }
- DECLARE_WRITE8_MEMBER( write ) { reg_w(offset, data); }
- DECLARE_READ8_MEMBER( read_alt ) { return reg_r(((offset << 1) & 0x02) | ((offset >> 1) & 0x01)); }
- DECLARE_WRITE8_MEMBER( write_alt ) { reg_w(((offset << 1) & 0x02) | ((offset >> 1) & 0x01), data); }
+ uint8_t read(offs_t offset);
+ void write(offs_t offset, uint8_t data);
+ uint8_t read_alt(offs_t offset) { return read(((offset << 1) & 0x02) | ((offset >> 1) & 0x01)); }
+ void write_alt(offs_t offset, uint8_t data) { write(((offset << 1) & 0x02) | ((offset >> 1) & 0x01), data); }
uint8_t port_b_z_mask() const { return ~m_ddr_b; } // see first note in .c
void set_port_a_z_mask(uint8_t data) { m_port_a_z_mask = data; }// see second note in .c
diff --git a/src/devices/machine/68307.cpp b/src/devices/machine/68307.cpp
index 421d5f06da2..ae13e090488 100644
--- a/src/devices/machine/68307.cpp
+++ b/src/devices/machine/68307.cpp
@@ -40,14 +40,15 @@ void m68307_cpu_device::m68307_internal_map(address_map &map)
}
-MACHINE_CONFIG_START(m68307_cpu_device::device_add_mconfig)
- MCFG_DEVICE_ADD("internal68681", MC68681, 16000000/4) // ?? Mhz - should be specified in inline config
- MCFG_MC68681_IRQ_CALLBACK(WRITELINE(*this, m68307_cpu_device, m68307_duart_irq_handler))
- MCFG_MC68681_A_TX_CALLBACK(WRITELINE(*this, m68307_cpu_device, m68307_duart_txa))
- MCFG_MC68681_B_TX_CALLBACK(WRITELINE(*this, m68307_cpu_device, m68307_duart_txb))
- MCFG_MC68681_INPORT_CALLBACK(READ8(*this, m68307_cpu_device, m68307_duart_input_r))
- MCFG_MC68681_OUTPORT_CALLBACK(WRITE8(*this, m68307_cpu_device, m68307_duart_output_w))
-MACHINE_CONFIG_END
+void m68307_cpu_device::device_add_mconfig(machine_config &config)
+{
+ MC68681(config, m_duart, 16000000/4); // ?? Mhz - should be specified in inline config
+ m_duart->irq_cb().set(FUNC(m68307_cpu_device::m68307_duart_irq_handler));
+ m_duart->a_tx_cb().set(FUNC(m68307_cpu_device::m68307_duart_txa));
+ m_duart->b_tx_cb().set(FUNC(m68307_cpu_device::m68307_duart_txb));
+ m_duart->inport_cb().set(FUNC(m68307_cpu_device::m68307_duart_input_r));
+ m_duart->outport_cb().set(FUNC(m68307_cpu_device::m68307_duart_output_w));
+}
m68307_cpu_device::m68307_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
@@ -89,6 +90,14 @@ void m68307_cpu_device::device_reset()
set_ipl(0);
}
+void m68307_cpu_device::m68k_reset_peripherals()
+{
+ m_duart->reset();
+
+ if (m_m68307MBUS) m_m68307MBUS->reset();
+ if (m_m68307TIMER) m_m68307TIMER->reset();
+}
+
/* todo: is it possible to calculate the address map based on CS when they change
and install handlers? Going through this logic for every memory access is
diff --git a/src/devices/machine/68307.h b/src/devices/machine/68307.h
index 591d0c9cced..6d5ef10b61c 100644
--- a/src/devices/machine/68307.h
+++ b/src/devices/machine/68307.h
@@ -44,6 +44,8 @@ protected:
virtual uint32_t execute_min_cycles() const override { return 4; }
virtual uint32_t execute_max_cycles() const override { return 158; }
+ virtual void m68k_reset_peripherals() override;
+
private:
void set_ipl(int level);
DECLARE_WRITE_LINE_MEMBER(timer0_interrupt);
diff --git a/src/devices/machine/68340.cpp b/src/devices/machine/68340.cpp
index e9f8ba7ba8e..bae8be35b62 100644
--- a/src/devices/machine/68340.cpp
+++ b/src/devices/machine/68340.cpp
@@ -262,3 +262,12 @@ void m68340_cpu_device::device_start()
m_int_ack_callback = device_irq_acknowledge_delegate(FUNC(m68340_cpu_device::int_ack), this);
}
+
+void m68340_cpu_device::m68k_reset_peripherals()
+{
+ m_m68340SIM->module_reset();
+ m_m68340DMA->module_reset();
+ m_serial->module_reset();
+ m_timer[0]->module_reset();
+ m_timer[1]->module_reset();
+}
diff --git a/src/devices/machine/68340.h b/src/devices/machine/68340.h
index 12af250c5b2..23f3ed6b147 100644
--- a/src/devices/machine/68340.h
+++ b/src/devices/machine/68340.h
@@ -49,6 +49,8 @@ protected:
virtual void device_reset() override;
virtual void device_add_mconfig(machine_config &config) override;
+ virtual void m68k_reset_peripherals() override;
+
private:
required_device<mc68340_serial_module_device> m_serial;
required_device_array<mc68340_timer_module_device, 2> m_timer;
diff --git a/src/devices/machine/68340dma.cpp b/src/devices/machine/68340dma.cpp
index 6649aeb2a94..4a79a4504fc 100644
--- a/src/devices/machine/68340dma.cpp
+++ b/src/devices/machine/68340dma.cpp
@@ -26,4 +26,9 @@ WRITE32_MEMBER( m68340_cpu_device::m68340_internal_dma_w )
void m68340_dma::reset()
{
+ module_reset();
+}
+
+void m68340_dma::module_reset()
+{
}
diff --git a/src/devices/machine/68340dma.h b/src/devices/machine/68340dma.h
index 3a92b4e9a49..8bec4fb88a7 100644
--- a/src/devices/machine/68340dma.h
+++ b/src/devices/machine/68340dma.h
@@ -10,6 +10,7 @@ class m68340_dma
{
public:
void reset();
+ void module_reset();
};
#endif // MAME_MACHINE_68340DMA_H
diff --git a/src/devices/machine/68340ser.cpp b/src/devices/machine/68340ser.cpp
index fcf6708305e..e0fc3b29fde 100644
--- a/src/devices/machine/68340ser.cpp
+++ b/src/devices/machine/68340ser.cpp
@@ -157,4 +157,9 @@ mc68340_serial_module_device::mc68340_serial_module_device(const machine_config
{
}
+void mc68340_serial_module_device::module_reset()
+{
+ mc68340_duart_device::device_reset();
+}
+
DEFINE_DEVICE_TYPE(MC68340_SERIAL_MODULE, mc68340_serial_module_device, "mc68340sermod", "MC68340 Serial Module")
diff --git a/src/devices/machine/68340ser.h b/src/devices/machine/68340ser.h
index e658d719c05..b9775f2ad86 100644
--- a/src/devices/machine/68340ser.h
+++ b/src/devices/machine/68340ser.h
@@ -7,11 +7,6 @@
#include "machine/mc68681.h"
-// MCFG macros to hide the implementation
-#define MCFG_MC68340SER_IRQ_CALLBACK(_cb) MCFG_MC68681_IRQ_CALLBACK(_cb)
-#define MCFG_MC68340SER_A_TX_CALLBACK(_cb) MCFG_MC68681_A_TX_CALLBACK(_cb)
-#define MCFG_MC68340SER_B_TX_CALLBACK(_cb) MCFG_MC68681_B_TX_CALLBACK(_cb)
-
class m68340_cpu_device;
class mc68340_serial_module_device : public mc68340_duart_device
@@ -32,6 +27,8 @@ public:
uint8_t irq_vector() const { return m_ivr; }
uint8_t arbitrate(uint8_t level) const { return (irq_level() == level) ? (m_mcrl & REG_MCRL_ARBLV) : 0; }
+ void module_reset();
+
protected:
m68340_cpu_device *m_cpu;
diff --git a/src/devices/machine/68340sim.cpp b/src/devices/machine/68340sim.cpp
index cf299ba2b22..3dbbfcb0733 100644
--- a/src/devices/machine/68340sim.cpp
+++ b/src/devices/machine/68340sim.cpp
@@ -493,6 +493,12 @@ void m68340_sim::reset()
m_pit_irq = false;
}
+void m68340_sim::module_reset()
+{
+ // SYS set in RSR, nothing else happens
+ m_avr_rsr = (m_avr_rsr & 0xff00) | 0x02;
+}
+
/* do_tick_pit works on whole clock cycles, no flank support */
void m68340_cpu_device::do_tick_pit()
{
diff --git a/src/devices/machine/68340sim.h b/src/devices/machine/68340sim.h
index 3c839984db2..34358e02eff 100644
--- a/src/devices/machine/68340sim.h
+++ b/src/devices/machine/68340sim.h
@@ -35,6 +35,7 @@ public:
bool m_pit_irq;
void reset();
+ void module_reset();
enum {
REG_MCR = 0x00,
diff --git a/src/devices/machine/68340tmu.cpp b/src/devices/machine/68340tmu.cpp
index 1ceaf65f600..801a9802557 100644
--- a/src/devices/machine/68340tmu.cpp
+++ b/src/devices/machine/68340tmu.cpp
@@ -308,6 +308,16 @@ void mc68340_timer_module_device::device_start()
m_tin_in_cb.resolve_safe();
}
+void mc68340_timer_module_device::device_reset()
+{
+ module_reset();
+}
+
+void mc68340_timer_module_device::module_reset()
+{
+ // TODO
+}
+
void mc68340_timer_module_device::do_timer_irq()
{
assert((m_sr & (REG_SR_TO | REG_SR_TG | REG_SR_TC)) != 0);
diff --git a/src/devices/machine/68340tmu.h b/src/devices/machine/68340tmu.h
index 0582debd475..8952632792b 100644
--- a/src/devices/machine/68340tmu.h
+++ b/src/devices/machine/68340tmu.h
@@ -14,9 +14,6 @@ class mc68340_timer_module_device : public device_t
public:
mc68340_timer_module_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
- // device-level overrides
- virtual void device_start() override;
-
READ16_MEMBER( read );
WRITE16_MEMBER( write );
DECLARE_WRITE_LINE_MEMBER( tin_w );
@@ -26,7 +23,13 @@ public:
uint8_t irq_vector() const { return m_ir & REG_IR_INTVEC; }
uint8_t arbitrate(uint8_t level) const { return (irq_level() == level) ? (m_mcr & REG_MCR_ARBLV) : 0; }
- protected:
+ void module_reset();
+
+protected:
+ // device-level overrides
+ virtual void device_start() override;
+ virtual void device_reset() override;
+
m68340_cpu_device *m_cpu;
uint16_t m_mcr;
diff --git a/src/devices/machine/6840ptm.cpp b/src/devices/machine/6840ptm.cpp
index bf1e6f4adb1..36b2cd5002b 100644
--- a/src/devices/machine/6840ptm.cpp
+++ b/src/devices/machine/6840ptm.cpp
@@ -423,7 +423,7 @@ void ptm6840_device::reload_count(int idx)
// read - Read Timer
//-------------------------------------------------
-READ8_MEMBER( ptm6840_device::read )
+uint8_t ptm6840_device::read(offs_t offset)
{
int val;
@@ -487,7 +487,7 @@ READ8_MEMBER( ptm6840_device::read )
// write - Write Timer
//-------------------------------------------------
-WRITE8_MEMBER( ptm6840_device::write )
+void ptm6840_device::write(offs_t offset, uint8_t data)
{
switch ( offset )
{
diff --git a/src/devices/machine/6840ptm.h b/src/devices/machine/6840ptm.h
index ad5859b771b..2c913a97b4c 100644
--- a/src/devices/machine/6840ptm.h
+++ b/src/devices/machine/6840ptm.h
@@ -39,8 +39,8 @@ public:
void set_ext_clock(int counter, double clock); // set clock frequency
int ext_clock(int counter) const { return m_external_clock[counter]; } // get clock frequency
- DECLARE_WRITE8_MEMBER( write );
- DECLARE_READ8_MEMBER( read );
+ void write(offs_t offset, uint8_t data);
+ uint8_t read(offs_t offset);
void set_gate(int idx, int state);
DECLARE_WRITE_LINE_MEMBER( set_g1 );
diff --git a/src/devices/machine/6850acia.cpp b/src/devices/machine/6850acia.cpp
index 6527608bf0f..08e8459fd36 100644
--- a/src/devices/machine/6850acia.cpp
+++ b/src/devices/machine/6850acia.cpp
@@ -150,24 +150,27 @@ void acia6850_device::device_reset()
output_irq(1);
}
-READ8_MEMBER( acia6850_device::status_r )
+uint8_t acia6850_device::status_r()
{
uint8_t status = m_status;
- if (status & SR_CTS)
+ if (!machine().side_effects_disabled())
{
- status &= ~SR_TDRE;
- }
+ if (status & SR_CTS)
+ {
+ status &= ~SR_TDRE;
+ }
- if (m_dcd_irq_pending == DCD_IRQ_READ_STATUS)
- {
- m_dcd_irq_pending = DCD_IRQ_READ_DATA;
+ if (m_dcd_irq_pending == DCD_IRQ_READ_STATUS)
+ {
+ m_dcd_irq_pending = DCD_IRQ_READ_DATA;
+ }
}
return status;
}
-WRITE8_MEMBER( acia6850_device::control_w )
+void acia6850_device::control_w(uint8_t data)
{
LOG("MC6850 '%s' Control: %02x\n", tag(), data);
@@ -237,7 +240,7 @@ void acia6850_device::update_irq()
output_irq(calculate_txirq() && calculate_rxirq());
}
-WRITE8_MEMBER( acia6850_device::data_w )
+void acia6850_device::data_w(uint8_t data)
{
LOG("MC6850 '%s' Data: %02x\n", tag(), data);
@@ -254,40 +257,43 @@ WRITE8_MEMBER( acia6850_device::data_w )
update_irq();
}
-READ8_MEMBER( acia6850_device::data_r )
+uint8_t acia6850_device::data_r()
{
- if (m_overrun_pending)
+ if (!machine().side_effects_disabled())
{
- m_status |= SR_OVRN;
- m_overrun_pending = false;
- }
- else
- {
- m_status &= ~SR_OVRN;
- m_status &= ~SR_RDRF;
- }
+ if (m_overrun_pending)
+ {
+ m_status |= SR_OVRN;
+ m_overrun_pending = false;
+ }
+ else
+ {
+ m_status &= ~SR_OVRN;
+ m_status &= ~SR_RDRF;
+ }
- if (m_dcd_irq_pending == DCD_IRQ_READ_DATA)
- {
- m_dcd_irq_pending = DCD_IRQ_NONE;
- }
+ if (m_dcd_irq_pending == DCD_IRQ_READ_DATA)
+ {
+ m_dcd_irq_pending = DCD_IRQ_NONE;
+ }
- update_irq();
+ update_irq();
+ }
return m_rdr;
}
-WRITE8_MEMBER( acia6850_device::write )
+void acia6850_device::write(offs_t offset, uint8_t data)
{
if (BIT(offset, 0))
- data_w(space, 0, data);
+ data_w(data);
else
- control_w(space, 0, data);
+ control_w(data);
}
-READ8_MEMBER( acia6850_device::read )
+uint8_t acia6850_device::read(offs_t offset)
{
- return BIT(offset, 0) ? data_r(space, 0) : status_r(space, 0);
+ return BIT(offset, 0) ? data_r() : status_r();
}
DECLARE_WRITE_LINE_MEMBER( acia6850_device::write_cts )
diff --git a/src/devices/machine/6850acia.h b/src/devices/machine/6850acia.h
index 4c40e2dc69f..4d99209d519 100644
--- a/src/devices/machine/6850acia.h
+++ b/src/devices/machine/6850acia.h
@@ -24,12 +24,12 @@ public:
auto rts_handler() { return m_rts_handler.bind(); }
auto irq_handler() { return m_irq_handler.bind(); }
- DECLARE_WRITE8_MEMBER( control_w );
- DECLARE_READ8_MEMBER( status_r );
- DECLARE_WRITE8_MEMBER( data_w );
- DECLARE_READ8_MEMBER( data_r );
- DECLARE_WRITE8_MEMBER( write );
- DECLARE_READ8_MEMBER( read );
+ void control_w(uint8_t data);
+ uint8_t status_r();
+ void data_w(uint8_t data);
+ uint8_t data_r();
+ void write(offs_t offset, uint8_t data);
+ uint8_t read(offs_t offset);
DECLARE_WRITE_LINE_MEMBER( write_cts );
DECLARE_WRITE_LINE_MEMBER( write_dcd );
diff --git a/src/devices/machine/74157.cpp b/src/devices/machine/74157.cpp
index f5a68cc4465..1dc7eb1289b 100644
--- a/src/devices/machine/74157.cpp
+++ b/src/devices/machine/74157.cpp
@@ -35,7 +35,7 @@ DEFINE_DEVICE_TYPE(LS157_X2, ls157_x2_device, "ls157_x2", "74LS157 Quad 2-to-1 M
// ls157_device - constructor
//-------------------------------------------------
-ls157_device::ls157_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+ls157_device::ls157_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
: ls157_device(mconfig, LS157, tag, owner, clock, 0x0f)
{
}
@@ -58,7 +58,7 @@ ls157_device::ls157_device(const machine_config &mconfig, device_type type, cons
// ls157_x2_device - constructor
//-------------------------------------------------
-ls157_x2_device::ls157_x2_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+ls157_x2_device::ls157_x2_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
: ls157_device(mconfig, LS157_X2, tag, owner, clock, 0xff)
{
}
@@ -92,7 +92,7 @@ void ls157_device::device_start()
// a_w -- write nibble to A1-A4
//-------------------------------------------------
-void ls157_device::write_a(u8 data)
+void ls157_device::a_w(u8 data)
{
m_a = data & m_data_mask;
update_output();
@@ -103,7 +103,7 @@ void ls157_device::write_a(u8 data)
// b_w -- write nibble to B1-B4
//-------------------------------------------------
-void ls157_device::write_b(u8 data)
+void ls157_device::b_w(u8 data)
{
m_b = data & m_data_mask;
update_output();
@@ -115,7 +115,7 @@ void ls157_device::write_b(u8 data)
// low nibble to B1-B4
//-------------------------------------------------
-void ls157_device::write_ab(u8 data)
+void ls157_device::ab_w(u8 data)
{
assert(m_data_mask == 0x0f);
m_a = data >> 4;
@@ -129,7 +129,7 @@ void ls157_device::write_ab(u8 data)
// low nibble to A1-A4
//-------------------------------------------------
-void ls157_device::write_ba(u8 data)
+void ls157_device::ba_w(u8 data)
{
assert(m_data_mask == 0x0f);
m_b = data >> 4;
@@ -143,7 +143,7 @@ void ls157_device::write_ba(u8 data)
// A1-A4 and write odd-numbered bits to B1-B4
//-------------------------------------------------
-void ls157_device::write_interleave(u8 data)
+void ls157_device::interleave_w(u8 data)
{
assert(m_data_mask == 0x0f);
m_b = bitswap<4>(data, 7, 5, 3, 1);
@@ -260,7 +260,7 @@ void ls157_device::update_output()
// DATA OUTPUTS
//**************************************************************************
-READ8_MEMBER(ls157_device::output_r)
+u8 ls157_device::output_r()
{
if (m_strobe)
return 0;
@@ -277,7 +277,7 @@ READ8_MEMBER(ls157_device::output_r)
DEFINE_DEVICE_TYPE(HC157, hc157_device, "hc157", "74HC157 Quad 2-to-1 Multiplexer")
-hc157_device::hc157_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+hc157_device::hc157_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
: ls157_device(mconfig, HC157, tag, owner, clock, 0x0f)
{
}
@@ -289,7 +289,7 @@ hc157_device::hc157_device(const machine_config &mconfig, const char *tag, devic
DEFINE_DEVICE_TYPE(HCT157, hct157_device, "hct157", "74HCT157 Quad 2-to-1 Multiplexer")
-hct157_device::hct157_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+hct157_device::hct157_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
: ls157_device(mconfig, HCT157, tag, owner, clock, 0x0f)
{
}
diff --git a/src/devices/machine/74157.h b/src/devices/machine/74157.h
index 4bd4685546c..52875cc0a76 100644
--- a/src/devices/machine/74157.h
+++ b/src/devices/machine/74157.h
@@ -42,16 +42,11 @@ public:
auto out_callback() { return m_out_cb.bind(); }
// data writes
- DECLARE_WRITE8_MEMBER(a_w) { write_a(data); }
- void write_a(u8 data);
- DECLARE_WRITE8_MEMBER(b_w) { write_b(data); }
- void write_b(u8 data);
- DECLARE_WRITE8_MEMBER(ab_w) { write_ab(data); }
- void write_ab(u8 data);
- DECLARE_WRITE8_MEMBER(ba_w) { write_ba(data); }
- void write_ba(u8 data);
- DECLARE_WRITE8_MEMBER(interleave_w) { write_interleave(data); }
- void write_interleave(u8 data);
+ void a_w(u8 data);
+ void b_w(u8 data);
+ void ab_w(u8 data);
+ void ba_w(u8 data);
+ void interleave_w(u8 data);
// data line writes
DECLARE_WRITE_LINE_MEMBER(a0_w);
@@ -68,7 +63,7 @@ public:
DECLARE_WRITE_LINE_MEMBER(strobe_w);
// output read
- DECLARE_READ8_MEMBER(output_r);
+ u8 output_r();
protected:
ls157_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, u8 mask);
diff --git a/src/devices/machine/74165.cpp b/src/devices/machine/74165.cpp
index d33033d5ab7..9ba4415d56c 100644
--- a/src/devices/machine/74165.cpp
+++ b/src/devices/machine/74165.cpp
@@ -22,9 +22,10 @@ DEFINE_DEVICE_TYPE(TTL165, ttl165_device, "ttl165", "SN54/74165")
// device_add_mconfig - add device configuration
//-------------------------------------------------
-MACHINE_CONFIG_START(ttl165_device::device_add_mconfig)
- MCFG_TIMER_DRIVER_ADD("timer", ttl165_device, qh_output)
-MACHINE_CONFIG_END
+void ttl165_device::device_add_mconfig(machine_config &config)
+{
+ TIMER(config, m_timer).configure_generic(FUNC(ttl165_device::qh_output));
+}
//**************************************************************************
diff --git a/src/devices/machine/74166.cpp b/src/devices/machine/74166.cpp
index 07a9de653a5..1611b526762 100644
--- a/src/devices/machine/74166.cpp
+++ b/src/devices/machine/74166.cpp
@@ -22,9 +22,10 @@ DEFINE_DEVICE_TYPE(TTL166, ttl166_device, "ttl166", "SN54/74166")
// device_add_mconfig - add device configuration
//-------------------------------------------------
-MACHINE_CONFIG_START(ttl166_device::device_add_mconfig)
- MCFG_TIMER_DRIVER_ADD("timer", ttl166_device, qh_output)
-MACHINE_CONFIG_END
+void ttl166_device::device_add_mconfig(machine_config &config)
+{
+ TIMER(config, m_timer).configure_generic(FUNC(ttl166_device::qh_output));
+}
//**************************************************************************
diff --git a/src/devices/machine/7474.h b/src/devices/machine/7474.h
index 0a6a678ddfb..0f9d87fa5bf 100644
--- a/src/devices/machine/7474.h
+++ b/src/devices/machine/7474.h
@@ -45,19 +45,6 @@
#pragma once
-
-
-//**************************************************************************
-// INTERFACE CONFIGURATION MACROS
-//**************************************************************************
-
-#define MCFG_7474_OUTPUT_CB(_devcb) \
- downcast<ttl7474_device &>(*device).set_output_cb(DEVCB_##_devcb);
-
-#define MCFG_7474_COMP_OUTPUT_CB(_devcb) \
- downcast<ttl7474_device &>(*device).set_comp_output_cb(DEVCB_##_devcb);
-
-
//**************************************************************************
// TYPE DEFINITIONS
//**************************************************************************
@@ -71,8 +58,6 @@ public:
ttl7474_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
// static configuration helpers
- template <class Object> devcb_base &set_output_cb(Object &&cb) { return m_output_func.set_callback(std::forward<Object>(cb)); }
- template <class Object> devcb_base &set_comp_output_cb(Object &&cb) { return m_comp_output_func.set_callback(std::forward<Object>(cb)); }
auto output_cb() { return m_output_func.bind(); }
auto comp_output_cb() { return m_comp_output_func.bind(); }
diff --git a/src/devices/machine/8042kbdc.cpp b/src/devices/machine/8042kbdc.cpp
index 602435369ab..541e7575b63 100644
--- a/src/devices/machine/8042kbdc.cpp
+++ b/src/devices/machine/8042kbdc.cpp
@@ -45,9 +45,11 @@ kbdc8042_device::kbdc8042_device(const machine_config &mconfig, const char *tag,
{
}
-MACHINE_CONFIG_START(kbdc8042_device::device_add_mconfig)
- MCFG_AT_KEYB_ADD("at_keyboard", 1, WRITELINE(*this, kbdc8042_device, keyboard_w))
-MACHINE_CONFIG_END
+void kbdc8042_device::device_add_mconfig(machine_config &config)
+{
+ AT_KEYB(config, m_keyboard_dev, pc_keyboard_device::KEYBOARD_TYPE::AT, 1);
+ m_keyboard_dev->keypress().set(FUNC(kbdc8042_device::keyboard_w));
+}
/*-------------------------------------------------
@@ -69,6 +71,9 @@ void kbdc8042_device::device_start()
m_sending = 0;
m_last_write_to_control = 0;
m_status_read_mode = 0;
+
+ m_update_timer = timer_alloc(TIMER_UPDATE);
+ m_update_timer->adjust(attotime::never);
}
/*-------------------------------------------------
@@ -86,6 +91,8 @@ void kbdc8042_device::device_reset()
m_mouse_x = 0;
m_mouse_y = 0;
m_mouse_btn = 0;
+
+ m_update_timer->adjust(attotime::from_hz(100), 0, attotime::from_hz(100));
}
void kbdc8042_device::at_8042_set_outport(uint8_t data, int initial)
@@ -195,7 +202,14 @@ void kbdc8042_device::at_8042_clear_keyboard_received()
m_mouse.received = 0;
}
-
+void kbdc8042_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
+{
+ if (id == TIMER_UPDATE)
+ {
+ at_8042_check_keyboard();
+ at_8042_check_mouse();
+ }
+}
/* **************************************************************************
* Port 0x60 Input and Output Buffer (keyboard and mouse data)
diff --git a/src/devices/machine/8042kbdc.h b/src/devices/machine/8042kbdc.h
index f2e7fdfbf04..38bdbe3814a 100644
--- a/src/devices/machine/8042kbdc.h
+++ b/src/devices/machine/8042kbdc.h
@@ -58,8 +58,11 @@ protected:
virtual void device_start() override;
virtual void device_reset() override;
virtual void device_add_mconfig(machine_config &config) override;
+ virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override;
virtual ioport_constructor device_input_ports() const override;
+ static const device_timer_id TIMER_UPDATE = 0;
+
private:
uint8_t m_inport;
uint8_t m_outport;
@@ -112,6 +115,8 @@ private:
uint16_t m_mouse_y;
uint8_t m_mouse_btn;
+ emu_timer * m_update_timer;
+
DECLARE_WRITE_LINE_MEMBER( keyboard_w );
};
diff --git a/src/devices/machine/8364_paula.h b/src/devices/machine/8364_paula.h
index c889a831b67..412fe7679e6 100644
--- a/src/devices/machine/8364_paula.h
+++ b/src/devices/machine/8364_paula.h
@@ -43,18 +43,6 @@
#pragma once
-
-//**************************************************************************
-// INTERFACE CONFIGURATION MACROS
-//**************************************************************************
-
-#define MCFG_PAULA_MEM_READ_CB(_devcb) \
- downcast<paula_8364_device &>(*device).set_mem_r_callback(DEVCB_##_devcb);
-
-#define MCFG_PAULA_INT_CB(_devcb) \
- downcast<paula_8364_device &>(*device).set_int_w_callback(DEVCB_##_devcb);
-
-
//**************************************************************************
// TYPE DEFINITIONS
//**************************************************************************
@@ -67,8 +55,6 @@ public:
paula_8364_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
// configuration
- template <class Object> devcb_base &set_mem_r_callback(Object &&cb) { return m_mem_r.set_callback(std::forward<Object>(cb)); }
- template <class Object> devcb_base &set_int_w_callback(Object &&cb) { return m_int_w.set_callback(std::forward<Object>(cb)); }
auto mem_read_cb() { return m_mem_r.bind(); }
auto int_cb() { return m_int_w.bind(); }
diff --git a/src/devices/machine/adc0808.cpp b/src/devices/machine/adc0808.cpp
index 5f8aeb8f93c..11aafe276fb 100644
--- a/src/devices/machine/adc0808.cpp
+++ b/src/devices/machine/adc0808.cpp
@@ -156,7 +156,7 @@ void adc0808_device::device_timer(emu_timer &timer, device_timer_id id, int para
// INTERFACE
//**************************************************************************
-READ8_MEMBER( adc0808_device::data_r )
+u8 adc0808_device::data_r()
{
if (!machine().side_effects_disabled())
{
@@ -170,7 +170,7 @@ READ8_MEMBER( adc0808_device::data_r )
return m_sar;
}
-WRITE8_MEMBER( adc0808_device::address_w )
+void adc0808_device::address_w(u8 data)
{
m_address = data & 7;
}
@@ -198,22 +198,22 @@ READ_LINE_MEMBER( adc0808_device::eoc_r )
return m_eoc;
}
-WRITE8_MEMBER( adc0808_device::address_offset_start_w )
+void adc0808_device::address_offset_start_w(offs_t offset, u8 data)
{
if (VERBOSE)
logerror("address_offset_start_w %02x %02x\n", offset, data);
start_w(1);
- address_w(space, 0, offset);
+ address_w(offset);
start_w(0);
}
-WRITE8_MEMBER( adc0808_device::address_data_start_w )
+void adc0808_device::address_data_start_w(u8 data)
{
if (VERBOSE)
- logerror("address_data_start_w %02x %02x\n", offset, data);
+ logerror("address_data_start_w %02x\n", data);
start_w(1);
- address_w(space, 0, data);
+ address_w(data);
start_w(0);
}
diff --git a/src/devices/machine/adc0808.h b/src/devices/machine/adc0808.h
index 46943998dca..1fa97aff47e 100644
--- a/src/devices/machine/adc0808.h
+++ b/src/devices/machine/adc0808.h
@@ -51,14 +51,14 @@ public:
auto eoc_ff_callback() { return m_eoc_ff_cb.bind(); }
template <std::size_t Bit> auto in_callback() { return m_in_cb[Bit].bind(); }
- DECLARE_READ8_MEMBER(data_r);
- DECLARE_WRITE8_MEMBER(address_w);
+ u8 data_r();
+ void address_w(u8 data);
DECLARE_WRITE_LINE_MEMBER(start_w);
DECLARE_READ_LINE_MEMBER(eoc_r);
// common hookups
- DECLARE_WRITE8_MEMBER(address_offset_start_w); // start and ale connected, address to the address bus
- DECLARE_WRITE8_MEMBER(address_data_start_w); // start and ale connected, address to the data bus
+ void address_offset_start_w(offs_t offset, u8 data); // start and ale connected, address to the address bus
+ void address_data_start_w(u8 data); // start and ale connected, address to the data bus
protected:
adc0808_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
diff --git a/src/devices/machine/adc0844.cpp b/src/devices/machine/adc0844.cpp
index 103702a8d14..c3616035927 100644
--- a/src/devices/machine/adc0844.cpp
+++ b/src/devices/machine/adc0844.cpp
@@ -182,14 +182,14 @@ void adc0848_device::device_timer(emu_timer &timer, device_timer_id id, int para
// INTERFACE
//**************************************************************************
-READ8_MEMBER( adc0844_device::read )
+u8 adc0844_device::read()
{
m_intr_cb(CLEAR_LINE);
return m_result;
}
-WRITE8_MEMBER( adc0844_device::write )
+void adc0844_device::write(u8 data)
{
m_intr_cb(CLEAR_LINE);
@@ -198,7 +198,7 @@ WRITE8_MEMBER( adc0844_device::write )
m_conversion_timer->adjust(attotime::from_usec(40));
}
-WRITE8_MEMBER( adc0848_device::write )
+void adc0848_device::write(u8 data)
{
m_intr_cb(CLEAR_LINE);
diff --git a/src/devices/machine/adc0844.h b/src/devices/machine/adc0844.h
index d20d9697a09..51dff681f16 100644
--- a/src/devices/machine/adc0844.h
+++ b/src/devices/machine/adc0844.h
@@ -43,8 +43,8 @@ public:
auto ch3_callback() { return m_ch3_cb.bind(); }
auto ch4_callback() { return m_ch4_cb.bind(); }
- DECLARE_READ8_MEMBER(read);
- virtual DECLARE_WRITE8_MEMBER(write);
+ u8 read();
+ virtual void write(u8 data);
protected:
adc0844_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
@@ -78,7 +78,7 @@ public:
auto ch7_callback() { return m_ch7_cb.bind(); }
auto ch8_callback() { return m_ch8_cb.bind(); }
- virtual DECLARE_WRITE8_MEMBER(write) override;
+ virtual void write(u8 data) override;
protected:
// device-level overrides
diff --git a/src/devices/machine/aic6250.cpp b/src/devices/machine/aic6250.cpp
index 769968569c8..adf90fe99b5 100644
--- a/src/devices/machine/aic6250.cpp
+++ b/src/devices/machine/aic6250.cpp
@@ -41,13 +41,14 @@
#include "logmacro.h"
-DEFINE_DEVICE_TYPE(AIC6250, aic6250_device, "aic6250", "Adaptec 6250 High-Performance SCSI Protocol Chip")
+DEFINE_DEVICE_TYPE(AIC6250, aic6250_device, "aic6250", "Adaptec AIC-6250 High-Performance SCSI Protocol Chip")
+DEFINE_DEVICE_TYPE(AIC6251A, aic6251a_device, "aic6251a", "Adaptec AIC-6251A Fast SCSI Protocol Chip")
static char const *const nscsi_phase[] = { "DATA OUT", "DATA IN", "COMMAND", "STATUS", "*", "*", "MESSAGE OUT", "MESSAGE IN" };
static char const *const aic6250_phase[] = { "DATA OUT", "*", "DATA IN", "*", "COMMAND", "MESSAGE OUT", "STATUS", "MESSAGE IN" };
-aic6250_device::aic6250_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
- : nscsi_device(mconfig, AIC6250, tag, owner, clock)
+aic6250_device::aic6250_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock)
+ : nscsi_device(mconfig, type, tag, owner, clock)
, m_int_cb(*this)
, m_breq_cb(*this)
, m_port_a_r_cb(*this)
@@ -57,6 +58,16 @@ aic6250_device::aic6250_device(const machine_config &mconfig, const char *tag, d
{
}
+aic6250_device::aic6250_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+ : aic6250_device(mconfig, AIC6250, tag, owner, clock)
+{
+}
+
+aic6251a_device::aic6251a_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+ : aic6250_device(mconfig, AIC6251A, tag, owner, clock)
+{
+}
+
void aic6250_device::map(address_map &map)
{
map(0x0, 0x0).rw(FUNC(aic6250_device::dma_count_l_r), FUNC(aic6250_device::dma_count_l_w));
diff --git a/src/devices/machine/aic6250.h b/src/devices/machine/aic6250.h
index 029c7f72dca..2a4ba02d118 100644
--- a/src/devices/machine/aic6250.h
+++ b/src/devices/machine/aic6250.h
@@ -34,6 +34,8 @@ public:
void dma16_w(u16 data);
protected:
+ aic6250_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
+
// standard device_interface overrides
virtual void device_start() override;
virtual void device_reset() override;
@@ -52,11 +54,11 @@ protected:
u8 status_reg_1_r();
u8 scsi_signal_reg_r();
u8 scsi_id_data_r();
- u8 source_dest_id_r() { logerror("source_dest_id_r\n"); return m_source_dest_id; }
+ u8 source_dest_id_r() { return m_source_dest_id; }
u8 memory_data_r();
u8 port_a_r();
u8 port_b_r();
- u8 scsi_latch_data_r() { logerror("scsi_latch_data_r 0x%02x\n", m_scsi_latch_data); return m_scsi_latch_data; }
+ u8 scsi_latch_data_r() { return m_scsi_latch_data; }
void dma_count_l_w(u8 data) { m_dma_count &= ~0x0000ff; m_dma_count |= (data << 0); }
void dma_count_m_w(u8 data) { m_dma_count &= ~0x00ff00; m_dma_count |= (data << 8); }
@@ -277,6 +279,13 @@ private:
util::fifo <u8, 8> m_fifo;
};
+class aic6251a_device : public aic6250_device
+{
+public:
+ aic6251a_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+};
+
DECLARE_DEVICE_TYPE(AIC6250, aic6250_device)
+DECLARE_DEVICE_TYPE(AIC6251A, aic6251a_device)
#endif // MAME_MACHINE_AIC6250_H
diff --git a/src/devices/machine/aicartc.h b/src/devices/machine/aicartc.h
index 757c0a58c1d..71c8cdd55ad 100644
--- a/src/devices/machine/aicartc.h
+++ b/src/devices/machine/aicartc.h
@@ -9,13 +9,6 @@
//**************************************************************************
-// INTERFACE CONFIGURATION MACROS
-//**************************************************************************
-
-#define MCFG_AICARTC_ADD(_tag,_freq) \
- MCFG_DEVICE_ADD(_tag, AICARTC, _freq)
-
-//**************************************************************************
// TYPE DEFINITIONS
//**************************************************************************
diff --git a/src/devices/machine/akiko.cpp b/src/devices/machine/akiko.cpp
index 0394750fe30..eb5fa929059 100644
--- a/src/devices/machine/akiko.cpp
+++ b/src/devices/machine/akiko.cpp
@@ -38,8 +38,9 @@ DEFINE_DEVICE_TYPE(AKIKO, akiko_device, "akiko", "CBM AKIKO")
// device_add_mconfig - add device configuration
//-------------------------------------------------
-MACHINE_CONFIG_START(akiko_device::device_add_mconfig)
-MACHINE_CONFIG_END
+void akiko_device::device_add_mconfig(machine_config &config)
+{
+}
//**************************************************************************
diff --git a/src/devices/machine/am9513.cpp b/src/devices/machine/am9513.cpp
index c17ae1f09fe..6506510369f 100644
--- a/src/devices/machine/am9513.cpp
+++ b/src/devices/machine/am9513.cpp
@@ -1382,7 +1382,7 @@ void am9513_device::data_write(u16 data)
// read8 - 8-bit read access
//-------------------------------------------------
-READ8_MEMBER(am9513_device::read8)
+u8 am9513_device::read8(offs_t offset)
{
if (BIT(offset, 0))
return status_read();
@@ -1395,7 +1395,7 @@ READ8_MEMBER(am9513_device::read8)
// write8 - 8-bit write access
//-------------------------------------------------
-WRITE8_MEMBER(am9513_device::write8)
+void am9513_device::write8(offs_t offset, u8 data)
{
if (BIT(offset, 0))
{
@@ -1412,7 +1412,7 @@ WRITE8_MEMBER(am9513_device::write8)
// read16 - 16-bit read access
//-------------------------------------------------
-READ16_MEMBER(am9513_device::read16)
+u16 am9513_device::read16(offs_t offset)
{
if (BIT(offset, 0))
return status_read() | 0xff00;
@@ -1429,7 +1429,7 @@ READ16_MEMBER(am9513_device::read16)
// write16 - 16-bit write access
//-------------------------------------------------
-WRITE16_MEMBER(am9513_device::write16)
+void am9513_device::write16(offs_t offset, u16 data)
{
if ((!bus_is_16_bit() || BIT(offset, 0)) && (data & 0xff00) != 0xff00)
logerror("Errant write of %02X to upper byte of %s register in %d-bit bus mode\n",
diff --git a/src/devices/machine/am9513.h b/src/devices/machine/am9513.h
index b591294d9b7..ea3fcfe6443 100644
--- a/src/devices/machine/am9513.h
+++ b/src/devices/machine/am9513.h
@@ -55,12 +55,12 @@ public:
auto fout_cb() { return m_fout_cb.bind(); }
// 8-bit data bus interface
- DECLARE_READ8_MEMBER(read8);
- DECLARE_WRITE8_MEMBER(write8);
+ u8 read8(offs_t offset);
+ void write8(offs_t offset, u8 data);
// 16-bit data bus interface
- DECLARE_READ16_MEMBER(read16);
- DECLARE_WRITE16_MEMBER(write16);
+ u16 read16(offs_t offset);
+ void write16(offs_t offset, u16 data);
// Source N inputs
DECLARE_WRITE_LINE_MEMBER(source1_w) { write_source(0, state); }
diff --git a/src/devices/machine/am9517a.cpp b/src/devices/machine/am9517a.cpp
index 463f1c447ef..5fda6ed486c 100644
--- a/src/devices/machine/am9517a.cpp
+++ b/src/devices/machine/am9517a.cpp
@@ -39,6 +39,18 @@
*/
+/*
+ * The EISA_DMA device represents the 82C37A-compatible DMA devices present in
+ * EISA bus systems, in particular those embedded within the i82357 Integrated
+ * System Peripheral. The device supports 32 bit addressing, 32 bit data sizes,
+ * and 24 bit transfer counts, allowing DMA across 64k boundaries. It also adds
+ * stop registers, supporting ring-buffer memory arrangements.
+ *
+ * TODO
+ * - stop registers
+ * - 16/32-bit transfer sizes
+ */
+
#include "emu.h"
#include "am9517a.h"
@@ -54,6 +66,7 @@
DEFINE_DEVICE_TYPE(AM9517A, am9517a_device, "am9517a", "AM9517A")
DEFINE_DEVICE_TYPE(V5X_DMAU, v5x_dmau_device, "v5x_dmau", "V5X DMAU")
DEFINE_DEVICE_TYPE(PCXPORT_DMAC, pcxport_dmac_device, "pcx_dmac", "PC Transporter DMAC")
+DEFINE_DEVICE_TYPE(EISA_DMA, eisa_dma_device, "eisa_dma", "EISA DMA")
//**************************************************************************
@@ -290,8 +303,6 @@ inline void am9517a_device::dma_advance()
{
bool msb_changed = false;
- m_channel[m_current_channel].m_count--;
-
if (m_current_channel || !COMMAND_MEM_TO_MEM || !COMMAND_CH0_ADDRESS_HOLD)
{
if (MODE_ADDRESS_DECREMENT)
@@ -316,7 +327,7 @@ inline void am9517a_device::dma_advance()
}
}
- if (m_channel[m_current_channel].m_count == 0xffff)
+ if (m_channel[m_current_channel].m_count-- == 0)
{
end_of_process();
}
@@ -712,7 +723,7 @@ void am9517a_device::execute_run()
// read -
//-------------------------------------------------
-READ8_MEMBER( am9517a_device::read )
+uint8_t am9517a_device::read(offs_t offset)
{
uint8_t data = 0;
@@ -776,7 +787,7 @@ READ8_MEMBER( am9517a_device::read )
// write -
//-------------------------------------------------
-WRITE8_MEMBER( am9517a_device::write )
+void am9517a_device::write(offs_t offset, uint8_t data)
{
if (!BIT(offset, 3))
{
@@ -1013,7 +1024,7 @@ void v5x_dmau_device::device_reset()
}
-READ8_MEMBER(v5x_dmau_device::read)
+uint8_t v5x_dmau_device::read(offs_t offset)
{
uint8_t ret = 0;
int channel = m_selected_channel;
@@ -1097,7 +1108,7 @@ READ8_MEMBER(v5x_dmau_device::read)
return ret;
}
-WRITE8_MEMBER(v5x_dmau_device::write)
+void v5x_dmau_device::write(offs_t offset, uint8_t data)
{
int channel = m_selected_channel;
@@ -1108,12 +1119,12 @@ WRITE8_MEMBER(v5x_dmau_device::write)
//m_buswidth = data & 0x02;
//if (data & 0x01)
// soft_reset();
- logerror("DMA: Initialise [%02x]\n", data);
+ LOG("DMA: Initialise [%02x]\n", data);
break;
case 0x01: // Channel
m_selected_channel = data & 0x03;
m_base = data & 0x04;
- logerror("DMA: Channel selected [%02x]\n", data);
+ LOG("DMA: Channel selected [%02x]\n", data);
break;
case 0x02: // Count (low)
m_channel[channel].m_base_count =
@@ -1121,7 +1132,7 @@ WRITE8_MEMBER(v5x_dmau_device::write)
if (m_base == 0)
m_channel[channel].m_count =
(m_channel[channel].m_count & 0xff00) | data;
- logerror("DMA: Channel %i Counter set [%04x]\n", m_selected_channel, m_channel[channel].m_base_count);
+ LOG("DMA: Channel %i Counter set [%04x]\n", m_selected_channel, m_channel[channel].m_base_count);
break;
case 0x03: // Count (high)
m_channel[channel].m_base_count =
@@ -1129,7 +1140,7 @@ WRITE8_MEMBER(v5x_dmau_device::write)
if (m_base == 0)
m_channel[channel].m_count =
(m_channel[channel].m_count & 0x00ff) | (data << 8);
- logerror("DMA: Channel %i Counter set [%04x]\n", m_selected_channel, m_channel[channel].m_base_count);
+ LOG("DMA: Channel %i Counter set [%04x]\n", m_selected_channel, m_channel[channel].m_base_count);
break;
case 0x04: // Address (low)
m_channel[channel].m_base_address =
@@ -1137,7 +1148,7 @@ WRITE8_MEMBER(v5x_dmau_device::write)
if (m_base == 0)
m_channel[channel].m_address =
(m_channel[channel].m_address & 0xffffff00) | data;
- logerror("DMA: Channel %i Address set [%08x]\n", m_selected_channel, m_channel[channel].m_base_address);
+ LOG("DMA: Channel %i Address set [%08x]\n", m_selected_channel, m_channel[channel].m_base_address);
break;
case 0x05: // Address (mid)
m_channel[channel].m_base_address =
@@ -1145,7 +1156,7 @@ WRITE8_MEMBER(v5x_dmau_device::write)
if (m_base == 0)
m_channel[channel].m_address =
(m_channel[channel].m_address & 0xffff00ff) | (data << 8);
- logerror("DMA: Channel %i Address set [%08x]\n", m_selected_channel, m_channel[channel].m_base_address);
+ LOG("DMA: Channel %i Address set [%08x]\n", m_selected_channel, m_channel[channel].m_base_address);
break;
case 0x06: // Address (high)
m_channel[channel].m_base_address =
@@ -1153,7 +1164,7 @@ WRITE8_MEMBER(v5x_dmau_device::write)
if (m_base == 0)
m_channel[channel].m_address =
(m_channel[channel].m_address & 0xff00ffff) | (data << 16);
- logerror("DMA: Channel %i Address set [%08x]\n", m_selected_channel, m_channel[channel].m_base_address);
+ LOG("DMA: Channel %i Address set [%08x]\n", m_selected_channel, m_channel[channel].m_base_address);
break;
case 0x07: // Address (highest)
m_channel[channel].m_base_address =
@@ -1161,31 +1172,31 @@ WRITE8_MEMBER(v5x_dmau_device::write)
if (m_base == 0)
m_channel[channel].m_address =
(m_channel[channel].m_address & 0x00ffffff) | (data << 24);
- logerror("DMA: Channel %i Address set [%08x]\n", m_selected_channel, m_channel[channel].m_base_address);
+ LOG("DMA: Channel %i Address set [%08x]\n", m_selected_channel, m_channel[channel].m_base_address);
break;
case 0x0a: // Mode control
m_channel[channel].m_mode = data;
// clear terminal count
m_status &= ~(1 << channel);
- logerror("DMA: Channel %i Mode control set [%02x]\n",m_selected_channel,m_channel[channel].m_mode);
+ LOG("DMA: Channel %i Mode control set [%02x]\n",m_selected_channel,m_channel[channel].m_mode);
break;
case 0x08: // Device control (low)
m_command = data;
- logerror("DMA: Device control low set [%02x]\n",data);
+ LOG("DMA: Device control low set [%02x]\n",data);
break;
case 0x09: // Device control (high)
m_command_high = data;
- logerror("DMA: Device control high set [%02x]\n",data);
+ LOG("DMA: Device control high set [%02x]\n",data);
break;
case 0x0e: // Request
//m_reg.request = data;
- logerror("(invalid) DMA: Request set [%02x]\n",data); // no software requests on the v53 integrated version
+ LOG("(invalid) DMA: Request set [%02x]\n",data); // no software requests on the v53 integrated version
break;
case 0x0f: // Mask
m_mask = data & 0x0f;
- logerror("DMA: Mask set [%02x]\n",data);
+ LOG("DMA: Mask set [%02x]\n",data);
break;
@@ -1298,3 +1309,17 @@ void pcxport_dmac_device::end_of_process()
m_state = STATE_SI;
}
+
+eisa_dma_device::eisa_dma_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+ : am9517a_device(mconfig, EISA_DMA, tag, owner, clock)
+{
+}
+
+void eisa_dma_device::device_start()
+{
+ am9517a_device::device_start();
+
+ m_address_mask = 0xffffffffU;
+
+ save_item(NAME(m_stop));
+}
diff --git a/src/devices/machine/am9517a.h b/src/devices/machine/am9517a.h
index 37390a930d3..a1e9215d125 100644
--- a/src/devices/machine/am9517a.h
+++ b/src/devices/machine/am9517a.h
@@ -61,8 +61,8 @@ public:
template <unsigned C> auto out_iow_callback() { return m_out_iow_cb[C].bind(); }
template <unsigned C> auto out_dack_callback() { return m_out_dack_cb[C].bind(); }
- virtual DECLARE_READ8_MEMBER( read );
- virtual DECLARE_WRITE8_MEMBER( write );
+ virtual uint8_t read(offs_t offset);
+ virtual void write(offs_t offset, uint8_t data);
DECLARE_WRITE_LINE_MEMBER( hack_w );
DECLARE_WRITE_LINE_MEMBER( ready_w );
@@ -95,9 +95,9 @@ protected:
struct
{
uint32_t m_address;
- uint16_t m_count;
+ uint32_t m_count;
uint32_t m_base_address;
- uint16_t m_base_count;
+ uint32_t m_base_count;
uint8_t m_mode;
} m_channel[4];
@@ -149,8 +149,8 @@ public:
template <unsigned C> auto in_io16r_callback() { return m_in_io16r_cb[C].bind(); }
template <unsigned C> auto out_io16w_callback() { return m_out_io16w_cb[C].bind(); }
- virtual DECLARE_READ8_MEMBER( read ) override;
- virtual DECLARE_WRITE8_MEMBER( write ) override;
+ virtual uint8_t read(offs_t offset) override;
+ virtual void write(offs_t offset, uint8_t data) override;
protected:
// device-level overrides
@@ -186,11 +186,50 @@ protected:
virtual void end_of_process() override;
};
+class eisa_dma_device : public am9517a_device
+{
+public:
+ eisa_dma_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+
+ template <unsigned Channel> u8 get_address_page() { return m_channel[Channel].m_address >> 16; }
+ template <unsigned Channel> void set_address_page(u8 data)
+ {
+ m_channel[Channel].m_base_address = (m_channel[Channel].m_base_address & 0x0000ffffU) | (u32(data) << 16);
+ m_channel[Channel].m_address = (m_channel[Channel].m_address & 0x0000ffffU) | (u32(data) << 16);
+ }
+
+ template <unsigned Channel> u8 get_address_page_high() { return m_channel[Channel].m_address >> 24; }
+ template <unsigned Channel> void set_address_page_high(u8 data)
+ {
+ m_channel[Channel].m_base_address = (m_channel[Channel].m_base_address & 0x00ffffffU) | (u32(data) << 24);
+ m_channel[Channel].m_address = (m_channel[Channel].m_address & 0x00ffffffU) | (u32(data) << 24);
+ }
+
+ template <unsigned Channel> u8 get_count_high() { return m_channel[Channel].m_count >> 16; }
+ template <unsigned Channel> void set_count_high(u8 data)
+ {
+ m_channel[Channel].m_base_count = (m_channel[Channel].m_base_count & 0x0000ffffU) | (u32(data) << 16);
+ m_channel[Channel].m_count = (m_channel[Channel].m_count & 0x0000ffffU) | (u32(data) << 16);
+ }
+ template <unsigned Channel> u32 get_stop() { return m_stop[Channel]; }
+ template <unsigned Channel> void set_stop(offs_t offset, u32 data, u32 mem_mask)
+ {
+ mem_mask &= 0x00fffffcU;
+ COMBINE_DATA(&m_stop[Channel]);
+ }
+
+protected:
+ virtual void device_start() override;
+
+private:
+ u32 m_stop[4];
+};
// device type definition
DECLARE_DEVICE_TYPE(AM9517A, am9517a_device)
DECLARE_DEVICE_TYPE(V5X_DMAU, v5x_dmau_device)
DECLARE_DEVICE_TYPE(PCXPORT_DMAC, pcxport_dmac_device)
+DECLARE_DEVICE_TYPE(EISA_DMA, eisa_dma_device)
#endif // MAME_MACHINE_AM9517_H
diff --git a/src/devices/machine/am9519.cpp b/src/devices/machine/am9519.cpp
index b1700b38492..be0b8c3da10 100644
--- a/src/devices/machine/am9519.cpp
+++ b/src/devices/machine/am9519.cpp
@@ -103,7 +103,7 @@ IRQ_CALLBACK_MEMBER(am9519_device::iack_cb)
}
-READ8_MEMBER( am9519_device::stat_r )
+u8 am9519_device::stat_r()
{
u8 stat = 0;
for(int n = 0, irq = m_prio; n < 8; n++, irq = (irq + 1) & 7)
@@ -121,7 +121,7 @@ READ8_MEMBER( am9519_device::stat_r )
return stat;
}
-READ8_MEMBER( am9519_device::data_r )
+u8 am9519_device::data_r()
{
switch((m_mode & 0x60) >> 5)
{
@@ -137,7 +137,7 @@ READ8_MEMBER( am9519_device::data_r )
return 0;
}
-WRITE8_MEMBER( am9519_device::cmd_w )
+void am9519_device::cmd_w(u8 data)
{
m_cmd = data;
switch(data >> 3)
@@ -222,7 +222,7 @@ WRITE8_MEMBER( am9519_device::cmd_w )
set_timer();
}
-WRITE8_MEMBER( am9519_device::data_w )
+void am9519_device::data_w(u8 data)
{
if((m_cmd & 0xf0) >= 0xb0)
{
diff --git a/src/devices/machine/am9519.h b/src/devices/machine/am9519.h
index ddd4925696b..315e0bd890d 100644
--- a/src/devices/machine/am9519.h
+++ b/src/devices/machine/am9519.h
@@ -36,10 +36,10 @@ public:
auto out_int_callback() { return m_out_int_func.bind(); }
- DECLARE_READ8_MEMBER( stat_r );
- DECLARE_READ8_MEMBER( data_r );
- DECLARE_WRITE8_MEMBER( cmd_w );
- DECLARE_WRITE8_MEMBER( data_w );
+ u8 stat_r();
+ u8 data_r();
+ void cmd_w(u8 data);
+ void data_w(u8 data);
u32 acknowledge();
DECLARE_WRITE_LINE_MEMBER( ireq0_w ) { set_irq_line(0, state); }
diff --git a/src/devices/machine/appldriv.h b/src/devices/machine/appldriv.h
index 1a396990167..6d23284f46a 100644
--- a/src/devices/machine/appldriv.h
+++ b/src/devices/machine/appldriv.h
@@ -63,33 +63,4 @@ private:
// device type definition
DECLARE_DEVICE_TYPE(FLOPPY_APPLE, apple525_floppy_image_device)
-#define MCFG_LEGACY_FLOPPY_APPLE_PARAMS(_dividend,_divisor) \
- downcast<apple525_floppy_image_device *>(device)->set_params(_dividend,_divisor);
-
-#define MCFG_LEGACY_FLOPPY_APPLE_2_DRIVES_ADD(_config,_dividend,_divisor) \
- MCFG_DEVICE_ADD(FLOPPY_0, FLOPPY_APPLE, 0) \
- MCFG_LEGACY_FLOPPY_CONFIG(_config) \
- MCFG_LEGACY_FLOPPY_APPLE_PARAMS(_dividend,_divisor) \
- MCFG_DEVICE_ADD(FLOPPY_1, FLOPPY_APPLE, 0) \
- MCFG_LEGACY_FLOPPY_CONFIG(_config) \
- MCFG_LEGACY_FLOPPY_APPLE_PARAMS(_dividend,_divisor)
-
-#define MCFG_LEGACY_FLOPPY_APPLE_4_DRIVES_ADD(_config,_dividend,_divisor) \
- MCFG_DEVICE_ADD(FLOPPY_0, FLOPPY_APPLE, 0) \
- MCFG_LEGACY_FLOPPY_CONFIG(_config) \
- MCFG_LEGACY_FLOPPY_APPLE_PARAMS(_dividend,_divisor) \
- MCFG_DEVICE_ADD(FLOPPY_1, FLOPPY_APPLE, 0) \
- MCFG_LEGACY_FLOPPY_CONFIG(_config) \
- MCFG_LEGACY_FLOPPY_APPLE_PARAMS(_dividend,_divisor) \
- MCFG_DEVICE_ADD(FLOPPY_2, FLOPPY_APPLE, 0) \
- MCFG_LEGACY_FLOPPY_CONFIG(_config) \
- MCFG_LEGACY_FLOPPY_APPLE_PARAMS(_dividend,_divisor) \
- MCFG_DEVICE_ADD(FLOPPY_3, FLOPPY_APPLE, 0) \
- MCFG_LEGACY_FLOPPY_CONFIG(_config) \
- MCFG_LEGACY_FLOPPY_APPLE_PARAMS(_dividend,_divisor)
-
-#define MCFG_LEGACY_FLOPPY_APPLE_2_DRIVES_REMOVE() \
- MCFG_DEVICE_REMOVE(FLOPPY_0) \
- MCFG_DEVICE_REMOVE(FLOPPY_1)
-
#endif // MAME_MACHINE_APPLDRIV_H
diff --git a/src/devices/machine/applefdc.h b/src/devices/machine/applefdc.h
index eede57199f7..87cc89f36dc 100644
--- a/src/devices/machine/applefdc.h
+++ b/src/devices/machine/applefdc.h
@@ -124,6 +124,12 @@ private:
class applefdc_device : public applefdc_base_device
{
public:
+ applefdc_device(const machine_config &mconfig, const char *tag, device_t *owner, const applefdc_interface *intrf)
+ : applefdc_device(mconfig, tag, owner, (uint32_t)0)
+ {
+ set_config(intrf);
+ }
+
applefdc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
@@ -145,30 +151,4 @@ public:
iwm_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
-
-
-/***************************************************************************
- DEVICE CONFIGURATION MACROS
-***************************************************************************/
-
-#define MCFG_APPLEFDC_CONFIG(_intrf) \
- downcast<applefdc_base_device &>(*device).set_config(&(_intrf));
-
-#define MCFG_APPLEFDC_ADD(_tag, _intrf) \
- MCFG_DEVICE_ADD(_tag, APPLEFDC, 0) \
- MCFG_APPLEFDC_CONFIG(_intrf)
-
-#define MCFG_APPLEFDC_MODIFY(_tag, _intrf) \
- MCFG_DEVICE_MODIFY(_tag) \
- MCFG_APPLEFDC_CONFIG(_intrf)
-
-#define MCFG_IWM_ADD(_tag, _intrf) \
- MCFG_DEVICE_ADD(_tag, IWM, 0) \
- MCFG_APPLEFDC_CONFIG(_intrf)
-
-#define MCFG_IWM_MODIFY(_tag, _intrf) \
- MCFG_DEVICE_MODIFY(_tag) \
- MCFG_APPLEFDC_CONFIG(_intrf)
-
-
#endif // MAME_MACHINE_APPLEFDC_H
diff --git a/src/devices/machine/at29x.cpp b/src/devices/machine/at29x.cpp
index 482faf24221..3f31e44c0a8 100644
--- a/src/devices/machine/at29x.cpp
+++ b/src/devices/machine/at29x.cpp
@@ -195,7 +195,7 @@ void at29x_device::sync_flags()
/*
read a byte from FEEPROM
*/
-READ8_MEMBER( at29x_device::read )
+uint8_t at29x_device::read(offs_t offset)
{
int reply;
@@ -271,7 +271,7 @@ READ8_MEMBER( at29x_device::read )
/*
Write a byte to FEEPROM
*/
-WRITE8_MEMBER( at29x_device::write )
+void at29x_device::write(offs_t offset, uint8_t data)
{
offset &= m_address_mask;
LOGMASKED(LOG_WRITE, "%05x <- %02x\n", offset, data);
diff --git a/src/devices/machine/at29x.h b/src/devices/machine/at29x.h
index 435bcaafabc..265ef1587c2 100644
--- a/src/devices/machine/at29x.h
+++ b/src/devices/machine/at29x.h
@@ -20,8 +20,8 @@ DECLARE_DEVICE_TYPE(AT29C040A, at29c040a_device)
class at29x_device : public device_t, public device_nvram_interface
{
public:
- DECLARE_READ8_MEMBER( read );
- DECLARE_WRITE8_MEMBER( write );
+ uint8_t read(offs_t offset);
+ void write(offs_t offset, uint8_t data);
protected:
at29x_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, int memory_size, int device_id, int sector_size);
diff --git a/src/devices/machine/at_keybc.cpp b/src/devices/machine/at_keybc.cpp
index aec9154a38f..5e6ac779569 100644
--- a/src/devices/machine/at_keybc.cpp
+++ b/src/devices/machine/at_keybc.cpp
@@ -74,6 +74,8 @@ ROM_START(at_kbc)
ROMX_LOAD("1503033.bin", 0x0000, 0x0800, CRC(5a81c0d2) SHA1(0100f8789fb4de74706ae7f9473a12ec2b9bd729), ROM_BIOS(0))
ROM_SYSTEM_BIOS(1, "ptl", "PTL 1986") // unknown controller BIOS, (c) 1985, 1986 PTL
ROMX_LOAD("yan25d05.bin", 0x0000, 0x0800, CRC(70c798f1) SHA1(ae9a79c7184a17331b70a50035ff63c757df094c), ROM_BIOS(1))
+ ROM_SYSTEM_BIOS(2, "award15", "Award 1985 V1.5") // MIPS Rx2030 i8742 keyboard controller
+ ROMX_LOAD("keyboard_1.5.bin", 0x0000, 0x0800, CRC(f86ba0f7) SHA1(1ad475451db35a76d929824c035d582279fbe3a3), ROM_BIOS(2))
ROM_END
ROM_START(ps2_kbc)
@@ -108,22 +110,22 @@ DEFINE_DEVICE_TYPE(PS2_KEYBOARD_CONTROLLER, ps2_keyboard_controller_device, "ps2
// KEYBOARD CONTROLLER DEVICE BASE
//**************************************************************************
-READ8_MEMBER(at_kbc_device_base::data_r)
+uint8_t at_kbc_device_base::data_r()
{
- return m_mcu->upi41_master_r(space, 0U);
+ return m_mcu->upi41_master_r(machine().dummy_space(), 0U);
}
-READ8_MEMBER(at_kbc_device_base::status_r)
+uint8_t at_kbc_device_base::status_r()
{
- return m_mcu->upi41_master_r(space, 1U);
+ return m_mcu->upi41_master_r(machine().dummy_space(), 1U);
}
-WRITE8_MEMBER(at_kbc_device_base::data_w)
+void at_kbc_device_base::data_w(uint8_t data)
{
machine().scheduler().synchronize(timer_expired_delegate(FUNC(at_kbc_device_base::write_data), this), unsigned(data));
}
-WRITE8_MEMBER(at_kbc_device_base::command_w)
+void at_kbc_device_base::command_w(uint8_t data)
{
machine().scheduler().synchronize(timer_expired_delegate(FUNC(at_kbc_device_base::write_command), this), unsigned(data));
}
@@ -263,7 +265,7 @@ ioport_constructor at_keyboard_controller_device::device_input_ports() const
return INPUT_PORTS_NAME(at_kbc);
}
-WRITE8_MEMBER(at_keyboard_controller_device::p2_w)
+void at_keyboard_controller_device::p2_w(uint8_t data)
{
set_hot_res(BIT(~data, 0));
set_gate_a20(BIT(data, 1));
@@ -277,11 +279,11 @@ WRITE8_MEMBER(at_keyboard_controller_device::p2_w)
// PS/2 KEYBOARD/MOUSE CONTROLLER DEVICE
//**************************************************************************
-READ8_MEMBER(ps2_keyboard_controller_device::data_r)
+uint8_t ps2_keyboard_controller_device::data_r()
{
set_kbd_irq(0U);
set_mouse_irq(0U);
- return m_mcu->upi41_master_r(space, 0U);
+ return m_mcu->upi41_master_r(machine().dummy_space(), 0U);
}
WRITE_LINE_MEMBER(ps2_keyboard_controller_device::mouse_clk_w)
@@ -383,12 +385,12 @@ TIMER_CALLBACK_MEMBER(ps2_keyboard_controller_device::set_mouse_data_in)
m_mouse_data_in = param ? 1U : 0U;
}
-READ8_MEMBER(ps2_keyboard_controller_device::p1_r)
+uint8_t ps2_keyboard_controller_device::p1_r()
{
return kbd_data_r() | (mouse_data_r() << 1) | 0xfcU;
}
-WRITE8_MEMBER(ps2_keyboard_controller_device::p2_w)
+void ps2_keyboard_controller_device::p2_w(uint8_t data)
{
set_hot_res(BIT(~data, 0));
set_gate_a20(BIT(data, 1));
diff --git a/src/devices/machine/at_keybc.h b/src/devices/machine/at_keybc.h
index 77bf039a7a1..5ff11aa6ba1 100644
--- a/src/devices/machine/at_keybc.h
+++ b/src/devices/machine/at_keybc.h
@@ -30,10 +30,10 @@ public:
auto kbd_data() { return m_kbd_data_cb.bind(); } // open collector with 10kΩ pull-up
// host interface
- virtual DECLARE_READ8_MEMBER(data_r);
- virtual DECLARE_READ8_MEMBER(status_r);
- DECLARE_WRITE8_MEMBER(data_w);
- DECLARE_WRITE8_MEMBER(command_w);
+ virtual uint8_t data_r();
+ virtual uint8_t status_r();
+ void data_w(uint8_t data);
+ void command_w(uint8_t data);
// inputs from keyboard
DECLARE_WRITE_LINE_MEMBER(kbd_clk_w);
@@ -93,7 +93,7 @@ protected:
private:
// MCU I/O handlers
- DECLARE_WRITE8_MEMBER(p2_w);
+ void p2_w(uint8_t data);
};
@@ -112,7 +112,7 @@ public:
auto mouse_data() { return m_mouse_data_cb.bind(); } // open collector with 10kΩ pull-up
// host interface
- virtual DECLARE_READ8_MEMBER(data_r) override;
+ virtual uint8_t data_r() override;
// inputs from mouse
DECLARE_WRITE_LINE_MEMBER(mouse_clk_w);
@@ -143,8 +143,8 @@ private:
TIMER_CALLBACK_MEMBER(set_mouse_data_in);
// MCU I/O handlers
- DECLARE_READ8_MEMBER(p1_r);
- DECLARE_WRITE8_MEMBER(p2_w);
+ uint8_t p1_r();
+ void p2_w(uint8_t data);
devcb_write_line m_mouse_irq_cb;
devcb_write_line m_mouse_clk_cb, m_mouse_data_cb;
diff --git a/src/devices/machine/atapicdr.cpp b/src/devices/machine/atapicdr.cpp
index c13b6ff001e..33cb0cb154e 100644
--- a/src/devices/machine/atapicdr.cpp
+++ b/src/devices/machine/atapicdr.cpp
@@ -30,11 +30,11 @@ atapi_fixed_cdrom_device::atapi_fixed_cdrom_device(const machine_config &mconfig
// device_add_mconfig - add device configuration
//-------------------------------------------------
-MACHINE_CONFIG_START(atapi_cdrom_device::device_add_mconfig)
- MCFG_CDROM_ADD("image")
- MCFG_CDROM_INTERFACE("cdrom")
- MCFG_DEVICE_ADD("cdda", CDDA)
-MACHINE_CONFIG_END
+void atapi_cdrom_device::device_add_mconfig(machine_config &config)
+{
+ CDROM(config, "image").set_interface("cdrom");
+ CDDA(config, "cdda");
+}
void atapi_cdrom_device::device_start()
{
diff --git a/src/devices/machine/ay31015.cpp b/src/devices/machine/ay31015.cpp
index b9cc6c74a9b..6ab1103b28a 100644
--- a/src/devices/machine/ay31015.cpp
+++ b/src/devices/machine/ay31015.cpp
@@ -116,14 +116,10 @@ ay31015_device::ay31015_device(const machine_config &mconfig, device_type type,
m_rx_bit_count(0),
m_rx_parity(0),
m_rx_pulses(0),
- m_rx_clock(0),
- m_rx_timer(nullptr),
m_tx_data(0),
m_tx_buffer(0),
m_tx_parity(0),
m_tx_pulses(0),
- m_tx_clock(0),
- m_tx_timer(nullptr),
m_read_si_cb(*this),
m_write_so_cb(*this),
m_write_pe_cb(*this),
@@ -173,14 +169,6 @@ void ay31015_device::device_resolve_objects()
void ay31015_device::device_start()
{
- m_rx_timer = timer_alloc(TIMER_RX);
- m_rx_timer->adjust(attotime::never);
- update_rx_timer();
-
- m_tx_timer = timer_alloc(TIMER_TX);
- m_tx_timer->adjust(attotime::never);
- update_tx_timer();
-
save_item(NAME(m_pins));
save_item(NAME(m_control_reg));
save_item(NAME(m_status_reg));
@@ -194,14 +182,12 @@ void ay31015_device::device_start()
save_item(NAME(m_rx_bit_count));
save_item(NAME(m_rx_parity));
save_item(NAME(m_rx_pulses));
- save_item(NAME(m_rx_clock));
save_item(NAME(m_tx_state));
save_item(NAME(m_tx_data));
save_item(NAME(m_tx_buffer));
save_item(NAME(m_tx_parity));
save_item(NAME(m_tx_pulses));
- save_item(NAME(m_tx_clock));
}
//-------------------------------------------------
@@ -270,14 +256,6 @@ void ay31015_device::update_status_pins()
update_status_pin(STATUS_EOC, EOC, m_write_eoc_cb);
}
-void ay31015_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
-{
- if (id == TIMER_RX)
- rx_process();
- else if(id == TIMER_TX)
- tx_process();
-}
-
/*************************************************** RECEIVE CONTROLS *************************************************/
@@ -732,54 +710,6 @@ int ay31015_device::get_output_pin( ay31015_device::output_pin pin )
}
-inline void ay31015_device::update_rx_timer()
-{
- if (m_rx_clock > 0.0)
- {
- m_rx_timer->adjust(attotime::from_hz(m_rx_clock), 0, attotime::from_hz(m_rx_clock));
- }
- else
- {
- m_rx_timer->enable(0);
- }
-}
-
-
-inline void ay31015_device::update_tx_timer()
-{
- if (m_tx_clock > 0.0)
- {
- m_tx_timer->adjust(attotime::from_hz(m_tx_clock), 0, attotime::from_hz(m_tx_clock));
- }
- else
- {
- m_tx_timer->enable(0);
- }
-}
-
-
-/*-------------------------------------------------
- ay31015_set_receiver_clock - set receive clock
--------------------------------------------------*/
-
-void ay31015_device::set_receiver_clock( double new_clock )
-{
- m_rx_clock = new_clock;
- update_rx_timer();
-}
-
-
-/*-------------------------------------------------
- ay31015_set_transmitter_clock - set transmit clock
--------------------------------------------------*/
-
-void ay31015_device::set_transmitter_clock( double new_clock )
-{
- m_tx_clock = new_clock;
- update_tx_timer();
-}
-
-
/*-------------------------------------------------
ay31015_get_received_data - return a byte to the computer
-------------------------------------------------*/
diff --git a/src/devices/machine/ay31015.h b/src/devices/machine/ay31015.h
index 497c6b6a9f9..42518cb9a85 100644
--- a/src/devices/machine/ay31015.h
+++ b/src/devices/machine/ay31015.h
@@ -20,10 +20,6 @@ class ay31015_device : public device_t
public:
ay31015_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
- void set_tx_clock(double tx_clock) { m_tx_clock = tx_clock; }
- void set_tx_clock(const XTAL &xtal) { set_tx_clock(xtal.dvalue()); }
- void set_rx_clock(double rx_clock) { m_rx_clock = rx_clock; }
- void set_rx_clock(const XTAL &xtal) { set_rx_clock(xtal.dvalue()); }
void set_auto_rdav(bool auto_rdav) { m_auto_rdav = auto_rdav; }
auto read_si_callback() { return m_read_si_cb.bind(); }
@@ -58,12 +54,6 @@ public:
DECLARE_READ_LINE_MEMBER(eoc_r) { return get_output_pin(EOC); }
DECLARE_READ_LINE_MEMBER(so_r) { return get_output_pin(SO); }
- /* Set a new transmitter clock (new_clock is in Hz) */
- void set_transmitter_clock( double new_clock );
-
- /* Set a new receiver clock (new_clock is in Hz) */
- void set_receiver_clock( double new_clock );
-
/* Reead the received data */
/* The received data is available on RD8-RD1 (pins 5-12) */
uint8_t get_received_data();
@@ -114,16 +104,12 @@ protected:
PREP_TIME
};
- static constexpr device_timer_id TIMER_RX = 0;
- static constexpr device_timer_id TIMER_TX = 1;
-
ay31015_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
// device-level overrides
virtual void device_resolve_objects() override;
virtual void device_start() override;
virtual void device_reset() override;
- virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override;
void rx_process();
void tx_process();
@@ -137,8 +123,6 @@ protected:
void transfer_control_pins();
void set_input_pin(input_pin pin, int data);
int get_output_pin(output_pin pin);
- inline void update_rx_timer();
- inline void update_tx_timer();
int m_pins[41];
@@ -154,16 +138,12 @@ protected:
uint8_t m_rx_bit_count;
uint8_t m_rx_parity;
uint16_t m_rx_pulses; // total pulses left
- double m_rx_clock; /* RCP - pin 17 */
- emu_timer *m_rx_timer;
state_t m_tx_state;
uint8_t m_tx_data; // byte being sent
uint8_t m_tx_buffer; // next byte to send
uint8_t m_tx_parity;
uint16_t m_tx_pulses; // total pulses left
- double m_tx_clock; /* TCP - pin 40 */
- emu_timer *m_tx_timer;
devcb_read_line m_read_si_cb; // SI - pin 20 - This will be called whenever the SI pin is sampled. Optional
devcb_write_line m_write_so_cb; // SO - pin 25 - This will be called whenever data is put on the SO pin. Optional
diff --git a/src/devices/machine/bankdev.cpp b/src/devices/machine/bankdev.cpp
index 8c10286ccfa..e8e141ff7e6 100644
--- a/src/devices/machine/bankdev.cpp
+++ b/src/devices/machine/bankdev.cpp
@@ -6,7 +6,7 @@
// device type definition
DEFINE_DEVICE_TYPE(ADDRESS_MAP_BANK, address_map_bank_device, "address_map_bank", "Address Map Bank")
-address_map_bank_device::address_map_bank_device( const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock )
+address_map_bank_device::address_map_bank_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
: device_t(mconfig, ADDRESS_MAP_BANK, tag, owner, clock),
device_memory_interface(mconfig, *this),
m_endianness(ENDIANNESS_NATIVE),
@@ -46,42 +46,42 @@ void address_map_bank_device::amap64(address_map &map)
map(0x00000000, 0xffffffff).rw(FUNC(address_map_bank_device::read64), FUNC(address_map_bank_device::write64));
}
-WRITE8_MEMBER(address_map_bank_device::write8)
+void address_map_bank_device::write8(offs_t offset, u8 data)
{
m_program->write_byte(m_offset + offset, data);
}
-WRITE16_MEMBER(address_map_bank_device::write16)
+void address_map_bank_device::write16(offs_t offset, u16 data, u16 mem_mask)
{
m_program->write_word(m_offset + (offset << (m_shift+1)), data, mem_mask);
}
-WRITE32_MEMBER(address_map_bank_device::write32)
+void address_map_bank_device::write32(offs_t offset, u32 data, u32 mem_mask)
{
m_program->write_dword(m_offset + (offset << (m_shift+2)), data, mem_mask);
}
-WRITE64_MEMBER(address_map_bank_device::write64)
+void address_map_bank_device::write64(offs_t offset, u64 data, u64 mem_mask)
{
m_program->write_qword(m_offset + (offset << (m_shift+3)), data, mem_mask);
}
-READ8_MEMBER(address_map_bank_device::read8)
+u8 address_map_bank_device::read8(offs_t offset)
{
return m_program->read_byte(m_offset + offset);
}
-READ16_MEMBER(address_map_bank_device::read16)
+u16 address_map_bank_device::read16(offs_t offset, u16 mem_mask)
{
return m_program->read_word(m_offset + (offset << (m_shift+1)), mem_mask);
}
-READ32_MEMBER(address_map_bank_device::read32)
+u32 address_map_bank_device::read32(offs_t offset, u32 mem_mask)
{
return m_program->read_dword(m_offset + (offset << (m_shift+2)), mem_mask);
}
-READ64_MEMBER(address_map_bank_device::read64)
+u64 address_map_bank_device::read64(offs_t offset, u64 mem_mask)
{
return m_program->read_qword(m_offset + (offset << (m_shift+3)), mem_mask);
}
diff --git a/src/devices/machine/bankdev.h b/src/devices/machine/bankdev.h
index 39bcfdcf08a..05a3c2eb411 100644
--- a/src/devices/machine/bankdev.h
+++ b/src/devices/machine/bankdev.h
@@ -12,16 +12,16 @@ class address_map_bank_device :
{
public:
// construction/destruction
- address_map_bank_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
+ address_map_bank_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock = 0);
// configuration helpers
template <typename... T> address_map_bank_device& set_map(T &&... args) { set_addrmap(0, std::forward<T>(args)...); return *this; }
address_map_bank_device& set_endianness(endianness_t endianness) { m_endianness = endianness; return *this; }
- address_map_bank_device& set_data_width(uint8_t data_width) { m_data_width = data_width; return *this; }
- address_map_bank_device& set_addr_width(uint8_t addr_width) { m_addr_width = addr_width; return *this; }
- address_map_bank_device& set_stride(uint32_t stride) { m_stride = stride; return *this; }
- address_map_bank_device& set_shift(uint32_t shift) { m_shift = shift; return *this; }
- address_map_bank_device& set_options(endianness_t endianness, uint8_t data_width, uint8_t addr_width, uint32_t stride = 1)
+ address_map_bank_device& set_data_width(u8 data_width) { m_data_width = data_width; return *this; }
+ address_map_bank_device& set_addr_width(u8 addr_width) { m_addr_width = addr_width; return *this; }
+ address_map_bank_device& set_stride(u32 stride) { m_stride = stride; return *this; }
+ address_map_bank_device& set_shift(u32 shift) { m_shift = shift; return *this; }
+ address_map_bank_device& set_options(endianness_t endianness, u8 data_width, u8 addr_width, u32 stride = 1)
{
set_endianness(endianness);
set_data_width(data_width);
@@ -32,25 +32,25 @@ public:
template <typename... T> address_map_bank_device& map(T &&... args) { set_addrmap(0, std::forward<T>(args)...); return *this; }
address_map_bank_device& endianness(endianness_t endianness) { m_endianness = endianness; return *this; }
- address_map_bank_device& data_width(uint8_t data_width) { m_data_width = data_width; return *this; }
- address_map_bank_device& addr_width(uint8_t addr_width) { m_addr_width = addr_width; return *this; }
- address_map_bank_device& stride(uint32_t stride) { m_stride = stride; return *this; }
- address_map_bank_device& shift(uint32_t shift) { m_shift = shift; return *this; }
+ address_map_bank_device& data_width(u8 data_width) { m_data_width = data_width; return *this; }
+ address_map_bank_device& addr_width(u8 addr_width) { m_addr_width = addr_width; return *this; }
+ address_map_bank_device& stride(u32 stride) { m_stride = stride; return *this; }
+ address_map_bank_device& shift(u32 shift) { m_shift = shift; return *this; }
void amap8(address_map &map);
void amap16(address_map &map);
void amap32(address_map &map);
void amap64(address_map &map);
- DECLARE_WRITE8_MEMBER(write8);
- DECLARE_WRITE16_MEMBER(write16);
- DECLARE_WRITE32_MEMBER(write32);
- DECLARE_WRITE64_MEMBER(write64);
+ void write8(offs_t offset, u8 data);
+ void write16(offs_t offset, u16 data, u16 mem_mask = 0xffff);
+ void write32(offs_t offset, u32 data, u32 mem_mask = 0xffffffff);
+ void write64(offs_t offset, u64 data, u64 mem_mask = ~u64(0));
- DECLARE_READ8_MEMBER(read8);
- DECLARE_READ16_MEMBER(read16);
- DECLARE_READ32_MEMBER(read32);
- DECLARE_READ64_MEMBER(read64);
+ u8 read8(offs_t offset);
+ u16 read16(offs_t offset, u16 mem_mask = 0xffff);
+ u32 read32(offs_t offset, u32 mem_mask = 0xffffffff);
+ u64 read64(offs_t offset, u64 mem_mask = ~u64(0));
void set_bank(offs_t offset);
@@ -64,9 +64,9 @@ protected:
private:
// internal state
endianness_t m_endianness;
- uint8_t m_data_width;
- uint8_t m_addr_width;
- uint32_t m_stride;
+ u8 m_data_width;
+ u8 m_addr_width;
+ u32 m_stride;
address_space_config m_program_config;
address_space *m_program;
offs_t m_offset;
diff --git a/src/devices/machine/clock.h b/src/devices/machine/clock.h
index 32989a15149..4bf0bed47a0 100644
--- a/src/devices/machine/clock.h
+++ b/src/devices/machine/clock.h
@@ -6,17 +6,11 @@
#pragma once
-#define MCFG_CLOCK_ADD(_tag, _clock) \
- MCFG_DEVICE_ADD(_tag, CLOCK, _clock)
-
-#define MCFG_CLOCK_SIGNAL_HANDLER(_devcb) \
- downcast<clock_device &>(*device).set_signal_handler(DEVCB_##_devcb);
-
class clock_device : public device_t
{
public:
- template <class Object> devcb_base &set_signal_handler(Object &&cb) { return m_signal_handler.set_callback(std::forward<Object>(cb)); }
auto signal_handler() { return m_signal_handler.bind(); }
+ DECLARE_READ_LINE_MEMBER(signal_r) { return m_signal; }
clock_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
diff --git a/src/devices/machine/com8116.cpp b/src/devices/machine/com8116.cpp
index 0a3da24042e..06ebfb2f5b0 100644
--- a/src/devices/machine/com8116.cpp
+++ b/src/devices/machine/com8116.cpp
@@ -25,6 +25,7 @@ DEFINE_DEVICE_TYPE(COM8116, com8116_device, "com8116", "COM8116 Dual BRG")
DEFINE_DEVICE_TYPE(COM8116_003, com8116_003_device, "com8116_003", "COM8116-003 Dual BRG")
DEFINE_DEVICE_TYPE(COM5016_5, com5016_5_device, "com5016_5", "COM5016-5 Dual BRG")
DEFINE_DEVICE_TYPE(COM5016_013, com5016_013_device, "com5016_013", "COM5016-013 Dual BRG")
+DEFINE_DEVICE_TYPE(COM8116_020, com8116_020_device, "com8116_020", "COM8116-020 Dual BRG")
// Parts with T after the number do not have an internal oscillator and require an external clock source
// The SMC/COM 5xxx parts are all dual 5v/12v parts, while the 8xxx parts are 5v only
@@ -40,7 +41,6 @@ const int com8116_device::divisors_16X_5_0688MHz[16] =
// SMC/COM8116-003 and WD WD-1943-03
// from http://www.vintagecomputer.net/fjkraan/comp/divcomp/doc/SMC_BaudGen.pdf page 283 (pdf page 20)
// baud rates are 50, 75, 110, 134.5, 150, 200, 300, 600, 1200, 1800, 2000, 2400, 3600, 4800, 9600, 19200
-// SMC/COM8116T-020 should have similar output rates, but clock is unknown and probably different
const int com8116_device::divisors_16X_6_01835MHz[16] =
{ 7523, 5015, 3420, 2797, 2508, 1881, 1254, 627, 313, 209, 188, 157, 104, 78, 39, 20 };
@@ -63,6 +63,12 @@ const int com8116_device::divisors_32X_5_0688MHz[16] =
const int com8116_device::divisors_16X_2_7648MHz[16] =
{ 3456, 2304, 1571, 1285, 1152, 864, 576, 288, 144, 96, 86, 72, 48, 36, 18, 9 };
+// SMC/COM8116T-020 (corrected from http://bitsavers.org/pdf/visualTechnology/Visual_100/MM-100-001-0A_Visual_100_and_Visual_400_Video_Display_Terminal_Maintenance_Manual_Sep1980.pdf (pdf page 99))
+// (75, 134.5 and 2000 baud divisors given as 1,807, 856 and 57, which do not match stated actual frequencies)
+// baud rates are 50, 75, 110, 134.5, 150, 200, 300, 600, 1200, 1800, 2000, 2400, 3600, 4800, 9600, 19200
+const int com8116_device::divisors_16X_1_8432MHz[16] =
+ { 2304, 1536, 1047, 857, 768, 576, 384, 192, 96, 64, 58, 48, 32, 24, 12, 6 };
+
// SMC/COM5026(T)-030 (non-standard serial rates, from http://bitsavers.informatik.uni-stuttgart.de/pdf/standardMicrosystems/_dataBooks/1979_StandardMicrosystems.pdf page 135)
const int com8116_device::divisors_16X_5_0688MHz_030[16] =
{ 731, 733, 735, 737, 741, 743, 745, 751, 6970, 5569, 5433, 4752, 4269, 1920, 1584, 301 };
@@ -120,6 +126,11 @@ com5016_013_device::com5016_013_device(const machine_config &mconfig, const char
{
}
+com8116_020_device::com8116_020_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
+ com8116_device(mconfig, COM8116_020, tag, owner, clock, divisors_16X_1_8432MHz)
+{
+}
+
//-------------------------------------------------
// device_start - device-specific startup
@@ -193,7 +204,7 @@ void com8116_device::device_timer(emu_timer &timer, device_timer_id id, int para
// str_w -
//-------------------------------------------------
-void com8116_device::write_str(uint8_t data)
+void com8116_device::str_w(uint8_t data)
{
int fr_divider = data & 0x0f;
int fr_clock = clock() / m_divisors[fr_divider];
@@ -208,7 +219,7 @@ void com8116_device::write_str(uint8_t data)
// stt_w -
//-------------------------------------------------
-void com8116_device::write_stt(uint8_t data)
+void com8116_device::stt_w(uint8_t data)
{
int ft_divider = data & 0x0f;
int ft_clock = clock() / m_divisors[ft_divider];
@@ -223,10 +234,10 @@ void com8116_device::write_stt(uint8_t data)
// str_stt_w -
//-------------------------------------------------
-WRITE8_MEMBER(com8116_device::str_stt_w)
+void com8116_device::str_stt_w(uint8_t data)
{
- write_str(data >> 4);
- write_stt(data & 0x0f);
+ str_w(data >> 4);
+ stt_w(data & 0x0f);
}
@@ -234,8 +245,8 @@ WRITE8_MEMBER(com8116_device::str_stt_w)
// stt_str_w -
//-------------------------------------------------
-WRITE8_MEMBER(com8116_device::stt_str_w)
+void com8116_device::stt_str_w(uint8_t data)
{
- write_stt(data >> 4);
- write_str(data & 0x0f);
+ stt_w(data >> 4);
+ str_w(data & 0x0f);
}
diff --git a/src/devices/machine/com8116.h b/src/devices/machine/com8116.h
index 50c8849e2ee..d073ceac91f 100644
--- a/src/devices/machine/com8116.h
+++ b/src/devices/machine/com8116.h
@@ -43,12 +43,10 @@ public:
auto fr_handler() { return m_fr_handler.bind(); }
auto ft_handler() { return m_ft_handler.bind(); }
- void write_str(uint8_t data);
- void write_stt(uint8_t data);
- DECLARE_WRITE8_MEMBER(str_w) { write_str(data); }
- DECLARE_WRITE8_MEMBER(stt_w) { write_stt(data); }
- DECLARE_WRITE8_MEMBER(str_stt_w);
- DECLARE_WRITE8_MEMBER(stt_str_w);
+ void str_w(uint8_t data);
+ void stt_w(uint8_t data);
+ void str_stt_w(uint8_t data);
+ void stt_str_w(uint8_t data);
protected:
com8116_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, const int *divisors);
@@ -58,6 +56,7 @@ protected:
static const int divisors_16X_4_9152MHz[16];
static const int divisors_32X_5_0688MHz[16];
static const int divisors_16X_2_7648MHz[16];
+ static const int divisors_16X_1_8432MHz[16];
static const int divisors_16X_5_0688MHz_030[16];
static const int divisors_16X_4_6080MHz[16];
static const int divisors_16X_4_9152MHz_SY2661_1[16];
@@ -123,10 +122,21 @@ public:
};
+// ======================> com8116_020_device
+
+class com8116_020_device : public com8116_device
+{
+public:
+ // construction/destruction
+ com8116_020_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+};
+
+
// device type definition
DECLARE_DEVICE_TYPE(COM8116, com8116_device)
DECLARE_DEVICE_TYPE(COM8116_003, com8116_003_device)
DECLARE_DEVICE_TYPE(COM5016_5, com5016_5_device)
DECLARE_DEVICE_TYPE(COM5016_013, com5016_013_device)
+DECLARE_DEVICE_TYPE(COM8116_020, com8116_020_device)
#endif // MAME_MACHINE_COM8116_H
diff --git a/src/devices/machine/cr511b.cpp b/src/devices/machine/cr511b.cpp
index 066f08575ac..6a4309f12c9 100644
--- a/src/devices/machine/cr511b.cpp
+++ b/src/devices/machine/cr511b.cpp
@@ -23,13 +23,13 @@ DEFINE_DEVICE_TYPE(CR511B, cr511b_device, "cr511b", "CR-511-B CD-ROM drive")
// device_add_mconfig - add device configuration
//-------------------------------------------------
-MACHINE_CONFIG_START(cr511b_device::device_add_mconfig)
- MCFG_CDROM_ADD("cdrom")
- MCFG_CDROM_INTERFACE("cdrom")
- MCFG_DEVICE_ADD("cdda", CDDA)
- MCFG_SOUND_ROUTE(0, ":lspeaker", 1.0)
- MCFG_SOUND_ROUTE(1, ":rspeaker", 1.0)
-MACHINE_CONFIG_END
+void cr511b_device::device_add_mconfig(machine_config &config)
+{
+ CDROM(config, m_cdrom).set_interface("cdrom");
+ CDDA(config, m_cdda);
+ m_cdda->add_route(0, ":lspeaker", 1.0);
+ m_cdda->add_route(1, ":rspeaker", 1.0);
+}
//**************************************************************************
diff --git a/src/devices/machine/cs4031.cpp b/src/devices/machine/cs4031.cpp
index fb1ac37b698..13ec9b90a6d 100644
--- a/src/devices/machine/cs4031.cpp
+++ b/src/devices/machine/cs4031.cpp
@@ -263,19 +263,19 @@ void cs4031_device::device_start()
m_space->install_rom(0xffff0000, 0xffffffff, m_bios + 0xf0000);
// install i/o accesses
- m_space_io->install_readwrite_handler(0x0000, 0x000f, read8_delegate(FUNC(am9517a_device::read), &(*m_dma1)), write8_delegate(FUNC(am9517a_device::write), &(*m_dma1)), 0xffffffff);
+ m_space_io->install_readwrite_handler(0x0000, 0x000f, read8sm_delegate(FUNC(am9517a_device::read), &(*m_dma1)), write8sm_delegate(FUNC(am9517a_device::write), &(*m_dma1)), 0xffffffff);
m_space_io->install_readwrite_handler(0x0020, 0x0023, read8sm_delegate(FUNC(pic8259_device::read), &(*m_intc1)), write8sm_delegate(FUNC(pic8259_device::write), &(*m_intc1)), 0x0000ffff);
- m_space_io->install_write_handler(0x0020, 0x0023, write8_delegate(FUNC(cs4031_device::config_address_w), this), 0x00ff0000);
- m_space_io->install_readwrite_handler(0x0020, 0x0023, read8_delegate(FUNC(cs4031_device::config_data_r), this), write8_delegate(FUNC(cs4031_device::config_data_w), this), 0xff000000);
+ m_space_io->install_write_handler(0x0020, 0x0023, write8smo_delegate(FUNC(cs4031_device::config_address_w), this), 0x00ff0000);
+ m_space_io->install_readwrite_handler(0x0020, 0x0023, read8smo_delegate(FUNC(cs4031_device::config_data_r), this), write8smo_delegate(FUNC(cs4031_device::config_data_w), this), 0xff000000);
m_space_io->install_readwrite_handler(0x0040, 0x0043, read8sm_delegate(FUNC(pit8254_device::read), &(*m_ctc)), write8sm_delegate(FUNC(pit8254_device::write), &(*m_ctc)), 0xffffffff);
- m_space_io->install_readwrite_handler(0x0060, 0x0063, read8_delegate(FUNC(cs4031_device::keyb_data_r), this), write8_delegate(FUNC(cs4031_device::keyb_data_w), this), 0x000000ff);
- m_space_io->install_readwrite_handler(0x0060, 0x0063, read8_delegate(FUNC(cs4031_device::portb_r), this), write8_delegate(FUNC(cs4031_device::portb_w), this), 0x0000ff00);
- m_space_io->install_readwrite_handler(0x0064, 0x0067, read8_delegate(FUNC(cs4031_device::keyb_status_r), this), write8_delegate(FUNC(cs4031_device::keyb_command_w), this), 0x000000ff);
- m_space_io->install_readwrite_handler(0x0070, 0x0073, read8_delegate(FUNC(mc146818_device::read), &(*m_rtc)), write8_delegate(FUNC(cs4031_device::rtc_w), this), 0x0000ffff);
- m_space_io->install_readwrite_handler(0x0080, 0x008f, read8_delegate(FUNC(cs4031_device::dma_page_r), this), write8_delegate(FUNC(cs4031_device::dma_page_w), this), 0xffffffff);
- m_space_io->install_readwrite_handler(0x0090, 0x0093, read8_delegate(FUNC(cs4031_device::sysctrl_r), this), write8_delegate(FUNC(cs4031_device::sysctrl_w), this), 0x00ff0000);
+ m_space_io->install_readwrite_handler(0x0060, 0x0063, read8smo_delegate(FUNC(cs4031_device::keyb_data_r), this), write8smo_delegate(FUNC(cs4031_device::keyb_data_w), this), 0x000000ff);
+ m_space_io->install_readwrite_handler(0x0060, 0x0063, read8smo_delegate(FUNC(cs4031_device::portb_r), this), write8smo_delegate(FUNC(cs4031_device::portb_w), this), 0x0000ff00);
+ m_space_io->install_readwrite_handler(0x0064, 0x0067, read8smo_delegate(FUNC(cs4031_device::keyb_status_r), this), write8smo_delegate(FUNC(cs4031_device::keyb_command_w), this), 0x000000ff);
+ m_space_io->install_readwrite_handler(0x0070, 0x0073, read8sm_delegate(FUNC(mc146818_device::read), &(*m_rtc)), write8sm_delegate(FUNC(cs4031_device::rtc_w), this), 0x0000ffff);
+ m_space_io->install_readwrite_handler(0x0080, 0x008f, read8sm_delegate(FUNC(cs4031_device::dma_page_r), this), write8sm_delegate(FUNC(cs4031_device::dma_page_w), this), 0xffffffff);
+ m_space_io->install_readwrite_handler(0x0090, 0x0093, read8smo_delegate(FUNC(cs4031_device::sysctrl_r), this), write8smo_delegate(FUNC(cs4031_device::sysctrl_w), this), 0x00ff0000);
m_space_io->install_readwrite_handler(0x00a0, 0x00a3, read8sm_delegate(FUNC(pic8259_device::read), &(*m_intc2)), write8sm_delegate(FUNC(pic8259_device::write), &(*m_intc2)), 0x0000ffff);
- m_space_io->install_readwrite_handler(0x00c0, 0x00df, read8_delegate(FUNC(cs4031_device::dma2_r),this), write8_delegate(FUNC(cs4031_device::dma2_w),this), 0xffffffff);
+ m_space_io->install_readwrite_handler(0x00c0, 0x00df, read8sm_delegate(FUNC(cs4031_device::dma2_r),this), write8sm_delegate(FUNC(cs4031_device::dma2_w),this), 0xffffffff);
}
//-------------------------------------------------
@@ -328,7 +328,7 @@ offs_t cs4031_device::page_offset()
return 0xff0000;
}
-READ8_MEMBER( cs4031_device::dma_read_byte )
+uint8_t cs4031_device::dma_read_byte(offs_t offset)
{
if (m_dma_channel == -1)
return 0xff;
@@ -336,7 +336,7 @@ READ8_MEMBER( cs4031_device::dma_read_byte )
return m_space->read_byte(page_offset() + offset);
}
-WRITE8_MEMBER( cs4031_device::dma_write_byte )
+void cs4031_device::dma_write_byte(offs_t offset, uint8_t data)
{
if (m_dma_channel == -1)
return;
@@ -344,7 +344,7 @@ WRITE8_MEMBER( cs4031_device::dma_write_byte )
m_space->write_byte(page_offset() + offset, data);
}
-READ8_MEMBER( cs4031_device::dma_read_word )
+uint8_t cs4031_device::dma_read_word(offs_t offset)
{
if (m_dma_channel == -1)
return 0xff;
@@ -355,7 +355,7 @@ READ8_MEMBER( cs4031_device::dma_read_word )
return result;
}
-WRITE8_MEMBER( cs4031_device::dma_write_word )
+void cs4031_device::dma_write_word(offs_t offset, uint8_t data)
{
if (m_dma_channel == -1)
return;
@@ -377,6 +377,8 @@ WRITE_LINE_MEMBER( cs4031_device::dma1_eop_w )
void cs4031_device::set_dma_channel(int channel, bool state)
{
+ //m_write_dack(channel, state);
+
if (!state)
{
m_dma_channel = channel;
@@ -429,7 +431,7 @@ void cs4031_device::trigger_nmi()
}
}
-READ8_MEMBER( cs4031_device::intc1_slave_ack_r )
+uint8_t cs4031_device::intc1_slave_ack_r(offs_t offset)
{
if (offset == 2) // IRQ 2
return m_intc2->acknowledge();
@@ -476,13 +478,13 @@ WRITE_LINE_MEMBER( cs4031_device::ctc_out2_w )
// CHIPSET CONFIGURATION
//**************************************************************************
-WRITE8_MEMBER( cs4031_device::config_address_w )
+void cs4031_device::config_address_w(uint8_t data)
{
m_address = data;
m_address_valid = (m_address < 0x20) ? true : false;
}
-READ8_MEMBER( cs4031_device::config_data_r )
+uint8_t cs4031_device::config_data_r()
{
uint8_t result = 0xff;
@@ -499,7 +501,7 @@ READ8_MEMBER( cs4031_device::config_data_r )
return result;
}
-WRITE8_MEMBER( cs4031_device::config_data_w )
+void cs4031_device::config_data_w(uint8_t data)
{
if (m_address_valid)
{
@@ -692,21 +694,21 @@ void cs4031_device::keyboard_gatea20(int state)
update_a20m();
}
-READ8_MEMBER( cs4031_device::keyb_status_r )
+uint8_t cs4031_device::keyb_status_r()
{
LOGKEYBOARD("cs4031_device::keyb_status_r\n");
- return m_keybc->status_r(space, 0);
+ return m_keybc->status_r();
}
-WRITE8_MEMBER( cs4031_device::keyb_command_blocked_w )
+void cs4031_device::keyb_command_blocked_w(uint8_t data)
{
// command is optionally blocked
if (!BIT(m_registers[SOFT_RESET_AND_GATEA20], 7))
- m_keybc->command_w(space, 0, data);
+ m_keybc->command_w(data);
}
-WRITE8_MEMBER( cs4031_device::keyb_command_w )
+void cs4031_device::keyb_command_w(uint8_t data)
{
LOGKEYBOARD("cs4031_device::keyb_command_w: %02x\n", data);
@@ -720,12 +722,12 @@ WRITE8_MEMBER( cs4031_device::keyb_command_w )
emulated_gatea20(1);
// self-test is never blocked
- m_keybc->command_w(space, 0, data);
+ m_keybc->command_w(data);
break;
case 0xd1:
m_keybc_d1_written = true;
- keyb_command_blocked_w(space, 0, data);
+ keyb_command_blocked_w(data);
break;
case 0xf0:
@@ -754,7 +756,7 @@ WRITE8_MEMBER( cs4031_device::keyb_command_w )
emulated_gatea20(1);
}
- keyb_command_blocked_w(space, 0, data);
+ keyb_command_blocked_w(data);
break;
@@ -763,28 +765,28 @@ WRITE8_MEMBER( cs4031_device::keyb_command_w )
if (m_keybc_data_blocked)
{
m_keybc_data_blocked = false;
- keyb_command_blocked_w(space, 0, data);
+ keyb_command_blocked_w(data);
}
else
- m_keybc->command_w(space, 0, data);
+ m_keybc->command_w(data);
break;
// everything else goes directly to the keyboard controller
default:
- m_keybc->command_w(space, 0, data);
+ m_keybc->command_w(data);
break;
}
}
-READ8_MEMBER( cs4031_device::keyb_data_r )
+uint8_t cs4031_device::keyb_data_r()
{
LOGKEYBOARD("cs4031_device::keyb_data_r\n");
- return m_keybc->data_r(space, 0);
+ return m_keybc->data_r();
}
-WRITE8_MEMBER( cs4031_device::keyb_data_w )
+void cs4031_device::keyb_data_w(uint8_t data)
{
LOGKEYBOARD("cs4031_device::keyb_data_w: %02x\n", data);
@@ -798,7 +800,7 @@ WRITE8_MEMBER( cs4031_device::keyb_data_w )
else
{
m_keybc_data_blocked = false;
- m_keybc->data_w(space, 0, data);
+ m_keybc->data_w(data);
}
}
@@ -837,7 +839,7 @@ WRITE_LINE_MEMBER( cs4031_device::kbrst_w )
1 - Fast Gate A20
*/
-WRITE8_MEMBER( cs4031_device::sysctrl_w )
+void cs4031_device::sysctrl_w(uint8_t data)
{
LOGIO("cs4031_device::sysctrl_w: %u\n", data);
@@ -853,7 +855,7 @@ WRITE8_MEMBER( cs4031_device::sysctrl_w )
m_cpureset = BIT(data, 0);
}
-READ8_MEMBER( cs4031_device::sysctrl_r )
+uint8_t cs4031_device::sysctrl_r()
{
uint8_t result = 0; // reserved bits read as 0?
@@ -883,7 +885,7 @@ READ8_MEMBER( cs4031_device::sysctrl_r )
7 - Parity check latch (r) [not emulated]
*/
-READ8_MEMBER( cs4031_device::portb_r )
+uint8_t cs4031_device::portb_r()
{
if (0)
logerror("cs4031_device::portb_r: %02x\n", m_portb);
@@ -891,7 +893,7 @@ READ8_MEMBER( cs4031_device::portb_r )
return m_portb;
}
-WRITE8_MEMBER( cs4031_device::portb_w )
+void cs4031_device::portb_w(uint8_t data)
{
if (0)
logerror("cs4031_device::portb_w: %02x\n", data);
@@ -917,7 +919,7 @@ WRITE8_MEMBER( cs4031_device::portb_w )
7 - NMI mask
6:0 - RTC address
*/
-WRITE8_MEMBER( cs4031_device::rtc_w )
+void cs4031_device::rtc_w(offs_t offset, uint8_t data)
{
if (0)
logerror("cs4031_device::rtc_w: %02x\n", data);
@@ -928,5 +930,5 @@ WRITE8_MEMBER( cs4031_device::rtc_w )
data &= 0x7f;
}
- m_rtc->write(space, offset, data);
+ m_rtc->write(offset, data);
}
diff --git a/src/devices/machine/cs4031.h b/src/devices/machine/cs4031.h
index e8b6e314f93..3e554e91904 100644
--- a/src/devices/machine/cs4031.h
+++ b/src/devices/machine/cs4031.h
@@ -59,23 +59,23 @@ public:
auto spkr() { return m_write_spkr.bind(); }
// internal io
- DECLARE_WRITE8_MEMBER( config_address_w );
- DECLARE_READ8_MEMBER( config_data_r );
- DECLARE_WRITE8_MEMBER( config_data_w );
- DECLARE_READ8_MEMBER( portb_r );
- DECLARE_WRITE8_MEMBER( portb_w );
- DECLARE_WRITE8_MEMBER( rtc_w );
- DECLARE_WRITE8_MEMBER( sysctrl_w );
- DECLARE_READ8_MEMBER( sysctrl_r );
- DECLARE_READ8_MEMBER( dma_page_r ) { return m_dma_page[offset]; }
- DECLARE_WRITE8_MEMBER( dma_page_w ) { m_dma_page[offset] = data; }
- DECLARE_READ8_MEMBER( dma2_r ) { return m_dma2->read(space, offset / 2); }
- DECLARE_WRITE8_MEMBER( dma2_w ) { m_dma2->write(space, offset / 2, data); }
- DECLARE_READ8_MEMBER( keyb_data_r );
- DECLARE_WRITE8_MEMBER( keyb_data_w );
- DECLARE_READ8_MEMBER( keyb_status_r );
- DECLARE_WRITE8_MEMBER( keyb_command_w );
- DECLARE_WRITE8_MEMBER( keyb_command_blocked_w );
+ void config_address_w(uint8_t data);
+ uint8_t config_data_r();
+ void config_data_w(uint8_t data);
+ uint8_t portb_r();
+ void portb_w(uint8_t data);
+ void rtc_w(offs_t offset, uint8_t data);
+ void sysctrl_w(uint8_t data);
+ uint8_t sysctrl_r();
+ uint8_t dma_page_r(offs_t offset) { return m_dma_page[offset]; }
+ void dma_page_w(offs_t offset, uint8_t data) { m_dma_page[offset] = data; }
+ uint8_t dma2_r(offs_t offset) { return m_dma2->read(offset / 2); }
+ void dma2_w(offs_t offset, uint8_t data) { m_dma2->write(offset / 2, data); }
+ uint8_t keyb_data_r();
+ void keyb_data_w(uint8_t data);
+ uint8_t keyb_status_r();
+ void keyb_command_w(uint8_t data);
+ void keyb_command_blocked_w(uint8_t data);
// input lines
DECLARE_WRITE_LINE_MEMBER( irq01_w ) { m_intc1->ir1_w(state); }
@@ -205,25 +205,25 @@ private:
uint8_t m_registers[0x20];
- DECLARE_READ8_MEMBER( dma_read_byte );
- DECLARE_WRITE8_MEMBER( dma_write_byte );
- DECLARE_READ8_MEMBER( dma_read_word );
- DECLARE_WRITE8_MEMBER( dma_write_word );
+ uint8_t dma_read_byte(offs_t offset);
+ void dma_write_byte(offs_t offset, uint8_t data);
+ uint8_t dma_read_word(offs_t offset);
+ void dma_write_word(offs_t offset, uint8_t data);
DECLARE_WRITE_LINE_MEMBER( dma1_eop_w );
- DECLARE_READ8_MEMBER( dma1_ior0_r ) { return m_read_ior(0); }
- DECLARE_READ8_MEMBER( dma1_ior1_r ) { return m_read_ior(1); }
- DECLARE_READ8_MEMBER( dma1_ior2_r ) { return m_read_ior(2); }
- DECLARE_READ8_MEMBER( dma1_ior3_r ) { return m_read_ior(3); }
- DECLARE_READ8_MEMBER( dma2_ior1_r ) { uint16_t const result = m_read_ior(5); m_dma_high_byte = result >> 8; return result; }
- DECLARE_READ8_MEMBER( dma2_ior2_r ) { uint16_t const result = m_read_ior(6); m_dma_high_byte = result >> 8; return result; }
- DECLARE_READ8_MEMBER( dma2_ior3_r ) { uint16_t const result = m_read_ior(7); m_dma_high_byte = result >> 8; return result; }
- DECLARE_WRITE8_MEMBER( dma1_iow0_w ) { m_write_iow(0, data, 0xffff); }
- DECLARE_WRITE8_MEMBER( dma1_iow1_w ) { m_write_iow(1, data, 0xffff); }
- DECLARE_WRITE8_MEMBER( dma1_iow2_w ) { m_write_iow(2, data, 0xffff); }
- DECLARE_WRITE8_MEMBER( dma1_iow3_w ) { m_write_iow(3, data, 0xffff); }
- DECLARE_WRITE8_MEMBER( dma2_iow1_w ) { m_write_iow(5, (m_dma_high_byte << 8) | data, 0xffff); }
- DECLARE_WRITE8_MEMBER( dma2_iow2_w ) { m_write_iow(6, (m_dma_high_byte << 8) | data, 0xffff); }
- DECLARE_WRITE8_MEMBER( dma2_iow3_w ) { m_write_iow(7, (m_dma_high_byte << 8) | data, 0xffff); }
+ uint8_t dma1_ior0_r() { return m_read_ior(0); }
+ uint8_t dma1_ior1_r() { return m_read_ior(1); }
+ uint8_t dma1_ior2_r() { return m_read_ior(2); }
+ uint8_t dma1_ior3_r() { return m_read_ior(3); }
+ uint8_t dma2_ior1_r() { uint16_t const result = m_read_ior(5); m_dma_high_byte = result >> 8; return result; }
+ uint8_t dma2_ior2_r() { uint16_t const result = m_read_ior(6); m_dma_high_byte = result >> 8; return result; }
+ uint8_t dma2_ior3_r() { uint16_t const result = m_read_ior(7); m_dma_high_byte = result >> 8; return result; }
+ void dma1_iow0_w(uint8_t data) { m_write_iow(0, data, 0xffff); }
+ void dma1_iow1_w(uint8_t data) { m_write_iow(1, data, 0xffff); }
+ void dma1_iow2_w(uint8_t data) { m_write_iow(2, data, 0xffff); }
+ void dma1_iow3_w(uint8_t data) { m_write_iow(3, data, 0xffff); }
+ void dma2_iow1_w(uint8_t data) { m_write_iow(5, (m_dma_high_byte << 8) | data, 0xffff); }
+ void dma2_iow2_w(uint8_t data) { m_write_iow(6, (m_dma_high_byte << 8) | data, 0xffff); }
+ void dma2_iow3_w(uint8_t data) { m_write_iow(7, (m_dma_high_byte << 8) | data, 0xffff); }
DECLARE_WRITE_LINE_MEMBER( dma1_dack0_w ) { set_dma_channel(0, state); }
DECLARE_WRITE_LINE_MEMBER( dma1_dack1_w ) { set_dma_channel(1, state); }
DECLARE_WRITE_LINE_MEMBER( dma1_dack2_w ) { set_dma_channel(2, state); }
@@ -234,7 +234,7 @@ private:
DECLARE_WRITE_LINE_MEMBER( dma2_dack3_w ) { set_dma_channel(7, state); }
DECLARE_WRITE_LINE_MEMBER( dma2_hreq_w ) { m_write_hold(state); }
DECLARE_WRITE_LINE_MEMBER( intc1_int_w ) { m_write_intr(state); }
- DECLARE_READ8_MEMBER( intc1_slave_ack_r );
+ uint8_t intc1_slave_ack_r(offs_t offset);
DECLARE_WRITE_LINE_MEMBER( ctc_out1_w );
DECLARE_WRITE_LINE_MEMBER( ctc_out2_w );
};
diff --git a/src/devices/machine/diablo_hd.cpp b/src/devices/machine/diablo_hd.cpp
index 669285ccb08..36c57cbd0d7 100644
--- a/src/devices/machine/diablo_hd.cpp
+++ b/src/devices/machine/diablo_hd.cpp
@@ -1324,11 +1324,9 @@ void diablo_hd_device::device_start()
void diablo_hd_device::device_reset()
{
// free previous page cache
- if (m_cache) {
- for (int page = 0; page < m_pages; page++)
- if (m_cache[page])
- m_cache[page] = nullptr;
- }
+ for (int page = 0; page < m_pages; page++)
+ if (m_cache[page])
+ m_cache[page] = nullptr;
// free previous bits cache
if (m_bits) {
for (int page = 0; page < m_pages; page++)
@@ -1442,9 +1440,10 @@ void diablo_hd_device::device_timer(emu_timer &timer, device_timer_id id, int pa
}
}
-MACHINE_CONFIG_START(diablo_hd_device::device_add_mconfig)
- MCFG_DIABLO_ADD("drive")
-MACHINE_CONFIG_END
+void diablo_hd_device::device_add_mconfig(machine_config &config)
+{
+ DIABLO(config, "drive", 0);
+}
DEFINE_DEVICE_TYPE(DIABLO_HD, diablo_hd_device, "diablo_hd", "Diablo Disk")
diff --git a/src/devices/machine/diablo_hd.h b/src/devices/machine/diablo_hd.h
index 41f206cc531..93915e628e3 100644
--- a/src/devices/machine/diablo_hd.h
+++ b/src/devices/machine/diablo_hd.h
@@ -162,7 +162,4 @@ private:
void sector_mark_0();
};
-#define MCFG_DIABLO_DRIVES_ADD() \
- MCFG_DEVICE_ADD(DIABLO_HD_0, DIABLO_HD, 3333333) \
- MCFG_DEVICE_ADD(DIABLO_HD_1, DIABLO_HD, 3333333)
#endif // !defined(_DIABLO_HD_DEVICE_)
diff --git a/src/devices/machine/dp8390.h b/src/devices/machine/dp8390.h
index 74b57f027d1..c13fe53e1d3 100644
--- a/src/devices/machine/dp8390.h
+++ b/src/devices/machine/dp8390.h
@@ -8,38 +8,13 @@
// device stuff
-#define MCFG_DP8390D_IRQ_CB(_devcb) \
- downcast<dp8390_device &>(*device).set_irq_callback(DEVCB_##_devcb);
-
-#define MCFG_DP8390D_BREQ_CB(_devcb) \
- downcast<dp8390_device &>(*device).set_breq_callback(DEVCB_##_devcb);
-
-#define MCFG_DP8390D_MEM_READ_CB(_devcb) \
- downcast<dp8390_device &>(*device).set_mem_read_callback(DEVCB_##_devcb);
-
-#define MCFG_DP8390D_MEM_WRITE_CB(_devcb) \
- downcast<dp8390_device &>(*device).set_mem_write_callback(DEVCB_##_devcb);
-
-#define MCFG_RTL8019A_IRQ_CB(_devcb) \
- downcast<rtl8019a_device &>(*device).set_irq_callback(DEVCB_##_devcb);
-
-#define MCFG_RTL8019A_BREQ_CB(_devcb) \
- downcast<rtl8019a_device &>(*device).set_breq_callback(DEVCB_##_devcb);
-
-#define MCFG_RTL8019A_MEM_READ_CB(_devcb) \
- downcast<rtl8019a_device &>(*device).set_mem_read_callback(DEVCB_##_devcb);
-
-#define MCFG_RTL8019A_MEM_WRITE_CB(_devcb) \
- downcast<rtl8019a_device &>(*device).set_mem_write_callback(DEVCB_##_devcb);
-
-
class dp8390_device : public device_t, public device_network_interface
{
public:
- template <class Object> devcb_base &set_irq_callback(Object &&cb) { return m_irq_cb.set_callback(std::forward<Object>(cb)); }
- template <class Object> devcb_base &set_breq_callback(Object &&cb) { return m_breq_cb.set_callback(std::forward<Object>(cb)); }
- template <class Object> devcb_base &set_mem_read_callback(Object &&cb) { return m_mem_read_cb.set_callback(std::forward<Object>(cb)); }
- template <class Object> devcb_base &set_mem_write_callback(Object &&cb) { return m_mem_write_cb.set_callback(std::forward<Object>(cb)); }
+ auto irq_callback() { return m_irq_cb.bind(); }
+ auto breq_callback() { return m_breq_cb.bind(); }
+ auto mem_read_callback() { return m_mem_read_cb.bind(); }
+ auto mem_write_callback() { return m_mem_write_cb.bind(); }
DECLARE_WRITE16_MEMBER( dp8390_w );
DECLARE_READ16_MEMBER( dp8390_r );
diff --git a/src/devices/machine/dp83932c.cpp b/src/devices/machine/dp83932c.cpp
index c8c7fcfcd9e..82d70f02797 100644
--- a/src/devices/machine/dp83932c.cpp
+++ b/src/devices/machine/dp83932c.cpp
@@ -20,112 +20,99 @@
#define VERBOSE 0
#include "logmacro.h"
-DEFINE_DEVICE_TYPE(DP83932C_BE, dp83932c_be_device, "dp83932c_be", "National Semiconductor DP83932C SONIC (big)")
-DEFINE_DEVICE_TYPE(DP83932C_LE, dp83932c_le_device, "dp83932c_le", "National Semiconductor DP83932C SONIC (little)")
+DEFINE_DEVICE_TYPE(DP83932C, dp83932c_device, "dp83932c", "National Semiconductor DP83932C SONIC")
-dp83932c_device::dp83932c_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, endianness_t endian)
- : device_t(mconfig, type, tag, owner, clock)
- , device_memory_interface(mconfig, *this)
+dp83932c_device::dp83932c_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+ : device_t(mconfig, DP83932C, tag, owner, clock)
, device_network_interface(mconfig, *this, 10.0f)
- , m_space_config("shared", endian, 32, 32)
+ , m_ram(*this, finder_base::DUMMY_TAG)
, m_out_int(*this)
{
}
-dp83932c_be_device::dp83932c_be_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
- : dp83932c_device(mconfig, DP83932C_BE, tag, owner, clock, ENDIANNESS_BIG)
-{
-}
-
-dp83932c_le_device::dp83932c_le_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
- : dp83932c_device(mconfig, DP83932C_LE, tag, owner, clock, ENDIANNESS_LITTLE)
-{
-}
-
void dp83932c_device::map(address_map &map)
{
-/*
- // command and status registers
- map(0x00, 0x03).rw(FUNC(dp83932c_device::cr_r), FUNC(dp83932c_device::cr_w));
- map(0x04, 0x07).rw(FUNC(dp83932c_device::dcr_r), FUNC(dp83932c_device::dcr_w));
- map(0x08, 0x0b).rw(FUNC(dp83932c_device::rcr_r), FUNC(dp83932c_device::rcr_w));
- map(0x0c, 0x0f).rw(FUNC(dp83932c_device::tcr_r), FUNC(dp83932c_device::tcr_w));
- map(0x10, 0x13).rw(FUNC(dp83932c_device::imr_r), FUNC(dp83932c_device::imr_w));
- map(0x14, 0x17).rw(FUNC(dp83932c_device::isr_r), FUNC(dp83932c_device::isr_w));
-
- // transmit registers
- map(0x18, 0x1b).rw(FUNC(dp83932c_device::utda_r), FUNC(dp83932c_device::utda_w));
- map(0x1c, 0x1f).rw(FUNC(dp83932c_device::ctda_r), FUNC(dp83932c_device::ctda_w));
-
- // tps
- // tfc
- // tsa0
- // tsa1
- // tfs
-
- // receive registers
- map(0x34, 0x37).rw(FUNC(dp83932c_device::urda_r), FUNC(dp83932c_device::urda_w));
- map(0x38, 0x3b).rw(FUNC(dp83932c_device::crda_r), FUNC(dp83932c_device::crda_w));
-
- // crba0
- // crba1
- // rbwc0
- // rbwc1
- // eobc
- // urra
- // rsa
- // rea
- // rrp
- // rwp
- // trba0
- // trba1
- // tbwc0
- // tbwc1
- // addr0
- // addr1
- // llfa
- // ttda
- // cep
- // cap2
- // cap1
- // cap0
- // ce
- // cdp
- // cdc
- // sr
- // wt0
- // wt1
- // rsc
- // crct
- // faet
- // mpt
- // mdt
-
- // 30-3e internal use registers
-*/
+ // datasheet uses unshifted register addresses
+ int const shift = 1;
+
+ // command and status registers
+ map(0x00 << shift, (0x00 << shift) | 0x01).rw(FUNC(dp83932c_device::cr_r), FUNC(dp83932c_device::cr_w));
+ //map(0x01 << shift, (0x01 << shift) | 0x01).rw(FUNC(dp83932c_device::dcr_r), FUNC(dp83932c_device::dcr_w));
+ //map(0x02 << shift, (0x02 << shift) | 0x01).rw(FUNC(dp83932c_device::rcr_r), FUNC(dp83932c_device::rcr_w));
+ map(0x03 << shift, (0x03 << shift) | 0x01).rw(FUNC(dp83932c_device::tcr_r), FUNC(dp83932c_device::tcr_w));
+ //map(0x04 << shift, (0x04 << shift) | 0x01).rw(FUNC(dp83932c_device::imr_r), FUNC(dp83932c_device::imr_w));
+ map(0x05 << shift, (0x05 << shift) | 0x01).rw(FUNC(dp83932c_device::isr_r), FUNC(dp83932c_device::isr_w));
+
+ // transmit registers
+ map(0x06 << shift, (0x06 << shift) | 0x01).rw(FUNC(dp83932c_device::utda_r), FUNC(dp83932c_device::utda_w));
+ //map(0x07 << shift, (0x07 << shift) | 0x01).rw(FUNC(dp83932c_device::ctda_r), FUNC(dp83932c_device::ctda_w));
+
+ // tps
+ // tfc
+ // tsa0
+ // tsa1
+ // tfs
+
+ // receive registers
+ //map(0x0d << shift, (0x0d << shift) | 0x01).rw(FUNC(dp83932c_device::urda_r), FUNC(dp83932c_device::urda_w));
+ map(0x0e << shift, (0x0e << shift) | 0x01).rw(FUNC(dp83932c_device::crda_r), FUNC(dp83932c_device::crda_w));
+
+ // crba0
+ // crba1
+ // rbwc0
+ // rbwc1
+ // eobc
+ // urra
+ // rsa
+ // rea
+ map(0x17 << shift, (0x17 << shift) | 0x01).rw(FUNC(dp83932c_device::rrp_r), FUNC(dp83932c_device::rrp_w));
+ map(0x18 << shift, (0x18 << shift) | 0x01).rw(FUNC(dp83932c_device::rwp_r), FUNC(dp83932c_device::rwp_w));
+ // trba0
+ // trba1
+ // tbwc0
+ // tbwc1
+ // addr0
+ // addr1
+ // llfa
+ // ttda
+ // cep
+ // cap2
+ // cap1
+ // cap0
+ map(0x25 << shift, (0x25 << shift) | 0x01).rw(FUNC(dp83932c_device::ce_r), FUNC(dp83932c_device::ce_w));
+ // cdp
+ // cdc
+ // sr
+ map(0x29 << shift, (0x29 << shift) | 0x01).rw(FUNC(dp83932c_device::wt0_r), FUNC(dp83932c_device::wt0_w));
+ map(0x2a << shift, (0x2a << shift) | 0x01).rw(FUNC(dp83932c_device::wt1_r), FUNC(dp83932c_device::wt1_w));
+ map(0x2b << shift, (0x2b << shift) | 0x01).rw(FUNC(dp83932c_device::rsc_r), FUNC(dp83932c_device::rsc_w));
+ // crct
+ map(0x2d << shift, (0x2d << shift) | 0x01).rw(FUNC(dp83932c_device::faet_r), FUNC(dp83932c_device::faet_w));
+ // mpt
+ // mdt
+
+ // 30-3e internal use registers
+ // dcr2
}
void dp83932c_device::device_start()
{
- m_space = &space(0);
m_out_int.resolve();
}
void dp83932c_device::device_reset()
{
+ m_cr = RST | STP | RXDIS;
+ m_tcr = NCRS | PTX;
+ m_isr = 0;
+ m_ce = 0;
+ m_rsc = 0;
}
void dp83932c_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
{
}
-device_memory_interface::space_config_vector dp83932c_device::memory_space_config() const
-{
- return space_config_vector {
- std::make_pair(0, &m_space_config)
- };
-}
-
void dp83932c_device::send_complete_cb(int result)
{
}
diff --git a/src/devices/machine/dp83932c.h b/src/devices/machine/dp83932c.h
index 27f5ae60d85..e608f7508a6 100644
--- a/src/devices/machine/dp83932c.h
+++ b/src/devices/machine/dp83932c.h
@@ -6,54 +6,113 @@
#pragma once
-class dp83932c_device :
- public device_t,
- public device_memory_interface,
- public device_network_interface
+#include "machine/ram.h"
+
+class dp83932c_device
+ : public device_t
+ , public device_network_interface
{
public:
- // callback configuration
+ dp83932c_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ static constexpr feature_type imperfect_features() { return feature::LAN; }
+
+ // configuration
+ template <typename T> void set_ram(T &&tag) { m_ram.set_tag(std::forward<T>(tag)); }
auto out_int_cb() { return m_out_int.bind(); }
void map(address_map &map);
protected:
- dp83932c_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, endianness_t endian);
-
// device_t overrides
virtual void device_start() override;
virtual void device_reset() override;
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override;
- // device_memory_interface overrides
- virtual space_config_vector memory_space_config() const override;
-
// device_network_interface overrides
virtual void send_complete_cb(int result) override;
virtual int recv_start_cb(u8 *buf, int length) override;
virtual void recv_complete_cb(int result) override;
+ enum cr_mask : u16
+ {
+ HTX = 0x0001, // halt transmission
+ TXP = 0x0002, // transmit packets
+ RXDIS = 0x0004, // receiver disable
+ RXEN = 0x0008, // receiver enable
+ STP = 0x0010, // stop timer
+ ST = 0x0020, // start timer
+ RST = 0x0080, // software reset
+ RRRA = 0x0100, // read rra
+ LCAM = 0x0200, // load cam
+
+ CR_WMASK = 0x03bf
+ };
+
+ enum tcr_mask : u16
+ {
+ PTX = 0x0001, // packet transmitted ok
+ BCM = 0x0002, // byte count mismatch
+ FU = 0x0004, // fifo underrun
+ PMB = 0x0008, // packet monitored bad
+ OWC = 0x0020, // out of window collision
+ EXC = 0x0040, // excessive collisions
+ CRSL = 0x0080, // crs lost
+ NCRS = 0x0100, // no crs
+ DEF = 0x0200, // deferred transmission
+ EXD = 0x0400, // excessive deferral
+ EXDIS = 0x1000, // disable excessive deferral timer
+ CRCI = 0x2000, // crc inhibit
+ POWC = 0x4000, // programmed out of window collision timer
+ PINT = 0x8000, // programmable interrupt
+
+ TCR_WMASK = 0xf000
+ };
+
+ u16 cr_r() { return m_cr; }
+ u16 tcr_r() { return m_tcr; }
+ u16 utda_r() { return m_utda; }
+ u16 crda_r() { return m_crda; }
+ u16 rrp_r() { return m_rrp; }
+ u16 rwp_r() { return m_rwp; }
+ u16 isr_r() { return m_isr; }
+ u16 ce_r() { return m_ce; }
+ u16 wt0_r() { return m_wt0; }
+ u16 wt1_r() { return m_wt1; }
+ u16 rsc_r() { return m_rsc; }
+ u16 faet_r() { return m_faet; }
+
+ void cr_w(u16 data) { m_cr = (data & CR_WMASK) | (m_cr & ~CR_WMASK); }
+ void tcr_w(u16 data) { m_tcr = (data & TCR_WMASK) | (m_tcr & ~TCR_WMASK); }
+ void utda_w(u16 data) { m_utda = data; }
+ void crda_w(u16 data) { m_crda = data; }
+ void rrp_w(u16 data) { m_rrp = data; }
+ void rwp_w(u16 data) { m_rwp = data; }
+ void isr_w(u16 data) { m_isr = data; }
+ void ce_w(u16 data) { m_ce = data; }
+ void wt0_w(u16 data) { m_wt0 = data; }
+ void wt1_w(u16 data) { m_wt1 = data; }
+ void rsc_w(u16 data) { m_rsc = data; }
+ void faet_w(u16 data) { m_faet = ~data; }
+
private:
- // device_memory_interface members
- const address_space_config m_space_config;
- address_space *m_space;
+ required_device<ram_device> m_ram;
devcb_write_line m_out_int;
-};
-
-class dp83932c_be_device : public dp83932c_device
-{
-public:
- dp83932c_be_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
-};
-class dp83932c_le_device : public dp83932c_device
-{
-public:
- dp83932c_le_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ u16 m_cr;
+ u16 m_tcr;
+ u16 m_utda;
+ u16 m_crda;
+ u16 m_rrp;
+ u16 m_rwp;
+ u16 m_isr;
+ u16 m_ce;
+ u16 m_wt0;
+ u16 m_wt1;
+ u16 m_rsc;
+ u16 m_faet;
};
-DECLARE_DEVICE_TYPE(DP83932C_BE, dp83932c_be_device)
-DECLARE_DEVICE_TYPE(DP83932C_LE, dp83932c_le_device)
+DECLARE_DEVICE_TYPE(DP83932C, dp83932c_device)
#endif // MAME_MACHINE_DP83932C_H
diff --git a/src/devices/machine/ds1204.h b/src/devices/machine/ds1204.h
index 12bc61657e4..59dc5718989 100644
--- a/src/devices/machine/ds1204.h
+++ b/src/devices/machine/ds1204.h
@@ -13,9 +13,6 @@
#pragma once
-#define MCFG_DS1204_ADD( _tag ) \
- MCFG_DEVICE_ADD( _tag, DS1204, 0 )
-
class ds1204_device : public device_t, public device_nvram_interface
{
public:
diff --git a/src/devices/machine/ds1205.h b/src/devices/machine/ds1205.h
index 7f854d901fc..ad7432e1ac7 100644
--- a/src/devices/machine/ds1205.h
+++ b/src/devices/machine/ds1205.h
@@ -13,9 +13,6 @@
#pragma once
-#define MCFG_DS1205_ADD( _tag ) \
- MCFG_DEVICE_ADD( _tag, DS1205, 0 )
-
class ds1205_device : public device_t, public device_nvram_interface
{
public:
diff --git a/src/devices/machine/ds128x.cpp b/src/devices/machine/ds128x.cpp
index 7a397aab303..91e022e07e7 100644
--- a/src/devices/machine/ds128x.cpp
+++ b/src/devices/machine/ds128x.cpp
@@ -10,7 +10,12 @@ DEFINE_DEVICE_TYPE(DS12885, ds12885_device, "ds12885", "DS12885 RTC/NVRAM")
//-------------------------------------------------
ds12885_device::ds12885_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
- : mc146818_device(mconfig, DS12885, tag, owner, clock)
+ : ds12885_device(mconfig, DS12885, tag, owner, clock)
+{
+}
+
+ds12885_device::ds12885_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock)
+ : mc146818_device(mconfig, type, tag, owner, clock)
{
}
@@ -23,3 +28,54 @@ int ds12885_device::get_timer_bypass()
return 22; // No tick
}
+
+DEFINE_DEVICE_TYPE(DS12885EXT, ds12885ext_device, "ds12885ext", "DS12885 RTC/NVRAM size 256 bytes")
+
+//-------------------------------------------------
+// ds12885ext_device - constructor
+//-------------------------------------------------
+
+ds12885ext_device::ds12885ext_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+ : ds12885_device(mconfig, DS12885EXT, tag, owner, clock)
+{
+}
+
+//-------------------------------------------------
+// ds12885ext_device - handlers that allow acces to extended memory size
+//-------------------------------------------------
+
+uint8_t ds12885ext_device::read_extended(offs_t offset)
+{
+ switch (offset)
+ {
+ case 0:
+ case 1:
+ return read(offset);
+ break;
+ case 2:
+ case 3:
+ return read(offset - 2);
+ break;
+ default:
+ return 0xff;
+ }
+}
+
+void ds12885ext_device::write_extended(offs_t offset, uint8_t data)
+{
+ switch (offset)
+ {
+ case 0:
+ write(offset, data & 127);
+ break;
+ case 1:
+ write(offset, data);
+ break;
+ case 2:
+ write(offset - 2, data);
+ break;
+ case 3:
+ write(offset - 2, data);
+ break;
+ }
+}
diff --git a/src/devices/machine/ds128x.h b/src/devices/machine/ds128x.h
index 671d3ee0a6f..7ade1bfa431 100644
--- a/src/devices/machine/ds128x.h
+++ b/src/devices/machine/ds128x.h
@@ -5,10 +5,8 @@
#include "mc146818.h"
-#define MCFG_DS12885_ADD(_tag) \
- MCFG_DEVICE_ADD(_tag, DS12885, XTAL(32'768))
-// ======================> mc146818_device
+// ======================> ds12885_device
class ds12885_device : public mc146818_device
{
@@ -17,6 +15,8 @@ public:
ds12885_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 32'768);
protected:
+ ds12885_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
+
virtual int data_size() override { return 128; }
virtual int get_timer_bypass() override;
};
@@ -24,4 +24,23 @@ protected:
// device type definition
DECLARE_DEVICE_TYPE(DS12885, ds12885_device)
+// ======================> ds12885ext_device
+
+class ds12885ext_device : public ds12885_device
+{
+public:
+ // construction/destruction
+ ds12885ext_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 32'768);
+
+ // read/write access to extended ram
+ uint8_t read_extended(offs_t offset);
+ void write_extended(offs_t offset, uint8_t data);
+
+protected:
+ virtual int data_size() override { return 256; }
+};
+
+// device type definition
+DECLARE_DEVICE_TYPE(DS12885EXT, ds12885ext_device)
+
#endif // MAME_MACHINE_DS128X_H
diff --git a/src/devices/machine/ds1315.cpp b/src/devices/machine/ds1315.cpp
index 6b37957f9eb..2a574dca399 100644
--- a/src/devices/machine/ds1315.cpp
+++ b/src/devices/machine/ds1315.cpp
@@ -87,17 +87,17 @@ static const uint8_t ds1315_pattern[] =
***************************************************************************/
// automated read, does all the work the real Dallas chip does
-READ8_MEMBER( ds1315_device::read )
+uint8_t ds1315_device::read(offs_t offset)
{
if (m_mode == DS_SEEK_MATCHING)
{
if (offset & 1)
{
- read_1(space, 0);
+ read_1();
}
else
{
- read_0(space, 0);
+ read_0();
}
if (offset & 4)
@@ -110,7 +110,7 @@ READ8_MEMBER( ds1315_device::read )
}
else if (m_mode == DS_CALENDAR_IO)
{
- return read_data(space, offset);
+ return read_data();
}
return 0xff; // shouldn't happen, but compilers don't know that
@@ -121,7 +121,7 @@ READ8_MEMBER( ds1315_device::read )
read_0 (actual data)
-------------------------------------------------*/
-READ8_MEMBER( ds1315_device::read_0 )
+uint8_t ds1315_device::read_0()
{
if (ds1315_pattern[m_count++] == 0)
{
@@ -145,7 +145,7 @@ READ8_MEMBER( ds1315_device::read_0 )
read_1 (actual data)
-------------------------------------------------*/
-READ8_MEMBER( ds1315_device::read_1 )
+uint8_t ds1315_device::read_1()
{
if (ds1315_pattern[m_count++] == 1)
{
@@ -163,7 +163,7 @@ READ8_MEMBER( ds1315_device::read_1 )
read_data
-------------------------------------------------*/
-READ8_MEMBER( ds1315_device::read_data )
+uint8_t ds1315_device::read_data()
{
uint8_t result;
@@ -228,7 +228,7 @@ void ds1315_device::fill_raw_data()
write_data
-------------------------------------------------*/
-READ8_MEMBER(ds1315_device::write_data)
+uint8_t ds1315_device::write_data(offs_t offset)
{
static int write_count;
if (write_count >= 64)
diff --git a/src/devices/machine/ds1315.h b/src/devices/machine/ds1315.h
index a5b70c38c76..720c4a08202 100644
--- a/src/devices/machine/ds1315.h
+++ b/src/devices/machine/ds1315.h
@@ -24,12 +24,12 @@ public:
auto read_backing() { return m_backing_read.bind(); }
// this handler automates the bits 0/2 stuff
- DECLARE_READ8_MEMBER(read);
+ uint8_t read(offs_t offset);
- DECLARE_READ8_MEMBER(read_0);
- DECLARE_READ8_MEMBER(read_1);
- DECLARE_READ8_MEMBER(read_data);
- DECLARE_READ8_MEMBER(write_data);
+ uint8_t read_0();
+ uint8_t read_1();
+ uint8_t read_data();
+ uint8_t write_data(offs_t offset);
bool chip_enable();
void chip_reset();
diff --git a/src/devices/machine/ds75160a.h b/src/devices/machine/ds75160a.h
index 2f2a2147a5e..bdc03e9dc99 100644
--- a/src/devices/machine/ds75160a.h
+++ b/src/devices/machine/ds75160a.h
@@ -25,18 +25,6 @@
#pragma once
-
-
-///*************************************************************************
-// INTERFACE CONFIGURATION MACROS
-///*************************************************************************
-
-#define MCFG_DS75160A_ADD(_tag, _read, _write) \
- MCFG_DEVICE_ADD(_tag, DS75160A, 0) \
- downcast<ds75160a_device *>(device)->set_callbacks(DEVCB_##_read, DEVCB_##_write);
-
-
-
///*************************************************************************
// TYPE DEFINITIONS
///*************************************************************************
diff --git a/src/devices/machine/f3853.cpp b/src/devices/machine/f3853.cpp
index f4713f3fa3a..45511f334ab 100644
--- a/src/devices/machine/f3853.cpp
+++ b/src/devices/machine/f3853.cpp
@@ -1,19 +1,29 @@
// license:BSD-3-Clause
-// copyright-holders:Wilbert Pol
+// copyright-holders:Wilbert Pol, hap
/**********************************************************************
- Fairchild F3853 SRAM interface with integrated interrupt
- controller and timer (SMI)
+Fairchild F3853 SMI, F3851 PSU, F3856 PSU, F38T56 PSU
- This chip is a timer shift register, basically the same as in the
- F3851.
+This device only emulates the I/O, interrupt, timer functions. Not the
+low-level ROMC signals.
- Based on a datasheet obtained from www.freetradezone.com
+F3853: Static memory interface with integrated interrupt controller and timer.
- 8-bit shift register:
- Feedback in0 = !((out3 ^ out4) ^ (out5 ^ out7))
- Interrupts are at 0xfe
- 0xff stops the register (0xfe is never reached)
+The timer is an 8-bit linear feedback shift register:
+Feedback in0 = !((out3 ^ out4) ^ (out5 ^ out7))
+Interrupts are at 0xfe
+0xff stops the register (0xfe is never reached)
+
+F3851: Program Storage Unit, same timer and interrupt controller as F3853,
+but has 2 I/O ports instead of a programmable interrupt vector.
+
+F3856/F38T56 Program Storage Unit: similar interrupt controller, timer
+is more versatile, a simple downcounter instead of shift register.
+
+TODO:
+- emulate at lower level and place this stuff into devices/cpu/f8 folder
+- interrupt priority pin
+- 3856/38T56 timer pulse counter mode, event counter mode
**********************************************************************/
@@ -21,30 +31,59 @@
#include "f3853.h"
+// device type definition
-/***************************************************************************
- IMPLEMENTATION
-***************************************************************************/
-
-//**************************************************************************
-// LIVE DEVICE
-//**************************************************************************
+DEFINE_DEVICE_TYPE(F3853, f3853_device, "f3853_smi", "Fairchild F3853 SMI")
+DEFINE_DEVICE_TYPE(F3851, f3851_device, "f3851_psu", "Fairchild F3851 PSU")
+DEFINE_DEVICE_TYPE(F3856, f3856_device, "f3856_psu", "Fairchild F3856 PSU")
+DEFINE_DEVICE_TYPE(F38T56, f38t56_device, "f38t56_psu", "Fairchild F38T56 PSU")
-// device type definition
-DEFINE_DEVICE_TYPE(F3853, f3853_device, "f3853_device", "F3853 SMI")
//-------------------------------------------------
-// f3853_device - constructor
+// constructor
//-------------------------------------------------
-f3853_device::f3853_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
- : device_t(mconfig, F3853, tag, owner, clock)
- , m_int_req_callback(*this)
- , m_pri_out_callback(*this)
- , m_priority_line(false)
- , m_external_interrupt_line(true)
-{
-}
+f3853_device::f3853_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock) :
+ device_t(mconfig, type, tag, owner, clock),
+ m_int_req_callback(*this),
+ m_pri_out_callback(*this),
+ m_int_vector(0),
+ m_prescaler(31),
+ m_priority_line(false),
+ m_external_interrupt_line(true)
+{ }
+
+f3853_device::f3853_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
+ f3853_device(mconfig, F3853, tag, owner, clock)
+{ }
+
+f3851_device::f3851_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock) :
+ f3853_device(mconfig, type, tag, owner, clock),
+ m_read_port{{*this}, {*this}},
+ m_write_port{{*this}, {*this}}
+{ }
+
+f3851_device::f3851_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
+ f3851_device(mconfig, F3851, tag, owner, clock)
+{ }
+
+f3856_device::f3856_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock) :
+ f3851_device(mconfig, type, tag, owner, clock)
+{ }
+
+f3856_device::f3856_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
+ f3856_device(mconfig, F3856, tag, owner, clock)
+{ }
+
+f38t56_device::f38t56_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) :
+ f3856_device(mconfig, F38T56, tag, owner, clock)
+{ }
+
+
+
+//-------------------------------------------------
+// initialisation
+//-------------------------------------------------
void f3853_device::device_resolve_objects()
{
@@ -53,12 +92,20 @@ void f3853_device::device_resolve_objects()
m_int_daisy_chain_callback.bind_relative_to(*owner());
}
-//-------------------------------------------------
-// device_start - device-specific startup
-//-------------------------------------------------
+void f3851_device::device_resolve_objects()
+{
+ f3853_device::device_resolve_objects();
+
+ // 2 I/O ports
+ for (devcb_read8 &cb : m_read_port)
+ cb.resolve_safe(0);
+ for (devcb_write8 &cb : m_write_port)
+ cb.resolve_safe();
+}
void f3853_device::device_start()
{
+ // lookup table for 3851/3853 lfsr timer
uint8_t reg = 0xfe; // Known to get 0xfe after 255 cycles
for(int i = reg; i >= 0; i--)
{
@@ -68,47 +115,62 @@ void f3853_device::device_start()
m_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(f3853_device::timer_callback),this));
+ // zerofill (what's not in constructor)
+ m_external_int_enable = false;
+ m_timer_int_enable = false;
+ m_request_flipflop = false;
+
+ // register for savestates
save_item(NAME(m_int_vector));
- save_item(NAME(m_external_enable));
- save_item(NAME(m_timer_enable));
+ save_item(NAME(m_prescaler));
+ save_item(NAME(m_external_int_enable));
+ save_item(NAME(m_timer_int_enable));
save_item(NAME(m_request_flipflop));
save_item(NAME(m_priority_line));
save_item(NAME(m_external_interrupt_line));
}
+void f3856_device::device_start()
+{
+ f3853_device::device_start();
-//-------------------------------------------------
-// device_reset - device-specific reset
-//-------------------------------------------------
+ m_timer_count = 0;
+ m_timer_modulo = 0;
+ m_timer_start = false;
+
+ save_item(NAME(m_timer_count));
+ save_item(NAME(m_timer_modulo));
+ save_item(NAME(m_timer_start));
+}
void f3853_device::device_reset()
{
- m_int_vector = 0;
- m_external_enable = false;
- m_timer_enable = false;
- m_request_flipflop = false;
- m_external_interrupt_line = true;
- set_interrupt_request_line();
+ // note that standalone peripherals don't have a reset pin, but 3870 does
- m_timer->enable(false);
+ // clear ports at power-on
+ for (int i = 0; i < 4; i++)
+ write(machine().dummy_space(), i, 0);
}
+//-------------------------------------------------
+// implementation
+//-------------------------------------------------
+
void f3853_device::set_interrupt_request_line()
{
m_int_req_callback(m_request_flipflop && !m_priority_line ? ASSERT_LINE : CLEAR_LINE);
}
-
IRQ_CALLBACK_MEMBER(f3853_device::int_acknowledge)
{
- if (m_external_enable && !m_priority_line && m_request_flipflop)
+ if (m_external_int_enable && !m_priority_line && m_request_flipflop)
{
m_request_flipflop = false;
set_interrupt_request_line();
return external_interrupt_vector();
}
- else if (m_timer_enable && !m_priority_line && m_request_flipflop)
+ else if (m_timer_int_enable && !m_priority_line && m_request_flipflop)
{
m_request_flipflop = false;
set_interrupt_request_line();
@@ -127,14 +189,14 @@ IRQ_CALLBACK_MEMBER(f3853_device::int_acknowledge)
void f3853_device::timer_start(uint8_t value)
{
- attotime period = (value != 0xff) ? attotime::from_hz(clock()) * (m_value_to_cycle[value]*31) : attotime::never;
+ attotime period = (value != 0xff) ? attotime::from_hz(clock()) * (m_value_to_cycle[value] * m_prescaler) : attotime::never;
m_timer->adjust(period);
}
TIMER_CALLBACK_MEMBER(f3853_device::timer_callback)
{
- if(m_timer_enable)
+ if(m_timer_int_enable)
{
m_request_flipflop = true;
set_interrupt_request_line();
@@ -142,9 +204,10 @@ TIMER_CALLBACK_MEMBER(f3853_device::timer_callback)
timer_start(0xfe);
}
+
WRITE_LINE_MEMBER(f3853_device::ext_int_w)
{
- if(m_external_interrupt_line && !state && m_external_enable)
+ if(m_external_interrupt_line && !state && m_external_int_enable)
{
m_request_flipflop = true;
}
@@ -161,49 +224,201 @@ WRITE_LINE_MEMBER(f3853_device::pri_in_w)
READ8_MEMBER(f3853_device::read)
{
- uint8_t data = 0;
-
- switch (offset)
+ switch (offset & 3)
{
+ // interrupt vector
case 0:
- data = m_int_vector >> 8;
- break;
-
+ return m_int_vector >> 8;
case 1:
- data = m_int_vector & 0xff;
- break;
+ return m_int_vector & 0xff;
- case 2: // Interrupt control; not readable
- case 3: // Timer; not readable
- break;
+ // interrupt control, timer: write-only
+ default:
+ return 0;
}
-
- return data;
}
-
WRITE8_MEMBER(f3853_device::write)
{
- switch(offset)
+ switch (offset & 3)
{
+ // interrupt vector
case 0:
m_int_vector = (data << 8) | (m_int_vector & 0x00ff);
break;
-
case 1:
m_int_vector = data | (m_int_vector & 0xff00);
break;
- case 2: //interrupt control
- m_external_enable = ((data & 3) == 1);
- m_timer_enable = ((data & 3) == 3);
+ // interrupt control
+ case 2:
+ m_external_int_enable = (data & 3) == 1;
+ m_timer_int_enable = (data & 3) == 3;
set_interrupt_request_line();
break;
- case 3: //timer
+ // set timer
+ case 3:
m_request_flipflop = false;
set_interrupt_request_line();
timer_start(data);
break;
}
}
+
+
+//-------------------------------------------------
+// f3851_device-specific handlers
+//-------------------------------------------------
+
+READ8_MEMBER(f3851_device::read)
+{
+ switch (offset & 3)
+ {
+ // I/O ports
+ case 0: case 1:
+ return (m_read_port[offset & 1])(offs_t(offset & 1));
+
+ // interrupt control, timer: write-only
+ default:
+ return 0;
+ }
+}
+
+WRITE8_MEMBER(f3851_device::write)
+{
+ switch (offset & 3)
+ {
+ // I/O ports
+ case 0: case 1:
+ (m_write_port[offset & 1])(offs_t(offset & 1), data);
+ break;
+
+ // interrupt control, timer: same as 3853
+ case 2: case 3:
+ f3853_device::write(space, offset, data);
+ break;
+ }
+}
+
+
+//-------------------------------------------------
+// f3856_device-specific handlers
+//-------------------------------------------------
+
+void f3856_device::timer_start(uint8_t value)
+{
+ m_timer_count = value;
+ attotime period = (m_timer_start) ? (attotime::from_hz(clock()) * m_prescaler) : attotime::never;
+
+ m_timer->adjust(period);
+}
+
+TIMER_CALLBACK_MEMBER(f3856_device::timer_callback)
+{
+ if (--m_timer_count == 0)
+ {
+ m_timer_count = m_timer_modulo;
+ if (m_timer_int_enable)
+ {
+ m_request_flipflop = true;
+ set_interrupt_request_line();
+ }
+ }
+
+ timer_start(m_timer_count);
+}
+
+READ8_MEMBER(f3856_device::read)
+{
+ switch (offset & 3)
+ {
+ // timer: active counter
+ case 3:
+ return m_timer_count;
+
+ // other: same as 3851
+ default:
+ return f3851_device::read(space, offset);
+ }
+}
+
+WRITE8_MEMBER(f3856_device::write)
+{
+ switch (offset & 3)
+ {
+ // I/O ports: same as 3851
+ case 0: case 1:
+ f3851_device::write(space, offset, data);
+ break;
+
+ // interrupt/timer control
+ case 2:
+ {
+ // timer prescaler
+ static const u8 prescaler[8] = { 32, 128, 8, 2 };
+ m_prescaler = prescaler[data >> 5 & 7];
+
+ // start/stop timer
+ bool prev = m_timer_start;
+ m_timer_start = bool(~data & 0x10);
+ if (m_timer_start != prev)
+ timer_start(m_timer_count);
+
+ // enable interrupts
+ m_external_int_enable = (data & 3) == 1 || (data & 3) == 2;
+ m_timer_int_enable = bool(data & 2);
+ set_interrupt_request_line();
+ break;
+ }
+
+ // set timer
+ case 3:
+ f3853_device::write(space, offset, data);
+ break;
+ }
+}
+
+
+//-------------------------------------------------
+// f38t56_device-specific handlers
+//-------------------------------------------------
+
+WRITE8_MEMBER(f38t56_device::write)
+{
+ switch (offset & 3)
+ {
+ // I/O ports: same as 3851
+ case 0: case 1:
+ f3851_device::write(space, offset, data);
+ break;
+
+ // interrupt/timer control
+ case 2:
+ {
+ // timer prescaler
+ m_prescaler = 200;
+ if (~data & 0x80) m_prescaler /= 20;
+ if (~data & 0x40) m_prescaler /= 5;
+ if (~data & 0x20) m_prescaler /= 2;
+
+ // start/stop timer
+ bool prev = m_timer_start;
+ m_timer_start = bool(data & 8);
+ if (m_timer_start != prev)
+ timer_start(m_timer_count);
+
+ // enable interrupts
+ m_external_int_enable = bool(data & 1);
+ m_timer_int_enable = bool(data & 2);
+ set_interrupt_request_line();
+ break;
+ }
+
+ // set timer
+ case 3:
+ m_timer_modulo = data;
+ f3853_device::write(space, offset, data);
+ break;
+ }
+}
diff --git a/src/devices/machine/f3853.h b/src/devices/machine/f3853.h
index 14c922871b1..762f46950fb 100644
--- a/src/devices/machine/f3853.h
+++ b/src/devices/machine/f3853.h
@@ -1,49 +1,67 @@
// license:BSD-3-Clause
-// copyright-holders:Wilbert Pol
-/***************************************************************************
-
- Fairchild F3853 SRAM interface with integrated interrupt
- controller and timer
-
- This chip is a timer shift register, basically the same as in the
- F3851.
-
-****************************************************************************
- _____ _____
- Vgg 1 |* \_/ | 40 Vdd
- PHI 2 | | 39 ROMC4
- WRITE 3 | | 38 ROMC3
- _INT REQ 4 | | 37 ROMC2
- _PRI IN 5 | | 36 ROMC1
- _RAM WRITE 6 | | 35 ROMC0
- _EXT INT 7 | | 34 CPU READ
- ADDR7 8 | | 33 REG DR
- ADDR6 9 | | 32 ADDR15
- ADDR5 10 | F3853 | 31 ADDR14
- ADDR4 11 | | 30 ADDR13
- ADDR3 12 | | 29 ADDR12
- ADDR2 13 | | 28 ADDR11
- ADDR1 14 | | 27 ADDR10
- ADDR0 15 | | 26 ADDR9
- DB0 16 | | 25 ADDR8
- DB1 17 | | 24 DB7
- DB2 18 | | 23 DB6
- DB3 19 | | 22 DB5
- Vss 20 |_____________| 21 DB4
-
-***************************************************************************/
+// copyright-holders:Wilbert Pol, hap
+/*
+
+ Fairchild F3853 SMI, F3851 PSU, F3856 PSU, F38T56 PSU
+
+*/
#ifndef MAME_MACHINE_F3853_H
#define MAME_MACHINE_F3853_H
#pragma once
+// pinout reference
+
+/*
+ _____ _____
+ Vgg 1 |* \_/ | 40 Vdd
+ PHI 2 | | 39 ROMC4
+ WRITE 3 | | 38 ROMC3
+ _INT REQ 4 | | 37 ROMC2
+ _PRI IN 5 | | 36 ROMC1
+ _RAM WRITE 6 | | 35 ROMC0
+ _EXT INT 7 | | 34 CPU READ
+ ADDR7 8 | | 33 REG DR
+ ADDR6 9 | | 32 ADDR15
+ ADDR5 10 | F3853 | 31 ADDR14
+ ADDR4 11 | | 30 ADDR13
+ ADDR3 12 | | 29 ADDR12
+ ADDR2 13 | | 28 ADDR11
+ ADDR1 14 | | 27 ADDR10
+ ADDR0 15 | | 26 ADDR9
+ DB0 16 | | 25 ADDR8
+ DB1 17 | | 24 DB7
+ DB2 18 | | 23 DB6
+ DB3 19 | | 22 DB5
+ Vss 20 |_____________| 21 DB4
+
+ _____ _____
+ _I/O B7 1 |* \_/ | 40 DB7
+ _I/O A7 2 | | 39 DB6
+ Vgg 3 | | 38 _I/O B6
+ Vdd 4 | | 37 _I/O A6
+ _EXT INT 5 | | 36 _I/O A5
+ _PRI OUT 6 | | 35 _I/O B5
+ WRITE 7 | | 34 DB5
+ PHI 8 | | 33 DB4
+ _INT REQ 9 | F3851 | 32 _I/O B4
+ _PRI IN 10 | F3856 | 31 _I/O A4
+ _DBDR 11 | F38T56 | 30 _I/O A3
+ STROBE 12 | | 29 _I/O B3
+ ROMC4 13 | | 28 DB3
+ ROMC3 14 | | 27 DB2
+ ROMC2 15 | | 26 _I/O B2
+ ROMC1 16 | | 25 _I/O A2
+ ROMC0 17 | | 24 _I/O A1
+ Vss 18 | | 23 _I/O B1
+ _I/O A0 19 | | 22 DB1
+ _I/O B0 20 |_____________| 21 DB0
+
+ F38T56 is internal in F3870
+ note: STROBE is N/C on F3851
+*/
-/***************************************************************************
- TYPE DEFINITIONS
-***************************************************************************/
-
-// ======================> f3853_device
class f3853_device : public device_t
{
@@ -55,36 +73,38 @@ public:
auto pri_out_callback() { return m_pri_out_callback.bind(); }
template<typename Object> void set_int_daisy_chain_callback(Object &&cb) { m_int_daisy_chain_callback = std::forward<Object>(cb); }
- DECLARE_READ8_MEMBER(read);
- DECLARE_WRITE8_MEMBER(write);
+ virtual DECLARE_READ8_MEMBER(read);
+ virtual DECLARE_WRITE8_MEMBER(write);
DECLARE_WRITE_LINE_MEMBER(ext_int_w);
DECLARE_WRITE_LINE_MEMBER(pri_in_w);
- TIMER_CALLBACK_MEMBER(timer_callback);
+ virtual TIMER_CALLBACK_MEMBER(timer_callback);
IRQ_CALLBACK_MEMBER(int_acknowledge);
protected:
+ f3853_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
+
// device-level overrides
virtual void device_resolve_objects() override;
virtual void device_start() override;
virtual void device_reset() override;
-private:
uint16_t timer_interrupt_vector() const { return m_int_vector & ~uint16_t(0x0080); }
uint16_t external_interrupt_vector() const { return m_int_vector | uint16_t(0x0080); }
void set_interrupt_request_line();
- void timer_start(uint8_t value);
+ virtual void timer_start(uint8_t value);
devcb_write_line m_int_req_callback;
devcb_write_line m_pri_out_callback;
device_irq_acknowledge_delegate m_int_daisy_chain_callback;
uint16_t m_int_vector; // Bit 7 is set to 0 for timer interrupts, 1 for external interrupts
- bool m_external_enable;
- bool m_timer_enable;
+ u8 m_prescaler;
+ bool m_external_int_enable;
+ bool m_timer_int_enable;
bool m_request_flipflop;
@@ -96,8 +116,66 @@ private:
uint8_t m_value_to_cycle[0x100];
};
+class f3851_device : public f3853_device
+{
+public:
+ f3851_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+
+ // interrupt vector is a mask option on 3851 and 3856
+ void set_int_vector(u16 vector) { m_int_vector = vector; }
+
+ // bidirectional I/O ports A and B
+ auto read_a() { return m_read_port[0].bind(); }
+ auto read_b() { return m_read_port[1].bind(); }
+ auto write_a() { return m_write_port[0].bind(); }
+ auto write_b() { return m_write_port[1].bind(); }
+
+ virtual DECLARE_READ8_MEMBER(read) override;
+ virtual DECLARE_WRITE8_MEMBER(write) override;
+
+protected:
+ f3851_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
+
+ virtual void device_resolve_objects() override;
+
+ devcb_read8 m_read_port[2];
+ devcb_write8 m_write_port[2];
+};
+
+class f3856_device : public f3851_device
+{
+public:
+ f3856_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+
+ virtual DECLARE_READ8_MEMBER(read) override;
+ virtual DECLARE_WRITE8_MEMBER(write) override;
+
+ virtual TIMER_CALLBACK_MEMBER(timer_callback) override;
+
+protected:
+ f3856_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
+
+ virtual void device_start() override;
+
+ virtual void timer_start(uint8_t value) override;
+
+ u8 m_timer_count;
+ u8 m_timer_modulo;
+ bool m_timer_start;
+};
+
+class f38t56_device : public f3856_device
+{
+public:
+ f38t56_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+
+ virtual DECLARE_WRITE8_MEMBER(write) override;
+};
// device type definition
DECLARE_DEVICE_TYPE(F3853, f3853_device)
+DECLARE_DEVICE_TYPE(F3851, f3851_device)
+DECLARE_DEVICE_TYPE(F3856, f3856_device)
+DECLARE_DEVICE_TYPE(F38T56, f38t56_device)
#endif // MAME_MACHINE_F3853_H
diff --git a/src/devices/machine/fdc37c665gt.cpp b/src/devices/machine/fdc37c665gt.cpp
index 4c6f23651db..f2df880d2e8 100644
--- a/src/devices/machine/fdc37c665gt.cpp
+++ b/src/devices/machine/fdc37c665gt.cpp
@@ -49,9 +49,10 @@ void fdc37c665gt_device::device_start()
{
}
-MACHINE_CONFIG_START(fdc37c665gt_device::device_add_mconfig)
- MCFG_DEVICE_ADD("uart1", NS16550, XTAL(24'000'000)/13)
- MCFG_DEVICE_ADD("uart2", NS16550, XTAL(24'000'000)/13)
-MACHINE_CONFIG_END
+void fdc37c665gt_device::device_add_mconfig(machine_config &config)
+{
+ NS16550(config, m_uart1, XTAL(24'000'000)/13);
+ NS16550(config, m_uart2, XTAL(24'000'000)/13);
+}
DEFINE_DEVICE_TYPE(FDC37C665GT, fdc37c665gt_device, "fdc37c665gt", "FDC37C665GT")
diff --git a/src/devices/machine/fdc37c93x.cpp b/src/devices/machine/fdc37c93x.cpp
index 05c87fd38ef..8ff5afc76d4 100644
--- a/src/devices/machine/fdc37c93x.cpp
+++ b/src/devices/machine/fdc37c93x.cpp
@@ -639,12 +639,12 @@ void fdc37c93x_device::map_rtc(address_map &map)
READ8_MEMBER(fdc37c93x_device::rtc_read)
{
- return ds12885_rtcdev->read(space, offset, mem_mask);
+ return ds12885_rtcdev->read(offset);
}
WRITE8_MEMBER(fdc37c93x_device::rtc_write)
{
- ds12885_rtcdev->write(space, offset, data, mem_mask);
+ ds12885_rtcdev->write(offset, data);
}
void fdc37c93x_device::map_rtc_addresses()
diff --git a/src/devices/machine/gen_fifo.h b/src/devices/machine/gen_fifo.h
index 4db8a75d8c1..0ef98fb20c3 100644
--- a/src/devices/machine/gen_fifo.h
+++ b/src/devices/machine/gen_fifo.h
@@ -72,13 +72,6 @@
*/
-#define MCFG_GENERIC_FIFO_EMPTY_CALLBACK(_devcb) \
- downcast<screen_device &>(*device).set_empty_cb(DEVCB_##_devcb);
-
-#define MCFG_GENERIC_FIFO_FULL_CALLBACK(_devcb) \
- downcast<screen_device &>(*device).set_full_cb(DEVCB_##_devcb);
-
-
template<typename T> class generic_fifo_device_base : public device_t {
public:
/* The general setup. Call be called multiple times, clears the fifo. */
@@ -118,8 +111,8 @@ public:
void clear();
/* Callbacks signalling empty (true)/nonempty (false) and full (true)/nonfull (false) */
- template<class Object> devcb_base &set_empty_cb(Object &&object) { return m_empty_cb.set_callback(std::forward<Object>(object)); }
- template<class Object> devcb_base &set_full_cb(Object &&object) { return m_full_cb.set_callback(std::forward<Object>(object)); }
+ auto empty_cb() { return m_empty_cb.bind(); }
+ auto full_cb() { return m_full_cb.bind(); }
/* Get the fifo current size - Note that real hardware usually
can't do that. May be bigger that the fifo size if some extra
diff --git a/src/devices/machine/genpc.cpp b/src/devices/machine/genpc.cpp
index 269c1915bb0..e626bf96b30 100644
--- a/src/devices/machine/genpc.cpp
+++ b/src/devices/machine/genpc.cpp
@@ -135,6 +135,8 @@ WRITE_LINE_MEMBER( ibm5160_mb_device::pc_dma8237_out_eop )
void ibm5160_mb_device::pc_select_dma_channel(int channel, bool state)
{
+ m_isabus->dack_line_w(channel, state);
+
if(!state) {
m_dma_channel = channel;
if(m_cur_eop)
@@ -393,8 +395,16 @@ WRITE8_MEMBER( ibm5160_mb_device::pc_ppi_portb_w )
WRITE8_MEMBER( ibm5160_mb_device::nmi_enable_w )
{
m_nmi_enabled = BIT(data,7);
- m_isabus->set_nmi_state(m_nmi_enabled);
+ if (!m_nmi_enabled)
+ m_maincpu->set_input_line(INPUT_LINE_NMI, CLEAR_LINE);
+}
+
+WRITE_LINE_MEMBER( ibm5160_mb_device::iochck_w )
+{
+ if (m_nmi_enabled && !state)
+ m_maincpu->set_input_line(INPUT_LINE_NMI, ASSERT_LINE);
}
+
//**************************************************************************
// GLOBAL VARIABLES
//**************************************************************************
@@ -410,8 +420,9 @@ DEFINE_DEVICE_TYPE(IBM5160_MOTHERBOARD, ibm5160_mb_device, "ibm5160_mb", "IBM 51
// device_add_mconfig - add device configuration
//-------------------------------------------------
-MACHINE_CONFIG_START(ibm5160_mb_device::device_add_mconfig)
- PIT8253(config, m_pit8253, 0);
+void ibm5160_mb_device::device_add_mconfig(machine_config &config)
+{
+ PIT8253(config, m_pit8253);
m_pit8253->set_clk<0>(XTAL(14'318'181)/12.0); // heartbeat IRQ
m_pit8253->out_handler<0>().set(m_pic8259, FUNC(pic8259_device::ir0_w));
m_pit8253->set_clk<1>(XTAL(14'318'181)/12.0); // DRAM refresh
@@ -436,7 +447,7 @@ MACHINE_CONFIG_START(ibm5160_mb_device::device_add_mconfig)
m_dma8237->out_dack_callback<2>().set(FUNC(ibm5160_mb_device::pc_dack2_w));
m_dma8237->out_dack_callback<3>().set(FUNC(ibm5160_mb_device::pc_dack3_w));
- PIC8259(config, m_pic8259, 0);
+ PIC8259(config, m_pic8259);
m_pic8259->out_int_callback().set(FUNC(ibm5160_mb_device::pic_int_w));
I8255A(config, m_ppi8255, 0);
@@ -445,7 +456,8 @@ MACHINE_CONFIG_START(ibm5160_mb_device::device_add_mconfig)
m_ppi8255->in_pc_callback().set(FUNC(ibm5160_mb_device::pc_ppi_portc_r));
ISA8(config, m_isabus, 0);
- m_isabus->set_cputag(":maincpu");
+ m_isabus->set_memspace(":maincpu", AS_PROGRAM);
+ m_isabus->set_iospace(":maincpu", AS_IO);
m_isabus->irq2_callback().set(m_pic8259, FUNC(pic8259_device::ir2_w));
m_isabus->irq3_callback().set(m_pic8259, FUNC(pic8259_device::ir3_w));
m_isabus->irq4_callback().set(m_pic8259, FUNC(pic8259_device::ir4_w));
@@ -455,15 +467,16 @@ MACHINE_CONFIG_START(ibm5160_mb_device::device_add_mconfig)
m_isabus->drq1_callback().set(m_dma8237, FUNC(am9517a_device::dreq1_w));
m_isabus->drq2_callback().set(m_dma8237, FUNC(am9517a_device::dreq2_w));
m_isabus->drq3_callback().set(m_dma8237, FUNC(am9517a_device::dreq3_w));
+ m_isabus->iochck_callback().set(FUNC(ibm5160_mb_device::iochck_w));
- MCFG_DEVICE_ADD("pc_kbdc", PC_KBDC, 0)
- MCFG_PC_KBDC_OUT_CLOCK_CB(WRITELINE(*this, ibm5160_mb_device, keyboard_clock_w))
- MCFG_PC_KBDC_OUT_DATA_CB(WRITELINE(*this, ibm5160_mb_device, keyboard_data_w))
+ PC_KBDC(config, m_pc_kbdc, 0);
+ m_pc_kbdc->out_clock_cb().set(FUNC(ibm5160_mb_device::keyboard_clock_w));
+ m_pc_kbdc->out_data_cb().set(FUNC(ibm5160_mb_device::keyboard_data_w));
/* sound hardware */
SPEAKER(config, "mono").front_center();
SPEAKER_SOUND(config, m_speaker).add_route(ALL_OUTPUTS, "mono", 1.00);
-MACHINE_CONFIG_END
+}
static INPUT_PORTS_START( ibm5160_mb )
@@ -595,18 +608,18 @@ DEFINE_DEVICE_TYPE(IBM5150_MOTHERBOARD, ibm5150_mb_device, "ibm5150_mb", "IBM 51
// device_add_mconfig - add device configuration
//-------------------------------------------------
-MACHINE_CONFIG_START(ibm5150_mb_device::device_add_mconfig)
+void ibm5150_mb_device::device_add_mconfig(machine_config &config)
+{
ibm5160_mb_device::device_add_mconfig(config);
- MCFG_DEVICE_MODIFY("pc_kbdc")
- MCFG_PC_KBDC_OUT_CLOCK_CB(WRITELINE(*this, ibm5150_mb_device, keyboard_clock_w))
+ subdevice<pc_kbdc_device>("pc_kbdc")->out_clock_cb().set(FUNC(ibm5150_mb_device::keyboard_clock_w));
m_ppi8255->out_pb_callback().set(FUNC(ibm5150_mb_device::pc_ppi_portb_w));
m_ppi8255->in_pc_callback().set(FUNC(ibm5150_mb_device::pc_ppi_portc_r));
- MCFG_CASSETTE_ADD( "cassette" )
- MCFG_CASSETTE_DEFAULT_STATE(CASSETTE_PLAY | CASSETTE_MOTOR_DISABLED | CASSETTE_SPEAKER_ENABLED)
-MACHINE_CONFIG_END
+ CASSETTE(config, m_cassette);
+ m_cassette->set_default_state(CASSETTE_PLAY | CASSETTE_MOTOR_DISABLED | CASSETTE_SPEAKER_ENABLED);
+}
//**************************************************************************
// LIVE DEVICE
@@ -772,15 +785,15 @@ DEFINE_DEVICE_TYPE(EC1841_MOTHERBOARD, ec1841_mb_device, "ec1841_mb", "EC-1840 m
// device_add_mconfig - add device configuration
//-------------------------------------------------
-MACHINE_CONFIG_START(ec1841_mb_device::device_add_mconfig)
+void ec1841_mb_device::device_add_mconfig(machine_config &config)
+{
ibm5160_mb_device::device_add_mconfig(config);
m_ppi8255->out_pb_callback().set(FUNC(ec1841_mb_device::pc_ppi_portb_w));
m_ppi8255->in_pc_callback().set(FUNC(ec1841_mb_device::pc_ppi_portc_r));
- MCFG_DEVICE_MODIFY("pc_kbdc")
- MCFG_PC_KBDC_OUT_CLOCK_CB(WRITELINE(*this, ec1841_mb_device, keyboard_clock_w))
-MACHINE_CONFIG_END
+ subdevice<pc_kbdc_device>("pc_kbdc")->out_clock_cb().set(FUNC(ec1841_mb_device::keyboard_clock_w));
+}
static INPUT_PORTS_START( ec1841_mb )
PORT_START("DSW0") /* SA1 */
@@ -898,12 +911,13 @@ pc_noppi_mb_device::pc_noppi_mb_device(const machine_config &mconfig, device_typ
// device_add_mconfig - add device configuration
//-------------------------------------------------
-MACHINE_CONFIG_START(pc_noppi_mb_device::device_add_mconfig)
+void pc_noppi_mb_device::device_add_mconfig(machine_config &config)
+{
ibm5160_mb_device::device_add_mconfig(config);
- MCFG_DEVICE_REMOVE("pc_kbdc")
- MCFG_DEVICE_REMOVE("ppi8255")
-MACHINE_CONFIG_END
+ config.device_remove("pc_kbdc");
+ config.device_remove("ppi8255");
+}
static INPUT_PORTS_START( pc_noppi_mb )
INPUT_PORTS_END
diff --git a/src/devices/machine/genpc.h b/src/devices/machine/genpc.h
index 4c412a9a720..e222b975873 100644
--- a/src/devices/machine/genpc.h
+++ b/src/devices/machine/genpc.h
@@ -23,11 +23,6 @@
#include "bus/pc_kbd/pc_kbdc.h"
-#define MCFG_IBM5160_MOTHERBOARD_ADD(_tag, _cputag) \
- MCFG_DEVICE_ADD(_tag, IBM5160_MOTHERBOARD, 0) \
- downcast<ibm5160_mb_device &>(*device).set_cputag(_cputag); \
- (*device->subdevice<isa8_device>("isa")).set_cputag(_cputag);
-
// ======================> ibm5160_mb_device
class ibm5160_mb_device : public device_t
{
@@ -36,7 +31,12 @@ public:
ibm5160_mb_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
// inline configuration
- void set_cputag(const char *tag) { m_maincpu.set_tag(tag); }
+ template <typename T> void set_cputag(T &&tag)
+ {
+ m_maincpu.set_tag(std::forward<T>(tag));
+ subdevice<isa8_device>("isa")->set_memspace(std::forward<T>(tag), AS_PROGRAM);
+ subdevice<isa8_device>("isa")->set_iospace(std::forward<T>(tag), AS_IO);
+ }
void map(address_map &map);
@@ -119,6 +119,7 @@ protected:
DECLARE_WRITE_LINE_MEMBER( pc_dack1_w );
DECLARE_WRITE_LINE_MEMBER( pc_dack2_w );
DECLARE_WRITE_LINE_MEMBER( pc_dack3_w );
+ DECLARE_WRITE_LINE_MEMBER( iochck_w );
void pc_select_dma_channel(int channel, bool state);
};
@@ -128,11 +129,6 @@ protected:
DECLARE_DEVICE_TYPE(IBM5160_MOTHERBOARD, ibm5160_mb_device)
-#define MCFG_IBM5150_MOTHERBOARD_ADD(_tag, _cputag) \
- MCFG_DEVICE_ADD(_tag, IBM5150_MOTHERBOARD, 0) \
- downcast<ibm5150_mb_device &>(*device).set_cputag(_cputag); \
- (*device->subdevice<isa8_device>("isa")).set_cputag(_cputag);
-
// ======================> ibm5150_mb_device
class ibm5150_mb_device : public ibm5160_mb_device
{
@@ -162,12 +158,6 @@ private:
// device type definition
DECLARE_DEVICE_TYPE(IBM5150_MOTHERBOARD, ibm5150_mb_device)
-
-#define MCFG_EC1841_MOTHERBOARD_ADD(_tag, _cputag) \
- MCFG_DEVICE_ADD(_tag, EC1841_MOTHERBOARD, 0) \
- downcast<ec1841_mb_device &>(*device).set_cputag(_cputag); \
- (*device->subdevice<isa8_device>("isa")).set_cputag(_cputag);
-
class ec1841_mb_device : public ibm5160_mb_device
{
public:
@@ -189,16 +179,13 @@ private:
DECLARE_DEVICE_TYPE(EC1841_MOTHERBOARD, ec1841_mb_device)
-#define MCFG_PCNOPPI_MOTHERBOARD_ADD(_tag, _cputag) \
- MCFG_DEVICE_ADD(_tag, PCNOPPI_MOTHERBOARD, 0) \
- downcast<pc_noppi_mb_device &>(*device).set_cputag(_cputag); \
- (*device->subdevice<isa8_device>("isa")).set_cputag(_cputag);
class pc_noppi_mb_device : public ibm5160_mb_device
{
public:
// construction/destruction
pc_noppi_mb_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+
uint8_t pit_out2() { return m_pit_out2; } // helper for near-clones with multifunction ics instead of 8255s
void map(address_map &map);
diff --git a/src/devices/machine/hdc92x4.cpp b/src/devices/machine/hdc92x4.cpp
index e7c42d31452..4354711738f 100644
--- a/src/devices/machine/hdc92x4.cpp
+++ b/src/devices/machine/hdc92x4.cpp
@@ -4265,7 +4265,7 @@ uint16_t hdc92x4_device::encode_a1_hd()
Read a byte of data from the controller
The address (offset) encodes the C/D* line (command and /data)
*/
-READ8_MEMBER( hdc92x4_device::read )
+uint8_t hdc92x4_device::read(offs_t offset)
{
uint8_t reply;
if ((offset & 1) == 0)
@@ -4300,7 +4300,7 @@ READ8_MEMBER( hdc92x4_device::read )
The operation terminates immediately, and the controller picks up the
values stored in this phase at a later time.
*/
-WRITE8_MEMBER( hdc92x4_device::write )
+void hdc92x4_device::write(offs_t offset, uint8_t data)
{
if ((offset & 1) == 0)
{
diff --git a/src/devices/machine/hdc92x4.h b/src/devices/machine/hdc92x4.h
index e0c25d1a524..c4850ffa103 100644
--- a/src/devices/machine/hdc92x4.h
+++ b/src/devices/machine/hdc92x4.h
@@ -45,8 +45,8 @@ public:
};
// Accessors from the CPU side
- DECLARE_READ8_MEMBER( read );
- DECLARE_WRITE8_MEMBER( write );
+ uint8_t read(offs_t offset);
+ void write(offs_t offset, uint8_t data);
DECLARE_WRITE_LINE_MEMBER( reset );
DECLARE_WRITE_LINE_MEMBER( dmaack );
diff --git a/src/devices/machine/i2cmem.cpp b/src/devices/machine/i2cmem.cpp
index 94670ff5326..34e75569a49 100644
--- a/src/devices/machine/i2cmem.cpp
+++ b/src/devices/machine/i2cmem.cpp
@@ -58,8 +58,14 @@ static inline void ATTR_PRINTF( 3, 4 ) verboselog( device_t *device, int n_level
//**************************************************************************
// device type definition
-DEFINE_DEVICE_TYPE(I2CMEM, i2cmem_device, "i2cmem", "I2C Memory")
-DEFINE_DEVICE_TYPE(X2404P, x2404p_device, "x2404p", "X2404P I2C Memory")
+DEFINE_DEVICE_TYPE(I2CMEM, i2cmem_device, "i2cmem", "I2C Memory")
+DEFINE_DEVICE_TYPE(I2C_X2404P, i2c_x2404p_device, "x2404p", "X2404P I2C Memory")
+DEFINE_DEVICE_TYPE(I2C_24C01, i2c_24c01_device, "24c01", "24C01 I2C Memory")
+DEFINE_DEVICE_TYPE(I2C_24C02, i2c_24c02_device, "24c02", "24C02 I2C Memory")
+DEFINE_DEVICE_TYPE(I2C_24C08, i2c_24c08_device, "24c08", "24C08 I2C Memory")
+DEFINE_DEVICE_TYPE(I2C_24C16, i2c_24c16_device, "24c16", "24C16 I2C Memory")
+DEFINE_DEVICE_TYPE(I2C_24C16A, i2c_24c16a_device, "24c16a", "24C16A I2C Memory")
+DEFINE_DEVICE_TYPE(I2C_24C64, i2c_24c64_device, "24c64", "24C64 I2C Memory")
//**************************************************************************
// LIVE DEVICE
@@ -69,36 +75,76 @@ DEFINE_DEVICE_TYPE(X2404P, x2404p_device, "x2404p", "X2404P I2C Memory")
// i2cmem_device - constructor
//-------------------------------------------------
-i2cmem_device::i2cmem_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock)
- : device_t(mconfig, type, tag, owner, clock),
+i2cmem_device::i2cmem_device(
+ const machine_config &mconfig,
+ device_type type,
+ const char *tag,
+ device_t *owner,
+ uint32_t clock,
+ int page_size,
+ int data_size) :
+ device_t(mconfig, type, tag, owner, clock),
device_nvram_interface(mconfig, *this),
m_region(*this, DEVICE_SELF),
- m_slave_address( I2CMEM_SLAVE_ADDRESS ),
- m_page_size( 0 ),
- m_data_size( 0 ),
- m_scl( 0 ),
- m_sdaw( 0 ),
- m_e0( 0 ),
- m_e1( 0 ),
- m_e2( 0 ),
- m_wc( 0 ),
- m_sdar( 1 ),
- m_state( STATE_IDLE ),
- m_shift( 0 ),
- m_byteaddr( 0 )
+ m_slave_address(I2CMEM_SLAVE_ADDRESS),
+ m_page_size(page_size),
+ m_data_size(data_size),
+ m_scl(0),
+ m_sdaw(0),
+ m_e0(0),
+ m_e1(0),
+ m_e2(0),
+ m_wc(0),
+ m_sdar(1),
+ m_state(STATE_IDLE),
+ m_shift(0),
+ m_byteaddr(0),
+ m_page_offset(0),
+ m_page_written_size(0),
+ m_in_write(false)
{
+ // these memories work off the I2C clock only
+ assert(!clock);
}
-i2cmem_device::i2cmem_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
- : i2cmem_device(mconfig, I2CMEM, tag, owner, clock)
+i2cmem_device::i2cmem_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
+ i2cmem_device(mconfig, I2CMEM, tag, owner, clock, 0, 0)
{
}
-x2404p_device::x2404p_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
- : i2cmem_device(mconfig, X2404P, tag, owner, clock)
+i2c_x2404p_device::i2c_x2404p_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
+ i2cmem_device(mconfig, I2C_X2404P, tag, owner, clock, 8, 0x200)
+{
+}
+
+i2c_24c01_device::i2c_24c01_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
+ i2cmem_device(mconfig, I2C_24C01, tag, owner, clock, 4, 0x80)
+{
+}
+
+i2c_24c02_device::i2c_24c02_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
+ i2cmem_device(mconfig, I2C_24C02, tag, owner, clock, 4, 0x100)
+{
+}
+
+i2c_24c08_device::i2c_24c08_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
+ i2cmem_device(mconfig, I2C_24C08, tag, owner, clock, 0, 0x400)
+{
+}
+
+i2c_24c16_device::i2c_24c16_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
+ i2cmem_device(mconfig, I2C_24C16, tag, owner, clock, 8, 0x800)
+{
+}
+
+i2c_24c16a_device::i2c_24c16a_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
+ i2cmem_device(mconfig, I2C_24C16A, tag, owner, clock, 0, 0x800)
+{
+}
+
+i2c_24c64_device::i2c_24c64_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
+ i2cmem_device(mconfig, I2C_24C64, tag, owner, clock, 8, 0x2000)
{
- set_page_size(8);
- set_data_size(0x200);
}
//-------------------------------------------------
@@ -122,6 +168,9 @@ void i2cmem_device::device_start()
save_item( NAME(m_shift) );
save_item( NAME(m_devsel) );
save_item( NAME(m_byteaddr) );
+ save_item( NAME(m_in_write) );
+ save_item( NAME(m_page_offset) );
+ save_item( NAME(m_page_written_size) );
save_pointer( &m_data[0], "m_data", m_data_size );
if ( m_page_size > 0 )
{
@@ -136,6 +185,7 @@ void i2cmem_device::device_start()
void i2cmem_device::device_reset()
{
+ m_in_write = false;
}
@@ -237,6 +287,15 @@ WRITE_LINE_MEMBER( i2cmem_device::write_sda )
{
if( m_sdaw )
{
+ if( m_in_write )
+ {
+ int base = data_offset();
+ int root = base & ~( m_page_size - 1);
+ for( int i=0; i < m_page_written_size; i++)
+ m_data[root | ((base + i) & (m_page_size - 1))] = m_page[i];
+ m_in_write = false;
+ verboselog( this, 1, "data[ %04x to %04x ] = %x bytes\n", base, root | ((base + m_page_written_size - 1) & (m_page_size - 1)), m_page_written_size );
+ }
verboselog( this, 1, "stop\n" );
m_state = STATE_IDLE;
}
@@ -301,6 +360,7 @@ WRITE_LINE_MEMBER( i2cmem_device::write_scl )
case STATE_BYTEADDR:
m_byteaddr = m_shift;
m_page_offset = 0;
+ m_page_written_size = 0;
verboselog( this, 1, "byteaddr %02x\n", m_byteaddr );
@@ -315,23 +375,16 @@ WRITE_LINE_MEMBER( i2cmem_device::write_scl )
}
else if( m_page_size > 0 )
{
+ m_in_write = true;
m_page[ m_page_offset ] = m_shift;
verboselog( this, 1, "page[ %04x ] <- %02x\n", m_page_offset, m_page[ m_page_offset ] );
m_page_offset++;
if( m_page_offset == m_page_size )
- {
- int offset = data_offset() & ~( m_page_size - 1 );
-
- verboselog( this, 1, "data[ %04x to %04x ] = page\n", offset, offset + m_page_size - 1 );
-
- for( int i = 0; i < m_page_size; i++ )
- {
- m_data[offset + i] = m_page[ i ];
- }
-
m_page_offset = 0;
- }
+ m_page_written_size++;
+ if( m_page_written_size > m_page_size)
+ m_page_written_size = m_page_size;
}
else
{
diff --git a/src/devices/machine/i2cmem.h b/src/devices/machine/i2cmem.h
index d67fa463c2e..c912709871d 100644
--- a/src/devices/machine/i2cmem.h
+++ b/src/devices/machine/i2cmem.h
@@ -23,61 +23,6 @@
//**************************************************************************
-// INTERFACE CONFIGURATION MACROS
-//**************************************************************************
-
-#define MCFG_I2CMEM_ADD( _tag ) \
- MCFG_DEVICE_ADD( _tag, I2CMEM, 0 )
-
-#define MCFG_I2CMEM_ADDRESS( address ) \
- downcast<i2cmem_device &>(*device).set_address(address);
-#define MCFG_I2CMEM_PAGE_SIZE( page_size ) \
- downcast<i2cmem_device &>(*device).set_page_size(page_size);
-#define MCFG_I2CMEM_DATA_SIZE(data_size) \
- downcast<i2cmem_device &>(*device).set_data_size(data_size);
-#define MCFG_I2CMEM_E0(e0) \
- downcast<i2cmem_device &>(*device).set_e0(e0);
-#define MCFG_I2CMEM_E1(e1) \
- downcast<i2cmem_device &>(*device).set_e1(e1);
-#define MCFG_I2CMEM_E2(e2) \
- downcast<i2cmem_device &>(*device).set_e2(e2);
-#define MCFG_I2CMEM_WC(wc) \
- downcast<i2cmem_device &>(*device).set_wc(wc);
-
-#define MCFG_X2404P_ADD( _tag ) \
- MCFG_I2CMEM_ADD( _tag ) \
- MCFG_I2CMEM_PAGE_SIZE(8) \
- MCFG_I2CMEM_DATA_SIZE(0x200)
-
-#define MCFG_24C01_ADD( _tag ) \
- MCFG_I2CMEM_ADD( _tag ) \
- MCFG_I2CMEM_PAGE_SIZE(4) \
- MCFG_I2CMEM_DATA_SIZE(0x80)
-
-#define MCFG_24C02_ADD( _tag ) \
- MCFG_I2CMEM_ADD( _tag ) \
- MCFG_I2CMEM_PAGE_SIZE(4) \
- MCFG_I2CMEM_DATA_SIZE(0x100)
-
-#define MCFG_24C08_ADD( _tag ) \
- MCFG_I2CMEM_ADD( _tag ) \
- MCFG_I2CMEM_DATA_SIZE(0x400)
-
-#define MCFG_24C16_ADD( _tag ) \
- MCFG_I2CMEM_ADD( _tag ) \
- MCFG_I2CMEM_PAGE_SIZE(8) \
- MCFG_I2CMEM_DATA_SIZE(0x800)
-
-#define MCFG_24C16A_ADD( _tag ) \
- MCFG_I2CMEM_ADD( _tag ) \
- MCFG_I2CMEM_DATA_SIZE(0x800)
-
-#define MCFG_24C64_ADD( _tag ) \
- MCFG_I2CMEM_ADD( _tag ) \
- MCFG_I2CMEM_PAGE_SIZE(8) \
- MCFG_I2CMEM_DATA_SIZE(0x2000)
-
-//**************************************************************************
// TYPE DEFINITIONS
//**************************************************************************
@@ -110,7 +55,7 @@ public:
protected:
// construction/destruction
- i2cmem_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock = 0);
+ i2cmem_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, int page_size, int data_size);
// device-level overrides
virtual void device_start() override;
@@ -147,17 +92,33 @@ protected:
int m_byteaddr;
std::vector<uint8_t> m_page;
int m_page_offset;
+ int m_page_written_size;
+ bool m_in_write;
};
-class x2404p_device : public i2cmem_device
-{
-public:
- // construction/destruction
- x2404p_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
-};
+#define DECLARE_I2C_DEVICE(name) \
+ class i2c_##name##_device : public i2cmem_device \
+ { \
+ public: \
+ i2c_##name##_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0); \
+ };
+
+DECLARE_I2C_DEVICE(x2404p)
+DECLARE_I2C_DEVICE(24c01)
+DECLARE_I2C_DEVICE(24c02)
+DECLARE_I2C_DEVICE(24c08)
+DECLARE_I2C_DEVICE(24c16);
+DECLARE_I2C_DEVICE(24c16a);
+DECLARE_I2C_DEVICE(24c64);
// device type definition
-DECLARE_DEVICE_TYPE(I2CMEM, i2cmem_device)
-DECLARE_DEVICE_TYPE(X2404P, x2404p_device)
+DECLARE_DEVICE_TYPE(I2CMEM, i2cmem_device)
+DECLARE_DEVICE_TYPE(I2C_X2404P, i2c_x2404p_device)
+DECLARE_DEVICE_TYPE(I2C_24C01, i2c_24c01_device)
+DECLARE_DEVICE_TYPE(I2C_24C02, i2c_24c02_device)
+DECLARE_DEVICE_TYPE(I2C_24C08, i2c_24c08_device)
+DECLARE_DEVICE_TYPE(I2C_24C16, i2c_24c16_device)
+DECLARE_DEVICE_TYPE(I2C_24C16A, i2c_24c16a_device)
+DECLARE_DEVICE_TYPE(I2C_24C64, i2c_24c64_device)
#endif // MAME_MACHINE_I2CMEM_H
diff --git a/src/devices/machine/i7220.cpp b/src/devices/machine/i7220.cpp
index 8543d9f61f2..0e86dc081bb 100644
--- a/src/devices/machine/i7220.cpp
+++ b/src/devices/machine/i7220.cpp
@@ -29,17 +29,16 @@
#include "i7220.h"
-#define VERBOSE_DBG 2 /* general debug messages */
+//#define LOG_GENERAL (1U << 0) //defined in logmacro.h already
+#define LOG_REGISTER (1U << 1)
+#define LOG_DEBUG (1U << 2)
-#define DBG_LOG(N,M,A) \
- do { \
- if(VERBOSE_DBG>=N) \
- { \
- if( M ) \
- logerror("%11.6f at %s: %-10s",machine().time().as_double(),machine().describe_context(),(char*)M ); \
- logerror A; \
- } \
- } while (0)
+//#define VERBOSE (LOG_DEBUG)
+//#define LOG_OUTPUT_FUNC printf
+#include "logmacro.h"
+
+#define LOGREG(...) LOGMASKED(LOG_REGISTER, __VA_ARGS__)
+#define LOGDBG(...) LOGMASKED(LOG_DEBUG, __VA_ARGS__)
// device type definition
@@ -224,8 +223,8 @@ void i7220_device::start_command(int cmd)
// NFC bits in BLR MSB must be set to 0001 before issuing this command.
// MBM GROUP SELECT bits in the AR must select the last MBM in the system.
case C_INIT:
- DBG_LOG(1, "BMC", ("INIT: BLR %04x (NFC %d pages %d) AR %04x (MBM %d addr %03x) ER %02d\n",
- m_blr, blr_nfc, blr_count, m_ar, ar_mbm, ar_addr, m_regs[R_ER]));
+ LOG("BMC INIT: BLR %04x (NFC %d pages %d) AR %04x (MBM %d addr %03x) ER %02d\n",
+ m_blr, blr_nfc, blr_count, m_ar, ar_mbm, ar_addr, m_regs[R_ER]);
if (blr_nfc != 2)
{
command_fail_start(bi);
@@ -242,8 +241,8 @@ void i7220_device::start_command(int cmd)
// all parametric registers must be properly set up before issuing Read Bubble Data command
case C_READ:
- DBG_LOG(1, "BMC", ("RBD: BLR %04x (NFC %d pages %d) AR %04x (MBM %d addr %03x) ER %02d\n",
- m_blr, blr_nfc, blr_count, m_ar, ar_mbm, ar_addr, m_regs[R_ER]));
+ LOG("BMC RBD: BLR %04x (NFC %d pages %d) AR %04x (MBM %d addr %03x) ER %02d\n",
+ m_blr, blr_nfc, blr_count, m_ar, ar_mbm, ar_addr, m_regs[R_ER]);
if (ar_mbm >= m_data_size || blr_nfc != 2)
{
command_fail_start(bi);
@@ -255,8 +254,8 @@ void i7220_device::start_command(int cmd)
break;
case C_WRITE:
- DBG_LOG(1, "BMC", ("WBD: BLR %04x (NFC %d pages %d) AR %04x (MBM %d addr %03x) ER %02d\n",
- m_blr, blr_nfc, blr_count, m_ar, ar_mbm, ar_addr, m_regs[R_ER]));
+ LOG("BMC WBD: BLR %04x (NFC %d pages %d) AR %04x (MBM %d addr %03x) ER %02d\n",
+ m_blr, blr_nfc, blr_count, m_ar, ar_mbm, ar_addr, m_regs[R_ER]);
if (ar_mbm >= m_data_size || blr_nfc != 2)
{
command_fail_start(bi);
@@ -339,7 +338,7 @@ void i7220_device::general_continue(bubble_info &bi)
break;
default:
- DBG_LOG(1,"BMC",("general_continue on unknown main-state %d\n", bi.main_state));
+ LOG("BMC general_continue on unknown main-state %d\n", bi.main_state);
break;
}
}
@@ -389,7 +388,7 @@ void i7220_device::command_fail_continue(bubble_info &bi)
return;
default:
- DBG_LOG(1,"BMC",("fail unknown sub-state %d\n", bi.sub_state));
+ LOG("BMC fail unknown sub-state %d\n", bi.sub_state);
return;
}
}
@@ -423,7 +422,7 @@ void i7220_device::init_continue(bubble_info &bi)
return;
default:
- DBG_LOG(1,"BMC",("init unknown sub-state %d\n", bi.sub_state));
+ LOG("BMC init unknown sub-state %d\n", bi.sub_state);
return;
}
}
@@ -463,7 +462,7 @@ void i7220_device::read_fsa_continue(bubble_info &bi)
return;
default:
- DBG_LOG(1,"BMC",("read fsa unknown sub-state %d\n", bi.sub_state));
+ LOG("BMC read fsa unknown sub-state %d\n", bi.sub_state);
return;
}
}
@@ -497,7 +496,7 @@ void i7220_device::read_data_continue(bubble_info &bi)
break;
case WAIT_FSA_REPLY:
- DBG_LOG(3,"BMC",("read data: ct %02d limit %02d\n", bi.counter, bi.limit));
+ LOGDBG("BMC read data: ct %02d limit %02d\n", bi.counter, bi.limit);
if (bi.counter < bi.limit)
{
for (int a = 0; a < 32; a++)
@@ -515,7 +514,7 @@ void i7220_device::read_data_continue(bubble_info &bi)
return;
default:
- DBG_LOG(1,"BMC",("read data unknown sub-state %d\n", bi.sub_state));
+ LOG("BMC read data unknown sub-state %d\n", bi.sub_state);
return;
}
}
@@ -543,7 +542,7 @@ void i7220_device::write_data_continue(bubble_info &bi)
return;
case WAIT_FIFO:
- DBG_LOG(3,"BMC",("write data: fifo %02d ct %02d limit %02d\n", m_fifo_size, bi.counter, bi.limit));
+ LOGDBG("BMC write data: fifo %02d ct %02d limit %02d\n", m_fifo_size, bi.counter, bi.limit);
if (m_fifo_size >= 32)
{
for (int a = 0; a < 32; a++)
@@ -565,7 +564,7 @@ void i7220_device::write_data_continue(bubble_info &bi)
return;
default:
- DBG_LOG(1,"BMC",("write data unknown sub-state %d\n", bi.sub_state));
+ LOG("BMC write data unknown sub-state %d\n", bi.sub_state);
return;
}
}
@@ -586,14 +585,14 @@ READ8_MEMBER(i7220_device::read)
if (m_rac)
{
data = m_regs[m_rac];
- DBG_LOG(2, "BMC", ("R reg @ %02x == %02x\n", m_rac, data));
+ LOGREG("BMC R reg @ %02x == %02x\n", m_rac, data);
m_rac++;
m_rac &= 15;
}
else
{
data = fifo_pop();
- DBG_LOG(2, "BMC", ("R fifo == %02x\n", data));
+ LOGREG("BMC R fifo == %02x\n", data);
}
break;
@@ -626,8 +625,8 @@ READ8_MEMBER(i7220_device::read)
data |= SR_FIFO;
}
}
- DBG_LOG(2, "BMC", ("R status == %02x (phase %d state %d:%d fifo %d drq %d)\n",
- data, main_phase, bi.main_state, bi.sub_state, m_fifo_size, drq));
+ LOGREG("BMC R status == %02x (phase %d state %d:%d fifo %d drq %d)\n",
+ data, main_phase, bi.main_state, bi.sub_state, m_fifo_size, drq);
if (main_phase == PHASE_RESULT)
{
main_phase = PHASE_IDLE;
@@ -635,7 +634,7 @@ READ8_MEMBER(i7220_device::read)
break;
}
- DBG_LOG(3, "BMC", ("R @ %d == %02x\n", offset, data));
+ LOGDBG("BMC R @ %d == %02x\n", offset, data);
return data;
}
@@ -665,14 +664,14 @@ WRITE8_MEMBER( i7220_device::write )
"Software Reset"
};
- DBG_LOG(3, "BMC", ("W @ %d <- %02x\n", offset, data));
+ LOGDBG("BMC W @ %d <- %02x\n", offset, data);
switch (offset & 1)
{
case 0:
if (m_rac)
{
- DBG_LOG(2, "BMC", ("W reg @ %02x <- %02x\n", m_rac, data));
+ LOGREG("BMC W reg @ %02x <- %02x\n", m_rac, data);
m_regs[m_rac] = data;
update_regs();
m_rac++;
@@ -680,7 +679,7 @@ WRITE8_MEMBER( i7220_device::write )
}
else
{
- DBG_LOG(2, "BMC", ("W fifo <- %02x\n", data));
+ LOGREG("BMC W fifo <- %02x\n", data);
fifo_push(data);
}
break;
@@ -695,7 +694,7 @@ WRITE8_MEMBER( i7220_device::write )
m_cmdr = data & 15;
if (main_phase == PHASE_IDLE)
{
- DBG_LOG(1, "BMC", ("command %02x '%s'\n", data, commands[m_cmdr]));
+ LOG("BMC command %02x '%s'\n", data, commands[m_cmdr]);
main_phase = PHASE_CMD;
start_command(m_cmdr);
}
diff --git a/src/devices/machine/i8087.cpp b/src/devices/machine/i8087.cpp
index 15d5e51bea2..e137ae105e4 100644
--- a/src/devices/machine/i8087.cpp
+++ b/src/devices/machine/i8087.cpp
@@ -169,7 +169,7 @@ DEFINE_DEVICE_TYPE(I8087, i8087_device, "i8087", "Intel 8087")
i8087_device::i8087_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock) :
device_t(mconfig, type, tag, owner, clock),
- device_memory_interface(mconfig, *this),
+ m_space(*this, finder_base::DUMMY_TAG, -1),
m_int_handler(*this),
m_busy_handler(*this)
{
@@ -180,13 +180,6 @@ i8087_device::i8087_device(const machine_config &mconfig, const char *tag, devic
{
}
-device_memory_interface::space_config_vector i8087_device::memory_space_config() const
-{
- return space_config_vector {
- std::make_pair(AS_PROGRAM, &m_space_config),
- };
-}
-
void i8087_device::device_start()
{
save_item(NAME(m_reg[0].high));
@@ -222,11 +215,6 @@ void i8087_device::device_start()
build_opcode_table();
}
-void i8087_device::device_config_complete()
-{
- m_space_config = address_space_config("program", ENDIANNESS_LITTLE, m_data_width, 20);
-}
-
void i8087_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
{
m_busy_handler(1);
diff --git a/src/devices/machine/i8087.h b/src/devices/machine/i8087.h
index 290b9a95b16..9344ca2e68e 100644
--- a/src/devices/machine/i8087.h
+++ b/src/devices/machine/i8087.h
@@ -10,12 +10,12 @@
DECLARE_DEVICE_TYPE(I8087, i8087_device)
-class i8087_device : public device_t,
- public device_memory_interface
+class i8087_device : public device_t
{
public:
i8087_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
- void set_data_width(u8 data_width) { m_data_width = data_width; }
+ template <class Object> void set_space_88(Object &&tag, int spacenum) { m_space.set_tag(std::forward<Object>(tag), spacenum); m_space.set_data_width(8); }
+ template <class Object> void set_space_86(Object &&tag, int spacenum) { m_space.set_tag(std::forward<Object>(tag), spacenum); m_space.set_data_width(16); }
auto irq() { return m_int_handler.bind(); }
auto busy() { return m_busy_handler.bind(); }
@@ -26,13 +26,13 @@ protected:
i8087_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock);
virtual void device_start() override;
virtual void device_reset() override;
- virtual void device_config_complete() override;
- virtual space_config_vector memory_space_config() const override;
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override;
private:
+ address_space &space() { return *m_space; }
+
typedef void (i8087_device::*x87_func)(u8 modrm);
- address_space_config m_space_config;
+ required_address_space m_space;
devcb_write_line m_int_handler;
devcb_write_line m_busy_handler;
emu_timer *m_timer;
@@ -45,7 +45,6 @@ private:
u16 m_cw;
u16 m_sw;
u16 m_tw;
- int m_data_width;
int m_icount;
x87_func m_opcode_table_d8[256];
diff --git a/src/devices/machine/i8155.cpp b/src/devices/machine/i8155.cpp
index 779874a244d..b5027368633 100644
--- a/src/devices/machine/i8155.cpp
+++ b/src/devices/machine/i8155.cpp
@@ -406,7 +406,7 @@ void i8155_device::device_timer(emu_timer &timer, device_timer_id id, int param,
// io_r - register read
//-------------------------------------------------
-READ8_MEMBER( i8155_device::io_r )
+uint8_t i8155_device::io_r(offs_t offset)
{
uint8_t data = 0;
@@ -539,7 +539,7 @@ void i8155_device::register_w(int offset, uint8_t data)
// io_w - register write
//-------------------------------------------------
-WRITE8_MEMBER( i8155_device::io_w )
+void i8155_device::io_w(offs_t offset, uint8_t data)
{
register_w(offset, data);
}
@@ -549,7 +549,7 @@ WRITE8_MEMBER( i8155_device::io_w )
// memory_r - internal RAM read
//-------------------------------------------------
-READ8_MEMBER( i8155_device::memory_r )
+uint8_t i8155_device::memory_r(offs_t offset)
{
return m_ram[offset & 0xff];
}
@@ -559,7 +559,7 @@ READ8_MEMBER( i8155_device::memory_r )
// memory_w - internal RAM write
//-------------------------------------------------
-WRITE8_MEMBER( i8155_device::memory_w )
+void i8155_device::memory_w(offs_t offset, uint8_t data)
{
m_ram[offset & 0xff] = data;
}
@@ -569,7 +569,7 @@ WRITE8_MEMBER( i8155_device::memory_w )
// ale_w - address latch write
//-------------------------------------------------
-WRITE8_MEMBER( i8155_device::ale_w )
+void i8155_device::ale_w(offs_t offset, uint8_t data)
{
// I/O / memory select
m_io_m = BIT(offset, 0);
@@ -580,21 +580,21 @@ WRITE8_MEMBER( i8155_device::ale_w )
//-------------------------------------------------
-// read - memory or I/O read
+// data_r - memory or I/O read
//-------------------------------------------------
-READ8_MEMBER( i8155_device::read )
+uint8_t i8155_device::data_r()
{
uint8_t data = 0;
switch (m_io_m)
{
case MEMORY:
- data = memory_r(space, m_ad);
+ data = memory_r(m_ad);
break;
case IO:
- data = io_r(space, m_ad);
+ data = io_r(m_ad);
break;
}
@@ -603,19 +603,19 @@ READ8_MEMBER( i8155_device::read )
//-------------------------------------------------
-// write - memory or I/O write
+// data_w - memory or I/O write
//-------------------------------------------------
-WRITE8_MEMBER( i8155_device::write )
+void i8155_device::data_w(uint8_t data)
{
switch (m_io_m)
{
case MEMORY:
- memory_w(space, m_ad, data);
+ memory_w(m_ad, data);
break;
case IO:
- io_w(space, m_ad, data);
+ io_w(m_ad, data);
break;
}
}
diff --git a/src/devices/machine/i8155.h b/src/devices/machine/i8155.h
index a17692211e6..2d6e49b2063 100644
--- a/src/devices/machine/i8155.h
+++ b/src/devices/machine/i8155.h
@@ -55,15 +55,15 @@ public:
auto out_pc_callback() { return m_out_pc_cb.bind(); }
auto out_to_callback() { return m_out_to_cb.bind(); }
- DECLARE_READ8_MEMBER( io_r );
- DECLARE_WRITE8_MEMBER( io_w );
+ uint8_t io_r(offs_t offset);
+ void io_w(offs_t offset, uint8_t data);
- DECLARE_READ8_MEMBER( memory_r );
- DECLARE_WRITE8_MEMBER( memory_w );
+ uint8_t memory_r(offs_t offset);
+ void memory_w(offs_t offset, uint8_t data);
- DECLARE_WRITE8_MEMBER( ale_w );
- DECLARE_READ8_MEMBER( read );
- DECLARE_WRITE8_MEMBER( write );
+ void ale_w(offs_t offset, uint8_t data);
+ uint8_t data_r();
+ void data_w(uint8_t data);
protected:
i8155_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
diff --git a/src/devices/machine/i82357.cpp b/src/devices/machine/i82357.cpp
new file mode 100644
index 00000000000..9b3be9c0905
--- /dev/null
+++ b/src/devices/machine/i82357.cpp
@@ -0,0 +1,307 @@
+// license:BSD-3-Clause
+// copyright-holders:Patrick Mackinlay
+
+/*
+ * An implementation of the Intel 82357 Integrated System Peripheral.
+ *
+ * This device was one part of the 3-chip Intel 82350 EISA bus chipset.
+ *
+ * Sources:
+ *
+ * http://bitsavers.org/components/intel/_dataBooks/1996_Intel_Peripheral_Components.pdf
+ *
+ * TODO
+ * - expose everything to an actual EISA bus
+ * - 32-bit dma functionality
+ *
+ */
+
+#include "emu.h"
+#include "i82357.h"
+
+#define LOG_GENERAL (1U << 0)
+
+//#define VERBOSE (LOG_GENERAL)
+
+#include "logmacro.h"
+
+DEFINE_DEVICE_TYPE(I82357, i82357_device, "i82357", "Intel 82357 Integrated System Peripheral")
+
+i82357_device::i82357_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
+ : device_t(mconfig, I82357, tag, owner, clock)
+ , m_pic(*this, "pic%u", 0)
+ , m_pit(*this, "pit%u", 0)
+ , m_dma(*this, "dma%u", 0)
+ , m_out_rtc(*this)
+ , m_out_nmi(*this)
+ , m_out_spkr(*this)
+{
+}
+
+void i82357_device::device_add_mconfig(machine_config &config)
+{
+ PIC8259(config, m_pic[0], 0);
+ m_pic[0]->in_sp_callback().set_constant(1);
+ m_pic[0]->read_slave_ack_callback().set(
+ [this](offs_t offset)
+ {
+ if (offset == 2)
+ return m_pic[1]->acknowledge();
+
+ return u32(0);
+ });
+
+ PIC8259(config, m_pic[1], 0);
+ m_pic[1]->out_int_callback().set(m_pic[0], FUNC(pic8259_device::ir2_w));
+ m_pic[1]->in_sp_callback().set_constant(0);
+
+ PIT8254(config, m_pit[0], 0);
+ PIT8254(config, m_pit[1], 0);
+
+ // timer 1 counter 0: system timer
+ m_pit[0]->set_clk<0>(clock() / 12);
+ m_pit[0]->out_handler<0>().set(m_pic[0], FUNC(pic8259_device::ir0_w));
+
+ // timer 1 counter 1: refresh request
+ m_pit[0]->set_clk<1>(clock() / 12);
+ m_pit[0]->out_handler<1>().set(
+ [this](int state)
+ {
+ // FIXME: not accurate, but good enough to pass diagnostic
+ if (state)
+ m_nmi_reg ^= NMI_REFRESH;
+
+ m_pit[1]->write_gate2(state);
+ });
+
+ // timer 1 counter 2: speaker
+ m_pit[0]->set_clk<2>(clock() / 12);
+ m_pit[0]->out_handler<2>().set(
+ [this](int state)
+ {
+ if (state)
+ m_nmi_reg |= NMI_T1C2_STATE;
+ else
+ m_nmi_reg &= ~NMI_T1C2_STATE;
+
+ m_out_spkr((m_nmi_reg & NMI_T1C2_STATE) && (m_nmi_reg & NMI_SPEAKER_DATA));
+ });
+
+ // timer 2 counter 0: fail-safe timer
+ m_pit[1]->set_clk<0>(clock() / 48);
+ m_pit[1]->out_handler<0>().set(
+ [this](int state)
+ {
+ if (state && (m_nmi_ext & NMI_EXT_EN_FAILSAFE))
+ {
+ m_nmi_ext |= NMI_EXT_FAILSAFE;
+
+ m_nmi_check->adjust(attotime::zero);
+ }
+ });
+
+ // timer 2 counter 1: does not exist
+
+ // timer 2 counter 2: cpu speed control
+ m_pit[1]->set_clk<2>(8_MHz_XTAL);
+ //m_pit[1]->out_handler<2>().set();
+
+ EISA_DMA(config, m_dma[0], clock() / 3);
+ EISA_DMA(config, m_dma[1], clock() / 3);
+ m_dma[1]->out_dack_callback<0>().set(m_dma[0], FUNC(eisa_dma_device::hack_w)).invert();
+}
+
+void i82357_device::map(address_map &map)
+{
+ map(0x000, 0x00f).rw(m_dma[0], FUNC(eisa_dma_device::read), FUNC(eisa_dma_device::write));
+ map(0x020, 0x021).rw(m_pic[0], FUNC(pic8259_device::read), FUNC(pic8259_device::write));
+ map(0x040, 0x043).rw(m_pit[0], FUNC(pit8254_device::read), FUNC(pit8254_device::write));
+ map(0x048, 0x04b).rw(m_pit[1], FUNC(pit8254_device::read), FUNC(pit8254_device::write));
+
+ // FIXME: also 0x065 - "NMI Status"
+ map(0x061, 0x061).rw(FUNC(i82357_device::nmi_reg_r), FUNC(i82357_device::nmi_reg_w));
+
+ // NMI Enable Register (0x70, 72, 74, 76)
+ map(0x070, 0x077).lw8("nmi_rtc",
+ [this](address_space &space, offs_t offset, u8 data)
+ {
+ m_nmi_enabled = !BIT(data, 7);
+
+ m_out_rtc(space, 0, data & 0x7f);
+
+ m_nmi_check->adjust(attotime::zero);
+ }).umask64(0xff);
+
+ map(0x081, 0x081).rw(m_dma[0], FUNC(eisa_dma_device::get_address_page<2>), FUNC(eisa_dma_device::set_address_page<2>));
+ map(0x082, 0x082).rw(m_dma[0], FUNC(eisa_dma_device::get_address_page<3>), FUNC(eisa_dma_device::set_address_page<3>));
+ map(0x083, 0x083).rw(m_dma[0], FUNC(eisa_dma_device::get_address_page<1>), FUNC(eisa_dma_device::set_address_page<1>));
+ map(0x087, 0x087).rw(m_dma[0], FUNC(eisa_dma_device::get_address_page<0>), FUNC(eisa_dma_device::set_address_page<0>));
+ map(0x089, 0x089).rw(m_dma[1], FUNC(eisa_dma_device::get_address_page<2>), FUNC(eisa_dma_device::set_address_page<2>));
+ map(0x08a, 0x08a).rw(m_dma[1], FUNC(eisa_dma_device::get_address_page<3>), FUNC(eisa_dma_device::set_address_page<3>));
+ map(0x08b, 0x08b).rw(m_dma[1], FUNC(eisa_dma_device::get_address_page<1>), FUNC(eisa_dma_device::set_address_page<1>));
+ map(0x08f, 0x08f).rw(m_dma[1], FUNC(eisa_dma_device::get_address_page<0>), FUNC(eisa_dma_device::set_address_page<0>));
+
+ // TODO: also 0xa4, a8, ac, b0, b4, b8, bc
+ map(0x0a0, 0x0a1).rw(m_pic[1], FUNC(pic8259_device::read), FUNC(pic8259_device::write));
+ map(0x0c0, 0x0df).rw(m_dma[1], FUNC(eisa_dma_device::read), FUNC(eisa_dma_device::write)).umask16(0x00ff);
+
+ map(0x401, 0x401).rw(m_dma[0], FUNC(eisa_dma_device::get_count_high<0>), FUNC(eisa_dma_device::set_count_high<0>));
+ map(0x403, 0x403).rw(m_dma[0], FUNC(eisa_dma_device::get_count_high<1>), FUNC(eisa_dma_device::set_count_high<1>));
+ map(0x405, 0x405).rw(m_dma[0], FUNC(eisa_dma_device::get_count_high<2>), FUNC(eisa_dma_device::set_count_high<2>));
+ map(0x407, 0x407).rw(m_dma[0], FUNC(eisa_dma_device::get_count_high<3>), FUNC(eisa_dma_device::set_count_high<3>));
+
+ //map(0x40a, 0x40a); // DMA1 Set Chaining Mode (w)/Interrupt Status (r)
+ //map(0x40b, 0x40b); // DMA1 Ext Write Mode (w)
+ //map(0x40c, 0x40c); // Chain Buffer Control
+ //map(0x40d, 0x40d); // Stepping Level Register (ro)
+ //map(0x40e, 0x40e); // ISP Test Register
+ //map(0x40f, 0x40f); // ISP Test Register
+
+ map(0x461, 0x461).rw(FUNC(i82357_device::nmi_ext_r), FUNC(i82357_device::nmi_ext_w));
+ map(0x462, 0x462).lw8("nmi_ioport",
+ [this](u8 data)
+ {
+ if (m_nmi_ext & NMI_EXT_EN_IOPORT)
+ {
+ m_nmi_ext |= NMI_EXT_IOPORT;
+
+ m_nmi_check->adjust(attotime::zero);
+ }
+ });
+ //map(0x464, 0x464); // Last 32-bit bus master granted (L)
+
+ map(0x481, 0x481).rw(m_dma[0], FUNC(eisa_dma_device::get_address_page_high<2>), FUNC(eisa_dma_device::set_address_page_high<2>));
+ map(0x482, 0x482).rw(m_dma[0], FUNC(eisa_dma_device::get_address_page_high<3>), FUNC(eisa_dma_device::set_address_page_high<3>));
+ map(0x483, 0x483).rw(m_dma[0], FUNC(eisa_dma_device::get_address_page_high<1>), FUNC(eisa_dma_device::set_address_page_high<1>));
+ map(0x487, 0x487).rw(m_dma[0], FUNC(eisa_dma_device::get_address_page_high<0>), FUNC(eisa_dma_device::set_address_page_high<0>));
+ map(0x489, 0x489).rw(m_dma[1], FUNC(eisa_dma_device::get_address_page_high<2>), FUNC(eisa_dma_device::set_address_page_high<2>));
+ map(0x48a, 0x48a).rw(m_dma[1], FUNC(eisa_dma_device::get_address_page_high<3>), FUNC(eisa_dma_device::set_address_page_high<3>));
+ map(0x48b, 0x48b).rw(m_dma[1], FUNC(eisa_dma_device::get_address_page_high<1>), FUNC(eisa_dma_device::set_address_page_high<1>));
+ map(0x48f, 0x48f).rw(m_dma[1], FUNC(eisa_dma_device::get_address_page_high<0>), FUNC(eisa_dma_device::set_address_page_high<0>));
+
+ map(0x4c2, 0x4c2).rw(m_dma[1], FUNC(eisa_dma_device::get_count_high<0>), FUNC(eisa_dma_device::set_count_high<0>));
+ map(0x4c6, 0x4c6).rw(m_dma[1], FUNC(eisa_dma_device::get_count_high<1>), FUNC(eisa_dma_device::set_count_high<1>));
+ map(0x4ca, 0x4ca).rw(m_dma[1], FUNC(eisa_dma_device::get_count_high<2>), FUNC(eisa_dma_device::set_count_high<2>));
+ map(0x4ce, 0x4ce).rw(m_dma[1], FUNC(eisa_dma_device::get_count_high<3>), FUNC(eisa_dma_device::set_count_high<3>));
+ map(0x4d0, 0x4d1).lrw8("elcr",
+ [this](offs_t offset) { return m_elcr[offset]; },
+ [this](offs_t offset, u8 data) { m_elcr[offset] = data; });
+
+ //map(0x4d4, 0x4d4); // DMA2 Set Chaining Mode
+ //map(0x4d6, 0x4d6); // DMA2 Ext Write Mode Register
+
+ map(0x4e0, 0x4e3).rw(m_dma[0], FUNC(eisa_dma_device::get_stop<0>), FUNC(eisa_dma_device::set_stop<0>));
+ map(0x4e4, 0x4e7).rw(m_dma[0], FUNC(eisa_dma_device::get_stop<1>), FUNC(eisa_dma_device::set_stop<1>));
+ map(0x4e8, 0x4eb).rw(m_dma[0], FUNC(eisa_dma_device::get_stop<2>), FUNC(eisa_dma_device::set_stop<2>));
+ map(0x4ec, 0x4ef).rw(m_dma[0], FUNC(eisa_dma_device::get_stop<3>), FUNC(eisa_dma_device::set_stop<3>));
+
+ map(0x4f0, 0x4f3).rw(m_dma[1], FUNC(eisa_dma_device::get_stop<0>), FUNC(eisa_dma_device::set_stop<0>)); // reserved
+ map(0x4f4, 0x4f7).rw(m_dma[1], FUNC(eisa_dma_device::get_stop<1>), FUNC(eisa_dma_device::set_stop<1>));
+ map(0x4f8, 0x4fb).rw(m_dma[1], FUNC(eisa_dma_device::get_stop<2>), FUNC(eisa_dma_device::set_stop<2>));
+ map(0x4fc, 0x4ff).rw(m_dma[1], FUNC(eisa_dma_device::get_stop<3>), FUNC(eisa_dma_device::set_stop<3>));
+}
+
+void i82357_device::device_start()
+{
+ m_out_rtc.resolve_safe();
+ m_out_nmi.resolve_safe();
+ m_out_spkr.resolve_safe();
+
+ m_nmi_check = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(i82357_device::nmi_check), this));
+}
+
+void i82357_device::device_reset()
+{
+ m_elcr[0] = 0;
+ m_elcr[1] = 0;
+
+ m_nmi_enabled = true;
+ m_nmi_reg = 0;
+ m_nmi_ext = 0;
+
+ m_nmi_check->adjust(attotime::zero);
+}
+
+void i82357_device::nmi_reg_w(u8 data)
+{
+ m_pit[0]->write_gate2(!!(data & NMI_T1C2_GATE));
+
+ // clear parity nmi
+ if (data & NMI_PARITY_DISABLE)
+ m_nmi_reg &= ~NMI_PARITY;
+
+ // clear iochk nmi
+ if (data & NMI_IOCHK_DISABLE)
+ m_nmi_reg &= ~NMI_IOCHK;
+
+ m_nmi_reg = (m_nmi_reg & ~NMI_WMASK) | (data & NMI_WMASK);
+
+ // update speaker state
+ m_out_spkr((m_nmi_reg & NMI_T1C2_STATE) && (m_nmi_reg & NMI_SPEAKER_DATA));
+
+ m_nmi_check->adjust(attotime::zero);
+}
+
+void i82357_device::nmi_ext_w(u8 data)
+{
+ if (!(data & NMI_EXT_EN_IOPORT))
+ m_nmi_ext &= ~NMI_EXT_IOPORT;
+
+ if (!(data & NMI_EXT_EN_TIMEOUT))
+ m_nmi_ext &= ~NMI_EXT_TIMEOUT;
+
+ if (!(data & NMI_EXT_EN_FAILSAFE))
+ m_nmi_ext &= ~NMI_EXT_FAILSAFE;
+
+ m_nmi_ext = (m_nmi_ext & ~NMI_EXT_WMASK) | (data & NMI_EXT_WMASK);
+
+ m_nmi_check->adjust(attotime::zero);
+}
+
+WRITE_LINE_MEMBER(i82357_device::in_iochk)
+{
+ if (!state && !(m_nmi_reg & NMI_PARITY_DISABLE))
+ {
+ m_nmi_reg |= NMI_IOCHK;
+
+ m_nmi_check->adjust(attotime::zero);
+ }
+ else
+ m_nmi_reg &= ~NMI_IOCHK;
+}
+
+WRITE_LINE_MEMBER(i82357_device::in_parity)
+{
+ if (!state && !(m_nmi_reg & NMI_IOCHK_DISABLE))
+ {
+ m_nmi_reg |= NMI_PARITY;
+
+ m_nmi_check->adjust(attotime::zero);
+ }
+ else
+ m_nmi_reg &= ~NMI_PARITY;
+}
+
+TIMER_CALLBACK_MEMBER(i82357_device::nmi_check)
+{
+ if (m_nmi_enabled)
+ {
+ if ((m_nmi_reg & NMI_NMI) || (m_nmi_ext & NMI_EXT_NMI))
+ {
+ if (!m_out_nmi_asserted)
+ {
+ m_out_nmi_asserted = true;
+ m_out_nmi(1);
+ }
+
+ return;
+ }
+ }
+
+ // disabled or no source
+ if (m_out_nmi_asserted)
+ {
+ m_out_nmi_asserted = false;
+ m_out_nmi(0);
+ }
+}
diff --git a/src/devices/machine/i82357.h b/src/devices/machine/i82357.h
new file mode 100644
index 00000000000..3c5a7756061
--- /dev/null
+++ b/src/devices/machine/i82357.h
@@ -0,0 +1,91 @@
+// license:BSD-3-Clause
+// copyright-holders:Patrick Mackinlay
+
+#ifndef MAME_MACHINE_I82357_H
+#define MAME_MACHINE_I82357_H
+
+#pragma once
+
+#include "machine/pic8259.h"
+#include "machine/pit8253.h"
+#include "machine/am9517a.h"
+
+class i82357_device : public device_t
+{
+public:
+ i82357_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
+
+ auto out_rtc_cb() { return m_out_rtc.bind(); }
+ auto out_int_cb() { return subdevice<pic8259_device>("pic0")->out_int_callback(); }
+ auto out_nmi_cb() { return m_out_nmi.bind(); }
+ auto out_spkr_cb() { return m_out_spkr.bind(); }
+
+ u32 eisa_irq_ack() { return m_pic[0]->acknowledge(); }
+
+ DECLARE_WRITE_LINE_MEMBER(in_iochk);
+ DECLARE_WRITE_LINE_MEMBER(in_parity);
+
+ void map(address_map &map);
+
+protected:
+ // standard device_t overrides
+ virtual void device_add_mconfig(machine_config &config) override;
+ virtual void device_start() override;
+ virtual void device_reset() override;
+
+ void nmi_reg_w(u8 data);
+ void nmi_ext_w(u8 data);
+ u8 nmi_reg_r() { return m_nmi_reg; }
+ u8 nmi_ext_r() { return m_nmi_ext; }
+
+ TIMER_CALLBACK_MEMBER(nmi_check);
+
+private:
+ required_device_array<pic8259_device, 2> m_pic;
+ required_device_array<pit8254_device, 2> m_pit;
+ required_device_array<eisa_dma_device, 2> m_dma;
+
+ devcb_write8 m_out_rtc;
+ devcb_write_line m_out_nmi;
+ devcb_write_line m_out_spkr;
+
+ enum nmi_reg_mask : u8
+ {
+ NMI_T1C2_GATE = 0x01,
+ NMI_SPEAKER_DATA = 0x02,
+ NMI_PARITY_DISABLE = 0x04,
+ NMI_IOCHK_DISABLE = 0x08,
+ NMI_REFRESH = 0x10,
+ NMI_T1C2_STATE = 0x20,
+ NMI_IOCHK = 0x40,
+ NMI_PARITY = 0x80,
+
+ NMI_WMASK = 0x0f,
+ NMI_NMI = 0xc0,
+ };
+ enum nmi_ext_mask : u8
+ {
+ NMI_EXT_BUS_RESET = 0x01, // bus reset (read/write)
+ NMI_EXT_EN_IOPORT = 0x02,
+ NMI_EXT_EN_FAILSAFE = 0x04,
+ NMI_EXT_EN_TIMEOUT = 0x08,
+ NMI_EXT_8US_TIMEOUT = 0x10, // 8us EISA bus master timeout occurred
+ NMI_EXT_IOPORT = 0x20, // NMI I/O port interrupt pending
+ NMI_EXT_TIMEOUT = 0x40, // EISA bus master timeout occurred, NMI requested
+ NMI_EXT_FAILSAFE = 0x80, // Fail-safe timer is active, NMI requested
+
+ NMI_EXT_WMASK = 0x0f,
+ NMI_EXT_NMI = 0xe0,
+ };
+ u8 m_elcr[2];
+
+ emu_timer *m_nmi_check;
+ bool m_out_nmi_asserted;
+ bool m_nmi_enabled;
+ u8 m_nmi_reg;
+ u8 m_nmi_ext;
+};
+
+DECLARE_DEVICE_TYPE(I82357, i82357_device)
+
+#endif // MAME_MACHINE_I82357_H
diff --git a/src/devices/machine/i82371sb.cpp b/src/devices/machine/i82371sb.cpp
index 579d678906a..b149d98a48f 100644
--- a/src/devices/machine/i82371sb.cpp
+++ b/src/devices/machine/i82371sb.cpp
@@ -49,7 +49,7 @@ void i82371sb_isa_device::internal_io_map(address_map &map)
void i82371sb_isa_device::device_add_mconfig(machine_config &config)
{
- PIT8254(config, m_pit8254, 0);
+ PIT8254(config, m_pit8254);
m_pit8254->set_clk<0>(4772720/4); // heartbeat IRQ
m_pit8254->out_handler<0>().set(FUNC(i82371sb_isa_device::at_pit8254_out0_changed));
m_pit8254->set_clk<1>(4772720/4); // DRAM refresh
@@ -90,12 +90,12 @@ void i82371sb_isa_device::device_add_mconfig(machine_config &config)
m_dma8237_2->out_dack_callback<2>().set(FUNC(i82371sb_isa_device::pc_dack6_w));
m_dma8237_2->out_dack_callback<3>().set(FUNC(i82371sb_isa_device::pc_dack7_w));
- PIC8259(config, m_pic8259_master, 0);
+ PIC8259(config, m_pic8259_master);
m_pic8259_master->out_int_callback().set_inputline(m_maincpu, 0);
m_pic8259_master->in_sp_callback().set_constant(1);
m_pic8259_master->read_slave_ack_callback().set(FUNC(i82371sb_isa_device::get_slave_ack));
- PIC8259(config, m_pic8259_slave, 0);
+ PIC8259(config, m_pic8259_slave);
m_pic8259_slave->out_int_callback().set(m_pic8259_master, FUNC(pic8259_device::ir2_w));
m_pic8259_slave->in_sp_callback().set_constant(0);
@@ -104,7 +104,8 @@ void i82371sb_isa_device::device_add_mconfig(machine_config &config)
SPEAKER_SOUND(config, m_speaker).add_route(ALL_OUTPUTS, "mono", 0.50);
ISA16(config, m_isabus, 0);
- m_isabus->set_cputag(":maincpu");
+ m_isabus->set_memspace(":maincpu", AS_PROGRAM);
+ m_isabus->set_iospace(":maincpu", AS_IO);
m_isabus->irq3_callback().set(FUNC(i82371sb_isa_device::pc_irq3_w));
m_isabus->irq4_callback().set(FUNC(i82371sb_isa_device::pc_irq4_w));
m_isabus->irq5_callback().set(FUNC(i82371sb_isa_device::pc_irq5_w));
@@ -123,6 +124,7 @@ void i82371sb_isa_device::device_add_mconfig(machine_config &config)
m_isabus->drq5_callback().set(m_dma8237_2, FUNC(am9517a_device::dreq1_w));
m_isabus->drq6_callback().set(m_dma8237_2, FUNC(am9517a_device::dreq2_w));
m_isabus->drq7_callback().set(m_dma8237_2, FUNC(am9517a_device::dreq3_w));
+ m_isabus->iochck_callback().set(FUNC(i82371sb_isa_device::iochck_w));
}
i82371sb_isa_device::i82371sb_isa_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
@@ -656,6 +658,8 @@ WRITE_LINE_MEMBER( i82371sb_isa_device::at_dma8237_out_eop )
void i82371sb_isa_device::pc_select_dma_channel(int channel, bool state)
{
+ m_isabus->dack_line_w(channel, state);
+
if(!state) {
m_dma_channel = channel;
if(m_cur_eop)
@@ -818,17 +822,24 @@ WRITE8_MEMBER( i82371sb_isa_device::at_portb_w )
m_pit8254->write_gate2(BIT(data, 0));
at_speaker_set_spkrdata( BIT(data, 1));
m_channel_check = BIT(data, 3);
- m_isabus->set_nmi_state((m_nmi_enabled==0) && (m_channel_check==0));
+ if (m_channel_check)
+ m_maincpu->set_input_line(INPUT_LINE_NMI, CLEAR_LINE);
+}
+
+WRITE_LINE_MEMBER( i82371sb_isa_device::iochck_w )
+{
+ if (!state && !m_channel_check && m_nmi_enabled)
+ m_maincpu->set_input_line(INPUT_LINE_NMI, ASSERT_LINE);
}
READ8_MEMBER( i82371sb_isa_device::at_dma8237_2_r )
{
- return m_dma8237_2->read( space, offset / 2);
+ return m_dma8237_2->read(offset / 2);
}
WRITE8_MEMBER( i82371sb_isa_device::at_dma8237_2_w )
{
- m_dma8237_2->write( space, offset / 2, data);
+ m_dma8237_2->write(offset / 2, data);
}
READ8_MEMBER(i82371sb_isa_device::eisa_irq_read)
diff --git a/src/devices/machine/i82371sb.h b/src/devices/machine/i82371sb.h
index ea7976ad845..5d79eec29ef 100644
--- a/src/devices/machine/i82371sb.h
+++ b/src/devices/machine/i82371sb.h
@@ -146,6 +146,7 @@ private:
DECLARE_WRITE8_MEMBER(at_page8_w);
DECLARE_READ8_MEMBER(at_portb_r);
DECLARE_WRITE8_MEMBER(at_portb_w);
+ DECLARE_WRITE_LINE_MEMBER(iochck_w);
DECLARE_READ8_MEMBER(ide_read_cs1_r);
DECLARE_WRITE8_MEMBER(ide_write_cs1_w);
DECLARE_READ8_MEMBER(ide2_read_cs1_r);
diff --git a/src/devices/machine/i8251.cpp b/src/devices/machine/i8251.cpp
index 773262b617e..1c3189d8f8f 100644
--- a/src/devices/machine/i8251.cpp
+++ b/src/devices/machine/i8251.cpp
@@ -674,9 +674,11 @@ uint8_t i8251_device::data_r()
{
LOG("read data: %02x, STATUS=%02x\n",m_rx_data,m_status);
/* reading clears */
- m_status &= ~I8251_STATUS_RX_READY;
-
- update_rx_ready();
+ if (!machine().side_effects_disabled())
+ {
+ m_status &= ~I8251_STATUS_RX_READY;
+ update_rx_ready();
+ }
return m_rx_data;
}
diff --git a/src/devices/machine/i8251.h b/src/devices/machine/i8251.h
index 4e2773c3e40..f8b92725b05 100644
--- a/src/devices/machine/i8251.h
+++ b/src/devices/machine/i8251.h
@@ -54,10 +54,7 @@ public:
DECLARE_READ_LINE_MEMBER(txrdy_r);
- /// TODO: REMOVE THIS
- void receive_character(uint8_t ch);
-
- /// TODO: this shouldn't be public
+protected:
enum
{
I8251_STATUS_FRAMING_ERROR = 0x20,
@@ -68,7 +65,6 @@ public:
I8251_STATUS_TX_READY = 0x01
};
-protected:
i8251_device(
const machine_config &mconfig,
device_type type,
@@ -83,6 +79,8 @@ protected:
void command_w(uint8_t data);
void mode_w(uint8_t data);
+ void receive_character(uint8_t ch);
+
void update_rx_ready();
void update_tx_ready();
void update_tx_empty();
diff --git a/src/devices/machine/i8271.cpp b/src/devices/machine/i8271.cpp
index 3a309c4ea16..1bac233f955 100644
--- a/src/devices/machine/i8271.cpp
+++ b/src/devices/machine/i8271.cpp
@@ -132,7 +132,7 @@ void i8271_device::set_floppy(floppy_image_device *flop)
flop->setup_index_pulse_cb(floppy_image_device::index_pulse_cb(&i8271_device::index_callback, this));
}
-READ8_MEMBER(i8271_device::sr_r)
+uint8_t i8271_device::sr_r()
{
uint32_t ret = (irq ? SR_IRQ : 0);
switch(main_phase) {
@@ -151,11 +151,13 @@ READ8_MEMBER(i8271_device::sr_r)
return ret;
}
-READ8_MEMBER(i8271_device::rr_r)
+uint8_t i8271_device::rr_r()
{
- if(main_phase == PHASE_RESULT)
- main_phase = PHASE_IDLE;
- set_irq(false);
+ if (!machine().side_effects_disabled()) {
+ if (main_phase == PHASE_RESULT)
+ main_phase = PHASE_IDLE;
+ set_irq(false);
+ }
return rr;
}
@@ -164,31 +166,32 @@ void i8271_device::set_rate(int rate)
cur_rate = rate;
}
-READ8_MEMBER(i8271_device::read)
+uint8_t i8271_device::read(offs_t offset)
{
switch(offset & 0x03) {
- case 0x00: return sr_r(space, 0);
- case 0x01: return rr_r(space, 0);
+ case 0x00: return sr_r();
+ case 0x01: return rr_r();
}
return 0xff;
}
-WRITE8_MEMBER(i8271_device::write)
+void i8271_device::write(offs_t offset, uint8_t data)
{
switch(offset & 0x03) {
- case 0x00: cmd_w(space, 0, data); break;
- case 0x01: param_w(space, 0, data); break;
- case 0x02: reset_w(space, 0, data); break;
+ case 0x00: cmd_w(data); break;
+ case 0x01: param_w(data); break;
+ case 0x02: reset_w(data); break;
}
}
-READ8_MEMBER(i8271_device::data_r)
+uint8_t i8271_device::data_r()
{
- set_drq(false);
+ if (!machine().side_effects_disabled())
+ set_drq(false);
return dma_data;
}
-WRITE8_MEMBER(i8271_device::data_w)
+void i8271_device::data_w(uint8_t data)
{
if(drq) {
set_drq(false);
@@ -196,7 +199,7 @@ WRITE8_MEMBER(i8271_device::data_w)
}
}
-WRITE8_MEMBER(i8271_device::cmd_w)
+void i8271_device::cmd_w(uint8_t data)
{
if(main_phase == PHASE_IDLE) {
command[0] = data;
@@ -211,7 +214,7 @@ WRITE8_MEMBER(i8271_device::cmd_w)
}
}
-WRITE8_MEMBER(i8271_device::param_w)
+void i8271_device::param_w(uint8_t data)
{
if(main_phase == PHASE_CMD) {
command[command_pos++] = data;
diff --git a/src/devices/machine/i8271.h b/src/devices/machine/i8271.h
index 701085f58d4..88e9a6146e6 100644
--- a/src/devices/machine/i8271.h
+++ b/src/devices/machine/i8271.h
@@ -24,10 +24,10 @@ public:
auto hdl_wr_callback() { return hdl_cb.bind(); }
auto opt_wr_callback() { return opt_cb.bind(); }
- DECLARE_READ8_MEMBER(read);
- DECLARE_WRITE8_MEMBER(write);
- DECLARE_READ8_MEMBER (data_r);
- DECLARE_WRITE8_MEMBER(data_w);
+ uint8_t read(offs_t offset);
+ void write(offs_t offset, uint8_t data);
+ uint8_t data_r();
+ void data_w(uint8_t data);
void ready_w(bool val);
@@ -228,11 +228,11 @@ private:
C_INCOMPLETE
};
- DECLARE_READ8_MEMBER (sr_r);
- DECLARE_READ8_MEMBER (rr_r);
- DECLARE_WRITE8_MEMBER(reset_w) { if(data == 1) soft_reset(); }
- DECLARE_WRITE8_MEMBER(cmd_w);
- DECLARE_WRITE8_MEMBER(param_w);
+ uint8_t sr_r();
+ uint8_t rr_r();
+ void reset_w(uint8_t data) { if(data == 1) soft_reset(); }
+ void cmd_w(uint8_t data);
+ void param_w(uint8_t data);
void delay_cycles(emu_timer *tm, int cycles);
void set_drq(bool state);
diff --git a/src/devices/machine/idectrl.cpp b/src/devices/machine/idectrl.cpp
index b8ab541fc8d..45f6ab6f703 100644
--- a/src/devices/machine/idectrl.cpp
+++ b/src/devices/machine/idectrl.cpp
@@ -222,6 +222,7 @@ DEFINE_DEVICE_TYPE(BUS_MASTER_IDE_CONTROLLER, bus_master_ide_controller_device,
bus_master_ide_controller_device::bus_master_ide_controller_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
ide_controller_32_device(mconfig, BUS_MASTER_IDE_CONTROLLER, tag, owner, clock),
+ m_dma_space(*this, finder_base::DUMMY_TAG, -1, 32),
m_dma_address(0),
m_dma_bytes_left(0),
m_dma_descriptor(0),
@@ -239,17 +240,7 @@ void bus_master_ide_controller_device::device_start()
ide_controller_32_device::device_start();
/* find the bus master space */
- if (m_bmcpu != nullptr)
- {
- device_t *bmtarget = machine().device(m_bmcpu);
- if (bmtarget == nullptr)
- throw emu_fatalerror("IDE controller '%s' bus master target '%s' doesn't exist!", tag(), m_bmcpu);
- device_memory_interface *memory;
- if (!bmtarget->interface(memory))
- throw emu_fatalerror("IDE controller '%s' bus master target '%s' has no memory!", tag(), m_bmcpu);
- m_dma_space = &memory->space(m_bmspace);
- m_dma_address_xor = (m_dma_space->endianness() == ENDIANNESS_LITTLE) ? 0 : 3;
- }
+ m_dma_address_xor = (m_dma_space->endianness() == ENDIANNESS_LITTLE) ? 0 : 3;
save_item(NAME(m_dma_address));
save_item(NAME(m_dma_bytes_left));
diff --git a/src/devices/machine/idectrl.h b/src/devices/machine/idectrl.h
index 3a0886a5185..c0e84e3c562 100644
--- a/src/devices/machine/idectrl.h
+++ b/src/devices/machine/idectrl.h
@@ -105,7 +105,7 @@ class bus_master_ide_controller_device : public ide_controller_32_device
{
public:
bus_master_ide_controller_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
- void set_bus_master_space(const char *bmcpu, uint32_t bmspace) { m_bmcpu = bmcpu; m_bmspace = bmspace; }
+ template <typename T> void set_bus_master_space(T &&bmtag, int bmspace) { m_dma_space.set_tag(std::forward<T>(bmtag), bmspace); }
template <typename T> bus_master_ide_controller_device &master(T &&opts, const char *dflt = nullptr, bool fixed = false)
{
@@ -140,9 +140,7 @@ protected:
private:
void execute_dma();
- const char *m_bmcpu;
- uint32_t m_bmspace;
- address_space *m_dma_space;
+ required_address_space m_dma_space;
uint8_t m_dma_address_xor;
offs_t m_dma_address;
diff --git a/src/devices/machine/idehd.cpp b/src/devices/machine/idehd.cpp
index b9f6ddbbe70..1f4be38d491 100644
--- a/src/devices/machine/idehd.cpp
+++ b/src/devices/machine/idehd.cpp
@@ -869,6 +869,7 @@ uint8_t ide_hdd_device::calculate_status()
// device_add_mconfig - add device configuration
//-------------------------------------------------
-MACHINE_CONFIG_START(ide_hdd_device::device_add_mconfig)
- MCFG_HARDDISK_ADD( "image" )
-MACHINE_CONFIG_END
+void ide_hdd_device::device_add_mconfig(machine_config &config)
+{
+ HARDDISK(config, "image");
+}
diff --git a/src/devices/machine/ie15.cpp b/src/devices/machine/ie15.cpp
index 4f1a8a25bfc..65a71ae23c3 100644
--- a/src/devices/machine/ie15.cpp
+++ b/src/devices/machine/ie15.cpp
@@ -568,25 +568,25 @@ static GFXDECODE_START( gfx_ie15 )
GFXDECODE_ENTRY("chargen", 0x0000, ie15_charlayout, 0, 1)
GFXDECODE_END
-MACHINE_CONFIG_START(ie15_device::ie15core)
+void ie15_device::ie15core(machine_config &config)
+{
/* Basic machine hardware */
- MCFG_DEVICE_ADD("maincpu", IE15_CPU, XTAL(30'800'000)/10)
- MCFG_DEVICE_PROGRAM_MAP(ie15_mem)
- MCFG_DEVICE_IO_MAP(ie15_io)
+ IE15_CPU(config, m_maincpu, XTAL(30'800'000)/10);
+ m_maincpu->set_addrmap(AS_PROGRAM, &ie15_device::ie15_mem);
+ m_maincpu->set_addrmap(AS_IO, &ie15_device::ie15_io);
config.set_default_layout(layout_ie15);
/* Devices */
- IE15_KEYBOARD(config, m_keyboard, 0)
- .keyboard_cb().set(FUNC(ie15_device::kbd_put));
+ IE15_KEYBOARD(config, m_keyboard, 0).keyboard_cb().set(FUNC(ie15_device::kbd_put));
RS232_PORT(config, m_rs232, default_rs232_devices, "null_modem");
m_rs232->rxd_handler().set(FUNC(ie15_device::serial_rx_callback));
SPEAKER(config, "mono").front_center();
- MCFG_DEVICE_ADD("beeper", BEEP, 2400)
- MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.15)
-MACHINE_CONFIG_END
+ BEEP(config, m_beeper, 2400);
+ m_beeper->add_route(ALL_OUTPUTS, "mono", 0.15);
+}
/* ROM definition */
ROM_START( ie15 )
@@ -603,18 +603,20 @@ ROM_START( ie15 )
ROM_LOAD("chargen-15ie.bin", 0x0000, 0x0800, CRC(ed16bf6b) SHA1(6af9fb75f5375943d5c0ce9ed408e0fb4621b17e))
ROM_END
-MACHINE_CONFIG_START(ie15_device::device_add_mconfig)
- MCFG_SCREEN_ADD_MONOCHROME("screen", RASTER, rgb_t::green())
- MCFG_SCREEN_UPDATE_DRIVER(ie15_device, screen_update)
- MCFG_SCREEN_RAW_PARAMS(XTAL(30'800'000)/2,
+void ie15_device::device_add_mconfig(machine_config &config)
+{
+ SCREEN(config, m_screen, SCREEN_TYPE_RASTER);
+ m_screen->set_color(rgb_t::green());
+ m_screen->set_screen_update(FUNC(ie15_device::screen_update));
+ m_screen->set_raw(XTAL(30'800'000)/2,
IE15_TOTAL_HORZ, IE15_HORZ_START, IE15_HORZ_START+IE15_DISP_HORZ,
IE15_TOTAL_VERT, IE15_VERT_START, IE15_VERT_START+IE15_DISP_VERT);
ie15core(config);
- MCFG_DEVICE_ADD("gfxdecode", GFXDECODE, "palette", gfx_ie15)
+ GFXDECODE(config, "gfxdecode", "palette", gfx_ie15);
PALETTE(config, "palette", palette_device::MONOCHROME);
-MACHINE_CONFIG_END
+}
ioport_constructor ie15_device::device_input_ports() const
{
diff --git a/src/devices/machine/ie15_kbd.cpp b/src/devices/machine/ie15_kbd.cpp
index 13ee3ea5744..79a4bb86aad 100644
--- a/src/devices/machine/ie15_kbd.cpp
+++ b/src/devices/machine/ie15_kbd.cpp
@@ -122,8 +122,9 @@ const tiny_rom_entry *ie15_keyboard_device::device_rom_region() const
return ROM_NAME( ie15_keyboard );
}
-MACHINE_CONFIG_START(ie15_keyboard_device::device_add_mconfig)
-MACHINE_CONFIG_END
+void ie15_keyboard_device::device_add_mconfig(machine_config &config)
+{
+}
void ie15_keyboard_device::device_start()
diff --git a/src/devices/machine/input_merger.h b/src/devices/machine/input_merger.h
index 53af1a38cfd..aa5e66cc1f1 100644
--- a/src/devices/machine/input_merger.h
+++ b/src/devices/machine/input_merger.h
@@ -15,27 +15,6 @@
#pragma once
-
-//**************************************************************************
-// INTERFACE CONFIGURATION MACROS
-//**************************************************************************
-
-#define MCFG_INPUT_MERGER_ANY_HIGH(_tag) \
- MCFG_DEVICE_ADD(_tag, INPUT_MERGER_ANY_HIGH, 0)
-
-#define MCFG_INPUT_MERGER_ALL_HIGH(_tag) \
- MCFG_DEVICE_ADD(_tag, INPUT_MERGER_ALL_HIGH, 0)
-
-#define MCFG_INPUT_MERGER_ANY_LOW(_tag) \
- MCFG_DEVICE_ADD(_tag, INPUT_MERGER_ANY_LOW, 0)
-
-#define MCFG_INPUT_MERGER_ALL_LOW(_tag) \
- MCFG_DEVICE_ADD(_tag, INPUT_MERGER_ALL_LOW, 0)
-
-#define MCFG_INPUT_MERGER_OUTPUT_HANDLER(_devcb) \
- downcast<input_merger_device &>(*device).set_output_handler(DEVCB_##_devcb);
-
-
//**************************************************************************
// TYPE DEFINITIONS
//**************************************************************************
@@ -44,7 +23,6 @@ class input_merger_device : public device_t
{
public:
// callback
- template <class Object> devcb_base &set_output_handler(Object &&cb) { return m_output_handler.set_callback(std::forward<Object>(cb)); }
auto output_handler() { return m_output_handler.bind(); }
// input lines
diff --git a/src/devices/machine/ins8154.cpp b/src/devices/machine/ins8154.cpp
index 8a134000f3f..11943cdee2c 100644
--- a/src/devices/machine/ins8154.cpp
+++ b/src/devices/machine/ins8154.cpp
@@ -1,21 +1,24 @@
// license:GPL-2.0+
// copyright-holders:Dirk Best
-/***************************************************************************
+/******************************************************************************
National Semiconductor INS8154
N-Channel 128-by-8 Bit RAM Input/Output (RAM I/O)
TODO: Strobed modes
+ TODO: Check the ODRx register for where to get pin values, _cb() vs m_out_x
-***************************************************************************/
+*******************************************************************************/
#include "emu.h"
#include "ins8154.h"
-#define VERBOSE 1
+#define LOG_BITS (1U << 1)
+//#define VERBOSE (LOG_BITS) // (LOG_GENERAL|LOG_BITS)
#include "logmacro.h"
+#define LOGBITS(...) LOGMASKED(LOG_BITS, __VA_ARGS__)
/***************************************************************************
CONSTANTS
@@ -75,6 +78,7 @@ void ins8154_device::device_start()
save_item(NAME(m_mdr));
save_item(NAME(m_odra));
save_item(NAME(m_odrb));
+ save_item(NAME(m_ram));
}
@@ -94,7 +98,7 @@ void ins8154_device::device_reset()
}
-READ8_MEMBER(ins8154_device::ins8154_r)
+uint8_t ins8154_device::read_io(offs_t offset)
{
uint8_t val = 0xff;
@@ -119,17 +123,23 @@ READ8_MEMBER(ins8154_device::ins8154_r)
break;
default:
- if (offset < 0x08)
+ val = 0;
+ if (offset < 0x08) // Read a bit in Port A
{
if (!m_in_a_cb.isnull())
- val = (m_in_a_cb(0) << (8 - offset)) & 0x80;
- m_in_a = val;
+ {
+ //val = (m_in_a_cb(0) << (8 - offset)) & 0x80;
+ val = (m_in_a_cb(0) & ~m_odra & (1 << (offset & 0x07))) ? 0x80 : 0x00;
+ }
+ LOGBITS("%s: INS8154 Port A read bit %02x: %02x\n", machine().describe_context(), offset & 0x07, val);
}
- else
+ else // Read a bit in Port B
{
if (!m_in_b_cb.isnull())
- val = (m_in_b_cb(0) << (8 - (offset >> 4))) & 0x80;
- m_in_b = val;
+ {
+ val = (m_in_b_cb(0) & ~m_odrb & (1 << (offset & 0x07))) ? 0x80 : 0x00;
+ }
+ LOGBITS("%s: INS8154 Port B read bit %02x: %02x\n", machine().describe_context(), offset & 0x07, val);
}
break;
}
@@ -137,7 +147,12 @@ READ8_MEMBER(ins8154_device::ins8154_r)
return val;
}
-WRITE8_MEMBER(ins8154_device::ins8154_porta_w)
+uint8_t ins8154_device::read_ram(offs_t offset)
+{
+ return m_ram[offset & 0x7f];
+}
+
+void ins8154_device::porta_w(uint8_t data)
{
m_out_a = data;
@@ -146,8 +161,9 @@ WRITE8_MEMBER(ins8154_device::ins8154_porta_w)
m_out_a_cb(offs_t(0), (data & m_odra) | (m_odra ^ 0xff));
}
-WRITE8_MEMBER(ins8154_device::ins8154_portb_w)
+void ins8154_device::portb_w(uint8_t data)
{
+ LOG("%s: INS8154 Write PortB %02x with odrb: %02x\n", machine().describe_context(), data, m_odrb);
m_out_b = data;
/* Test if any pins are set as outputs */
@@ -155,7 +171,7 @@ WRITE8_MEMBER(ins8154_device::ins8154_portb_w)
m_out_b_cb(offs_t(0), (data & m_odrb) | (m_odrb ^ 0xff));
}
-WRITE8_MEMBER(ins8154_device::ins8154_w)
+void ins8154_device::write_io(offs_t offset, uint8_t data)
{
if (offset > 0x24)
{
@@ -166,11 +182,11 @@ WRITE8_MEMBER(ins8154_device::ins8154_w)
switch (offset)
{
case 0x20:
- ins8154_porta_w(space, 0, data);
+ porta_w(data);
break;
case 0x21:
- ins8154_portb_w(space, 0, data);
+ portb_w(data);
break;
case 0x22:
@@ -193,18 +209,35 @@ WRITE8_MEMBER(ins8154_device::ins8154_w)
{
/* Set bit */
if (offset < 0x08)
- ins8154_porta_w(space, 0, m_out_a |= offset & 0x07);
+ {
+ LOGBITS("%s: INS8154 Port A set bit %02x\n", machine().describe_context(), offset & 0x07);
+ porta_w(m_out_a |= (1 << (offset & 0x07)));
+ }
else
- ins8154_portb_w(space, 0, m_out_b |= (offset >> 4) & 0x07);
+ {
+ LOGBITS("%s: INS8154 Port B set bit %02x\n", machine().describe_context(), offset & 0x07);
+ portb_w(m_out_b |= (1 << (offset & 0x07)));
+ }
}
else
{
/* Clear bit */
if (offset < 0x08)
- ins8154_porta_w(space, 0, m_out_a & ~(offset & 0x07));
+ {
+ LOGBITS("%s: INS8154 Port A clear bit %02x\n", machine().describe_context(), offset & 0x07);
+ porta_w(m_out_a & ~(1 << (offset & 0x07)));
+ }
else
- ins8154_portb_w(space, 0, m_out_b & ~((offset >> 4) & 0x07));
+ {
+ LOGBITS("%s: INS8154 Port B clear bit %02x\n", machine().describe_context(), offset & 0x07);
+ portb_w(m_out_b & ~(1 << (offset & 0x07)));
+ }
}
break;
}
}
+
+void ins8154_device::write_ram(offs_t offset, uint8_t data)
+{
+ m_ram[offset & 0x7f] = data;
+}
diff --git a/src/devices/machine/ins8154.h b/src/devices/machine/ins8154.h
index 5ba94ab9cda..2ce40ec9e70 100644
--- a/src/devices/machine/ins8154.h
+++ b/src/devices/machine/ins8154.h
@@ -47,11 +47,13 @@ public:
auto out_b() { return m_out_b_cb.bind(); }
auto out_irq() { return m_out_irq_cb.bind(); }
- DECLARE_READ8_MEMBER( ins8154_r );
- DECLARE_WRITE8_MEMBER( ins8154_w );
+ uint8_t read_io(offs_t offset);
+ void write_io(offs_t offset, uint8_t data);
+ uint8_t read_ram(offs_t offset);
+ void write_ram(offs_t offset, uint8_t data);
- DECLARE_WRITE8_MEMBER( ins8154_porta_w );
- DECLARE_WRITE8_MEMBER( ins8154_portb_w );
+ void porta_w(uint8_t data);
+ void portb_w(uint8_t data);
protected:
// device-level overrides
@@ -77,6 +79,9 @@ private:
uint8_t m_mdr; /* Mode Definition Register */
uint8_t m_odra; /* Output Definition Register Port A */
uint8_t m_odrb; /* Output Definition Register Port B */
+
+ /* on-board RAM */
+ uint8_t m_ram[0x80];
};
diff --git a/src/devices/machine/ins8250.cpp b/src/devices/machine/ins8250.cpp
index 88262cdbac2..d127ce0e40d 100644
--- a/src/devices/machine/ins8250.cpp
+++ b/src/devices/machine/ins8250.cpp
@@ -390,6 +390,8 @@ WRITE8_MEMBER( ins8250_uart_device::ins8250_w )
if ( m_regs.msr & 0x0f )
trigger_int(COM_INT_PENDING_MODEM_STATUS_REGISTER);
+ else
+ clear_int(COM_INT_PENDING_MODEM_STATUS_REGISTER);
break;
case 7:
m_regs.scr = data;
diff --git a/src/devices/machine/intelfsh.h b/src/devices/machine/intelfsh.h
index 7dcf9f7e173..edaa23d69f6 100644
--- a/src/devices/machine/intelfsh.h
+++ b/src/devices/machine/intelfsh.h
@@ -102,8 +102,8 @@ class intelfsh8_device : public intelfsh_device
{
public:
// public interface
- DECLARE_READ8_MEMBER(read) { return read_full(offset); }
- DECLARE_WRITE8_MEMBER(write) { write_full(offset, data); }
+ uint8_t read(offs_t offset) { return read_full(offset); }
+ void write(offs_t offset, uint8_t data) { write_full(offset, data); }
uint8_t read_raw(offs_t offset) { return m_data[offset]; }
void write_raw(offs_t offset, uint8_t data) { m_data[offset] = data; }
@@ -120,8 +120,8 @@ class intelfsh16_device : public intelfsh_device
{
public:
// public interface
- DECLARE_READ16_MEMBER(read) { return read_full(offset); }
- DECLARE_WRITE16_MEMBER(write) { write_full(offset, data); }
+ uint16_t read(offs_t offset) { return read_full(offset); }
+ void write(offs_t offset, uint16_t data) { write_full(offset, data); }
uint16_t read_raw(offs_t offset) { return m_data[offset*2] | (m_data[offset*2+1] << 8); }
void write_raw(offs_t offset, uint16_t data) { m_data[offset*2] = data; m_data[offset*2+1] = data >> 8; }
diff --git a/src/devices/machine/k054321.cpp b/src/devices/machine/k054321.cpp
index 21e02e9042f..592bc74582a 100644
--- a/src/devices/machine/k054321.cpp
+++ b/src/devices/machine/k054321.cpp
@@ -11,7 +11,7 @@
/*
The 054321 is a sound communication latch/volume manager chip, that
- is integrated into the 054544 and 05489A hybrid chips. The hybrid
+ is integrated into the 054544 and 054986A hybrid chips. The hybrid
chips also include the DACs, capacitors, etc needed for the audio
output.
diff --git a/src/devices/machine/keyboard.cpp b/src/devices/machine/keyboard.cpp
index 03e73f3ac05..52502597227 100644
--- a/src/devices/machine/keyboard.cpp
+++ b/src/devices/machine/keyboard.cpp
@@ -9,10 +9,10 @@ or for the case of a computer with an inbuilt (not serial) ascii keyboard.
Example of usage in a driver.
-In MACHINE_CONFIG
+In the machine config function:
- MCFG_DEVICE_ADD(KEYBOARD_TAG, GENERIC_KEYBOARD, 0)
- MCFG_GENERIC_KEYBOARD_CB(WRITE8(*this, xxx_state, kbd_put))
+ generic_keyboard_device &kbd(GENERIC_KEYBOARD(config, KEYBOARD_TAG, 0));
+ kbd.set_keyboard_callback(FUNC(xxx_state::kbd_put));
In the code:
diff --git a/src/devices/machine/ldp1000.h b/src/devices/machine/ldp1000.h
index 1f3140f14e8..b3f420afb6e 100644
--- a/src/devices/machine/ldp1000.h
+++ b/src/devices/machine/ldp1000.h
@@ -15,13 +15,6 @@
//**************************************************************************
-// INTERFACE CONFIGURATION MACROS
-//**************************************************************************
-
-#define MCFG_LASERDISC_LDP1000_ADD(_tag) \
- MCFG_DEVICE_ADD(_tag, SONY_LDP1000, 0)
-
-//**************************************************************************
// TYPE DEFINITIONS
//**************************************************************************
diff --git a/src/devices/machine/ldp1450.h b/src/devices/machine/ldp1450.h
index 3ef9fab0939..67a429845e1 100644
--- a/src/devices/machine/ldp1450.h
+++ b/src/devices/machine/ldp1450.h
@@ -15,13 +15,6 @@
//**************************************************************************
-// INTERFACE CONFIGURATION MACROS
-//**************************************************************************
-
-#define MCFG_LASERDISC_LDP1450_ADD(_tag, clock) \
- MCFG_DEVICE_ADD(_tag, SONY_LDP1450, clock)
-
-//**************************************************************************
// TYPE DEFINITIONS
//**************************************************************************
diff --git a/src/devices/machine/ldpr8210.h b/src/devices/machine/ldpr8210.h
index f142229314c..fc0a28d6d26 100644
--- a/src/devices/machine/ldpr8210.h
+++ b/src/devices/machine/ldpr8210.h
@@ -23,8 +23,6 @@
#define MCFG_LASERDISC_PR8210_ADD(_tag) \
MCFG_DEVICE_ADD(_tag, PIONEER_PR8210, 0)
-#define MCFG_LASERDISC_SIMUTREK_ADD(_tag) \
- MCFG_DEVICE_ADD(_tag, SIMUTREK_SPECIAL, 0)
//**************************************************************************
diff --git a/src/devices/machine/ldstub.cpp b/src/devices/machine/ldstub.cpp
index 9d3dab58ce3..c0c9a7ac05a 100644
--- a/src/devices/machine/ldstub.cpp
+++ b/src/devices/machine/ldstub.cpp
@@ -17,8 +17,8 @@
//**************************************************************************
// device type definition
-DEFINE_DEVICE_TYPE(PIONEER_PR7820, pioneer_pr7820_device, "pr7820", "Pioneer PR-7820")
-DEFINE_DEVICE_TYPE(PHILLIPS_22VP932, phillips_22vp932_device, "22vp932", "Phillips 22VP932")
+DEFINE_DEVICE_TYPE(PIONEER_PR7820, pioneer_pr7820_device, "pr7820", "Pioneer PR-7820")
+DEFINE_DEVICE_TYPE(PHILIPS_22VP932, philips_22vp932_device, "22vp932", "Philips 22VP932")
pioneer_pr7820_device::pioneer_pr7820_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
@@ -27,7 +27,7 @@ pioneer_pr7820_device::pioneer_pr7820_device(const machine_config &mconfig, cons
}
-phillips_22vp932_device::phillips_22vp932_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
- : laserdisc_device(mconfig, PHILLIPS_22VP932, tag, owner, clock)
+philips_22vp932_device::philips_22vp932_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+ : laserdisc_device(mconfig, PHILIPS_22VP932, tag, owner, clock)
{
}
diff --git a/src/devices/machine/ldstub.h b/src/devices/machine/ldstub.h
index 4bf463b897d..9fbc756b240 100644
--- a/src/devices/machine/ldstub.h
+++ b/src/devices/machine/ldstub.h
@@ -17,23 +17,12 @@
//**************************************************************************
-// DEVICE CONFIGURATION MACROS
-//**************************************************************************
-
-#define MCFG_LASERDISC_PR7820_ADD(_tag) \
- MCFG_DEVICE_ADD(_tag, PIONEER_PR7820, 0)
-#define MCFG_LASERDISC_22VP932_ADD(_tag) \
- MCFG_DEVICE_ADD(_tag, PHILLIPS_22VP932, 0)
-
-
-//**************************************************************************
// GLOBAL VARIABLES
//**************************************************************************
// device type definition
-DECLARE_DEVICE_TYPE(PIONEER_PR7820, pioneer_pr7820_device)
-DECLARE_DEVICE_TYPE(PHILLIPS_22VP932, phillips_22vp932_device)
-
+DECLARE_DEVICE_TYPE(PIONEER_PR7820, pioneer_pr7820_device)
+DECLARE_DEVICE_TYPE(PHILIPS_22VP932, philips_22vp932_device)
//**************************************************************************
@@ -63,13 +52,13 @@ protected:
};
-// ======================> phillips_22vp932_device
+// ======================> philips_22vp932_device
-class phillips_22vp932_device : public laserdisc_device
+class philips_22vp932_device : public laserdisc_device
{
public:
// construction/destruction
- phillips_22vp932_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ philips_22vp932_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
// input/output
uint8_t data_r() { return 0; }
diff --git a/src/devices/machine/ldv1000.cpp b/src/devices/machine/ldv1000.cpp
index 4a9b1295b75..4f7a0196e40 100644
--- a/src/devices/machine/ldv1000.cpp
+++ b/src/devices/machine/ldv1000.cpp
@@ -272,7 +272,8 @@ const tiny_rom_entry *pioneer_ldv1000_device::device_rom_region() const
// device_add_mconfig - add device configuration
//-------------------------------------------------
-MACHINE_CONFIG_START(pioneer_ldv1000_device::device_add_mconfig)
+void pioneer_ldv1000_device::device_add_mconfig(machine_config &config)
+{
Z80(config, m_z80_cpu, XTAL(5'000'000)/2);
m_z80_cpu->set_daisy_config(daisy_chain);
m_z80_cpu->set_addrmap(AS_PROGRAM, &pioneer_ldv1000_device::ldv1000_map);
@@ -291,7 +292,7 @@ MACHINE_CONFIG_START(pioneer_ldv1000_device::device_add_mconfig)
ldvppi1.in_pa_callback().set(FUNC(pioneer_ldv1000_device::ppi1_porta_r));
ldvppi1.out_pb_callback().set(FUNC(pioneer_ldv1000_device::ppi1_portb_w));
ldvppi1.out_pc_callback().set(FUNC(pioneer_ldv1000_device::ppi1_portc_w));
-MACHINE_CONFIG_END
+}
//-------------------------------------------------
diff --git a/src/devices/machine/ldv1000.h b/src/devices/machine/ldv1000.h
index 661d0a44f0b..55516da36fe 100644
--- a/src/devices/machine/ldv1000.h
+++ b/src/devices/machine/ldv1000.h
@@ -26,10 +26,6 @@
#define MCFG_LASERDISC_LDV1000_ADD(_tag) \
MCFG_DEVICE_ADD(_tag, PIONEER_LDV1000, 0)
-#define MCFG_LASERDISC_LDV1000_COMMAND_STROBE_CB(_cb) \
- downcast<pioneer_ldv1000_device *>(device)->set_command_strobe_callback(DEVCB_##_cb);
-
-
//**************************************************************************
// GLOBAL VARIABLES
@@ -53,7 +49,7 @@ public:
// construction/destruction
pioneer_ldv1000_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
- template <class cmd_strobe_cb> devcb_base &set_command_strobe_callback(cmd_strobe_cb &&latch) { return m_command_strobe_cb.set_callback(std::forward<cmd_strobe_cb>(latch)); }
+ auto command_strobe_callback() { return m_command_strobe_cb.bind(); }
// input and output
void data_w(uint8_t data);
diff --git a/src/devices/machine/ldvp931.cpp b/src/devices/machine/ldvp931.cpp
index 7a688736a93..4bcb74e1b6a 100644
--- a/src/devices/machine/ldvp931.cpp
+++ b/src/devices/machine/ldvp931.cpp
@@ -45,7 +45,7 @@
//**************************************************************************
// devices
-DEFINE_DEVICE_TYPE(PHILLIPS_22VP931, phillips_22vp931_device, "22vp931", "Phillips 22VP931")
+DEFINE_DEVICE_TYPE(PHILIPS_22VP931, philips_22vp931_device, "22vp931", "Philips 22VP931")
@@ -53,12 +53,12 @@ DEFINE_DEVICE_TYPE(PHILLIPS_22VP931, phillips_22vp931_device, "22vp931", "Philli
// 22VP931 ROM AND MACHINE INTERFACES
//**************************************************************************
-void phillips_22vp931_device::vp931_portmap(address_map &map)
+void philips_22vp931_device::vp931_portmap(address_map &map)
{
- map(0x00, 0x00).mirror(0xcf).rw(FUNC(phillips_22vp931_device::i8049_keypad_r), FUNC(phillips_22vp931_device::i8049_output0_w));
- map(0x10, 0x10).mirror(0xcf).rw(FUNC(phillips_22vp931_device::i8049_unknown_r), FUNC(phillips_22vp931_device::i8049_output1_w));
- map(0x20, 0x20).mirror(0xcf).rw(FUNC(phillips_22vp931_device::i8049_datic_r), FUNC(phillips_22vp931_device::i8049_lcd_w));
- map(0x30, 0x30).mirror(0xcf).rw(FUNC(phillips_22vp931_device::i8049_from_controller_r), FUNC(phillips_22vp931_device::i8049_to_controller_w));
+ map(0x00, 0x00).mirror(0xcf).rw(FUNC(philips_22vp931_device::i8049_keypad_r), FUNC(philips_22vp931_device::i8049_output0_w));
+ map(0x10, 0x10).mirror(0xcf).rw(FUNC(philips_22vp931_device::i8049_unknown_r), FUNC(philips_22vp931_device::i8049_output1_w));
+ map(0x20, 0x20).mirror(0xcf).rw(FUNC(philips_22vp931_device::i8049_datic_r), FUNC(philips_22vp931_device::i8049_lcd_w));
+ map(0x30, 0x30).mirror(0xcf).rw(FUNC(philips_22vp931_device::i8049_from_controller_r), FUNC(philips_22vp931_device::i8049_to_controller_w));
}
@@ -70,15 +70,15 @@ ROM_END
//**************************************************************************
-// PHILLIPS 22VP931 IMPLEMENTATION
+// PHILIPS 22VP931 IMPLEMENTATION
//**************************************************************************
//-------------------------------------------------
-// phillips_22vp931_device - constructor
+// philips_22vp931_device - constructor
//-------------------------------------------------
-phillips_22vp931_device::phillips_22vp931_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
- : laserdisc_device(mconfig, PHILLIPS_22VP931, tag, owner, clock),
+philips_22vp931_device::philips_22vp931_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+ : laserdisc_device(mconfig, PHILIPS_22VP931, tag, owner, clock),
m_i8049_cpu(*this, "vp931"),
m_tracktimer(nullptr),
m_i8049_out0(0),
@@ -103,7 +103,7 @@ phillips_22vp931_device::phillips_22vp931_device(const machine_config &mconfig,
// reset_w - write to the reset line
//-------------------------------------------------
-void phillips_22vp931_device::reset_w(uint8_t data)
+void philips_22vp931_device::reset_w(uint8_t data)
{
// control the CPU state
m_i8049_cpu->set_input_line(INPUT_LINE_RESET, data);
@@ -119,7 +119,7 @@ void phillips_22vp931_device::reset_w(uint8_t data)
// 22VP931
//-------------------------------------------------
-uint8_t phillips_22vp931_device::data_r()
+uint8_t philips_22vp931_device::data_r()
{
// if data is pending, clear the pending flag and notify any callbacks
if (m_tocontroller_pending)
@@ -139,7 +139,7 @@ uint8_t phillips_22vp931_device::data_r()
// device_start - device initialization
//-------------------------------------------------
-void phillips_22vp931_device::device_start()
+void philips_22vp931_device::device_start()
{
// pass through to the parent
laserdisc_device::device_start();
@@ -153,7 +153,7 @@ void phillips_22vp931_device::device_start()
// device_reset - device reset
//-------------------------------------------------
-void phillips_22vp931_device::device_reset()
+void philips_22vp931_device::device_reset()
{
// pass through to the parent
laserdisc_device::device_reset();
@@ -185,7 +185,7 @@ void phillips_22vp931_device::device_reset()
// device
//-------------------------------------------------
-void phillips_22vp931_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
+void philips_22vp931_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
{
switch (id)
{
@@ -276,7 +276,7 @@ void phillips_22vp931_device::device_timer(emu_timer &timer, device_timer_id id,
// ROM region definitions
//-------------------------------------------------
-const tiny_rom_entry *phillips_22vp931_device::device_rom_region() const
+const tiny_rom_entry *philips_22vp931_device::device_rom_region() const
{
return ROM_NAME(vp931);
}
@@ -286,16 +286,16 @@ const tiny_rom_entry *phillips_22vp931_device::device_rom_region() const
// device_add_mconfig - add device configuration
//-------------------------------------------------
-void phillips_22vp931_device::device_add_mconfig(machine_config &config)
+void philips_22vp931_device::device_add_mconfig(machine_config &config)
{
I8049(config, m_i8049_cpu, XTAL(11'000'000));
- m_i8049_cpu->set_addrmap(AS_IO, &phillips_22vp931_device::vp931_portmap);
- m_i8049_cpu->p1_in_cb().set(FUNC(phillips_22vp931_device::i8049_port1_r));
- m_i8049_cpu->p1_out_cb().set(FUNC(phillips_22vp931_device::i8049_port1_w));
- m_i8049_cpu->p2_in_cb().set(FUNC(phillips_22vp931_device::i8049_port2_r));
- m_i8049_cpu->p2_out_cb().set(FUNC(phillips_22vp931_device::i8049_port2_w));
- m_i8049_cpu->t0_in_cb().set(FUNC(phillips_22vp931_device::i8049_t0_r));
- m_i8049_cpu->t1_in_cb().set(FUNC(phillips_22vp931_device::i8049_t1_r));
+ m_i8049_cpu->set_addrmap(AS_IO, &philips_22vp931_device::vp931_portmap);
+ m_i8049_cpu->p1_in_cb().set(FUNC(philips_22vp931_device::i8049_port1_r));
+ m_i8049_cpu->p1_out_cb().set(FUNC(philips_22vp931_device::i8049_port1_w));
+ m_i8049_cpu->p2_in_cb().set(FUNC(philips_22vp931_device::i8049_port2_r));
+ m_i8049_cpu->p2_out_cb().set(FUNC(philips_22vp931_device::i8049_port2_w));
+ m_i8049_cpu->t0_in_cb().set(FUNC(philips_22vp931_device::i8049_t0_r));
+ m_i8049_cpu->t1_in_cb().set(FUNC(philips_22vp931_device::i8049_t1_r));
}
@@ -304,7 +304,7 @@ void phillips_22vp931_device::device_add_mconfig(machine_config &config)
// start of the blanking period
//-------------------------------------------------
-void phillips_22vp931_device::player_vsync(const vbi_metadata &vbi, int fieldnum, const attotime &curtime)
+void philips_22vp931_device::player_vsync(const vbi_metadata &vbi, int fieldnum, const attotime &curtime)
{
// reset our command counter (debugging only)
m_cmdcount = 0;
@@ -320,7 +320,7 @@ void phillips_22vp931_device::player_vsync(const vbi_metadata &vbi, int fieldnum
// the first visible line of the frame
//-------------------------------------------------
-int32_t phillips_22vp931_device::player_update(const vbi_metadata &vbi, int fieldnum, const attotime &curtime)
+int32_t philips_22vp931_device::player_update(const vbi_metadata &vbi, int fieldnum, const attotime &curtime)
{
// set the first VBI timer to go at the start of line 16
timer_set(screen().time_until_pos(16*2), TID_VBI_DATA_FETCH, LASERDISC_CODE_LINE16 << 2);
@@ -335,7 +335,7 @@ int32_t phillips_22vp931_device::player_update(const vbi_metadata &vbi, int fiel
// and other bits
//-------------------------------------------------
-WRITE8_MEMBER( phillips_22vp931_device::i8049_output0_w )
+WRITE8_MEMBER( philips_22vp931_device::i8049_output0_w )
{
/*
$80 = n/c
@@ -374,7 +374,7 @@ WRITE8_MEMBER( phillips_22vp931_device::i8049_output0_w )
// i8049_output1_w - controls scanning behaviors
//-------------------------------------------------
-WRITE8_MEMBER( phillips_22vp931_device::i8049_output1_w )
+WRITE8_MEMBER( philips_22vp931_device::i8049_output1_w )
{
/*
$80 = n/c
@@ -418,7 +418,7 @@ WRITE8_MEMBER( phillips_22vp931_device::i8049_output1_w )
// i8049_lcd_w - vestigial LCD frame display
//-------------------------------------------------
-WRITE8_MEMBER( phillips_22vp931_device::i8049_lcd_w )
+WRITE8_MEMBER( philips_22vp931_device::i8049_lcd_w )
{
/*
Frame number is written as 5 digits here; however, it is not actually
@@ -431,7 +431,7 @@ WRITE8_MEMBER( phillips_22vp931_device::i8049_lcd_w )
// i8049_unknown_r - unknown input port
//-------------------------------------------------
-READ8_MEMBER( phillips_22vp931_device::i8049_unknown_r )
+READ8_MEMBER( philips_22vp931_device::i8049_unknown_r )
{
// only bit $80 is checked and its effects are minor
return 0x00;
@@ -443,7 +443,7 @@ READ8_MEMBER( phillips_22vp931_device::i8049_unknown_r )
// controls
//-------------------------------------------------
-READ8_MEMBER( phillips_22vp931_device::i8049_keypad_r )
+READ8_MEMBER( philips_22vp931_device::i8049_keypad_r )
{
/*
From the code, this is apparently a vestigial keypad with basic controls:
@@ -465,7 +465,7 @@ READ8_MEMBER( phillips_22vp931_device::i8049_keypad_r )
// DATIC circuit
//-------------------------------------------------
-READ8_MEMBER( phillips_22vp931_device::i8049_datic_r )
+READ8_MEMBER( philips_22vp931_device::i8049_datic_r )
{
return m_daticval;
}
@@ -476,7 +476,7 @@ READ8_MEMBER( phillips_22vp931_device::i8049_datic_r )
// external controller wrote
//-------------------------------------------------
-READ8_MEMBER( phillips_22vp931_device::i8049_from_controller_r )
+READ8_MEMBER( philips_22vp931_device::i8049_from_controller_r )
{
// clear the pending flag and return the data
m_fromcontroller_pending = false;
@@ -489,7 +489,7 @@ READ8_MEMBER( phillips_22vp931_device::i8049_from_controller_r )
// the external controller
//-------------------------------------------------
-WRITE8_MEMBER( phillips_22vp931_device::i8049_to_controller_w )
+WRITE8_MEMBER( philips_22vp931_device::i8049_to_controller_w )
{
// set the pending flag and stash the data
m_tocontroller_pending = true;
@@ -508,7 +508,7 @@ WRITE8_MEMBER( phillips_22vp931_device::i8049_to_controller_w )
// i8049_port1_r - read the 8048 I/O port 1
//-------------------------------------------------
-READ8_MEMBER( phillips_22vp931_device::i8049_port1_r )
+READ8_MEMBER( philips_22vp931_device::i8049_port1_r )
{
/*
$80 = P17 = (in) unsure
@@ -527,7 +527,7 @@ READ8_MEMBER( phillips_22vp931_device::i8049_port1_r )
// i8049_port1_w - write the 8048 I/O port 1
//-------------------------------------------------
-WRITE8_MEMBER( phillips_22vp931_device::i8049_port1_w )
+WRITE8_MEMBER( philips_22vp931_device::i8049_port1_w )
{
/*
$10 = P14 = (out) D104 -> /SPEED
@@ -598,7 +598,7 @@ WRITE8_MEMBER( phillips_22vp931_device::i8049_port1_w )
// i8049_port2_r - read from the 8048 I/O port 2
//-------------------------------------------------
-READ8_MEMBER( phillips_22vp931_device::i8049_port2_r )
+READ8_MEMBER( philips_22vp931_device::i8049_port2_r )
{
/*
$80 = P27 = (in) set/reset latch; set by FOC LS, reset by IGR
@@ -619,7 +619,7 @@ READ8_MEMBER( phillips_22vp931_device::i8049_port2_r )
// i8049_port2_w - write the 8048 I/O port 2
//-------------------------------------------------
-WRITE8_MEMBER( phillips_22vp931_device::i8049_port2_w )
+WRITE8_MEMBER( philips_22vp931_device::i8049_port2_w )
{
/*
$40 = P26 = (out) cleared while data is sent back & forth; set afterwards
@@ -633,7 +633,7 @@ WRITE8_MEMBER( phillips_22vp931_device::i8049_port2_w )
// connected to the DATIC's data strobe line
//-------------------------------------------------
-READ_LINE_MEMBER( phillips_22vp931_device::i8049_t0_r )
+READ_LINE_MEMBER( philips_22vp931_device::i8049_t0_r )
{
return m_datastrobe;
}
@@ -645,7 +645,7 @@ READ_LINE_MEMBER( phillips_22vp931_device::i8049_t0_r )
// to count the number of tracks advanced
//-------------------------------------------------
-READ_LINE_MEMBER( phillips_22vp931_device::i8049_t1_r )
+READ_LINE_MEMBER( philips_22vp931_device::i8049_t1_r )
{
return m_trackstate;
}
diff --git a/src/devices/machine/ldvp931.h b/src/devices/machine/ldvp931.h
index 0bf2e263558..fd69f52429e 100644
--- a/src/devices/machine/ldvp931.h
+++ b/src/devices/machine/ldvp931.h
@@ -18,19 +18,11 @@
//**************************************************************************
-// DEVICE CONFIGURATION MACROS
-//**************************************************************************
-
-#define MCFG_LASERDISC_22VP931_ADD(_tag) \
- MCFG_DEVICE_ADD(_tag, PHILLIPS_22VP931, 0)
-
-
-//**************************************************************************
// GLOBAL VARIABLES
//**************************************************************************
// device type definition
-DECLARE_DEVICE_TYPE(PHILLIPS_22VP931, phillips_22vp931_device)
+DECLARE_DEVICE_TYPE(PHILIPS_22VP931, philips_22vp931_device)
@@ -38,17 +30,17 @@ DECLARE_DEVICE_TYPE(PHILLIPS_22VP931, phillips_22vp931_device)
// TYPE DEFINITIONS
//**************************************************************************
-// ======================> phillips_22vp931_device
+// ======================> philips_22vp931_device
// base _22vp931 class
-class phillips_22vp931_device : public laserdisc_device
+class philips_22vp931_device : public laserdisc_device
{
public:
// types
- typedef delegate<void (phillips_22vp931_device &, int)> data_ready_delegate;
+ typedef delegate<void (philips_22vp931_device &, int)> data_ready_delegate;
// construction/destruction
- phillips_22vp931_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ philips_22vp931_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
// input and output
void data_w(uint8_t data) { synchronize(TID_DEFERRED_DATA, data); }
diff --git a/src/devices/machine/legscsi.h b/src/devices/machine/legscsi.h
index fee1b333061..229580bc0bf 100644
--- a/src/devices/machine/legscsi.h
+++ b/src/devices/machine/legscsi.h
@@ -7,8 +7,6 @@
#include "bus/scsi/scsihle.h"
-#define MCFG_LEGACY_SCSI_PORT(_tag) \
- downcast<legacy_scsi_host_adapter &>(*device).set_scsi_port(_tag);
class legacy_scsi_host_adapter : public device_t
{
diff --git a/src/devices/machine/mb8421.cpp b/src/devices/machine/mb8421.cpp
index a5b08f5ea90..e6344843f92 100644
--- a/src/devices/machine/mb8421.cpp
+++ b/src/devices/machine/mb8421.cpp
@@ -129,14 +129,14 @@ void mb8421_master_device::update_intr(offs_t offset)
// (write to 7FF asserts INTR)
//-------------------------------------------------
-WRITE8_MEMBER(mb8421_device::left_w)
+void mb8421_device::left_w(offs_t offset, u8 data)
{
offset &= 0x7ff;
m_ram[offset] = data;
update_intr<read_or_write::WRITE, false>(offset);
}
-WRITE16_MEMBER(mb8421_mb8431_16_device::left_w)
+void mb8421_mb8431_16_device::left_w(offs_t offset, u16 data, u16 mem_mask)
{
offset &= 0x7ff;
COMBINE_DATA(&m_ram[offset]);
@@ -148,14 +148,14 @@ WRITE16_MEMBER(mb8421_mb8431_16_device::left_w)
// (read from 7FE acknowledges INTL)
//-------------------------------------------------
-READ8_MEMBER(mb8421_device::left_r)
+u8 mb8421_device::left_r(offs_t offset)
{
offset &= 0x7ff;
update_intr<read_or_write::READ, false>(offset);
return m_ram[offset];
}
-READ16_MEMBER(mb8421_mb8431_16_device::left_r)
+u16 mb8421_mb8431_16_device::left_r(offs_t offset, u16 mem_mask)
{
offset &= 0x7ff;
update_intr<read_or_write::READ, false>(offset);
@@ -167,14 +167,14 @@ READ16_MEMBER(mb8421_mb8431_16_device::left_r)
// (write to 7FE asserts INTL)
//-------------------------------------------------
-WRITE8_MEMBER(mb8421_device::right_w)
+void mb8421_device::right_w(offs_t offset, u8 data)
{
offset &= 0x7ff;
m_ram[offset] = data;
update_intr<read_or_write::WRITE, true>(offset);
}
-WRITE16_MEMBER(mb8421_mb8431_16_device::right_w)
+void mb8421_mb8431_16_device::right_w(offs_t offset, u16 data, u16 mem_mask)
{
offset &= 0x7ff;
COMBINE_DATA(&m_ram[offset]);
@@ -186,14 +186,14 @@ WRITE16_MEMBER(mb8421_mb8431_16_device::right_w)
// (read from 7FF acknowledges INTR)
//-------------------------------------------------
-READ8_MEMBER(mb8421_device::right_r)
+u8 mb8421_device::right_r(offs_t offset)
{
offset &= 0x7ff;
update_intr<read_or_write::READ, true>(offset);
return m_ram[offset];
}
-READ16_MEMBER(mb8421_mb8431_16_device::right_r)
+u16 mb8421_mb8431_16_device::right_r(offs_t offset, u16 mem_mask)
{
offset &= 0x7ff;
update_intr<read_or_write::READ, true>(offset);
diff --git a/src/devices/machine/mb8421.h b/src/devices/machine/mb8421.h
index 4ef0a010c9b..00e8f8d207f 100644
--- a/src/devices/machine/mb8421.h
+++ b/src/devices/machine/mb8421.h
@@ -108,10 +108,10 @@ public:
u8 peek(offs_t offset) const { return m_ram[offset & 0x7ff]; }
- DECLARE_WRITE8_MEMBER(left_w);
- DECLARE_READ8_MEMBER(left_r);
- DECLARE_WRITE8_MEMBER(right_w);
- DECLARE_READ8_MEMBER(right_r);
+ void left_w(offs_t offset, u8 data);
+ u8 left_r(offs_t offset);
+ void right_w(offs_t offset, u8 data);
+ u8 right_r(offs_t offset);
protected:
mb8421_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock);
@@ -140,10 +140,10 @@ public:
u16 peek(offs_t offset) const { return m_ram[offset & 0x7ff]; }
- DECLARE_WRITE16_MEMBER(left_w);
- DECLARE_READ16_MEMBER(left_r);
- DECLARE_WRITE16_MEMBER(right_w);
- DECLARE_READ16_MEMBER(right_r);
+ void left_w(offs_t offset, u16 data, u16 mem_mask = 0xffff);
+ u16 left_r(offs_t offset, u16 mem_mask = 0xffff);
+ void right_w(offs_t offset, u16 data, u16 mem_mask = 0xffff);
+ u16 right_r(offs_t offset, u16 mem_mask = 0xffff);
protected:
// device-level overrides
diff --git a/src/devices/machine/mc146818.cpp b/src/devices/machine/mc146818.cpp
index 990d6f3ec35..1259e1502ca 100644
--- a/src/devices/machine/mc146818.cpp
+++ b/src/devices/machine/mc146818.cpp
@@ -510,7 +510,7 @@ void mc146818_device::update_irq()
// read - I/O handler for reading
//-------------------------------------------------
-READ8_MEMBER( mc146818_device::read )
+uint8_t mc146818_device::read(offs_t offset)
{
uint8_t data = 0;
switch (offset)
@@ -520,14 +520,14 @@ READ8_MEMBER( mc146818_device::read )
break;
case 1:
- data = read_direct(space, m_index);
+ data = read_direct(m_index);
break;
}
return data;
}
-READ8_MEMBER( mc146818_device::read_direct )
+uint8_t mc146818_device::read_direct(offs_t offset)
{
uint8_t data = 0;
@@ -569,7 +569,7 @@ READ8_MEMBER( mc146818_device::read_direct )
// write - I/O handler for writing
//-------------------------------------------------
-WRITE8_MEMBER( mc146818_device::write )
+void mc146818_device::write(offs_t offset, uint8_t data)
{
switch (offset)
{
@@ -578,12 +578,12 @@ WRITE8_MEMBER( mc146818_device::write )
break;
case 1:
- write_direct(space, m_index, data);
+ write_direct(m_index, data);
break;
}
}
-WRITE8_MEMBER( mc146818_device::write_direct )
+void mc146818_device::write_direct(offs_t offset, uint8_t data)
{
LOG("mc146818_port_w(): offset=0x%02x data=0x%02x\n", offset, data);
diff --git a/src/devices/machine/mc146818.h b/src/devices/machine/mc146818.h
index 499698a84cd..b1431964dde 100644
--- a/src/devices/machine/mc146818.h
+++ b/src/devices/machine/mc146818.h
@@ -39,12 +39,12 @@ public:
void set_binary_year(int bin) { m_binyear = bin; }
// read/write access
- DECLARE_READ8_MEMBER( read );
- DECLARE_WRITE8_MEMBER( write );
+ uint8_t read(offs_t offset);
+ void write(offs_t offset, uint8_t data);
// direct-mapped read/write access
- DECLARE_READ8_MEMBER( read_direct );
- DECLARE_WRITE8_MEMBER( write_direct );
+ uint8_t read_direct(offs_t offset);
+ void write_direct(offs_t offset, uint8_t data);
protected:
mc146818_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
diff --git a/src/devices/machine/mc6843.h b/src/devices/machine/mc6843.h
index 29f3b862bda..63052970edb 100644
--- a/src/devices/machine/mc6843.h
+++ b/src/devices/machine/mc6843.h
@@ -15,8 +15,6 @@
#include "imagedev/flopdrv.h"
-#define MCFG_MC6843_IRQ_CALLBACK(_write) \
- downcast<mc6843_device &>(*device).set_irq_wr_callback(DEVCB_##_write);
class mc6843_device : public device_t
{
diff --git a/src/devices/machine/mc6852.cpp b/src/devices/machine/mc6852.cpp
index d2021a450a2..6d5a9876153 100644
--- a/src/devices/machine/mc6852.cpp
+++ b/src/devices/machine/mc6852.cpp
@@ -147,7 +147,7 @@ void mc6852_device::rcv_complete()
// read -
//-------------------------------------------------
-READ8_MEMBER( mc6852_device::read )
+uint8_t mc6852_device::read(offs_t offset)
{
uint8_t data = 0;
@@ -156,7 +156,8 @@ READ8_MEMBER( mc6852_device::read )
if (m_rx_fifo.size() > 0)
{
data = m_rx_fifo.front();
- m_rx_fifo.pop();
+ if (!machine().side_effects_disabled())
+ m_rx_fifo.pop();
}
}
else
@@ -172,7 +173,7 @@ READ8_MEMBER( mc6852_device::read )
// write -
//-------------------------------------------------
-WRITE8_MEMBER( mc6852_device::write )
+void mc6852_device::write(offs_t offset, uint8_t data)
{
if (BIT(offset, 0))
{
diff --git a/src/devices/machine/mc6852.h b/src/devices/machine/mc6852.h
index 798529db3ef..3f05182ed6f 100644
--- a/src/devices/machine/mc6852.h
+++ b/src/devices/machine/mc6852.h
@@ -32,30 +32,6 @@
//**************************************************************************
-// INTERFACE CONFIGURATION MACROS
-//**************************************************************************
-
-#define MCFG_MC6852_RX_CLOCK(_clock) \
- downcast<mc6852_device &>(*device).set_rx_clock(_clock);
-
-#define MCFG_MC6852_TX_CLOCK(_clock) \
- downcast<mc6852_device &>(*device).set_tx_clock(_clock);
-
-#define MCFG_MC6852_TX_DATA_CALLBACK(_write) \
- downcast<mc6852_device &>(*device).set_tx_data_wr_callback(DEVCB_##_write);
-
-#define MCFG_MC6852_IRQ_CALLBACK(_write) \
- downcast<mc6852_device &>(*device).set_irq_wr_callback(DEVCB_##_write);
-
-#define MCFG_MC6852_SM_DTR_CALLBACK(_write) \
- downcast<mc6852_device &>(*device).set_sm_dtr_wr_callback(DEVCB_##_write);
-
-#define MCFG_MC6852_TUF_CALLBACK(_write) \
- downcast<mc6852_device &>(*device).set_tuf_wr_callback(DEVCB_##_write);
-
-
-
-//**************************************************************************
// TYPE DEFINITIONS
//**************************************************************************
@@ -70,18 +46,14 @@ public:
void set_rx_clock(int clock) { m_rx_clock = clock; }
void set_tx_clock(int clock) { m_tx_clock = clock; }
- template <class Object> devcb_base &set_tx_data_wr_callback(Object &&cb) { return m_write_tx_data.set_callback(std::forward<Object>(cb)); }
- template <class Object> devcb_base &set_irq_wr_callback(Object &&cb) { return m_write_irq.set_callback(std::forward<Object>(cb)); }
- template <class Object> devcb_base &set_sm_dtr_wr_callback(Object &&cb) { return m_write_sm_dtr.set_callback(std::forward<Object>(cb)); }
- template <class Object> devcb_base &set_tuf_wr_callback(Object &&cb) { return m_write_tuf.set_callback(std::forward<Object>(cb)); }
auto tx_data_callback() { return m_write_tx_data.bind(); }
auto irq_callback() { return m_write_irq.bind(); }
auto sm_dtr_callback() { return m_write_sm_dtr.bind(); }
auto tuf_callback() { return m_write_tuf.bind(); }
- DECLARE_READ8_MEMBER( read );
- DECLARE_WRITE8_MEMBER( write );
+ uint8_t read(offs_t offset);
+ void write(offs_t offset, uint8_t data);
DECLARE_WRITE_LINE_MEMBER( rx_data_w ) { device_serial_interface::rx_w(state); }
DECLARE_WRITE_LINE_MEMBER( rx_clk_w ) { rx_clock_w(state); }
diff --git a/src/devices/machine/mc6854.cpp b/src/devices/machine/mc6854.cpp
index 43e09eba5d2..acaa74b0cf9 100644
--- a/src/devices/machine/mc6854.cpp
+++ b/src/devices/machine/mc6854.cpp
@@ -809,7 +809,7 @@ void mc6854_device::update_sr1( )
-READ8_MEMBER( mc6854_device::read )
+uint8_t mc6854_device::read(offs_t offset)
{
switch ( offset )
{
@@ -850,7 +850,7 @@ READ8_MEMBER( mc6854_device::read )
-WRITE8_MEMBER( mc6854_device::write )
+void mc6854_device::write(offs_t offset, uint8_t data)
{
switch ( offset )
{
diff --git a/src/devices/machine/mc6854.h b/src/devices/machine/mc6854.h
index 99f09f5d3a7..0f90544336b 100644
--- a/src/devices/machine/mc6854.h
+++ b/src/devices/machine/mc6854.h
@@ -40,8 +40,8 @@ public:
}
/* interface to CPU via address/data bus*/
- DECLARE_READ8_MEMBER( read );
- DECLARE_WRITE8_MEMBER( write );
+ uint8_t read(offs_t offset);
+ void write(offs_t offset, uint8_t data);
/* low-level, bit-based interface */
DECLARE_WRITE_LINE_MEMBER( set_rx );
diff --git a/src/devices/machine/mc68681.cpp b/src/devices/machine/mc68681.cpp
index b60567aa3f7..a3a3b480979 100644
--- a/src/devices/machine/mc68681.cpp
+++ b/src/devices/machine/mc68681.cpp
@@ -268,22 +268,25 @@ void xr68c681_device::device_reset()
m_XTXA = m_XRXA = m_XTXB = m_XRXB = false;
}
-MACHINE_CONFIG_START(duart_base_device::device_add_mconfig)
- MCFG_DEVICE_ADD(CHANA_TAG, DUART_CHANNEL, 0)
- MCFG_DEVICE_ADD(CHANB_TAG, DUART_CHANNEL, 0)
-MACHINE_CONFIG_END
-
-MACHINE_CONFIG_START(sc28c94_device::device_add_mconfig)
- MCFG_DEVICE_ADD(CHANA_TAG, DUART_CHANNEL, 0)
- MCFG_DEVICE_ADD(CHANB_TAG, DUART_CHANNEL, 0)
- MCFG_DEVICE_ADD(CHANC_TAG, DUART_CHANNEL, 0)
- MCFG_DEVICE_ADD(CHAND_TAG, DUART_CHANNEL, 0)
-MACHINE_CONFIG_END
-
-MACHINE_CONFIG_START(mc68340_duart_device::device_add_mconfig)
- MCFG_DEVICE_ADD(CHANA_TAG, DUART_CHANNEL, 0)
- MCFG_DEVICE_ADD(CHANB_TAG, DUART_CHANNEL, 0)
-MACHINE_CONFIG_END
+void duart_base_device::device_add_mconfig(machine_config &config)
+{
+ DUART_CHANNEL(config, CHANA_TAG, 0);
+ DUART_CHANNEL(config, CHANB_TAG, 0);
+}
+
+void sc28c94_device::device_add_mconfig(machine_config &config)
+{
+ DUART_CHANNEL(config, CHANA_TAG, 0);
+ DUART_CHANNEL(config, CHANB_TAG, 0);
+ DUART_CHANNEL(config, CHANC_TAG, 0);
+ DUART_CHANNEL(config, CHAND_TAG, 0);
+}
+
+void mc68340_duart_device::device_add_mconfig(machine_config &config)
+{
+ DUART_CHANNEL(config, CHANA_TAG, 0);
+ DUART_CHANNEL(config, CHANB_TAG, 0);
+}
void duart_base_device::update_interrupts()
{
diff --git a/src/devices/machine/mc68681.h b/src/devices/machine/mc68681.h
index ea4fd63e3af..50e5cdd1489 100644
--- a/src/devices/machine/mc68681.h
+++ b/src/devices/machine/mc68681.h
@@ -7,32 +7,6 @@
#include "diserial.h"
-#define MCFG_MC68681_IRQ_CALLBACK(_cb) \
- downcast<duart_base_device &>(*device).set_irq_cb(DEVCB_##_cb);
-
-#define MCFG_MC68681_A_TX_CALLBACK(_cb) \
- downcast<duart_base_device &>(*device).set_a_tx_cb(DEVCB_##_cb);
-
-#define MCFG_MC68681_B_TX_CALLBACK(_cb) \
- downcast<duart_base_device &>(*device).set_b_tx_cb(DEVCB_##_cb);
-
-// deprecated: use ipX_w() instead
-#define MCFG_MC68681_INPORT_CALLBACK(_cb) \
- downcast<duart_base_device &>(*device).set_inport_cb(DEVCB_##_cb);
-
-#define MCFG_MC68681_OUTPORT_CALLBACK(_cb) \
- downcast<duart_base_device &>(*device).set_outport_cb(DEVCB_##_cb);
-
-#define MCFG_MC68681_SET_EXTERNAL_CLOCKS(_a, _b, _c, _d) \
- downcast<duart_base_device &>(*device).set_clocks(_a, _b, _c, _d);
-
-// SC28C94 specific callbacks
-#define MCFG_SC28C94_C_TX_CALLBACK(_cb) \
- downcast<sc28c94_device &>(*device).set_c_tx_cb(DEVCB_##_cb);
-
-#define MCFG_SC28C94_D_TX_CALLBACK(_cb) \
- downcast<sc28c94_device &>(*device).set_d_tx_cb(DEVCB_##_cb);
-
#define MC68681_RX_FIFO_SIZE 3
// forward declaration
@@ -127,15 +101,10 @@ public:
DECLARE_WRITE_LINE_MEMBER(rx_a_w) { m_chanA->device_serial_interface::rx_w((uint8_t)state); }
DECLARE_WRITE_LINE_MEMBER(rx_b_w) { m_chanB->device_serial_interface::rx_w((uint8_t)state); }
- template <class Object> devcb_base &set_irq_cb(Object &&cb) { return write_irq.set_callback(std::forward<Object>(cb)); }
- template <class Object> devcb_base &set_a_tx_cb(Object &&cb) { return write_a_tx.set_callback(std::forward<Object>(cb)); }
- template <class Object> devcb_base &set_b_tx_cb(Object &&cb) { return write_b_tx.set_callback(std::forward<Object>(cb)); }
- template <class Object> devcb_base &set_inport_cb(Object &&cb) { return read_inport.set_callback(std::forward<Object>(cb)); }
- template <class Object> devcb_base &set_outport_cb(Object &&cb) { return write_outport.set_callback(std::forward<Object>(cb)); }
auto irq_cb() { return write_irq.bind(); }
auto a_tx_cb() { return write_a_tx.bind(); }
auto b_tx_cb() { return write_b_tx.bind(); }
- auto inport_cb() { return read_inport.bind(); }
+ auto inport_cb() { return read_inport.bind(); } // deprecated: use ipX_w() instead
auto outport_cb() { return write_outport.bind(); }
// new-style push handlers for input port bits
@@ -247,8 +216,8 @@ class sc28c94_device : public duart_base_device
public:
sc28c94_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
- template <class Object> devcb_base &set_c_tx_cb(Object &&cb) { return write_c_tx.set_callback(std::forward<Object>(cb)); }
- template <class Object> devcb_base &set_d_tx_cb(Object &&cb) { return write_d_tx.set_callback(std::forward<Object>(cb)); }
+ auto c_tx_cb() { return write_c_tx.bind(); }
+ auto d_tx_cb() { return write_d_tx.bind(); }
DECLARE_WRITE_LINE_MEMBER(rx_c_w) { m_chanC->device_serial_interface::rx_w((uint8_t)state); }
DECLARE_WRITE_LINE_MEMBER(rx_d_w) { m_chanD->device_serial_interface::rx_w((uint8_t)state); }
diff --git a/src/devices/machine/mccs1850.h b/src/devices/machine/mccs1850.h
index bd7771bc6a0..62b7f5d5afc 100644
--- a/src/devices/machine/mccs1850.h
+++ b/src/devices/machine/mccs1850.h
@@ -25,22 +25,6 @@
#include "dirtc.h"
-
-//**************************************************************************
-// INTERFACE CONFIGURATION MACROS
-//**************************************************************************
-
-#define MCFG_MCCS1850_INT_CALLBACK(_write) \
- downcast<mccs1850_device &>(*device).set_int_wr_callback(DEVCB_##_write);
-
-#define MCFG_MCCS1850_PSE_CALLBACK(_write) \
- downcast<mccs1850_device &>(*device).set_pse_wr_callback(DEVCB_##_write);
-
-#define MCFG_MCCS1850_NUC_CALLBACK(_write) \
- downcast<mccs1850_device &>(*device).set_nuc_wr_callback(DEVCB_##_write);
-
-
-
//**************************************************************************
// TYPE DEFINITIONS
//**************************************************************************
@@ -55,9 +39,9 @@ public:
// construction/destruction
mccs1850_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
- template <class Object> devcb_base &set_int_wr_callback(Object &&cb) { return int_cb.set_callback(std::forward<Object>(cb)); }
- template <class Object> devcb_base &set_pse_wr_callback(Object &&cb) { return pse_cb.set_callback(std::forward<Object>(cb)); }
- template <class Object> devcb_base &set_nuc_wr_callback(Object &&cb) { return nuc_cb.set_callback(std::forward<Object>(cb)); }
+ auto int_wr_callback() { return int_cb.bind(); }
+ auto pse_wr_callback() { return pse_cb.bind(); }
+ auto nuc_wr_callback() { return nuc_cb.bind(); }
DECLARE_WRITE_LINE_MEMBER( ce_w );
DECLARE_WRITE_LINE_MEMBER( sck_w );
diff --git a/src/devices/machine/mcf5206e.cpp b/src/devices/machine/mcf5206e.cpp
index 085afac92ec..cea38ca7f0f 100644
--- a/src/devices/machine/mcf5206e.cpp
+++ b/src/devices/machine/mcf5206e.cpp
@@ -826,7 +826,7 @@ DEFINE_DEVICE_TYPE(MCF5206E_PERIPHERAL, mcf5206e_peripheral_device, "mcf5206e_pe
mcf5206e_peripheral_device::mcf5206e_peripheral_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: device_t(mconfig, MCF5206E_PERIPHERAL, tag, owner, clock),
device_memory_interface(mconfig, *this),
- m_space_config("coldfire_regs", ENDIANNESS_BIG, 32,10, 0, address_map_constructor(), address_map_constructor(FUNC(mcf5206e_peripheral_device::coldfire_regs_map), this))
+ m_space_config("coldfire_regs", ENDIANNESS_BIG, 32,10, 0, address_map_constructor(FUNC(mcf5206e_peripheral_device::coldfire_regs_map), this))
{
}
diff --git a/src/devices/machine/mcf5206e.h b/src/devices/machine/mcf5206e.h
index 3bf54bbefd5..a910849a25d 100644
--- a/src/devices/machine/mcf5206e.h
+++ b/src/devices/machine/mcf5206e.h
@@ -12,15 +12,6 @@
#pragma once
-
-
-/***************************************************************************
- DEVICE CONFIGURATION MACROS
-***************************************************************************/
-
-#define MCFG_MCF5206E_PERIPHERAL_ADD(_tag) \
- MCFG_DEVICE_ADD(_tag, MCF5206E_PERIPHERAL, 0)
-
/***************************************************************************
TYPE DEFINITIONS
***************************************************************************/
diff --git a/src/devices/machine/meters.h b/src/devices/machine/meters.h
index 1a349f82485..c9a11790931 100644
--- a/src/devices/machine/meters.h
+++ b/src/devices/machine/meters.h
@@ -15,9 +15,6 @@
#pragma once
-#define MCFG_METERS_NUMBER(_number) \
- downcast<meters_device &>(*device).set_number_meters(_number);
-
class meters_device : public device_t
{
public:
@@ -27,7 +24,7 @@ public:
meters_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
- void set_number_meters(int number) { m_number_mtr = number; }
+ void set_number(int number) { m_number_mtr = number; }
int update(int id, int state);
int GetActivity(int id);
diff --git a/src/devices/machine/microtch.h b/src/devices/machine/microtch.h
index 592b0a669da..0cb486aa3f1 100644
--- a/src/devices/machine/microtch.h
+++ b/src/devices/machine/microtch.h
@@ -13,15 +13,14 @@ class microtouch_device :
{
public:
microtouch_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
- template <class Object> devcb_base &set_stx_callback(Object &&cb) { return m_out_stx_func.set_callback(std::forward<Object>(cb)); }
auto stx() { return m_out_stx_func.bind(); }
virtual ioport_constructor device_input_ports() const override;
DECLARE_WRITE_LINE_MEMBER(rx) { device_serial_interface::rx_w(state); }
DECLARE_INPUT_CHANGED_MEMBER(touch);
- typedef delegate<int (int *, int *)> touch_cb;
- template <typename Object> void set_touch_callback(Object &&cb) { m_out_touch_cb = std::forward<Object>(cb); }
+ typedef device_delegate<int (int *, int *)> touch_cb;
+ template <typename... T> void set_touch_callback(T &&... args) { m_out_touch_cb = touch_cb(std::forward<T>(args)...); }
protected:
virtual void device_start() override;
@@ -73,11 +72,4 @@ private:
DECLARE_DEVICE_TYPE(MICROTOUCH, microtouch_device)
-#define MCFG_MICROTOUCH_ADD(_tag, _clock, _devcb) \
- MCFG_DEVICE_ADD(_tag, MICROTOUCH, _clock) \
- downcast<microtouch_device &>(*device).set_stx_callback(DEVCB_##_devcb);
-
-#define MCFG_MICROTOUCH_TOUCH_CB(_class, _touch_cb) \
- downcast<microtouch_device &>(*device).set_touch_callback(microtouch_device::touch_cb(&_class::_touch_cb, this));
-
#endif // MAME_MACHINE_MICROTCH_H
diff --git a/src/devices/machine/mm5740.h b/src/devices/machine/mm5740.h
index e28fbdc0956..1896f568e4c 100644
--- a/src/devices/machine/mm5740.h
+++ b/src/devices/machine/mm5740.h
@@ -80,23 +80,6 @@ Vgg 18 -12V
//**************************************************************************
-// INTERFACE CONFIGURATION MACROS
-//**************************************************************************
-
-#define MCFG_MM5740_MATRIX_X1(_cb) downcast<mm5740_device &>(*device).set_x_cb<0>(DEVCB_##_cb);
-#define MCFG_MM5740_MATRIX_X2(_cb) downcast<mm5740_device &>(*device).set_x_cb<1>(DEVCB_##_cb);
-#define MCFG_MM5740_MATRIX_X3(_cb) downcast<mm5740_device &>(*device).set_x_cb<2>(DEVCB_##_cb);
-#define MCFG_MM5740_MATRIX_X4(_cb) downcast<mm5740_device &>(*device).set_x_cb<3>(DEVCB_##_cb);
-#define MCFG_MM5740_MATRIX_X5(_cb) downcast<mm5740_device &>(*device).set_x_cb<4>(DEVCB_##_cb);
-#define MCFG_MM5740_MATRIX_X6(_cb) downcast<mm5740_device &>(*device).set_x_cb<5>(DEVCB_##_cb);
-#define MCFG_MM5740_MATRIX_X7(_cb) downcast<mm5740_device &>(*device).set_x_cb<6>(DEVCB_##_cb);
-#define MCFG_MM5740_MATRIX_X8(_cb) downcast<mm5740_device &>(*device).set_x_cb<7>(DEVCB_##_cb);
-#define MCFG_MM5740_MATRIX_X9(_cb) downcast<mm5740_device &>(*device).set_x_cb<8>(DEVCB_##_cb);
-#define MCFG_MM5740_SHIFT_CB(_cb) downcast<mm5740_device &>(*device).set_shift_cb(DEVCB_##_cb);
-#define MCFG_MM5740_CONTROL_CB(_cb) downcast<mm5740_device &>(*device).set_control_cb(DEVCB_##_cb);
-#define MCFG_MM5740_DATA_READY_CB(_cb) downcast<mm5740_device &>(*device).set_data_ready_cb(DEVCB_##_cb);
-
-//**************************************************************************
// TYPE DEFINITIONS
//**************************************************************************
@@ -111,22 +94,11 @@ public:
// public interface
uint16_t b_r();
- template <unsigned N, typename Object> devcb_base &set_x_cb(Object &&cb)
- {
- return m_read_x[N].set_callback(std::forward<Object>(cb));
- }
- template <typename Object> devcb_base &set_shift_cb(Object &&cb)
- {
- return m_read_shift.set_callback(std::forward<Object>(cb));
- }
- template <typename Object> devcb_base &set_control_cb(Object &&cb)
- {
- return m_read_control.set_callback(std::forward<Object>(cb));
- }
- template <typename Object> devcb_base &set_data_ready_cb(Object &&cb)
- {
- return m_write_data_ready.set_callback(std::forward<Object>(cb));
- }
+ template <unsigned N> auto x_cb() { return m_read_x[N].bind(); }
+ auto shift_cb() { return m_read_shift.bind(); }
+ auto control_cb() { return m_read_control.bind(); }
+ auto data_ready_cb() { return m_write_data_ready.bind(); }
+
static uint32_t calc_effective_clock_key_debounce(uint32_t capacitance);
protected:
diff --git a/src/devices/machine/mm58167.cpp b/src/devices/machine/mm58167.cpp
index 22b49f4a7dd..f226590e9d2 100644
--- a/src/devices/machine/mm58167.cpp
+++ b/src/devices/machine/mm58167.cpp
@@ -180,7 +180,7 @@ void mm58167_device::update_rtc()
m_milliseconds = (bcd_to_integer(m_regs[R_CNT_HUNDTENTHS]) * 10) + (bcd_to_integer(m_regs[R_CNT_MILLISECONDS] >> 4) % 10);
}
-READ8_MEMBER(mm58167_device::read)
+uint8_t mm58167_device::read(offs_t offset)
{
// printf("read reg %x = %02x\n", offset, m_regs[offset]);
@@ -196,7 +196,7 @@ READ8_MEMBER(mm58167_device::read)
return m_regs[offset];
}
-WRITE8_MEMBER(mm58167_device::write)
+void mm58167_device::write(offs_t offset, uint8_t data)
{
// printf("%02x to reg %x\n", data, offset);
diff --git a/src/devices/machine/mm58167.h b/src/devices/machine/mm58167.h
index 2c6bb5add34..c12b151b676 100644
--- a/src/devices/machine/mm58167.h
+++ b/src/devices/machine/mm58167.h
@@ -15,14 +15,6 @@
//**************************************************************************
-// INTERFACE CONFIGURATION MACROS
-//**************************************************************************
-
-#define MCFG_MM58167_IRQ_CALLBACK(_cb) \
- downcast<mm58167_device &>(*device).set_irq_cb(DEVCB_##_cb);
-
-
-//**************************************************************************
// TYPE DEFINITIONS
//**************************************************************************
@@ -35,10 +27,9 @@ public:
// construction/destruction
mm58167_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
- DECLARE_READ8_MEMBER(read);
- DECLARE_WRITE8_MEMBER(write);
+ uint8_t read(offs_t offset);
+ void write(offs_t offset, uint8_t data);
- template <class Object> devcb_base &set_irq_cb(Object &&wr) { return m_irq_w.set_callback(std::forward<Object>(wr)); }
auto irq() { return m_irq_w.bind(); }
devcb_write_line m_irq_w;
diff --git a/src/devices/machine/mm58274c.cpp b/src/devices/machine/mm58274c.cpp
index 61904923326..c7e7f49a78e 100644
--- a/src/devices/machine/mm58274c.cpp
+++ b/src/devices/machine/mm58274c.cpp
@@ -152,7 +152,7 @@ attotime mm58274c_device::interrupt_period_table(int val)
}
}
-READ8_MEMBER( mm58274c_device::read )
+uint8_t mm58274c_device::read(offs_t offset)
{
int reply;
@@ -242,7 +242,7 @@ READ8_MEMBER( mm58274c_device::read )
}
-WRITE8_MEMBER( mm58274c_device::write )
+void mm58274c_device::write(offs_t offset, uint8_t data)
{
offset &= 0xf;
data &= 0xf;
diff --git a/src/devices/machine/mm58274c.h b/src/devices/machine/mm58274c.h
index cee2df48db9..c6fcbee3c46 100644
--- a/src/devices/machine/mm58274c.h
+++ b/src/devices/machine/mm58274c.h
@@ -16,8 +16,8 @@ public:
void set_day1(int day) { m_day1 = day; }
void set_mode_and_day(int mode, int day) { m_mode24 = mode; m_day1 = day; }
- DECLARE_READ8_MEMBER(read);
- DECLARE_WRITE8_MEMBER(write);
+ uint8_t read(offs_t offset);
+ void write(offs_t offset, uint8_t data);
TIMER_CALLBACK_MEMBER(rtc_increment_cb);
TIMER_CALLBACK_MEMBER(rtc_interrupt_cb);
@@ -30,7 +30,7 @@ protected:
private:
// internal state
- // Initializion the clock chip:
+ // Initialization of the clock chip:
// m_day1 must be set to a value from 0 (sunday), 1 (monday)...
// to 6 (saturday) and is needed to correctly retrieve the
// day-of-week from the host system clock.
@@ -66,15 +66,4 @@ private:
DECLARE_DEVICE_TYPE(MM58274C, mm58274c_device)
-
-/***************************************************************************
- DEVICE CONFIGURATION MACROS
-***************************************************************************/
-
-#define MCFG_MM58274C_MODE24(_mode) \
- downcast<mm58274c_device &>(*device).set_mode24(_mode);
-
-#define MCFG_MM58274C_DAY1(_day) \
- downcast<mm58274c_device &>(*device).set_day1(_day);
-
#endif // MAME_MACHINE_MM58274C_H
diff --git a/src/devices/machine/mm74c922.h b/src/devices/machine/mm74c922.h
index bd448c2eb22..dce81dd40dc 100644
--- a/src/devices/machine/mm74c922.h
+++ b/src/devices/machine/mm74c922.h
@@ -36,38 +36,6 @@
#pragma once
-
-
-//**************************************************************************
-// INTERFACE CONFIGURATION MACROS
-//**************************************************************************
-
-#define MCFG_MM74C922_OSC(_value) \
- downcast<mm74c922_device &>(*device).set_cap_osc(_value);
-
-#define MCFG_MM74C922_DEBOUNCE(_value) \
- downcast<mm74c922_device &>(*device).set_cap_debounce(_value);
-
-#define MCFG_MM74C922_DA_CALLBACK(_write) \
- downcast<mm74c922_device &>(*device).set_da_wr_callback(DEVCB_##_write);
-
-#define MCFG_MM74C922_X1_CALLBACK(_read) \
- downcast<mm74c922_device &>(*device).set_x1_rd_callback(DEVCB_##_read);
-
-#define MCFG_MM74C922_X2_CALLBACK(_read) \
- downcast<mm74c922_device &>(*device).set_x2_rd_callback(DEVCB_##_read);
-
-#define MCFG_MM74C922_X3_CALLBACK(_read) \
- downcast<mm74c922_device &>(*device).set_x3_rd_callback(DEVCB_##_read);
-
-#define MCFG_MM74C922_X4_CALLBACK(_read) \
- downcast<mm74c922_device &>(*device).set_x4_rd_callback(DEVCB_##_read);
-
-#define MCFG_MM74C922_X5_CALLBACK(_read) \
- downcast<mm74c922_device &>(*device).set_x5_rd_callback(DEVCB_##_read);
-
-
-
//**************************************************************************
// TYPE DEFINITIONS
//**************************************************************************
@@ -83,12 +51,12 @@ public:
void set_cap_osc(double value) { m_cap_osc = value; }
void set_cap_debounce(double value) { m_cap_debounce = value; }
- template <class Object> devcb_base &set_da_wr_callback(Object &&cb) { return m_write_da.set_callback(std::forward<Object>(cb)); }
- template <class Object> devcb_base &set_x1_rd_callback(Object &&cb) { return m_read_x1.set_callback(std::forward<Object>(cb)); }
- template <class Object> devcb_base &set_x2_rd_callback(Object &&cb) { return m_read_x2.set_callback(std::forward<Object>(cb)); }
- template <class Object> devcb_base &set_x3_rd_callback(Object &&cb) { return m_read_x3.set_callback(std::forward<Object>(cb)); }
- template <class Object> devcb_base &set_x4_rd_callback(Object &&cb) { return m_read_x4.set_callback(std::forward<Object>(cb)); }
- template <class Object> devcb_base &set_x5_rd_callback(Object &&cb) { return m_read_x5.set_callback(std::forward<Object>(cb)); }
+ auto da_wr_callback() { return m_write_da.bind(); }
+ auto x1_rd_callback() { return m_read_x1.bind(); }
+ auto x2_rd_callback() { return m_read_x2.bind(); }
+ auto x3_rd_callback() { return m_read_x3.bind(); }
+ auto x4_rd_callback() { return m_read_x4.bind(); }
+ auto x5_rd_callback() { return m_read_x5.bind(); }
uint8_t read();
diff --git a/src/devices/machine/mos6526.cpp b/src/devices/machine/mos6526.cpp
index 9df653c4c5f..e1f40b109c1 100644
--- a/src/devices/machine/mos6526.cpp
+++ b/src/devices/machine/mos6526.cpp
@@ -788,7 +788,7 @@ void mos6526_device::execute_run()
// read -
//-------------------------------------------------
-READ8_MEMBER( mos6526_device::read )
+uint8_t mos6526_device::read(offs_t offset)
{
uint8_t data = 0;
@@ -926,7 +926,7 @@ READ8_MEMBER( mos6526_device::read )
return data;
}
-READ8_MEMBER( mos8520_device::read )
+uint8_t mos8520_device::read(offs_t offset)
{
uint8_t data;
@@ -947,7 +947,7 @@ READ8_MEMBER( mos8520_device::read )
break;
default:
- data = mos6526_device::read(space, offset);
+ data = mos6526_device::read(offset);
}
return data;
@@ -957,7 +957,7 @@ READ8_MEMBER( mos8520_device::read )
// write -
//-------------------------------------------------
-WRITE8_MEMBER( mos6526_device::write )
+void mos6526_device::write(offs_t offset, uint8_t data)
{
switch (offset & 0x0f)
{
@@ -1099,12 +1099,12 @@ WRITE8_MEMBER( mos6526_device::write )
}
}
-WRITE8_MEMBER( mos8520_device::write )
+void mos8520_device::write(offs_t offset, uint8_t data)
{
switch (offset & 0x0f)
{
default:
- mos6526_device::write(space, offset, data);
+ mos6526_device::write(offset, data);
break;
case TOD_MIN:
diff --git a/src/devices/machine/mos6526.h b/src/devices/machine/mos6526.h
index 07001edf4d6..33ccc6dd26d 100644
--- a/src/devices/machine/mos6526.h
+++ b/src/devices/machine/mos6526.h
@@ -61,41 +61,6 @@
#pragma once
-
-
-//**************************************************************************
-// INTERFACE CONFIGURATION MACROS
-//**************************************************************************
-
-#define MCFG_MOS6526_TOD(_clock) \
- downcast<mos6526_device &>(*device).set_tod_clock(_clock);
-
-#define MCFG_MOS6526_IRQ_CALLBACK(_write) \
- downcast<mos6526_device &>(*device).set_irq_wr_callback(DEVCB_##_write);
-
-#define MCFG_MOS6526_CNT_CALLBACK(_write) \
- downcast<mos6526_device &>(*device).set_cnt_wr_callback(DEVCB_##_write);
-
-#define MCFG_MOS6526_SP_CALLBACK(_write) \
- downcast<mos6526_device &>(*device).set_sp_wr_callback(DEVCB_##_write);
-
-#define MCFG_MOS6526_PA_INPUT_CALLBACK(_read) \
- downcast<mos6526_device &>(*device).set_pa_rd_callback(DEVCB_##_read);
-
-#define MCFG_MOS6526_PA_OUTPUT_CALLBACK(_write) \
- downcast<mos6526_device &>(*device).set_pa_wr_callback(DEVCB_##_write);
-
-#define MCFG_MOS6526_PB_INPUT_CALLBACK(_read) \
- downcast<mos6526_device &>(*device).set_pb_rd_callback(DEVCB_##_read);
-
-#define MCFG_MOS6526_PB_OUTPUT_CALLBACK(_write) \
- downcast<mos6526_device &>(*device).set_pb_wr_callback(DEVCB_##_write);
-
-#define MCFG_MOS6526_PC_CALLBACK(_write) \
- downcast<mos6526_device &>(*device).set_pc_wr_callback(DEVCB_##_write);
-
-
-
//**************************************************************************
// TYPE DEFINITIONS
//**************************************************************************
@@ -111,14 +76,6 @@ public:
void set_tod_clock(int clock) { m_tod_clock = clock; }
- template <class Object> devcb_base &set_irq_wr_callback(Object &&cb) { return m_write_irq.set_callback(std::forward<Object>(cb)); }
- template <class Object> devcb_base &set_cnt_wr_callback(Object &&cb) { return m_write_cnt.set_callback(std::forward<Object>(cb)); }
- template <class Object> devcb_base &set_sp_wr_callback(Object &&cb) { return m_write_sp.set_callback(std::forward<Object>(cb)); }
- template <class Object> devcb_base &set_pa_rd_callback(Object &&cb) { return m_read_pa.set_callback(std::forward<Object>(cb)); }
- template <class Object> devcb_base &set_pa_wr_callback(Object &&cb) { return m_write_pa.set_callback(std::forward<Object>(cb)); }
- template <class Object> devcb_base &set_pb_rd_callback(Object &&cb) { return m_read_pb.set_callback(std::forward<Object>(cb)); }
- template <class Object> devcb_base &set_pb_wr_callback(Object &&cb) { return m_write_pb.set_callback(std::forward<Object>(cb)); }
- template <class Object> devcb_base &set_pc_wr_callback(Object &&cb) { return m_write_pc.set_callback(std::forward<Object>(cb)); }
auto irq_wr_callback() { return m_write_irq.bind(); }
auto cnt_wr_callback() { return m_write_cnt.bind(); }
auto sp_wr_callback() { return m_write_sp.bind(); }
@@ -128,13 +85,11 @@ public:
auto pb_wr_callback() { return m_write_pb.bind(); }
auto pc_wr_callback() { return m_write_pc.bind(); }
- DECLARE_READ8_MEMBER( read );
- DECLARE_WRITE8_MEMBER( write );
+ uint8_t read(offs_t offset);
+ void write(offs_t offset, uint8_t data);
- uint8_t read_pa() { return m_pa; }
- DECLARE_READ8_MEMBER( pa_r ) { return m_pa; }
- uint8_t read_pb() { return m_pb; }
- DECLARE_READ8_MEMBER( pb_r ) { return m_pb; }
+ uint8_t pa_r() { return m_pa; }
+ uint8_t pb_r() { return m_pb; }
DECLARE_READ_LINE_MEMBER( sp_r ) { return m_sp; }
DECLARE_WRITE_LINE_MEMBER( sp_w );
@@ -273,8 +228,8 @@ class mos8520_device : public mos6526_device
public:
mos8520_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
- DECLARE_READ8_MEMBER( read );
- DECLARE_WRITE8_MEMBER( write );
+ uint8_t read(offs_t offset);
+ void write(offs_t offset, uint8_t data);
protected:
virtual inline void clock_tod() override;
@@ -288,8 +243,8 @@ class mos5710_device : public mos6526_device
public:
mos5710_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
- //DECLARE_READ8_MEMBER( read );
- //DECLARE_WRITE8_MEMBER( write );
+ //uint8_t read(offs_t offset);
+ //void write(offs_t offset, uint8_t data);
};
diff --git a/src/devices/machine/mos6530.h b/src/devices/machine/mos6530.h
index cc930fa8613..6bbeb8db9de 100644
--- a/src/devices/machine/mos6530.h
+++ b/src/devices/machine/mos6530.h
@@ -48,10 +48,10 @@ class mos6530_device : public device_t
public:
mos6530_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
- template <class Object> devcb_base &set_in_pa_callback(Object &&cb) { return m_in_pa_cb.set_callback(std::forward<Object>(cb)); }
- template <class Object> devcb_base &set_out_pa_callback(Object &&cb) { return m_out_pa_cb.set_callback(std::forward<Object>(cb)); }
- template <class Object> devcb_base &set_in_pb_callback(Object &&cb) { return m_in_pb_cb.set_callback(std::forward<Object>(cb)); }
- template <class Object> devcb_base &set_out_pb_callback(Object &&cb) { return m_out_pb_cb.set_callback(std::forward<Object>(cb)); }
+ auto in_pa_callback() { return m_in_pa_cb.bind(); }
+ auto out_pa_callback() { return m_out_pa_cb.bind(); }
+ auto in_pb_callback() { return m_in_pb_cb.bind(); }
+ auto out_pb_callback() { return m_out_pb_cb.bind(); }
DECLARE_READ8_MEMBER( read );
DECLARE_WRITE8_MEMBER( write );
@@ -108,17 +108,4 @@ private:
DECLARE_DEVICE_TYPE(MOS6530, mos6530_device)
-
-#define MCFG_MOS6530_IN_PA_CB(_devcb) \
- downcast<mos6530_device &>(*device).set_in_pa_callback(DEVCB_##_devcb);
-
-#define MCFG_MOS6530_OUT_PA_CB(_devcb) \
- downcast<mos6530_device &>(*device).set_out_pa_callback(DEVCB_##_devcb);
-
-#define MCFG_MOS6530_IN_PB_CB(_devcb) \
- downcast<mos6530_device &>(*device).set_in_pb_callback(DEVCB_##_devcb);
-
-#define MCFG_MOS6530_OUT_PB_CB(_devcb) \
- downcast<mos6530_device &>(*device).set_out_pb_callback(DEVCB_##_devcb);
-
#endif // MAME_MACHINE_MOS6530_H
diff --git a/src/devices/machine/mos6530n.h b/src/devices/machine/mos6530n.h
index a5dfd3ee6fe..0042a73e429 100644
--- a/src/devices/machine/mos6530n.h
+++ b/src/devices/machine/mos6530n.h
@@ -57,125 +57,6 @@
#pragma once
-
-
-//**************************************************************************
-// INTERFACE CONFIGURATION MACROS
-//**************************************************************************
-
-#define MCFG_MOS6530n_IRQ_CB(_write) \
- downcast<mos6530_device_base &>(*device).set_irq_wr_callback(DEVCB_##_write);
-
-#define MCFG_MOS6530n_IN_PA_CB(_read) \
- downcast<mos6530_device_base &>(*device).set_pa_rd_callback(DEVCB_##_read);
-
-#define MCFG_MOS6530n_OUT_PA_CB(_write) \
- downcast<mos6530_device_base &>(*device).set_pa_wr_callback(DEVCB_##_write);
-
-#define MCFG_MOS6530n_IN_PB_CB(_read) \
- downcast<mos6530_device_base &>(*device).set_pb_rd_callback(DEVCB_##_read);
-
-#define MCFG_MOS6530n_OUT_PB_CB(_write) \
- downcast<mos6530_device_base &>(*device).set_pb_wr_callback(DEVCB_##_write);
-
-#define MCFG_MOS6530n_IN_PA0_CB(_read) \
- downcast<mos6530_device_base &>(*device).set_pa_rd_callback<0>(DEVCB_##_read);
-
-#define MCFG_MOS6530n_IN_PA1_CB(_read) \
- downcast<mos6530_device_base &>(*device).set_pa_rd_callback<1>(DEVCB_##_read);
-
-#define MCFG_MOS6530n_IN_PA2_CB(_read) \
- downcast<mos6530_device_base &>(*device).set_pa_rd_callback<2>(DEVCB_##_read);
-
-#define MCFG_MOS6530n_IN_PA3_CB(_read) \
- downcast<mos6530_device_base &>(*device).set_pa_rd_callback<3>(DEVCB_##_read);
-
-#define MCFG_MOS6530n_IN_PA4_CB(_read) \
- downcast<mos6530_device_base &>(*device).set_pa_rd_callback<4>(DEVCB_##_read);
-
-#define MCFG_MOS6530n_IN_PA5_CB(_read) \
- downcast<mos6530_device_base &>(*device).set_pa_rd_callback<5>(DEVCB_##_read);
-
-#define MCFG_MOS6530n_IN_PA6_CB(_read) \
- downcast<mos6530_device_base &>(*device).set_pa_rd_callback<6>(DEVCB_##_read);
-
-#define MCFG_MOS6530n_IN_PA7_CB(_read) \
- downcast<mos6530_device_base &>(*device).set_pa_rd_callback<7>(DEVCB_##_read);
-
-#define MCFG_MOS6530n_OUT_PA0_CB(_write) \
- downcast<mos6530_device_base &>(*device).set_pa_wr_callback<0>(DEVCB_##_write);
-
-#define MCFG_MOS6530n_OUT_PA1_CB(_write) \
- downcast<mos6530_device_base &>(*device).set_pa_wr_callback<1>(DEVCB_##_write);
-
-#define MCFG_MOS6530n_OUT_PA2_CB(_write) \
- downcast<mos6530_device_base &>(*device).set_pa_wr_callback<2>(DEVCB_##_write);
-
-#define MCFG_MOS6530n_OUT_PA3_CB(_write) \
- downcast<mos6530_device_base &>(*device).set_pa_wr_callback<3>(DEVCB_##_write);
-
-#define MCFG_MOS6530n_OUT_PA4_CB(_write) \
- downcast<mos6530_device_base &>(*device).set_pa_wr_callback<4>(DEVCB_##_write);
-
-#define MCFG_MOS6530n_OUT_PA5_CB(_write) \
- downcast<mos6530_device_base &>(*device).set_pa_wr_callback<5>(DEVCB_##_write);
-
-#define MCFG_MOS6530n_OUT_PA6_CB(_write) \
- downcast<mos6530_device_base &>(*device).set_pa_wr_callback<6>(DEVCB_##_write);
-
-#define MCFG_MOS6530n_OUT_PA7_CB(_write) \
- downcast<mos6530_device_base &>(*device).set_pa_wr_callback<7>(DEVCB_##_write);
-
-#define MCFG_MOS6530n_IN_PB0_CB(_read) \
- downcast<mos6530_device_base &>(*device).set_pb_rd_callback<0>(DEVCB_##_read);
-
-#define MCFG_MOS6530n_IN_PB1_CB(_read) \
- downcast<mos6530_device_base &>(*device).set_pb_rd_callback<1>(DEVCB_##_read);
-
-#define MCFG_MOS6530n_IN_PB2_CB(_read) \
- downcast<mos6530_device_base &>(*device).set_pb_rd_callback<2>(DEVCB_##_read);
-
-#define MCFG_MOS6530n_IN_PB3_CB(_read) \
- downcast<mos6530_device_base &>(*device).set_pb_rd_callback<3>(DEVCB_##_read);
-
-#define MCFG_MOS6530n_IN_PB4_CB(_read) \
- downcast<mos6530_device_base &>(*device).set_pb_rd_callback<4>(DEVCB_##_read);
-
-#define MCFG_MOS6530n_IN_PB5_CB(_read) \
- downcast<mos6530_device_base &>(*device).set_pb_rd_callback<5>(DEVCB_##_read);
-
-#define MCFG_MOS6530n_IN_PB6_CB(_read) \
- downcast<mos6530_device_base &>(*device).set_pb_rd_callback<6>(DEVCB_##_read);
-
-#define MCFG_MOS6530n_IN_PB7_CB(_read) \
- downcast<mos6530_device_base &>(*device).set_pb_rd_callback<7>(DEVCB_##_read);
-
-#define MCFG_MOS6530n_OUT_PB0_CB(_write) \
- downcast<mos6530_device_base &>(*device).set_pb_wr_callback<0>(DEVCB_##_write);
-
-#define MCFG_MOS6530n_OUT_PB1_CB(_write) \
- downcast<mos6530_device_base &>(*device).set_pb_wr_callback<1>(DEVCB_##_write);
-
-#define MCFG_MOS6530n_OUT_PB2_CB(_write) \
- downcast<mos6530_device_base &>(*device).set_pb_wr_callback<2>(DEVCB_##_write);
-
-#define MCFG_MOS6530n_OUT_PB3_CB(_write) \
- downcast<mos6530_device_base &>(*device).set_pb_wr_callback<3>(DEVCB_##_write);
-
-#define MCFG_MOS6530n_OUT_PB4_CB(_write) \
- downcast<mos6530_device_base &>(*device).set_pb_wr_callback<4>(DEVCB_##_write);
-
-#define MCFG_MOS6530n_OUT_PB5_CB(_write) \
- downcast<mos6530_device_base &>(*device).set_pb_wr_callback<5>(DEVCB_##_write);
-
-#define MCFG_MOS6530n_OUT_PB6_CB(_write) \
- downcast<mos6530_device_base &>(*device).set_pb_wr_callback<6>(DEVCB_##_write);
-
-#define MCFG_MOS6530n_OUT_PB7_CB(_write) \
- downcast<mos6530_device_base &>(*device).set_pb_wr_callback<7>(DEVCB_##_write);
-
-
-
//**************************************************************************
// TYPE DEFINITIONS
//**************************************************************************
@@ -185,15 +66,6 @@
class mos6530_device_base : public device_t
{
public:
- template <class Object> devcb_base &set_irq_wr_callback(Object &&cb) { return m_irq_cb.set_callback(std::forward<Object>(cb)); }
- template <class Object> devcb_base &set_pa_rd_callback(Object &&cb) { return m_in8_pa_cb.set_callback(std::forward<Object>(cb)); }
- template <class Object> devcb_base &set_pa_wr_callback(Object &&cb) { return m_out8_pa_cb.set_callback(std::forward<Object>(cb)); }
- template <class Object> devcb_base &set_pb_rd_callback(Object &&cb) { return m_in8_pb_cb.set_callback(std::forward<Object>(cb)); }
- template <class Object> devcb_base &set_pb_wr_callback(Object &&cb) { return m_out8_pb_cb.set_callback(std::forward<Object>(cb)); }
- template <unsigned N, class Object> devcb_base &set_pa_rd_callback(Object &&cb) { return m_in_pa_cb[N].set_callback(std::forward<Object>(cb)); }
- template <unsigned N, class Object> devcb_base &set_pa_wr_callback(Object &&cb) { return m_out_pa_cb[N].set_callback(std::forward<Object>(cb)); }
- template <unsigned N, class Object> devcb_base &set_pb_rd_callback(Object &&cb) { return m_in_pb_cb[N].set_callback(std::forward<Object>(cb)); }
- template <unsigned N, class Object> devcb_base &set_pb_wr_callback(Object &&cb) { return m_out_pb_cb[N].set_callback(std::forward<Object>(cb)); }
auto irq_wr_callback() { return m_irq_cb.bind(); }
auto pa_rd_callback() { return m_in8_pa_cb.bind(); }
auto pa_wr_callback() { return m_out8_pa_cb.bind(); }
diff --git a/src/devices/machine/mos6551.cpp b/src/devices/machine/mos6551.cpp
index 37bb874aaf4..f9edbd39cee 100644
--- a/src/devices/machine/mos6551.cpp
+++ b/src/devices/machine/mos6551.cpp
@@ -63,10 +63,11 @@ const int mos6551_device::transmitter_controls[4][3] =
{0, 1, 1}
};
-MACHINE_CONFIG_START(mos6551_device::device_add_mconfig)
- MCFG_DEVICE_ADD("clock", CLOCK, 0)
- MCFG_CLOCK_SIGNAL_HANDLER(WRITELINE(*this, mos6551_device, internal_clock))
-MACHINE_CONFIG_END
+void mos6551_device::device_add_mconfig(machine_config &config)
+{
+ CLOCK(config, m_internal_clock, 0);
+ m_internal_clock->signal_handler().set(FUNC(mos6551_device::internal_clock));
+}
void mos6551_device::device_start()
@@ -270,7 +271,8 @@ void mos6551_device::update_divider()
uint8_t mos6551_device::read_rdr()
{
- m_status &= ~(SR_PARITY_ERROR | SR_FRAMING_ERROR | SR_OVERRUN | SR_RDRF);
+ if (!machine().side_effects_disabled())
+ m_status &= ~(SR_PARITY_ERROR | SR_FRAMING_ERROR | SR_OVERRUN | SR_RDRF);
return m_rdr;
}
@@ -278,15 +280,18 @@ uint8_t mos6551_device::read_status()
{
uint8_t status = m_status;
- if (m_cts)
+ if (!machine().side_effects_disabled())
{
- status &= ~SR_TDRE;
- }
+ if (m_cts)
+ {
+ status &= ~SR_TDRE;
+ }
- if (m_irq_state != 0)
- {
- m_irq_state = 0;
- update_irq();
+ if (m_irq_state != 0)
+ {
+ m_irq_state = 0;
+ update_irq();
+ }
}
return status;
@@ -374,11 +379,8 @@ void mos6551_device::write_command(uint8_t data)
update_divider();
}
-READ8_MEMBER( mos6551_device::read )
+uint8_t mos6551_device::read(offs_t offset)
{
- if (machine().side_effects_disabled())
- return 0xff;
-
switch (offset & 0x03)
{
case 0:
@@ -396,7 +398,7 @@ READ8_MEMBER( mos6551_device::read )
}
}
-WRITE8_MEMBER( mos6551_device::write )
+void mos6551_device::write(offs_t offset, uint8_t data)
{
switch (offset & 0x03)
{
diff --git a/src/devices/machine/mos6551.h b/src/devices/machine/mos6551.h
index 626c17fd0b2..b7afabfa603 100644
--- a/src/devices/machine/mos6551.h
+++ b/src/devices/machine/mos6551.h
@@ -33,7 +33,7 @@
class mos6551_device : public device_t
{
public:
- mos6551_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ mos6551_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
auto irq_handler() { return m_irq_handler.bind(); }
auto txd_handler() { return m_txd_handler.bind(); }
@@ -41,8 +41,8 @@ public:
auto rts_handler() { return m_rts_handler.bind(); }
auto dtr_handler() { return m_dtr_handler.bind(); }
- DECLARE_READ8_MEMBER(read);
- DECLARE_WRITE8_MEMBER(write);
+ uint8_t read(offs_t offset);
+ void write(offs_t offset, uint8_t data);
DECLARE_WRITE_LINE_MEMBER(write_xtal1); // txc
DECLARE_WRITE_LINE_MEMBER(write_rxd);
diff --git a/src/devices/machine/mos6702.cpp b/src/devices/machine/mos6702.cpp
index a5fa3d4c088..1b552054cb4 100644
--- a/src/devices/machine/mos6702.cpp
+++ b/src/devices/machine/mos6702.cpp
@@ -49,7 +49,7 @@ void mos6702_device::device_start()
// read -
//-------------------------------------------------
-READ8_MEMBER( mos6702_device::read )
+uint8_t mos6702_device::read(offs_t offset)
{
return 0;
}
@@ -59,6 +59,6 @@ READ8_MEMBER( mos6702_device::read )
// write -
//-------------------------------------------------
-WRITE8_MEMBER( mos6702_device::write )
+void mos6702_device::write(offs_t offset, uint8_t data)
{
}
diff --git a/src/devices/machine/mos6702.h b/src/devices/machine/mos6702.h
index 4e7ef027b6e..ab1ea945e6e 100644
--- a/src/devices/machine/mos6702.h
+++ b/src/devices/machine/mos6702.h
@@ -25,16 +25,6 @@
#pragma once
-
-//**************************************************************************
-// INTERFACE CONFIGURATION MACROS
-//**************************************************************************
-
-#define MCFG_MOS6702_ADD(tag, clock) \
- MCFG_DEVICE_ADD(tag, MOS6702, clock)
-
-
-
//**************************************************************************
// TYPE DEFINITIONS
//**************************************************************************
@@ -47,8 +37,8 @@ public:
// construction/destruction
mos6702_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
- DECLARE_READ8_MEMBER( read );
- DECLARE_WRITE8_MEMBER( write );
+ uint8_t read(offs_t offset);
+ void write(offs_t offset, uint8_t data);
protected:
// device-level overrides
diff --git a/src/devices/machine/mos8706.h b/src/devices/machine/mos8706.h
index 36cb6d55d5d..a3a6247bf5a 100644
--- a/src/devices/machine/mos8706.h
+++ b/src/devices/machine/mos8706.h
@@ -29,17 +29,6 @@
#pragma once
-
-
-//**************************************************************************
-// INTERFACE CONFIGURATION MACROS
-//**************************************************************************
-
-#define MCFG_MOS8706_ADD(tag, clock) \
- MCFG_DEVICE_ADD((tag), MOS8706, (clock))
-
-
-
//**************************************************************************
// TYPE DEFINITIONS
//**************************************************************************
diff --git a/src/devices/machine/mos8722.cpp b/src/devices/machine/mos8722.cpp
index b55d8393a9f..0364460b63e 100644
--- a/src/devices/machine/mos8722.cpp
+++ b/src/devices/machine/mos8722.cpp
@@ -171,7 +171,7 @@ uint8_t mos8722_device::read(offs_t offset, uint8_t data)
// write - register write
//-------------------------------------------------
-WRITE8_MEMBER( mos8722_device::write )
+void mos8722_device::write(offs_t offset, uint8_t data)
{
if (MCR_C64) return;
diff --git a/src/devices/machine/mos8722.h b/src/devices/machine/mos8722.h
index e5d32d4e4ea..2b80aa846c2 100644
--- a/src/devices/machine/mos8722.h
+++ b/src/devices/machine/mos8722.h
@@ -57,7 +57,7 @@ public:
auto sense40() { return m_read_sense40.bind(); }
uint8_t read(offs_t offset, uint8_t data);
- DECLARE_WRITE8_MEMBER( write );
+ void write(offs_t offset, uint8_t data);
DECLARE_READ_LINE_MEMBER( fsdir_r );
diff --git a/src/devices/machine/mos8726.cpp b/src/devices/machine/mos8726.cpp
index 0c2286788a7..e1f167d70d3 100644
--- a/src/devices/machine/mos8726.cpp
+++ b/src/devices/machine/mos8726.cpp
@@ -90,7 +90,7 @@ void mos8726_device::execute_run()
// read -
//-------------------------------------------------
-READ8_MEMBER( mos8726_device::read )
+uint8_t mos8726_device::read(offs_t offset)
{
uint8_t data = 0;
@@ -102,7 +102,7 @@ READ8_MEMBER( mos8726_device::read )
// write -
//-------------------------------------------------
-WRITE8_MEMBER( mos8726_device::write )
+void mos8726_device::write(offs_t offset, uint8_t data)
{
}
diff --git a/src/devices/machine/mos8726.h b/src/devices/machine/mos8726.h
index 8435bf0f544..90b78ec8412 100644
--- a/src/devices/machine/mos8726.h
+++ b/src/devices/machine/mos8726.h
@@ -47,17 +47,6 @@
#pragma once
-
-
-//**************************************************************************
-// INTERFACE CONFIGURATION MACROS
-//**************************************************************************
-
-#define MCFG_MOS8726_ADD(tag) \
- MCFG_DEVICE_ADD((tag), MOS8726, 1000000) // dummy clock
-
-
-
//**************************************************************************
// TYPE DEFINITIONS
//**************************************************************************
@@ -71,8 +60,8 @@ public:
// construction/destruction
mos8726_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
- DECLARE_READ8_MEMBER( read );
- DECLARE_WRITE8_MEMBER( write );
+ uint8_t read(offs_t offset);
+ void write(offs_t offset, uint8_t data);
DECLARE_WRITE_LINE_MEMBER( bs_w );
diff --git a/src/devices/machine/mpu401.cpp b/src/devices/machine/mpu401.cpp
index 578ad206721..48cc04b455d 100644
--- a/src/devices/machine/mpu401.cpp
+++ b/src/devices/machine/mpu401.cpp
@@ -81,7 +81,8 @@ DEFINE_DEVICE_TYPE(MPU401, mpu401_device, "mpu401", "Roland MPU-401 I/O box")
// device_add_mconfig - add device configuration
//-------------------------------------------------
-MACHINE_CONFIG_START(mpu401_device::device_add_mconfig)
+void mpu401_device::device_add_mconfig(machine_config &config)
+{
M6801(config, m_ourcpu, 4000000); /* 4 MHz as per schematics */
m_ourcpu->set_addrmap(AS_PROGRAM, &mpu401_device::mpu401_map);
m_ourcpu->in_p1_cb().set(FUNC(mpu401_device::port1_r));
@@ -90,11 +91,10 @@ MACHINE_CONFIG_START(mpu401_device::device_add_mconfig)
m_ourcpu->out_p2_cb().set(FUNC(mpu401_device::port2_w));
m_ourcpu->out_ser_tx_cb().set(MIDIOUT_TAG, FUNC(midi_port_device::write_txd));
- MCFG_MIDI_PORT_ADD(MIDIIN_TAG, midiin_slot, "midiin")
- MCFG_MIDI_RX_HANDLER(WRITELINE(DEVICE_SELF, mpu401_device, midi_rx_w))
+ MIDI_PORT(config, MIDIIN_TAG, midiin_slot, "midiin").rxd_handler().set(DEVICE_SELF, FUNC(mpu401_device::midi_rx_w));
- MCFG_MIDI_PORT_ADD(MIDIOUT_TAG, midiout_slot, "midiout")
-MACHINE_CONFIG_END
+ MIDI_PORT(config, MIDIOUT_TAG, midiout_slot, "midiout");
+}
//-------------------------------------------------
// rom_region - device-specific ROM region
diff --git a/src/devices/machine/msm58321.h b/src/devices/machine/msm58321.h
index 1842b4f2036..d5b7a5d78c3 100644
--- a/src/devices/machine/msm58321.h
+++ b/src/devices/machine/msm58321.h
@@ -39,32 +39,6 @@
#include "dirtc.h"
-
-//**************************************************************************
-// INTERFACE CONFIGURATION MACROS
-//**************************************************************************
-
-#define MCFG_MSM58321_D0_HANDLER(_devcb) \
- downcast<msm58321_device &>(*device).set_d0_handler(DEVCB_##_devcb);
-
-#define MCFG_MSM58321_D1_HANDLER(_devcb) \
- downcast<msm58321_device &>(*device).set_d1_handler(DEVCB_##_devcb);
-
-#define MCFG_MSM58321_D2_HANDLER(_devcb) \
- downcast<msm58321_device &>(*device).set_d2_handler(DEVCB_##_devcb);
-
-#define MCFG_MSM58321_D3_HANDLER(_devcb) \
- downcast<msm58321_device &>(*device).set_d3_handler(DEVCB_##_devcb);
-
-#define MCFG_MSM58321_BUSY_HANDLER(_devcb) \
- downcast<msm58321_device &>(*device).set_busy_handler(DEVCB_##_devcb);
-
-#define MCFG_MSM58321_YEAR0(_year0) \
- downcast<msm58321_device &>(*device).set_year0(_year0);
-
-#define MCFG_MSM58321_DEFAULT_24H(_default_24h) \
- downcast<msm58321_device &>(*device).set_default_24h(_default_24h);
-
// ======================> msm58321_device
class msm58321_device : public device_t,
@@ -76,11 +50,6 @@ public:
msm58321_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
// configuration helpers
- template <class Object> devcb_base &set_d0_handler(Object &&cb) { return m_d0_handler.set_callback(std::forward<Object>(cb)); }
- template <class Object> devcb_base &set_d1_handler(Object &&cb) { return m_d1_handler.set_callback(std::forward<Object>(cb)); }
- template <class Object> devcb_base &set_d2_handler(Object &&cb) { return m_d2_handler.set_callback(std::forward<Object>(cb)); }
- template <class Object> devcb_base &set_d3_handler(Object &&cb) { return m_d3_handler.set_callback(std::forward<Object>(cb)); }
- template <class Object> devcb_base &set_busy_handler(Object &&cb) { return m_busy_handler.set_callback(std::forward<Object>(cb)); }
auto d0_handler() { return m_d0_handler.bind(); }
auto d1_handler() { return m_d1_handler.bind(); }
auto d2_handler() { return m_d2_handler.bind(); }
diff --git a/src/devices/machine/msm6242.h b/src/devices/machine/msm6242.h
index bd6bd89403e..430bbbc10f0 100644
--- a/src/devices/machine/msm6242.h
+++ b/src/devices/machine/msm6242.h
@@ -40,10 +40,6 @@
#include "dirtc.h"
-#define MCFG_MSM6242_OUT_INT_HANDLER(_devcb) \
- downcast<msm6242_device &>(*device).set_out_int_handler(DEVCB_##_devcb);
-
-
// ======================> msm6242_device
class msm6242_device : public device_t, public device_rtc_interface
@@ -52,7 +48,6 @@ public:
// construction/destruction
msm6242_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
- template <class Object> devcb_base &set_out_int_handler(Object &&cb) { return m_out_int_handler.set_callback(std::forward<Object>(cb)); }
auto out_int_handler() { return m_out_int_handler.bind(); }
// I/O operations
diff --git a/src/devices/machine/myb3k_kbd.h b/src/devices/machine/myb3k_kbd.h
index 747289a53f1..34c2c5cc414 100644
--- a/src/devices/machine/myb3k_kbd.h
+++ b/src/devices/machine/myb3k_kbd.h
@@ -14,9 +14,6 @@
is responsible for storing the byte into the serial/parallell converter
(that can be read through IN from port 0x04) and then trigger an interrupt.
- MCFG_DEVICE_ADD("myb3k_keyboard", MYB3K_KEYBOARD, 0)
- MCFG_MYB3K_KEYBOARD_CB(PUT(myb3k_state, kbd_set_data_and_interrupt))
-
**********************************************************************/
#ifndef MAME_MACHINE_MYB3K_KBD_H
@@ -24,11 +21,6 @@
#pragma once
-#define MYB3K_KBD_CB_PUT(cls, fnc) myb3k_keyboard_device::output_delegate((&cls::fnc), (#cls "::" #fnc), DEVICE_SELF, ((cls *)nullptr))
-#define MYB3K_KBD_CB_DEVPUT(tag, cls, fnc) myb3k_keyboard_device::output_delegate((&cls::fnc), (#cls "::" #fnc), (tag), ((cls *)nullptr))
-
-#define MCFG_MYB3K_KEYBOARD_CB(cb) downcast<myb3k_keyboard_device &>(*device).set_keyboard_callback((MYB3K_KBD_CB_##cb));
-
DECLARE_DEVICE_TYPE(MYB3K_KEYBOARD, myb3k_keyboard_device)
DECLARE_DEVICE_TYPE(JB3000_KEYBOARD, jb3000_keyboard_device)
DECLARE_DEVICE_TYPE(STEPONE_KEYBOARD, stepone_keyboard_device)
@@ -51,7 +43,18 @@ public:
TIMER_ID_SECOND_BYTE
};
- template <class Object> void set_keyboard_callback(Object &&cb) { m_keyboard_cb = std::forward<Object>(cb); }
+ template <class FunctionClass>
+ void set_keyboard_callback(void (FunctionClass::*callback)(u8 character), const char *name)
+ {
+ set_keyboard_callback(output_delegate(callback, name, nullptr, static_cast<FunctionClass *>(nullptr)));
+ }
+ // FIXME: this should be aware of current device for resolving the tag
+ template <class FunctionClass>
+ void set_keyboard_callback(const char *devname, void (FunctionClass::*callback)(u8 character), const char *name)
+ {
+ set_keyboard_callback(output_delegate(callback, name, devname, static_cast<FunctionClass *>(nullptr)));
+ }
+ void set_keyboard_callback(output_delegate callback) { m_keyboard_cb = callback; }
protected:
myb3k_keyboard_device(
diff --git a/src/devices/machine/ncr5380.h b/src/devices/machine/ncr5380.h
index b2f7e4f2509..9d9d7b96617 100644
--- a/src/devices/machine/ncr5380.h
+++ b/src/devices/machine/ncr5380.h
@@ -36,8 +36,6 @@ enum
// device stuff
-#define MCFG_NCR5380_IRQ_CB(_devcb) \
- downcast<ncr5380_device &>(*device).set_irq_callback(DEVCB_##_devcb);
class ncr5380_device : public legacy_scsi_host_adapter
{
@@ -45,7 +43,6 @@ public:
// construction/destruction
ncr5380_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
- template <class Object> devcb_base &set_irq_callback(Object &&cb) { return m_irq_cb.set_callback(std::forward<Object>(cb)); }
auto irq_callback() { return m_irq_cb.bind(); }
// our API
diff --git a/src/devices/machine/ncr5380n.cpp b/src/devices/machine/ncr5380n.cpp
index 4d09a910e46..e5132603609 100644
--- a/src/devices/machine/ncr5380n.cpp
+++ b/src/devices/machine/ncr5380n.cpp
@@ -288,12 +288,12 @@ void ncr5380n_device::delay_cycles(int cycles)
tm->adjust(clocks_to_attotime(cycles));
}
-READ8_MEMBER(ncr5380n_device::scsidata_r)
+uint8_t ncr5380n_device::scsidata_r()
{
return scsi_bus->data_r();
}
-WRITE8_MEMBER(ncr5380n_device::outdata_w)
+void ncr5380n_device::outdata_w(uint8_t data)
{
m_outdata = data;
@@ -304,12 +304,12 @@ WRITE8_MEMBER(ncr5380n_device::outdata_w)
}
}
-READ8_MEMBER(ncr5380n_device::icmd_r)
+uint8_t ncr5380n_device::icmd_r()
{
return m_icommand;
}
-WRITE8_MEMBER(ncr5380n_device::icmd_w)
+void ncr5380n_device::icmd_w(uint8_t data)
{
// asserting to drive the data bus?
if ((data & IC_DBUS) && !(m_icommand & IC_DBUS))
@@ -340,12 +340,12 @@ WRITE8_MEMBER(ncr5380n_device::icmd_w)
delay(2);
}
-READ8_MEMBER(ncr5380n_device::mode_r)
+uint8_t ncr5380n_device::mode_r()
{
return m_mode;
}
-WRITE8_MEMBER(ncr5380n_device::mode_w)
+void ncr5380n_device::mode_w(uint8_t data)
{
// logerror("%s: mode_w %02x (%s)\n", tag(), data, machine().describe_context());
// arbitration bit being set?
@@ -373,13 +373,13 @@ WRITE8_MEMBER(ncr5380n_device::mode_w)
m_mode = data;
}
-READ8_MEMBER(ncr5380n_device::command_r)
+uint8_t ncr5380n_device::command_r()
{
// logerror("%s: command_r %02x (%s)\n", tag(), m_tcommand, machine().describe_context());
return m_tcommand;
}
-WRITE8_MEMBER(ncr5380n_device::command_w)
+void ncr5380n_device::command_w(uint8_t data)
{
// logerror("%s: command_w %02x (%s)\n", tag(), data, machine().describe_context());
m_tcommand = data;
@@ -413,7 +413,7 @@ void ncr5380n_device::check_irq()
#endif
}
-READ8_MEMBER(ncr5380n_device::status_r)
+uint8_t ncr5380n_device::status_r()
{
uint32_t ctrl = scsi_bus->ctrl_r();
uint8_t res = status |
@@ -429,11 +429,11 @@ READ8_MEMBER(ncr5380n_device::status_r)
return res;
}
-WRITE8_MEMBER(ncr5380n_device::selenable_w)
+void ncr5380n_device::selenable_w(uint8_t data)
{
}
-READ8_MEMBER(ncr5380n_device::busandstatus_r)
+uint8_t ncr5380n_device::busandstatus_r()
{
uint32_t ctrl = scsi_bus->ctrl_r();
uint8_t res = m_busstatus |
@@ -445,28 +445,28 @@ READ8_MEMBER(ncr5380n_device::busandstatus_r)
return res;
}
-WRITE8_MEMBER(ncr5380n_device::startdmasend_w)
+void ncr5380n_device::startdmasend_w(uint8_t data)
{
logerror("%02x to start dma send\n", data);
drq_set();
}
-READ8_MEMBER(ncr5380n_device::indata_r)
+uint8_t ncr5380n_device::indata_r()
{
return dma_r();
}
-WRITE8_MEMBER(ncr5380n_device::startdmatargetrx_w)
+void ncr5380n_device::startdmatargetrx_w(uint8_t data)
{
logerror("%02x to start dma target Rx\n", data);
}
-READ8_MEMBER(ncr5380n_device::resetparityirq_r)
+uint8_t ncr5380n_device::resetparityirq_r()
{
return 0;
}
-WRITE8_MEMBER(ncr5380n_device::startdmainitrx_w)
+void ncr5380n_device::startdmainitrx_w(uint8_t data)
{
// logerror("%02x to start dma initiator Rx\n", data);
recv_byte();
@@ -518,73 +518,73 @@ void ncr5380n_device::drq_clear()
}
}
-READ8_MEMBER(ncr5380n_device::read)
+uint8_t ncr5380n_device::read(offs_t offset)
{
switch (offset & 7)
{
- case 0:
- return scsidata_r(space, offset);
+ case 0:
+ return scsidata_r();
- case 1:
- return icmd_r(space, offset);
+ case 1:
+ return icmd_r();
- case 2:
- return mode_r(space, offset);
+ case 2:
+ return mode_r();
- case 3:
- return command_r(space, offset);
+ case 3:
+ return command_r();
- case 4:
- return status_r(space, offset);
+ case 4:
+ return status_r();
- case 5:
- return busandstatus_r(space, offset);
+ case 5:
+ return busandstatus_r();
- case 6:
- return indata_r(space, offset);
+ case 6:
+ return indata_r();
- case 7:
- return resetparityirq_r(space, offset);
+ case 7:
+ return resetparityirq_r();
}
return 0xff;
}
-WRITE8_MEMBER(ncr5380n_device::write)
+void ncr5380n_device::write(offs_t offset, uint8_t data)
{
// logerror("%x to 5380 @ %x\n", data, offset);
switch (offset & 7)
{
- case 0:
- outdata_w(space, offset, data);
- break;
+ case 0:
+ outdata_w(data);
+ break;
- case 1:
- icmd_w(space, offset, data);
- break;
+ case 1:
+ icmd_w(data);
+ break;
- case 2:
- mode_w(space, offset, data);
- break;
+ case 2:
+ mode_w(data);
+ break;
- case 3:
- command_w(space, offset, data);
- break;
+ case 3:
+ command_w(data);
+ break;
- case 4:
- selenable_w(space, offset, data);
- break;
+ case 4:
+ selenable_w(data);
+ break;
- case 5:
- startdmasend_w(space, offset, data);
- break;
+ case 5:
+ startdmasend_w(data);
+ break;
- case 6:
- startdmatargetrx_w(space, offset, data);
- break;
+ case 6:
+ startdmatargetrx_w(data);
+ break;
- case 7:
- startdmainitrx_w(space, offset, data);
- break;
+ case 7:
+ startdmainitrx_w(data);
+ break;
}
}
diff --git a/src/devices/machine/ncr5380n.h b/src/devices/machine/ncr5380n.h
index 973616c65a3..365df032419 100644
--- a/src/devices/machine/ncr5380n.h
+++ b/src/devices/machine/ncr5380n.h
@@ -15,11 +15,6 @@
#include "machine/nscsi_bus.h"
-#define MCFG_NCR5380N_IRQ_HANDLER(_devcb) \
- downcast<ncr5380n_device &>(*device).set_irq_handler(DEVCB_##_devcb);
-
-#define MCFG_NCR5380N_DRQ_HANDLER(_devcb) \
- downcast<ncr5380n_device &>(*device).set_drq_handler(DEVCB_##_devcb);
class ncr5380n_device : public nscsi_device
{
@@ -27,11 +22,11 @@ public:
ncr5380n_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
// configuration helpers
- template <class Object> devcb_base &set_irq_handler(Object &&cb) { return m_irq_handler.set_callback(std::forward<Object>(cb)); }
- template <class Object> devcb_base &set_drq_handler(Object &&cb) { return m_drq_handler.set_callback(std::forward<Object>(cb)); }
+ auto irq_handler() { return m_irq_handler.bind(); }
+ auto drq_handler() { return m_drq_handler.bind(); }
- DECLARE_READ8_MEMBER(read);
- DECLARE_WRITE8_MEMBER(write);
+ uint8_t read(offs_t offset);
+ void write(offs_t offset, uint8_t data);
uint8_t dma_r();
void dma_w(uint8_t val);
@@ -203,22 +198,22 @@ private:
void map(address_map &map);
- DECLARE_READ8_MEMBER(scsidata_r);
- DECLARE_WRITE8_MEMBER(outdata_w);
- DECLARE_READ8_MEMBER(icmd_r);
- DECLARE_WRITE8_MEMBER(icmd_w);
- DECLARE_READ8_MEMBER(mode_r);
- DECLARE_WRITE8_MEMBER(mode_w);
- DECLARE_READ8_MEMBER(command_r);
- DECLARE_WRITE8_MEMBER(command_w);
- DECLARE_READ8_MEMBER(status_r);
- DECLARE_WRITE8_MEMBER(selenable_w);
- DECLARE_READ8_MEMBER(busandstatus_r);
- DECLARE_WRITE8_MEMBER(startdmasend_w);
- DECLARE_READ8_MEMBER(indata_r);
- DECLARE_WRITE8_MEMBER(startdmatargetrx_w);
- DECLARE_READ8_MEMBER(resetparityirq_r);
- DECLARE_WRITE8_MEMBER(startdmainitrx_w);
+ uint8_t scsidata_r();
+ void outdata_w(uint8_t data);
+ uint8_t icmd_r();
+ void icmd_w(uint8_t data);
+ uint8_t mode_r();
+ void mode_w(uint8_t data);
+ uint8_t command_r();
+ void command_w(uint8_t data);
+ uint8_t status_r();
+ void selenable_w(uint8_t data);
+ uint8_t busandstatus_r();
+ void startdmasend_w(uint8_t data);
+ uint8_t indata_r();
+ void startdmatargetrx_w(uint8_t data);
+ uint8_t resetparityirq_r();
+ void startdmainitrx_w(uint8_t data);
devcb_write_line m_irq_handler;
devcb_write_line m_drq_handler;
diff --git a/src/devices/machine/ncr5385.cpp b/src/devices/machine/ncr5385.cpp
index d5cd98a4a5f..6c1f4a3bb4e 100644
--- a/src/devices/machine/ncr5385.cpp
+++ b/src/devices/machine/ncr5385.cpp
@@ -34,7 +34,7 @@ void ncr5385_device::device_reset()
m_diag_status_reg = DIAG_COMPLETE;
}
-WRITE8_MEMBER(ncr5385_device::write)
+void ncr5385_device::write(offs_t offset, uint8_t data)
{
switch (offset)
{
@@ -96,7 +96,7 @@ WRITE8_MEMBER(ncr5385_device::write)
}
}
-READ8_MEMBER(ncr5385_device::read)
+uint8_t ncr5385_device::read(offs_t offset)
{
switch (offset)
{
diff --git a/src/devices/machine/ncr5385.h b/src/devices/machine/ncr5385.h
index 3a60ca0a6c8..a1dec052045 100644
--- a/src/devices/machine/ncr5385.h
+++ b/src/devices/machine/ncr5385.h
@@ -44,14 +44,6 @@
#pragma once
-
-//**************************************************************************
-// INTERFACE CONFIGURATION MACROS
-//**************************************************************************
-
-#define MCFG_NCR5385_INT_CB(_int) \
- downcast<ncr5385_device &>(*device).set_int_callback(DEVCB_##_int);
-
//**************************************************************************
// TYPE DEFINITIONS
//**************************************************************************
@@ -64,11 +56,10 @@ public:
// construction/destruction
ncr5385_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
- template <class Object> devcb_base &set_int_callback(Object &&cb) { return m_int.set_callback(std::forward<Object>(cb)); }
auto irq() { return m_int.bind(); }
- DECLARE_WRITE8_MEMBER(write);
- DECLARE_READ8_MEMBER(read);
+ void write(offs_t offset, uint8_t data);
+ uint8_t read(offs_t offset);
protected:
// device-level overrides
diff --git a/src/devices/machine/ncr5390.cpp b/src/devices/machine/ncr5390.cpp
index 62c62a038b6..10b7510d707 100644
--- a/src/devices/machine/ncr5390.cpp
+++ b/src/devices/machine/ncr5390.cpp
@@ -1,6 +1,12 @@
// license:BSD-3-Clause
// copyright-holders:Olivier Galibert
+/*
+ * TODO
+ * - 16 bit dma order, alignment and last byte handling
+ * - clean up variable naming and protection
+ */
+
#include "emu.h"
#include "ncr5390.h"
@@ -14,9 +20,10 @@
#define DELAY_HACK
-DEFINE_DEVICE_TYPE(NCR5390, ncr5390_device, "ncr5390", "NCR 5390 SCSI")
-DEFINE_DEVICE_TYPE(NCR53C90A, ncr53c90a_device, "ncr53c90a", "NCR 53C90A SCSI")
-DEFINE_DEVICE_TYPE(NCR53C94, ncr53c94_device, "ncr53c94", "NCR 53C94 SCSI")
+DEFINE_DEVICE_TYPE(NCR5390, ncr5390_device, "ncr5390", "NCR 5390 SCSI Controller")
+DEFINE_DEVICE_TYPE(NCR53C90A, ncr53c90a_device, "ncr53c90a", "NCR 53C90A Advanced SCSI Controller")
+DEFINE_DEVICE_TYPE(NCR53C94, ncr53c94_device, "ncr53c94", "NCR 53C94 Advanced SCSI Controller")
+DEFINE_DEVICE_TYPE(NCR53CF94, ncr53cf94_device, "ncr53cf94", "NCR 53CF94-2 Fast SCSI Controller") // TODO: differences not emulated
void ncr5390_device::map(address_map &map)
{
@@ -33,38 +40,38 @@ void ncr5390_device::map(address_map &map)
map(0x9, 0x9).w(FUNC(ncr5390_device::clock_w));
}
-READ8_MEMBER(ncr5390_device::read)
+uint8_t ncr5390_device::read(offs_t offset)
{
switch (offset)
{
- case 0: return tcounter_lo_r(space, 0);
- case 1: return tcounter_hi_r(space, 0);
- case 2: return fifo_r(space, 0);
- case 3: return command_r(space, 0);
- case 4: return status_r(space, 0);
- case 5: return istatus_r(space, 0);
- case 6: return seq_step_r(space, 0);
- case 7: return fifo_flags_r(space, 0);
- case 8: return conf_r(space, 0);
- default: return 0;
+ case 0: return tcounter_lo_r();
+ case 1: return tcounter_hi_r();
+ case 2: return fifo_r();
+ case 3: return command_r();
+ case 4: return status_r();
+ case 5: return istatus_r();
+ case 6: return seq_step_r();
+ case 7: return fifo_flags_r();
+ case 8: return conf_r();
+ default: return 0xff;
}
}
-WRITE8_MEMBER(ncr5390_device::write)
+void ncr5390_device::write(offs_t offset, uint8_t data)
{
switch (offset)
{
- case 0: tcount_lo_w(space, 0, data); break;
- case 1: tcount_hi_w(space, 0, data); break;
- case 2: fifo_w(space, 0, data); break;
- case 3: command_w(space, 0, data); break;
- case 4: bus_id_w(space, 0, data); break;
- case 5: timeout_w(space, 0, data); break;
- case 6: sync_period_w(space, 0, data); break;
- case 7: sync_offset_w(space, 0, data); break;
- case 8: conf_w(space, 0, data); break;
- case 9: clock_w(space, 0, data); break;
- case 10: test_w(space, 0, data); break;
+ case 0: tcount_lo_w(data); break;
+ case 1: tcount_hi_w(data); break;
+ case 2: fifo_w(data); break;
+ case 3: command_w(data); break;
+ case 4: bus_id_w(data); break;
+ case 5: timeout_w(data); break;
+ case 6: sync_period_w(data); break;
+ case 7: sync_offset_w(data); break;
+ case 8: conf_w(data); break;
+ case 9: clock_w(data); break;
+ case 10: test_w(data); break;
default: break;
}
}
@@ -76,18 +83,18 @@ void ncr53c90a_device::map(address_map &map)
map(0xb, 0xb).rw(FUNC(ncr53c90a_device::conf2_r), FUNC(ncr53c90a_device::conf2_w));
}
-READ8_MEMBER(ncr53c90a_device::read)
+uint8_t ncr53c90a_device::read(offs_t offset)
{
if (offset == 11)
- return conf2_r(space, 0);
- return ncr5390_device::read(space, offset);
+ return conf2_r();
+ return ncr5390_device::read(offset);
}
-WRITE8_MEMBER(ncr53c90a_device::write)
+void ncr53c90a_device::write(offs_t offset, uint8_t data)
{
if (offset == 11)
- return conf2_w(space, 0, data);
- ncr5390_device::write(space, offset, data);
+ return conf2_w(data);
+ ncr5390_device::write(offset, data);
}
void ncr53c94_device::map(address_map &map)
@@ -98,21 +105,21 @@ void ncr53c94_device::map(address_map &map)
map(0xf, 0xf).w(FUNC(ncr53c94_device::fifo_align_w));
}
-READ8_MEMBER(ncr53c94_device::read)
+uint8_t ncr53c94_device::read(offs_t offset)
{
if (offset == 12)
- return conf3_r(space, 0);
- return ncr53c90a_device::read(space, offset);
+ return conf3_r();
+ return ncr53c90a_device::read(offset);
}
-WRITE8_MEMBER(ncr53c94_device::write)
+void ncr53c94_device::write(offs_t offset, uint8_t data)
{
if (offset == 11)
- conf3_w(space, 0, data);
+ conf3_w(data);
else if (offset == 15)
- fifo_align_w(space, 0, data);
+ fifo_align_w(data);
else
- ncr53c90a_device::write(space, offset, data);
+ ncr53c90a_device::write(offset, data);
}
ncr5390_device::ncr5390_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock)
@@ -141,8 +148,19 @@ ncr53c90a_device::ncr53c90a_device(const machine_config &mconfig, const char *ta
}
ncr53c94_device::ncr53c94_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
- : ncr53c90a_device(mconfig, NCR53C94, tag, owner, clock)
+ : ncr53c94_device(mconfig, NCR53C94, tag, owner, clock)
+{
+}
+
+ncr53c94_device::ncr53c94_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock)
+ : ncr53c90a_device(mconfig, type, tag, owner, clock)
, config3(0)
+ , m_busmd(BUSMD_0)
+{
+}
+
+ncr53cf94_device::ncr53cf94_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+ : ncr53c94_device(mconfig, NCR53CF94, tag, owner, clock)
{
}
@@ -177,10 +195,7 @@ void ncr5390_device::device_start()
m_irq_handler.resolve_safe();
m_drq_handler.resolve_safe();
- tcount = 0;
- tcounter = 0;
config = 0;
- status = 0;
bus_id = 0;
select_timeout = 0;
tm = timer_alloc(0);
@@ -196,26 +211,28 @@ void ncr5390_device::device_reset()
sync_offset = 0;
seq = 0;
config &= 7;
- status &= 0x90;
+ status = 0;
istatus = 0;
irq = false;
m_irq_handler(irq);
- reset_soft();
-}
-void ncr5390_device::reset_soft()
-{
state = IDLE;
scsi_bus->ctrl_wait(scsi_refid, S_SEL|S_BSY|S_RST, S_ALL);
- status &= 0xef;
drq = false;
test_mode = false;
m_drq_handler(drq);
+
+ scsi_bus->ctrl_w(scsi_refid, 0, S_RST);
+ tcount = 0;
+ tcounter = 0;
+
reset_disconnect();
}
void ncr5390_device::reset_disconnect()
{
+ scsi_bus->ctrl_w(scsi_refid, 0, ~S_RST);
+
command_pos = 0;
command_length = 0;
memset(command, 0, sizeof(command));
@@ -258,6 +275,17 @@ void ncr5390_device::step(bool timeout)
case IDLE:
break;
+ case BUSRESET_WAIT_INT:
+ state = IDLE;
+ scsi_bus->ctrl_w(scsi_refid, 0, S_RST);
+ reset_disconnect();
+
+ if (!(config & 0x40)) {
+ istatus |= I_SCSI_RESET;
+ check_irq();
+ }
+ break;
+
case ARB_COMPLETE << SUB_SHIFT: {
if(!timeout)
break;
@@ -267,7 +295,7 @@ void ncr5390_device::step(bool timeout)
if(win != scsi_id) {
scsi_bus->data_w(scsi_refid, 0);
scsi_bus->ctrl_w(scsi_refid, 0, S_ALL);
- fatalerror("need to wait for bus free\n");
+ fatalerror("ncr5390_device::step need to wait for bus free\n");
}
state = (state & STATE_MASK) | (ARB_ASSERT_SEL << SUB_SHIFT);
scsi_bus->ctrl_w(scsi_refid, S_SEL, S_SEL);
@@ -407,15 +435,13 @@ void ncr5390_device::step(bool timeout)
case DISC_SEL_ARBITRATION_INIT:
// wait until a command is in the fifo
- if (!fifo_pos && dma_command && !(status & S_TC0)) {
+ if (!fifo_pos) {
// dma starts after bus arbitration/selection is complete
- dma_set(DMA_OUT);
- step(false);
+ check_drq();
break;
}
- // "with atn" variants have a message byte before the command descriptor
- command_length = (c == CD_SELECT) ? derive_msg_size(fifo[0]) : 1;
+ command_length = fifo_pos + tcounter;
state = DISC_SEL_ARBITRATION;
step(false);
break;
@@ -449,7 +475,6 @@ void ncr5390_device::step(bool timeout)
seq = 1;
function_bus_complete();
} else {
- command_length = derive_msg_size(fifo[0]);
state = DISC_SEL_WAIT_REQ;
}
break;
@@ -460,6 +485,8 @@ void ncr5390_device::step(bool timeout)
if((ctrl & S_PHASE_MASK) != S_PHASE_COMMAND) {
if(!command_length)
seq = 4;
+ else
+ seq = 2;
scsi_bus->ctrl_wait(scsi_refid, 0, S_REQ);
function_bus_complete();
break;
@@ -680,7 +707,7 @@ void ncr5390_device::function_bus_complete()
state = IDLE;
istatus |= I_FUNCTION|I_BUS;
dma_set(DMA_NONE);
- drq_clear();
+ check_drq();
check_irq();
}
@@ -690,7 +717,7 @@ void ncr5390_device::function_complete()
state = IDLE;
istatus |= I_FUNCTION;
dma_set(DMA_NONE);
- drq_clear();
+ check_drq();
check_irq();
}
@@ -700,7 +727,7 @@ void ncr5390_device::bus_complete()
state = IDLE;
istatus |= I_BUS;
dma_set(DMA_NONE);
- drq_clear();
+ check_drq();
check_irq();
}
@@ -717,25 +744,25 @@ void ncr5390_device::delay_cycles(int cycles)
tm->adjust(clocks_to_attotime(cycles));
}
-READ8_MEMBER(ncr5390_device::tcounter_lo_r)
+uint8_t ncr5390_device::tcounter_lo_r()
{
LOG("tcounter_lo_r %02x (%s)\n", tcounter & 0xff, machine().describe_context());
return tcounter;
}
-WRITE8_MEMBER(ncr5390_device::tcount_lo_w)
+void ncr5390_device::tcount_lo_w(uint8_t data)
{
tcount = (tcount & 0xff00) | data;
LOG("tcount_lo_w %02x (%s)\n", data, machine().describe_context());
}
-READ8_MEMBER(ncr5390_device::tcounter_hi_r)
+uint8_t ncr5390_device::tcounter_hi_r()
{
LOG("tcounter_hi_r %02x (%s)\n", tcounter >> 8, machine().describe_context());
return tcounter >> 8;
}
-WRITE8_MEMBER(ncr5390_device::tcount_hi_w)
+void ncr5390_device::tcount_hi_w(uint8_t data)
{
tcount = (tcount & 0x00ff) | (data << 8);
LOG("tcount_hi_w %02x (%s)\n", data, machine().describe_context());
@@ -746,19 +773,17 @@ uint8_t ncr5390_device::fifo_pop()
uint8_t r = fifo[0];
fifo_pos--;
memmove(fifo, fifo+1, fifo_pos);
- if((!fifo_pos) && dma_dir == DMA_OUT && !(status & S_TC0))
- drq_set();
+ check_drq();
return r;
}
void ncr5390_device::fifo_push(uint8_t val)
{
fifo[fifo_pos++] = val;
- if(!drq && dma_dir == DMA_IN && !(status & S_TC0))
- drq_set();
+ check_drq();
}
-READ8_MEMBER(ncr5390_device::fifo_r)
+uint8_t ncr5390_device::fifo_r()
{
uint8_t r;
if(fifo_pos) {
@@ -771,20 +796,20 @@ READ8_MEMBER(ncr5390_device::fifo_r)
return r;
}
-WRITE8_MEMBER(ncr5390_device::fifo_w)
+void ncr5390_device::fifo_w(uint8_t data)
{
LOGMASKED(LOG_FIFO, "fifo_w 0x%02x fifo_pos %d (%s)\n", data, fifo_pos, machine().describe_context());
if(fifo_pos != 16)
fifo[fifo_pos++] = data;
}
-READ8_MEMBER(ncr5390_device::command_r)
+uint8_t ncr5390_device::command_r()
{
LOG("command_r (%s)\n", machine().describe_context());
return command[0];
}
-WRITE8_MEMBER(ncr5390_device::command_w)
+void ncr5390_device::command_w(uint8_t data)
{
LOG("command_w %02x command_pos %d (%s)\n", data, command_pos, machine().describe_context());
if(command_pos == 2) {
@@ -834,6 +859,8 @@ void ncr5390_device::start_command()
// clear transfer count zero flag when counter is reloaded
status &= ~S_TC0;
}
+ else
+ tcounter = 0;
switch(c) {
case CM_NOP:
@@ -854,13 +881,9 @@ void ncr5390_device::start_command()
case CM_RESET_BUS:
LOGMASKED(LOG_COMMAND, "Reset SCSI bus\n");
- reset_soft();
- // FIXME: this interrupt should be generated when the reset is reflected
- // back into the device, and not when the device starts the scsi reset
- if (!(config & 0x40)) {
- istatus = I_SCSI_RESET;
- check_irq();
- }
+ state = BUSRESET_WAIT_INT;
+ scsi_bus->ctrl_w(scsi_refid, S_RST, S_RST);
+ delay(130);
break;
case CD_RESELECT:
@@ -878,6 +901,7 @@ void ncr5390_device::start_command()
"Select with ATN and stop sequence\n");
seq = 0;
state = DISC_SEL_ARBITRATION_INIT;
+ dma_set(dma_command ? DMA_OUT : DMA_NONE);
arbitrate();
break;
@@ -896,6 +920,7 @@ void ncr5390_device::start_command()
state = INIT_XFR;
xfr_phase = scsi_bus->ctrl_r() & S_PHASE_MASK;
dma_set(dma_command ? ((xfr_phase & S_INP) ? DMA_IN : DMA_OUT) : DMA_NONE);
+ check_drq();
step(false);
break;
@@ -936,8 +961,14 @@ void ncr5390_device::start_command()
command_pop_and_chain();
break;
+ case CI_RESET_ATN:
+ LOGMASKED(LOG_COMMAND, "Reset ATN\n");
+ scsi_bus->ctrl_w(scsi_refid, 0, S_ATN);
+ command_pop_and_chain();
+ break;
+
default:
- fatalerror("start unimplemented command %02x\n", c);
+ fatalerror("ncr5390_device::start_command unimplemented command %02x\n", c);
}
}
@@ -953,12 +984,6 @@ bool ncr5390_device::check_valid_command(uint8_t cmd)
return false;
}
-int ncr5390_device::derive_msg_size(uint8_t msg_id)
-{
- const static int sizes[8] = { 6, 10, 6, 6, 6, 12, 6, 10 };
- return sizes[msg_id >> 5];
-}
-
void ncr5390_device::arbitrate()
{
state = (state & STATE_MASK) | (ARB_COMPLETE << SUB_SHIFT);
@@ -976,7 +1001,7 @@ void ncr5390_device::check_irq()
}
-READ8_MEMBER(ncr5390_device::status_r)
+uint8_t ncr5390_device::status_r()
{
uint32_t ctrl = scsi_bus->ctrl_r();
uint8_t res = status | (ctrl & S_MSG ? 4 : 0) | (ctrl & S_CTL ? 2 : 0) | (ctrl & S_INP ? 1 : 0);
@@ -985,13 +1010,13 @@ READ8_MEMBER(ncr5390_device::status_r)
return res;
}
-WRITE8_MEMBER(ncr5390_device::bus_id_w)
+void ncr5390_device::bus_id_w(uint8_t data)
{
bus_id = data & 7;
LOG("bus_id=%d\n", bus_id);
}
-READ8_MEMBER(ncr5390_device::istatus_r)
+uint8_t ncr5390_device::istatus_r()
{
uint8_t res = istatus;
@@ -1009,39 +1034,39 @@ READ8_MEMBER(ncr5390_device::istatus_r)
return res;
}
-WRITE8_MEMBER(ncr5390_device::timeout_w)
+void ncr5390_device::timeout_w(uint8_t data)
{
LOG("timeout_w 0x%02x\n", data);
select_timeout = data;
}
-READ8_MEMBER(ncr5390_device::seq_step_r)
+uint8_t ncr5390_device::seq_step_r()
{
LOG("seq_step_r %d (%s)\n", seq, machine().describe_context());
return seq;
}
-WRITE8_MEMBER(ncr5390_device::sync_period_w)
+void ncr5390_device::sync_period_w(uint8_t data)
{
sync_period = data & 0x1f;
}
-READ8_MEMBER(ncr5390_device::fifo_flags_r)
+uint8_t ncr5390_device::fifo_flags_r()
{
return fifo_pos;
}
-WRITE8_MEMBER(ncr5390_device::sync_offset_w)
+void ncr5390_device::sync_offset_w(uint8_t data)
{
sync_offset = data & 0x0f;
}
-READ8_MEMBER(ncr5390_device::conf_r)
+uint8_t ncr5390_device::conf_r()
{
return config;
}
-WRITE8_MEMBER(ncr5390_device::conf_w)
+void ncr5390_device::conf_w(uint8_t data)
{
config = data;
scsi_id = data & 7;
@@ -1051,13 +1076,13 @@ WRITE8_MEMBER(ncr5390_device::conf_w)
test_mode = true;
}
-WRITE8_MEMBER(ncr5390_device::test_w)
+void ncr5390_device::test_w(uint8_t data)
{
if (test_mode)
logerror("test_w %d (%s) - test mode not implemented\n", data, machine().describe_context());
}
-WRITE8_MEMBER(ncr5390_device::clock_w)
+void ncr5390_device::clock_w(uint8_t data)
{
clock_conv = data & 0x07;
}
@@ -1065,16 +1090,17 @@ WRITE8_MEMBER(ncr5390_device::clock_w)
void ncr5390_device::dma_set(int dir)
{
dma_dir = dir;
- if(dma_dir == DMA_OUT && fifo_pos != 16 && ((tcounter > fifo_pos) || !tcounter))
- drq_set();
+
+ // account for data already in the fifo
+ if (dir == DMA_OUT && fifo_pos)
+ decrement_tcounter(fifo_pos);
}
void ncr5390_device::dma_w(uint8_t val)
{
fifo_push(val);
decrement_tcounter();
- if(fifo_pos == 16 || (status & S_TC0))
- drq_clear();
+ check_drq();
step(false);
}
@@ -1082,34 +1108,41 @@ uint8_t ncr5390_device::dma_r()
{
uint8_t r = fifo_pop();
decrement_tcounter();
- if(!fifo_pos || (status & S_TC0))
- drq_clear();
+ check_drq();
step(false);
return r;
}
-void ncr5390_device::drq_set()
+void ncr5390_device::check_drq()
{
- if(!drq) {
- drq = true;
- m_drq_handler(drq);
+ bool drq_state = drq;
+
+ switch (dma_dir) {
+ case DMA_NONE:
+ drq_state = false;
+ break;
+
+ case DMA_IN: // device to memory
+ drq_state = !(status & S_TC0) && fifo_pos;
+ break;
+
+ case DMA_OUT: // memory to device
+ drq_state = !(status & S_TC0) && fifo_pos < 16;
+ break;
}
-}
-void ncr5390_device::drq_clear()
-{
- if(drq) {
- drq = false;
+ if (drq_state != drq) {
+ drq = drq_state;
m_drq_handler(drq);
}
}
-void ncr5390_device::decrement_tcounter()
+void ncr5390_device::decrement_tcounter(int count)
{
if (!dma_command)
return;
- tcounter--;
+ tcounter -= count;
if (tcounter == 0)
status |= S_TC0;
}
@@ -1142,14 +1175,14 @@ void ncr53c90a_device::device_start()
ncr5390_device::device_start();
}
-void ncr53c90a_device::reset_soft()
+void ncr53c90a_device::device_reset()
{
config2 = 0;
- ncr5390_device::reset_soft();
+ ncr5390_device::device_reset();
}
-READ8_MEMBER(ncr53c90a_device::status_r)
+uint8_t ncr53c90a_device::status_r()
{
uint32_t ctrl = scsi_bus->ctrl_r();
uint8_t res = (irq ? S_INTERRUPT : 0) | status | (ctrl & S_MSG ? 4 : 0) | (ctrl & S_CTL ? 2 : 0) | (ctrl & S_INP ? 1 : 0);
@@ -1180,9 +1213,75 @@ void ncr53c94_device::device_start()
ncr53c90a_device::device_start();
}
-void ncr53c94_device::reset_soft()
+void ncr53c94_device::device_reset()
{
config3 = 0;
- ncr53c90a_device::reset_soft();
+ ncr53c90a_device::device_reset();
+}
+
+u16 ncr53c94_device::dma16_r()
+{
+ // check fifo underflow
+ if (fifo_pos < 2)
+ fatalerror("ncr53c94_device::dma16_r fifo_pos %d\n", fifo_pos);
+
+ // pop two bytes from fifo
+ u16 const data = (fifo[0] << 8) | fifo[1];
+ fifo_pos -= 2;
+ memmove(fifo, fifo + 2, fifo_pos);
+
+ // update drq
+ decrement_tcounter(2);
+ check_drq();
+
+ step(false);
+
+ return data;
+}
+
+void ncr53c94_device::dma16_w(u16 data)
+{
+ // check fifo overflow
+ if (fifo_pos > 14)
+ fatalerror("ncr53c94_device::dma16_w fifo_pos %d\n", fifo_pos);
+
+ // push two bytes into fifo
+ fifo[fifo_pos++] = data >> 8;
+ fifo[fifo_pos++] = data;
+
+ // update drq
+ decrement_tcounter(2);
+ check_drq();
+
+ step(false);
+}
+
+void ncr53c94_device::check_drq()
+{
+ if (m_busmd != BUSMD_0)
+ {
+ bool drq_state = drq;
+
+ switch (dma_dir) {
+ case DMA_NONE:
+ drq_state = false;
+ break;
+
+ case DMA_IN: // device to memory
+ drq_state = !(status & S_TC0) && fifo_pos > 1;
+ break;
+
+ case DMA_OUT: // memory to device
+ drq_state = !(status & S_TC0) && fifo_pos < 15;
+ break;
+ }
+
+ if (drq_state != drq) {
+ drq = drq_state;
+ m_drq_handler(drq);
+ }
+ }
+ else
+ ncr5390_device::check_drq();
}
diff --git a/src/devices/machine/ncr5390.h b/src/devices/machine/ncr5390.h
index bf301bed266..7cc2469bde5 100644
--- a/src/devices/machine/ncr5390.h
+++ b/src/devices/machine/ncr5390.h
@@ -7,59 +7,46 @@
#include "machine/nscsi_bus.h"
-#define MCFG_NCR5390_IRQ_HANDLER(_devcb) \
- downcast<ncr5390_device &>(*device).set_irq_handler(DEVCB_##_devcb);
-
-#define MCFG_NCR5390_DRQ_HANDLER(_devcb) \
- downcast<ncr5390_device &>(*device).set_drq_handler(DEVCB_##_devcb);
-
class ncr5390_device : public nscsi_device
{
public:
ncr5390_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
// configuration helpers
- template <class Object> devcb_base &set_irq_handler(Object &&cb) { return m_irq_handler.set_callback(std::forward<Object>(cb)); }
- template <class Object> devcb_base &set_drq_handler(Object &&cb) { return m_drq_handler.set_callback(std::forward<Object>(cb)); }
-
auto irq_handler_cb() { return m_irq_handler.bind(); }
auto drq_handler_cb() { return m_drq_handler.bind(); }
virtual void map(address_map &map);
- DECLARE_READ8_MEMBER(tcounter_lo_r);
- DECLARE_WRITE8_MEMBER(tcount_lo_w);
- DECLARE_READ8_MEMBER(tcounter_hi_r);
- DECLARE_WRITE8_MEMBER(tcount_hi_w);
- DECLARE_READ8_MEMBER(fifo_r);
- DECLARE_WRITE8_MEMBER(fifo_w);
- DECLARE_READ8_MEMBER(command_r);
- DECLARE_WRITE8_MEMBER(command_w);
- virtual DECLARE_READ8_MEMBER(status_r);
- DECLARE_WRITE8_MEMBER(bus_id_w);
- DECLARE_READ8_MEMBER(istatus_r);
- DECLARE_WRITE8_MEMBER(timeout_w);
- DECLARE_READ8_MEMBER(seq_step_r);
- DECLARE_WRITE8_MEMBER(sync_period_w);
- DECLARE_READ8_MEMBER(fifo_flags_r);
- DECLARE_WRITE8_MEMBER(sync_offset_w);
- DECLARE_READ8_MEMBER(conf_r);
- DECLARE_WRITE8_MEMBER(conf_w);
- DECLARE_WRITE8_MEMBER(test_w);
- DECLARE_WRITE8_MEMBER(clock_w);
-
- virtual DECLARE_READ8_MEMBER(read);
- virtual DECLARE_WRITE8_MEMBER(write);
+ uint8_t tcounter_lo_r();
+ void tcount_lo_w(uint8_t data);
+ uint8_t tcounter_hi_r();
+ void tcount_hi_w(uint8_t data);
+ uint8_t fifo_r();
+ void fifo_w(uint8_t data);
+ uint8_t command_r();
+ void command_w(uint8_t data);
+ virtual uint8_t status_r();
+ void bus_id_w(uint8_t data);
+ uint8_t istatus_r();
+ void timeout_w(uint8_t data);
+ uint8_t seq_step_r();
+ void sync_period_w(uint8_t data);
+ uint8_t fifo_flags_r();
+ void sync_offset_w(uint8_t data);
+ uint8_t conf_r();
+ void conf_w(uint8_t data);
+ void test_w(uint8_t data);
+ void clock_w(uint8_t data);
+
+ virtual uint8_t read(offs_t offset);
+ virtual void write(offs_t offset, uint8_t data);
virtual void scsi_ctrl_changed() override;
uint8_t dma_r();
void dma_w(uint8_t val);
- // memory mapped wrappers for dma read/write
- DECLARE_READ8_MEMBER(mdma_r) { return dma_r(); }
- DECLARE_WRITE8_MEMBER(mdma_w) { dma_w(data); }
-
protected:
ncr5390_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
@@ -220,13 +207,11 @@ protected:
bool test_mode;
void dma_set(int dir);
- void drq_set();
- void drq_clear();
+ virtual void check_drq();
void start_command();
void step(bool timeout);
virtual bool check_valid_command(uint8_t cmd);
- int derive_msg_size(uint8_t msg_id);
void function_complete();
void function_bus_complete();
void bus_complete();
@@ -235,10 +220,6 @@ protected:
void command_pop_and_chain();
void check_irq();
-protected:
- virtual void reset_soft();
-
-private:
void reset_disconnect();
uint8_t fifo_pop();
@@ -249,7 +230,7 @@ private:
void delay(int cycles);
void delay_cycles(int cycles);
- void decrement_tcounter();
+ void decrement_tcounter(int count = 1);
devcb_write_line m_irq_handler;
devcb_write_line m_drq_handler;
@@ -262,19 +243,19 @@ public:
virtual void map(address_map &map) override;
- virtual DECLARE_READ8_MEMBER(status_r) override;
+ virtual uint8_t status_r() override;
- DECLARE_READ8_MEMBER(conf2_r) { return config2; };
- DECLARE_WRITE8_MEMBER(conf2_w) { config2 = data; };
+ uint8_t conf2_r() { return config2; };
+ void conf2_w(uint8_t data) { config2 = data; };
- virtual DECLARE_READ8_MEMBER(read) override;
- virtual DECLARE_WRITE8_MEMBER(write) override;
+ virtual uint8_t read(offs_t offset) override;
+ virtual void write(offs_t offset, uint8_t data) override;
protected:
ncr53c90a_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
virtual void device_start() override;
- virtual void reset_soft() override;
+ virtual void device_reset() override;
virtual bool check_valid_command(uint8_t cmd) override;
@@ -283,6 +264,18 @@ protected:
S_INTERRUPT = 0x80,
};
+ enum conf2_mask : u8
+ {
+ PGDP = 0x01, // pass through/generate data parity
+ PGRP = 0x02, // pass through/generate register parity
+ ACDPE = 0x04, // abort on command/data parity error
+ S2FE = 0x08, // scsi-2 features enable
+ TSDR = 0x10, // tri-state dma request
+ SBO = 0x20, // select byte order
+ LSP = 0x40, // latch scsi phase
+ DAE = 0x80, // data alignment enable
+ };
+
private:
u8 config2;
};
@@ -292,26 +285,56 @@ class ncr53c94_device : public ncr53c90a_device
public:
ncr53c94_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ enum busmd_t : u8
+ {
+ BUSMD_0 = 0, // single bus: 8-bit host, 8 bit dma
+ BUSMD_1 = 1, // single bus: 8 bit host, 16 bit dma
+ BUSMD_2 = 2, // two buses: 8 bit multiplexed host, 16 bit dma
+ BUSMD_3 = 3, // two buses: 8 bit host, 16 bit dma
+ };
+ void set_busmd(busmd_t const busmd) { m_busmd = busmd; }
+
virtual void map(address_map &map) override;
- DECLARE_READ8_MEMBER(conf3_r) { return config3; };
- DECLARE_WRITE8_MEMBER(conf3_w) { config3 = data; };
- DECLARE_WRITE8_MEMBER(fifo_align_w) { fifo_align = data; };
+ uint8_t conf3_r() { return config3; };
+ void conf3_w(uint8_t data) { config3 = data; };
+ void fifo_align_w(uint8_t data) { fifo_align = data; };
+
+ virtual uint8_t read(offs_t offset) override;
+ virtual void write(offs_t offset, uint8_t data) override;
- virtual DECLARE_READ8_MEMBER(read) override;
- virtual DECLARE_WRITE8_MEMBER(write) override;
+ u16 dma16_r();
+ void dma16_w(u16 data);
protected:
+ ncr53c94_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
+
+ enum conf3_mask : u8
+ {
+ BS8 = 0x01, // burst size 8
+ MDM = 0x02, // modify dma mode
+ LBTM = 0x04, // last byte transfer mode
+ };
+
virtual void device_start() override;
- virtual void reset_soft() override;
+ virtual void device_reset() override;
+ virtual void check_drq() override;
private:
u8 config3;
u8 fifo_align;
+ busmd_t m_busmd;
+};
+
+class ncr53cf94_device : public ncr53c94_device
+{
+public:
+ ncr53cf94_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
DECLARE_DEVICE_TYPE(NCR5390, ncr5390_device)
DECLARE_DEVICE_TYPE(NCR53C90A, ncr53c90a_device)
DECLARE_DEVICE_TYPE(NCR53C94, ncr53c94_device)
+DECLARE_DEVICE_TYPE(NCR53CF94, ncr53cf94_device)
#endif // MAME_MACHINE_NCR5390_H
diff --git a/src/devices/machine/ncr539x.cpp b/src/devices/machine/ncr539x.cpp
index 58c69a16ad1..09e0bee9f21 100644
--- a/src/devices/machine/ncr539x.cpp
+++ b/src/devices/machine/ncr539x.cpp
@@ -280,7 +280,7 @@ void ncr539x_device::device_timer(emu_timer &timer, device_timer_id tid, int par
}
}
-READ8_MEMBER( ncr539x_device::read )
+uint8_t ncr539x_device::read(offs_t offset)
{
uint8_t rv = 0;
@@ -412,7 +412,7 @@ READ8_MEMBER( ncr539x_device::read )
return rv;
}
-WRITE8_MEMBER( ncr539x_device::write )
+void ncr539x_device::write(offs_t offset, uint8_t data)
{
//if (offset != 2)
LOG("539x: Write %02x @ %s (%02x) (%s)\n", data, wrregs[offset], offset, machine().describe_context());
diff --git a/src/devices/machine/ncr539x.h b/src/devices/machine/ncr539x.h
index 8caa26c25a1..8172f4ea5f2 100644
--- a/src/devices/machine/ncr539x.h
+++ b/src/devices/machine/ncr539x.h
@@ -14,11 +14,6 @@
// device stuff
-#define MCFG_NCR539X_OUT_IRQ_CB(_devcb) \
- downcast<ncr539x_device &>(*device).set_out_irq_callback(DEVCB_##_devcb);
-
-#define MCFG_NCR539X_OUT_DRQ_CB(_devcb) \
- downcast<ncr539x_device &>(*device).set_out_drq_callback(DEVCB_##_devcb);
class ncr539x_device : public legacy_scsi_host_adapter
{
@@ -26,14 +21,12 @@ public:
// construction/destruction
ncr539x_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
- template <class Object> devcb_base &set_out_irq_callback(Object &&cb) { return m_out_irq_cb.set_callback(std::forward<Object>(cb)); }
- template <class Object> devcb_base &set_out_drq_callback(Object &&cb) { return m_out_drq_cb.set_callback(std::forward<Object>(cb)); }
auto irq_callback() { return m_out_irq_cb.bind(); }
auto drq_callback() { return m_out_drq_cb.bind(); }
// our API
- DECLARE_READ8_MEMBER(read);
- DECLARE_WRITE8_MEMBER(write);
+ uint8_t read(offs_t offset);
+ void write(offs_t offset, uint8_t data);
void dma_read_data(int bytes, uint8_t *pData);
void dma_write_data(int bytes, uint8_t *pData);
diff --git a/src/devices/machine/netlist.cpp b/src/devices/machine/netlist.cpp
index 648d435ace8..3e7580be5b9 100644
--- a/src/devices/machine/netlist.cpp
+++ b/src/devices/machine/netlist.cpp
@@ -49,21 +49,16 @@ DEFINE_DEVICE_TYPE(NETLIST_STREAM_OUTPUT, netlist_mame_stream_output_device, "nl
// Special netlist extension devices ....
// ----------------------------------------------------------------------------------------
-class netlist_mame_device::netlist_mame_t : public netlist::netlist_t
+class netlist_mame_device::netlist_mame_callbacks_t : public netlist::callbacks_t
{
public:
- netlist_mame_t(netlist_mame_device &parent, const pstring &aname)
- : netlist::netlist_t(aname)
+ netlist_mame_callbacks_t(netlist_mame_device &parent)
+ : netlist::callbacks_t()
, m_parent(parent)
{
}
- running_machine &machine() { return m_parent.machine(); }
-
-
- netlist_mame_device &parent() { return m_parent; }
-
protected:
void vlog(const plib::plog_level &l, const pstring &ls) const override
{
@@ -95,6 +90,24 @@ private:
};
+class netlist_mame_device::netlist_mame_t : public netlist::netlist_t
+{
+public:
+
+ netlist_mame_t(netlist_mame_device &parent, const pstring &aname)
+ : netlist::netlist_t(aname, plib::make_unique<netlist_mame_device::netlist_mame_callbacks_t>(parent))
+ , m_parent(parent)
+ {
+ }
+
+ running_machine &machine() { return m_parent.machine(); }
+ netlist_mame_device &parent() { return m_parent; }
+
+private:
+ netlist_mame_device &m_parent;
+};
+
+
namespace {
// ----------------------------------------------------------------------------------------
@@ -104,13 +117,13 @@ namespace {
class NETLIB_NAME(analog_callback) : public netlist::device_t
{
public:
- NETLIB_NAME(analog_callback)(netlist::netlist_t &anetlist, const pstring &name)
+ NETLIB_NAME(analog_callback)(netlist::netlist_state_t &anetlist, const pstring &name)
: device_t(anetlist, name)
, m_in(*this, "IN")
, m_cpu_device(nullptr)
, m_last(*this, "m_last", 0)
{
- m_cpu_device = downcast<netlist_mame_cpu_device *>(&downcast<netlist_mame_device::netlist_mame_t &>(netlist()).parent());
+ m_cpu_device = downcast<netlist_mame_cpu_device *>(&static_cast<netlist_mame_device::netlist_mame_t &>(exec()).parent());
}
ATTR_COLD void reset() override
@@ -131,7 +144,7 @@ public:
// avoid calls due to noise
if (std::fabs(cur - m_last) > 1e-6)
{
- m_cpu_device->update_time_x();
+ m_cpu_device->update_icount(exec().time());
m_callback(cur, m_cpu_device->local_time());
m_cpu_device->check_mame_abort_slice();
m_last = cur;
@@ -152,13 +165,13 @@ private:
class NETLIB_NAME(logic_callback) : public netlist::device_t
{
public:
- NETLIB_NAME(logic_callback)(netlist::netlist_t &anetlist, const pstring &name)
+ NETLIB_NAME(logic_callback)(netlist::netlist_state_t &anetlist, const pstring &name)
: device_t(anetlist, name)
, m_in(*this, "IN")
, m_cpu_device(nullptr)
, m_last(*this, "m_last", 0)
{
- m_cpu_device = downcast<netlist_mame_cpu_device *>(&downcast<netlist_mame_device::netlist_mame_t &>(netlist()).parent());
+ m_cpu_device = downcast<netlist_mame_cpu_device *>(&static_cast<netlist_mame_device::netlist_mame_t &>(exec()).parent());
}
ATTR_COLD void reset() override
@@ -173,13 +186,13 @@ public:
NETLIB_UPDATEI()
{
- netlist_sig_t cur = m_in();
+ netlist::netlist_sig_t cur = m_in();
// FIXME: make this a parameter
// avoid calls due to noise
if (cur != m_last)
{
- m_cpu_device->update_time_x();
+ m_cpu_device->update_icount(exec().time());
m_callback(cur, m_cpu_device->local_time());
m_cpu_device->check_mame_abort_slice();
m_last = cur;
@@ -190,9 +203,10 @@ private:
netlist::logic_input_t m_in;
netlist_mame_logic_output_device::output_delegate m_callback;
netlist_mame_cpu_device *m_cpu_device;
- netlist::state_var<netlist_sig_t> m_last;
+ netlist::state_var<netlist::netlist_sig_t> m_last;
};
+
// ----------------------------------------------------------------------------------------
// Extensions to interface netlist with MAME code ....
// ----------------------------------------------------------------------------------------
@@ -200,22 +214,26 @@ private:
class netlist_source_memregion_t : public netlist::source_t
{
public:
- netlist_source_memregion_t(netlist::setup_t &setup, pstring name)
- : netlist::source_t(setup), m_name(name)
+ netlist_source_memregion_t(device_t &dev, pstring name)
+ : netlist::source_t(), m_dev(dev), m_name(name)
{
}
- virtual std::unique_ptr<plib::pistream> stream(const pstring &name) override;
+ virtual plib::unique_ptr<plib::pistream> stream(const pstring &name) override;
private:
+ device_t &m_dev;
pstring m_name;
};
class netlist_data_memregions_t : public netlist::source_t
{
public:
- netlist_data_memregions_t(netlist::setup_t &setup);
+ netlist_data_memregions_t(device_t &dev);
- virtual std::unique_ptr<plib::pistream> stream(const pstring &name) override;
+ virtual plib::unique_ptr<plib::pistream> stream(const pstring &name) override;
+
+private:
+ device_t &m_dev;
};
@@ -223,30 +241,31 @@ public:
// memregion source support
// ----------------------------------------------------------------------------------------
-std::unique_ptr<plib::pistream> netlist_source_memregion_t::stream(const pstring &name)
+plib::unique_ptr<plib::pistream> netlist_source_memregion_t::stream(const pstring &name)
{
- memory_region *mem = downcast<netlist_mame_device::netlist_mame_t &>(setup().netlist()).machine().root_device().memregion(m_name.c_str());
- return plib::make_unique_base<plib::pistream, plib::pimemstream>(mem->base(), mem->bytes());
+ //memory_region *mem = static_cast<netlist_mame_device::netlist_mame_t &>(setup().setup().exec()).machine().root_device().memregion(m_name.c_str());
+ memory_region *mem = m_dev.machine().root_device().memregion(m_name.c_str());
+ return plib::make_unique<plib::pimemstream>(mem->base(), mem->bytes());
}
-netlist_data_memregions_t::netlist_data_memregions_t(netlist::setup_t &setup)
- : netlist::source_t(setup, netlist::source_t::DATA)
+netlist_data_memregions_t::netlist_data_memregions_t(device_t &dev)
+ : netlist::source_t(netlist::source_t::DATA), m_dev(dev)
{
}
-std::unique_ptr<plib::pistream> netlist_data_memregions_t::stream(const pstring &name)
+plib::unique_ptr<plib::pistream> netlist_data_memregions_t::stream(const pstring &name)
{
- memory_region *mem = downcast<netlist_mame_device::netlist_mame_t &>(setup().netlist()).parent().memregion(name.c_str());
- //memory_region *mem = downcast<netlist_mame_t &>(setup().netlist()).machine().root_device().memregion(name.c_str());
+ //memory_region *mem = static_cast<netlist_mame_device::netlist_mame_t &>(setup().setup().exec()).parent().memregion(name.c_str());
+ memory_region *mem = m_dev.memregion(name.c_str());
if (mem != nullptr)
{
- return plib::make_unique_base<plib::pistream, plib::pimemstream>(mem->base(), mem->bytes());
+ return plib::make_unique<plib::pimemstream>(mem->base(), mem->bytes());
}
else
{
// This should be the last data provider being called - last resort
fatalerror("data named %s not found in device rom regions\n", name.c_str());
- return std::unique_ptr<plib::pistream>(nullptr);
+ return plib::unique_ptr<plib::pistream>(nullptr);
}
}
@@ -261,44 +280,55 @@ std::unique_ptr<plib::pistream> netlist_data_memregions_t::stream(const pstring
class NETLIB_NAME(sound_out) : public netlist::device_t
{
public:
- NETLIB_NAME(sound_out)(netlist::netlist_t &anetlist, const pstring &name)
+ NETLIB_NAME(sound_out)(netlist::netlist_state_t &anetlist, const pstring &name)
: netlist::device_t(anetlist, name)
, m_channel(*this, "CHAN", 0)
, m_mult(*this, "MULT", 1000.0)
, m_offset(*this, "OFFSET", 0.0)
, m_buffer(nullptr)
- , m_sample(netlist::netlist_time::from_hz(1)) //sufficiently big enough
+ , m_bufsize(0)
+ , m_sample_time(netlist::netlist_time::from_hz(1)) //sufficiently big enough
, m_in(*this, "IN")
, m_cur(0.0)
, m_last_pos(0)
- , m_last_buffer(*this, "m_last_buffer", netlist::netlist_time::zero())
+ , m_last_buffer_time(*this, "m_last_buffer", netlist::netlist_time::zero())
{
}
- static const int BUFSIZE = 2048;
+ //static const int BUFSIZE = 2048;
ATTR_COLD void reset() override
{
m_cur = 0.0;
m_last_pos = 0;
- m_last_buffer = netlist::netlist_time::zero();
+ m_last_buffer_time = netlist::netlist_time::zero();
}
ATTR_HOT void sound_update(const netlist::netlist_time &upto)
{
- int pos = (upto - m_last_buffer) / m_sample;
- if (pos >= BUFSIZE)
- netlist().log().fatal("sound {1}: exceeded BUFSIZE\n", name().c_str());
+ int pos = (upto - m_last_buffer_time) / m_sample_time;
+ if (pos > m_bufsize)
+ throw emu_fatalerror("sound %s: pos %d exceeded bufsize %d\n", name().c_str(), pos, m_bufsize);
while (m_last_pos < pos )
{
m_buffer[m_last_pos++] = (stream_sample_t) m_cur;
}
}
+ ATTR_HOT void sound_update_fill(int samples)
+ {
+ if (samples > m_bufsize)
+ throw emu_fatalerror("sound %s: pos %d exceeded bufsize %d\n", name().c_str(), samples, m_bufsize);
+ while (m_last_pos < samples )
+ {
+ m_buffer[m_last_pos++] = (stream_sample_t) m_cur;
+ }
+ }
+
NETLIB_UPDATEI()
{
nl_double val = m_in() * m_mult() + m_offset();
- sound_update(netlist().time());
+ sound_update(exec().time());
/* ignore spikes */
if (std::abs(val) < 32767.0)
m_cur = val;
@@ -313,21 +343,22 @@ public:
ATTR_HOT void buffer_reset(const netlist::netlist_time &upto)
{
m_last_pos = 0;
- m_last_buffer = upto;
- m_cur = 0.0;
+ m_last_buffer_time = upto;
}
netlist::param_int_t m_channel;
netlist::param_double_t m_mult;
netlist::param_double_t m_offset;
stream_sample_t *m_buffer;
- netlist::netlist_time m_sample;
+ int m_bufsize;
+
+ netlist::netlist_time m_sample_time;
private:
netlist::analog_input_t m_in;
double m_cur;
int m_last_pos;
- netlist::state_var<netlist::netlist_time> m_last_buffer;
+ netlist::state_var<netlist::netlist_time> m_last_buffer_time;
};
// ----------------------------------------------------------------------------------------
@@ -337,58 +368,57 @@ private:
class NETLIB_NAME(sound_in) : public netlist::device_t
{
public:
- NETLIB_NAME(sound_in)(netlist::netlist_t &anetlist, const pstring &name)
+
+ static const int MAX_INPUT_CHANNELS = 16;
+
+ NETLIB_NAME(sound_in)(netlist::netlist_state_t &anetlist, const pstring &name)
: netlist::device_t(anetlist, name)
+ , m_inc(netlist::netlist_time::from_nsec(1))
, m_feedback(*this, "FB") // clock part
, m_Q(*this, "Q")
, m_pos(0)
- , m_num_channel(0)
+ , m_num_channels(0)
{
connect(m_feedback, m_Q);
- m_inc = netlist::netlist_time::from_nsec(1);
-
for (int i = 0; i < MAX_INPUT_CHANNELS; i++)
{
- m_param_name[i] = std::make_unique<netlist::param_str_t>(*this, plib::pfmt("CHAN{1}")(i), "");
- m_param_mult[i] = std::make_unique<netlist::param_double_t>(*this, plib::pfmt("MULT{1}")(i), 1.0);
- m_param_offset[i] = std::make_unique<netlist::param_double_t>(*this, plib::pfmt("OFFSET{1}")(i), 0.0);
+ m_channels[i].m_param_name = netlist::pool().make_poolptr<netlist::param_str_t>(*this, plib::pfmt("CHAN{1}")(i), "");
+ m_channels[i].m_param_mult = netlist::pool().make_poolptr<netlist::param_double_t>(*this, plib::pfmt("MULT{1}")(i), 1.0);
+ m_channels[i].m_param_offset = netlist::pool().make_poolptr<netlist::param_double_t>(*this, plib::pfmt("OFFSET{1}")(i), 0.0);
}
}
- static const int MAX_INPUT_CHANNELS = 10;
-
ATTR_COLD void reset() override
{
m_pos = 0;
- for (auto & elem : m_buffer)
- elem = nullptr;
+ for (auto & elem : m_channels)
+ elem.m_buffer = nullptr;
}
- ATTR_COLD int resolve()
+ ATTR_COLD void resolve()
{
m_pos = 0;
for (int i = 0; i < MAX_INPUT_CHANNELS; i++)
{
- if ((*m_param_name[i])() != pstring(""))
+ if ((*m_channels[i].m_param_name)() != pstring(""))
{
- if (i != m_num_channel)
- netlist().log().fatal("sound input numbering has to be sequential!");
- m_num_channel++;
- m_param[i] = dynamic_cast<netlist::param_double_t *>(setup().find_param((*m_param_name[i])(), true));
+ if (i != m_num_channels)
+ state().log().fatal("sound input numbering has to be sequential!");
+ m_num_channels++;
+ m_channels[i].m_param = dynamic_cast<netlist::param_double_t *>(setup().find_param((*m_channels[i].m_param_name)(), true));
}
}
- return m_num_channel;
}
NETLIB_UPDATEI()
{
- for (int i=0; i<m_num_channel; i++)
+ for (int i=0; i<m_num_channels; i++)
{
- if (m_buffer[i] == nullptr)
+ if (m_channels[i].m_buffer == nullptr)
break; // stop, called outside of stream_update
- const nl_double v = m_buffer[i][m_pos];
- m_param[i]->setTo(v * (*m_param_mult[i])() + (*m_param_offset[i])());
+ const nl_double v = m_channels[i].m_buffer[m_pos];
+ m_channels[i].m_param->setTo(v * (*m_channels[i].m_param_mult)() + (*m_channels[i].m_param_offset)());
}
m_pos++;
m_Q.net().toggle_and_push_to_queue(m_inc);
@@ -400,19 +430,25 @@ public:
m_pos = 0;
}
- std::unique_ptr<netlist::param_str_t> m_param_name[MAX_INPUT_CHANNELS];
- netlist::param_double_t *m_param[MAX_INPUT_CHANNELS];
- stream_sample_t *m_buffer[MAX_INPUT_CHANNELS];
- std::unique_ptr<netlist::param_double_t> m_param_mult[MAX_INPUT_CHANNELS];
- std::unique_ptr<netlist::param_double_t> m_param_offset[MAX_INPUT_CHANNELS];
+ struct channel
+ {
+ netlist::pool_owned_ptr<netlist::param_str_t> m_param_name;
+ netlist::param_double_t *m_param;
+ stream_sample_t *m_buffer;
+ netlist::pool_owned_ptr<netlist::param_double_t> m_param_mult;
+ netlist::pool_owned_ptr<netlist::param_double_t> m_param_offset;
+ };
+ channel m_channels[MAX_INPUT_CHANNELS];
netlist::netlist_time m_inc;
+ int num_channels() { return m_num_channels; }
+
private:
netlist::logic_input_t m_feedback;
netlist::logic_output_t m_Q;
int m_pos;
- int m_num_channel;
+ int m_num_channels;
};
@@ -431,26 +467,25 @@ private:
netlist::setup_t &netlist_mame_device::setup()
{
- return m_netlist->setup();
+ return m_netlist->nlstate().setup();
}
-void netlist_mame_device::register_memregion_source(netlist::setup_t &setup, const char *name)
+void netlist_mame_device::register_memregion_source(netlist::nlparse_t &setup, device_t &dev, const char *name)
{
- setup.register_source(plib::make_unique_base<netlist::source_t, netlist_source_memregion_t>(setup, pstring(name, pstring::UTF8)));
+ setup.register_source(plib::make_unique<netlist_source_memregion_t>(dev, pstring(name)));
}
void netlist_mame_analog_input_device::write(const double val)
{
- if (is_sound_device())
- {
- update_to_current_time();
- m_param->setTo(val * m_mult + m_offset);
- }
- else
- {
- // FIXME: use device timer ....
- m_param->setTo(val * m_mult + m_offset);
- }
+ m_value_for_device_timer = val * m_mult + m_offset;
+ if (m_value_for_device_timer != (*m_param)())
+ synchronize(0, 0, &m_value_for_device_timer);
+}
+
+void netlist_mame_analog_input_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
+{
+ update_to_current_time();
+ m_param->setTo(*((double *) ptr));
}
void netlist_mame_int_input_device::write(const uint32_t val)
@@ -469,15 +504,13 @@ void netlist_mame_logic_input_device::write(const uint32_t val)
void netlist_mame_int_input_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
{
- if (is_sound_device())
- update_to_current_time();
+ update_to_current_time();
m_param->setTo(param);
}
void netlist_mame_logic_input_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
{
- if (is_sound_device())
- update_to_current_time();
+ update_to_current_time();
m_param->setTo(param);
}
@@ -500,7 +533,7 @@ void netlist_mame_cpu_device::state_string_export(const device_state_entry &entr
if (entry.index() & 1)
str = string_format("%10.6f", *((double *)entry.dataptr()));
else
- str = string_format("%d", *((netlist_sig_t *)entry.dataptr()));
+ str = string_format("%d", *((netlist::netlist_sig_t *)entry.dataptr()));
}
}
@@ -528,7 +561,7 @@ netlist_mame_analog_input_device::netlist_mame_analog_input_device(const machine
void netlist_mame_analog_input_device::device_start()
{
LOGDEVCALLS("start\n");
- netlist::param_t *p = this->nl_owner().setup().find_param(pstring(m_param_name, pstring::UTF8));
+ netlist::param_t *p = this->nl_owner().setup().find_param(pstring(m_param_name));
m_param = dynamic_cast<netlist::param_double_t *>(p);
if (m_param == nullptr)
{
@@ -560,16 +593,17 @@ void netlist_mame_analog_output_device::set_params(const char *in_name, output_d
m_delegate = std::move(adelegate);
}
-void netlist_mame_analog_output_device::custom_netlist_additions(netlist::setup_t &setup)
+void netlist_mame_analog_output_device::custom_netlist_additions(netlist::netlist_state_t &nlstate)
{
- const pstring pin(m_in, pstring::UTF8);
+ const pstring pin(m_in);
pstring dname = pstring("OUT_") + pin;
+ pstring dfqn = nlstate.setup().build_fqn(dname);
m_delegate.bind_relative_to(owner()->machine().root_device());
- plib::owned_ptr<netlist::device_t> dev = plib::owned_ptr<netlist::device_t>::Create<NETLIB_NAME(analog_callback)>(setup.netlist(), setup.build_fqn(dname));
+ auto dev = netlist::pool().make_poolptr<NETLIB_NAME(analog_callback)>(nlstate, dfqn);
static_cast<NETLIB_NAME(analog_callback) *>(dev.get())->register_callback(std::move(m_delegate));
- setup.netlist().register_dev(std::move(dev));
- setup.register_link(dname + ".IN", pin);
+ nlstate.add_dev(dfqn, std::move(dev));
+ nlstate.setup().register_link(dname + ".IN", pin);
}
void netlist_mame_analog_output_device::device_start()
@@ -595,16 +629,18 @@ void netlist_mame_logic_output_device::set_params(const char *in_name, output_de
m_delegate = std::move(adelegate);
}
-void netlist_mame_logic_output_device::custom_netlist_additions(netlist::setup_t &setup)
+void netlist_mame_logic_output_device::custom_netlist_additions(netlist::netlist_state_t &nlstate)
{
- pstring pin(m_in, pstring::UTF8);
+ pstring pin(m_in);
pstring dname = "OUT_" + pin;
+ pstring dfqn = nlstate.setup().build_fqn(dname);
+
m_delegate.bind_relative_to(owner()->machine().root_device());
- plib::owned_ptr<netlist::device_t> dev = plib::owned_ptr<netlist::device_t>::Create<NETLIB_NAME(logic_callback)>(setup.netlist(), setup.build_fqn(dname));
+ auto dev = netlist::pool().make_poolptr<NETLIB_NAME(logic_callback)>(nlstate, dfqn);
static_cast<NETLIB_NAME(logic_callback) *>(dev.get())->register_callback(std::move(m_delegate));
- setup.netlist().register_dev(std::move(dev));
- setup.register_link(dname + ".IN", pin);
+ nlstate.add_dev(dfqn, std::move(dev));
+ nlstate.setup().register_link(dname + ".IN", pin);
}
void netlist_mame_logic_output_device::device_start()
@@ -638,7 +674,7 @@ void netlist_mame_int_input_device::set_params(const char *param_name, const uin
void netlist_mame_int_input_device::device_start()
{
LOGDEVCALLS("start\n");
- netlist::param_t *p = downcast<netlist_mame_device *>(this->owner())->setup().find_param(pstring(m_param_name, pstring::UTF8));
+ netlist::param_t *p = downcast<netlist_mame_device *>(this->owner())->setup().find_param(pstring(m_param_name));
m_param = dynamic_cast<netlist::param_int_t *>(p);
if (m_param == nullptr)
{
@@ -669,7 +705,7 @@ void netlist_mame_logic_input_device::set_params(const char *param_name, const u
void netlist_mame_logic_input_device::device_start()
{
LOGDEVCALLS("start\n");
- netlist::param_t *p = downcast<netlist_mame_device *>(this->owner())->setup().find_param(pstring(m_param_name, pstring::UTF8));
+ netlist::param_t *p = downcast<netlist_mame_device *>(this->owner())->setup().find_param(pstring(m_param_name));
m_param = dynamic_cast<netlist::param_logic_t *>(p);
if (m_param == nullptr)
{
@@ -700,7 +736,7 @@ void netlist_mame_ram_pointer_device::set_params(const char *param_name)
void netlist_mame_ram_pointer_device::device_start()
{
LOGDEVCALLS("start\n");
- netlist::param_t *p = downcast<netlist_mame_device *>(this->owner())->setup().find_param(pstring(m_param_name, pstring::UTF8));
+ netlist::param_t *p = downcast<netlist_mame_device *>(this->owner())->setup().find_param(pstring(m_param_name));
m_param = dynamic_cast<netlist::param_ptr_t *>(p);
if (m_param == nullptr)
{
@@ -733,17 +769,17 @@ void netlist_mame_stream_input_device::device_start()
LOGDEVCALLS("start\n");
}
-void netlist_mame_stream_input_device::custom_netlist_additions(netlist::setup_t &setup)
+void netlist_mame_stream_input_device::custom_netlist_additions(netlist::netlist_state_t &nlstate)
{
- if (!setup.device_exists("STREAM_INPUT"))
- setup.register_dev("NETDEV_SOUND_IN", "STREAM_INPUT");
+ if (!nlstate.setup().device_exists("STREAM_INPUT"))
+ nlstate.setup().register_dev("NETDEV_SOUND_IN", "STREAM_INPUT");
pstring sparam = plib::pfmt("STREAM_INPUT.CHAN{1}")(m_channel);
- setup.register_param(sparam, pstring(m_param_name, pstring::UTF8));
+ nlstate.setup().register_param(sparam, pstring(m_param_name));
sparam = plib::pfmt("STREAM_INPUT.MULT{1}")(m_channel);
- setup.register_param(sparam, m_mult);
+ nlstate.setup().register_param(sparam, m_mult);
sparam = plib::pfmt("STREAM_INPUT.OFFSET{1}")(m_channel);
- setup.register_param(sparam, m_offset);
+ nlstate.setup().register_param(sparam, m_offset);
}
// ----------------------------------------------------------------------------------------
@@ -769,18 +805,18 @@ void netlist_mame_stream_output_device::device_start()
LOGDEVCALLS("start\n");
}
-void netlist_mame_stream_output_device::custom_netlist_additions(netlist::setup_t &setup)
+void netlist_mame_stream_output_device::custom_netlist_additions(netlist::netlist_state_t &nlstate)
{
//NETLIB_NAME(sound_out) *snd_out;
pstring sname = plib::pfmt("STREAM_OUT_{1}")(m_channel);
//snd_out = dynamic_cast<NETLIB_NAME(sound_out) *>(setup.register_dev("nld_sound_out", sname));
- setup.register_dev("NETDEV_SOUND_OUT", sname);
+ nlstate.setup().register_dev("NETDEV_SOUND_OUT", sname);
- setup.register_param(sname + ".CHAN" , m_channel);
- setup.register_param(sname + ".MULT", m_mult);
- setup.register_param(sname + ".OFFSET", m_offset);
- setup.register_link(sname + ".IN", pstring(m_out_name, pstring::UTF8));
+ nlstate.setup().register_param(sname + ".CHAN" , m_channel);
+ nlstate.setup().register_param(sname + ".MULT", m_mult);
+ nlstate.setup().register_param(sname + ".OFFSET", m_offset);
+ nlstate.setup().register_link(sname + ".IN", pstring(m_out_name));
}
@@ -797,7 +833,6 @@ netlist_mame_device::netlist_mame_device(const machine_config &mconfig, device_t
: device_t(mconfig, type, tag, owner, clock)
, m_icount(0)
, m_old(netlist::netlist_time::zero())
- , m_netlist(nullptr)
, m_setup_func(nullptr)
{
}
@@ -807,12 +842,6 @@ netlist_mame_device::~netlist_mame_device()
LOGDEVCALLS("~netlist_mame_device\n");
}
-void netlist_mame_device::set_constructor(void (*setup_func)(netlist::setup_t &))
-{
- if (LOG_DEV_CALLS) logerror("set_constructor\n");
- m_setup_func = setup_func;
-}
-
void netlist_mame_device::device_config_complete()
{
LOGDEVCALLS("device_config_complete %s\n", this->mconfig().gamedrv().name);
@@ -830,7 +859,7 @@ void netlist_mame_device::device_start()
//printf("clock is %d\n", clock());
- m_netlist = global_alloc(netlist_mame_t(*this, "netlist"));
+ m_netlist = netlist::pool().make_poolptr<netlist_mame_t>(*this, "netlist");
// register additional devices
@@ -843,12 +872,12 @@ void netlist_mame_device::device_start()
if( sdev != nullptr )
{
LOGDEVCALLS("Preparse subdevice %s/%s\n", d.name(), d.shortname());
- sdev->pre_parse_action(setup());
+ sdev->pre_parse_action(m_netlist->nlstate());
}
}
/* add default data provider for roms */
- setup().register_source(plib::make_unique_base<netlist::source_t, netlist_data_memregions_t>(setup()));
+ setup().register_source(plib::make_unique<netlist_data_memregions_t>(*this));
m_setup_func(setup());
@@ -859,15 +888,15 @@ void netlist_mame_device::device_start()
if( sdev != nullptr )
{
LOGDEVCALLS("Found subdevice %s/%s\n", d.name(), d.shortname());
- sdev->custom_netlist_additions(setup());
+ sdev->custom_netlist_additions(m_netlist->nlstate());
}
}
- netlist().start();
+ setup().prepare_to_run();
- netlist().save(*this, m_rem, "m_rem");
- netlist().save(*this, m_div, "m_div");
- netlist().save(*this, m_old, "m_old");
+ netlist().nlstate().save(*this, m_rem, this->name(), "m_rem");
+ netlist().nlstate().save(*this, m_div, this->name(), "m_div");
+ netlist().nlstate().save(*this, m_old, this->name(), "m_old");
save_state();
@@ -896,29 +925,26 @@ void netlist_mame_device::device_stop()
{
LOGDEVCALLS("device_stop\n");
netlist().stop();
-
- global_free(m_netlist);
- m_netlist = nullptr;
}
ATTR_COLD void netlist_mame_device::device_post_load()
{
LOGDEVCALLS("device_post_load\n");
- netlist().state().post_load();
- netlist().rebuild_lists();
+ netlist().run_state_manager().post_load();
+ netlist().nlstate().rebuild_lists();
}
ATTR_COLD void netlist_mame_device::device_pre_save()
{
LOGDEVCALLS("device_pre_save\n");
- netlist().state().pre_save();
+ netlist().run_state_manager().pre_save();
}
-void netlist_mame_device::update_time_x()
+void netlist_mame_device::update_icount(netlist::netlist_time time)
{
- const netlist::netlist_time newt(netlist().time());
+ const netlist::netlist_time newt(time);
const netlist::netlist_time delta(newt - m_old + m_rem);
const uint64_t d = delta / m_div;
m_old = newt;
@@ -934,7 +960,7 @@ void netlist_mame_device::check_mame_abort_slice()
ATTR_COLD void netlist_mame_device::save_state()
{
- for (auto const & s : netlist().state().save_list())
+ for (auto const & s : netlist().run_state_manager().save_list())
{
netlist().log().debug("saving state for {1}\n", s->m_name.c_str());
if (s->m_dt.is_float)
@@ -997,17 +1023,18 @@ void netlist_mame_cpu_device::device_start()
state_add(STATE_GENPC, "GENPC", m_genPC).noshow();
state_add(STATE_GENPCBASE, "CURPC", m_genPC).noshow();
- for (int i=0; i < netlist().m_nets.size(); i++)
+ int index = 0;
+ for (auto &n : netlist().nlstate().nets())
{
- netlist::detail::net_t *n = netlist().m_nets[i].get();
if (n->is_logic())
{
- state_add(i*2, n->name().c_str(), *downcast<netlist::logic_net_t *>(n)->Q_state_ptr());
+ state_add(index, n->name().c_str(), *(downcast<netlist::logic_net_t &>(*n).Q_state_ptr()));
}
else
{
- state_add(i*2+1, n->name().c_str(), *downcast<netlist::analog_net_t *>(n)->Q_Analog_state_ptr());
+ state_add(index, n->name().c_str(), *(downcast<netlist::analog_net_t &>(*n).Q_Analog_state_ptr()));
}
+ index++;
}
// set our instruction counter
@@ -1032,10 +1059,8 @@ ATTR_COLD uint64_t netlist_mame_cpu_device::execute_cycles_to_clocks(uint64_t cy
ATTR_HOT void netlist_mame_cpu_device::execute_run()
{
- bool check_debugger = ((device_t::machine().debug_flags & DEBUG_FLAG_ENABLED) != 0);
- // debugging
//m_ppc = m_pc; // copy PC to previous PC
- if (check_debugger)
+ if (debugger_enabled())
{
while (m_icount > 0)
{
@@ -1043,13 +1068,13 @@ ATTR_HOT void netlist_mame_cpu_device::execute_run()
m_genPC &= 255;
debugger_instruction_hook(m_genPC);
netlist().process_queue(m_div);
- update_time_x();
+ update_icount(netlist().time());
}
}
else
{
netlist().process_queue(m_div * m_icount);
- update_time_x();
+ update_icount(netlist().time());
}
}
@@ -1089,11 +1114,8 @@ offs_t netlist_disassembler::disassemble(std::ostream &stream, offs_t pc, const
netlist_mame_sound_device::netlist_mame_sound_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: netlist_mame_device(mconfig, NETLIST_SOUND, tag, owner, clock)
, device_sound_interface(mconfig, *this)
- , m_out{nullptr}
, m_in(nullptr)
, m_stream(nullptr)
- , m_num_inputs(0)
- , m_num_outputs(0)
{
}
@@ -1105,44 +1127,45 @@ void netlist_mame_sound_device::device_start()
// Configure outputs
- std::vector<nld_sound_out *> outdevs = netlist().get_device_list<nld_sound_out>();
+ std::vector<nld_sound_out *> outdevs = netlist().nlstate().get_device_list<nld_sound_out>();
if (outdevs.size() == 0)
fatalerror("No output devices");
- m_num_outputs = outdevs.size();
+ //m_num_outputs = outdevs.size();
/* resort channels */
- for (int i=0; i < MAX_OUT; i++) m_out[i] = nullptr;
- for (int i=0; i < m_num_outputs; i++)
+ for (auto &outdev : outdevs)
{
- int chan = outdevs[i]->m_channel();
+ int chan = outdev->m_channel();
- netlist().log().verbose("Output %d on channel %d", i, chan);
+ netlist().log().verbose("Output %s on channel %d", outdev->name(), chan);
- if (chan < 0 || chan >= MAX_OUT || chan >= outdevs.size())
+ if (chan < 0 || chan >= outdevs.size())
fatalerror("illegal channel number");
- m_out[chan] = outdevs[i];
- m_out[chan]->m_sample = netlist::netlist_time::from_hz(clock());
+ m_out[chan] = outdev;
+ m_out[chan]->m_sample_time = netlist::netlist_time::from_hz(clock());
m_out[chan]->m_buffer = nullptr;
+ m_out[chan]->m_bufsize = 0;
}
// Configure inputs
+ // FIXME: The limitation to one input device seems artificial.
+ // We should allow multiple devices with one channel each.
- m_num_inputs = 0;
m_in = nullptr;
- std::vector<nld_sound_in *> indevs = netlist().get_device_list<nld_sound_in>();
+ std::vector<nld_sound_in *> indevs = netlist().nlstate().get_device_list<nld_sound_in>();
if (indevs.size() > 1)
fatalerror("A maximum of one input device is allowed!");
if (indevs.size() == 1)
{
m_in = indevs[0];
- m_num_inputs = m_in->resolve();
+ m_in->resolve();
m_in->m_inc = netlist::netlist_time::from_hz(clock());
}
/* initialize the stream(s) */
- m_stream = machine().sound().stream_alloc(*this, m_num_inputs, m_num_outputs, clock());
+ m_stream = machine().sound().stream_alloc(*this, m_in ? m_in->num_channels() : 0, m_out.size(), clock());
}
@@ -1155,17 +1178,21 @@ void netlist_mame_sound_device::nl_register_devices()
void netlist_mame_sound_device::sound_stream_update(sound_stream &stream, stream_sample_t **inputs, stream_sample_t **outputs, int samples)
{
- for (int i=0; i < m_num_outputs; i++)
+
+ for (auto &e : m_out)
{
- m_out[i]->m_buffer = outputs[i];
+ e.second->m_buffer = outputs[e.first];
+ e.second->m_bufsize = samples;
}
- if (m_num_inputs)
- m_in->buffer_reset();
- for (int i=0; i < m_num_inputs; i++)
+ if (m_in)
{
- m_in->m_buffer[i] = inputs[i];
+ m_in->buffer_reset();
+ for (int i=0; i < m_in->num_channels(); i++)
+ {
+ m_in->m_channels[i].m_buffer = inputs[i];
+ }
}
netlist::netlist_time cur(netlist().time());
@@ -1174,9 +1201,9 @@ void netlist_mame_sound_device::sound_stream_update(sound_stream &stream, stream
cur += (m_div * samples);
- for (int i=0; i < m_num_outputs; i++)
+ for (auto &e : m_out)
{
- m_out[i]->sound_update(cur);
- m_out[i]->buffer_reset(cur);
+ e.second->sound_update_fill(samples);
+ e.second->buffer_reset(cur);
}
}
diff --git a/src/devices/machine/netlist.h b/src/devices/machine/netlist.h
index 36bdcb0c415..639223d2842 100644
--- a/src/devices/machine/netlist.h
+++ b/src/devices/machine/netlist.h
@@ -11,16 +11,19 @@
#ifndef MAME_MACHINE_NETLIST_H
#define MAME_MACHINE_NETLIST_H
-#include "netlist/nl_time.h"
+#include <functional>
+
+#include "../../lib/netlist/nltypes.h"
class nld_sound_out;
class nld_sound_in;
namespace netlist {
class setup_t;
- class param_double_t;
- class param_int_t;
- class param_logic_t;
+ class netlist_state_t;
+ class nlparse_t;
+ template <typename T>
+ class param_num_t;
class param_ptr_t;
}
@@ -31,6 +34,9 @@ namespace netlist {
#define MCFG_NETLIST_SETUP(_setup) \
downcast<netlist_mame_device &>(*device).set_constructor(NETLIST_NAME(_setup));
+#define MCFG_NETLIST_SETUP_MEMBER(_obj, _setup) \
+ downcast<netlist_mame_device &>(*device).set_constructor(_obj, _setup);
+
#define MCFG_NETLIST_ANALOG_INPUT(_basetag, _tag, _name) \
MCFG_DEVICE_ADD(_basetag ":" _tag, NETLIST_ANALOG_INPUT, 0) \
downcast<netlist_mame_analog_input_device &>(*device).set_name(_name);
@@ -79,9 +85,10 @@ namespace netlist {
#define NETLIST_ANALOG_PORT_CHANGED(_base, _tag) \
PORT_CHANGED_MEMBER(_base ":" _tag, netlist_mame_analog_input_device, input_changed, 0)
+/* This macro can only be called from device member */
#define MEMREGION_SOURCE(_name) \
- netlist_mame_device::register_memregion_source(setup, _name);
+ netlist_mame_device::register_memregion_source(setup, *this, _name);
#define NETDEV_ANALOG_CALLBACK_MEMBER(_name) \
void _name(const double data, const attotime &time)
@@ -99,21 +106,32 @@ class netlist_mame_device : public device_t
{
public:
class netlist_mame_t;
+ class netlist_mame_callbacks_t;
+
+ using func_type = std::function<void(netlist::nlparse_t &)>;
// construction/destruction
netlist_mame_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
virtual ~netlist_mame_device();
- void set_constructor(void (*setup_func)(netlist::setup_t &));
+ void set_constructor(void (*setup_func)(netlist::nlparse_t &))
+ {
+ m_setup_func = func_type(setup_func);
+ }
+
+ template <typename T, typename F>
+ void set_constructor(T *obj, F && f)
+ {
+ m_setup_func = std::move(std::bind(std::forward<F>(f), obj, std::placeholders::_1));
+ }
ATTR_HOT inline netlist::setup_t &setup();
ATTR_HOT inline netlist_mame_t &netlist() { return *m_netlist; }
- ATTR_HOT inline const netlist::netlist_time last_time_update() { return m_old; }
- ATTR_HOT void update_time_x();
+ ATTR_HOT void update_icount(netlist::netlist_time time);
ATTR_HOT void check_mame_abort_slice();
- static void register_memregion_source(netlist::setup_t &setup, const char *name);
+ static void register_memregion_source(netlist::nlparse_t &setup, device_t &dev, const char *name);
int m_icount;
@@ -142,9 +160,9 @@ private:
netlist::netlist_time m_rem;
netlist::netlist_time m_old;
- netlist_mame_t * m_netlist;
+ netlist::pool_owned_ptr<netlist_mame_t> m_netlist;
- void (*m_setup_func)(netlist::setup_t &);
+ func_type m_setup_func;
};
// ----------------------------------------------------------------------------------------
@@ -231,13 +249,9 @@ protected:
virtual void device_start() override;
private:
- static constexpr int MAX_OUT = 10;
- nld_sound_out *m_out[MAX_OUT];
+ std::map<int, nld_sound_out *> m_out;
nld_sound_in *m_in;
sound_stream *m_stream;
- int m_num_inputs;
- int m_num_outputs;
-
};
// ----------------------------------------------------------------------------------------
@@ -255,14 +269,16 @@ public:
{
}
- virtual void custom_netlist_additions(netlist::setup_t &setup) { }
- virtual void pre_parse_action(netlist::setup_t &setup) { }
+ virtual void custom_netlist_additions(netlist::netlist_state_t &nlstate) { }
+ virtual void pre_parse_action(netlist::netlist_state_t &nlstate) { }
inline netlist_mame_device &nl_owner() const { return *m_owner; }
- inline bool is_sound_device() const { return bool(m_sound); }
-
- inline void update_to_current_time() { m_sound->get_stream()->update(); }
+ inline void update_to_current_time()
+ {
+ if (m_sound != nullptr)
+ m_sound->get_stream()->update();
+ }
void set_mult_offset(const double mult, const double offset);
@@ -306,11 +322,13 @@ public:
protected:
// device-level overrides
virtual void device_start() override;
+ virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override;
private:
- netlist::param_double_t *m_param;
+ netlist::param_num_t<double> *m_param;
bool m_auto_port;
const char *m_param_name;
+ double m_value_for_device_timer;
};
// ----------------------------------------------------------------------------------------
@@ -330,7 +348,7 @@ public:
protected:
// device-level overrides
virtual void device_start() override;
- virtual void custom_netlist_additions(netlist::setup_t &setup) override;
+ virtual void custom_netlist_additions(netlist::netlist_state_t &nlstate) override;
private:
const char *m_in;
@@ -362,7 +380,7 @@ public:
protected:
// device-level overrides
virtual void device_start() override;
- virtual void custom_netlist_additions(netlist::setup_t &setup) override;
+ virtual void custom_netlist_additions(netlist::netlist_state_t &nlstate) override;
private:
const char *m_in;
@@ -402,7 +420,7 @@ protected:
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override;
private:
- netlist::param_int_t *m_param;
+ netlist::param_num_t<int> *m_param;
uint32_t m_mask;
uint32_t m_shift;
const char *m_param_name;
@@ -441,7 +459,7 @@ protected:
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override;
private:
- netlist::param_logic_t *m_param;
+ netlist::param_num_t<bool> *m_param;
uint32_t m_shift;
const char *m_param_name;
};
@@ -491,7 +509,7 @@ public:
protected:
// device-level overrides
virtual void device_start() override;
- virtual void custom_netlist_additions(netlist::setup_t &setup) override;
+ virtual void custom_netlist_additions(netlist::netlist_state_t &nlstate) override;
private:
uint32_t m_channel;
const char *m_param_name;
@@ -517,7 +535,7 @@ public:
protected:
// device-level overrides
virtual void device_start() override;
- virtual void custom_netlist_additions(netlist::setup_t &setup) override;
+ virtual void custom_netlist_additions(netlist::netlist_state_t &nlstate) override;
private:
uint32_t m_channel;
diff --git a/src/devices/machine/nmc9306.h b/src/devices/machine/nmc9306.h
index 097742685aa..07aa6b36db0 100644
--- a/src/devices/machine/nmc9306.h
+++ b/src/devices/machine/nmc9306.h
@@ -19,17 +19,6 @@
#pragma once
-
-
-//**************************************************************************
-// INTERFACE CONFIGURATION MACROS
-//**************************************************************************
-
-#define MCFG_NMC9306_ADD(tag) \
- MCFG_DEVICE_ADD((tag), NMC9306, 0)
-
-
-
//**************************************************************************
// TYPE DEFINITIONS
//**************************************************************************
diff --git a/src/devices/machine/nsc810.cpp b/src/devices/machine/nsc810.cpp
index bf06c34d9dc..96a13e7b696 100644
--- a/src/devices/machine/nsc810.cpp
+++ b/src/devices/machine/nsc810.cpp
@@ -118,7 +118,7 @@ void nsc810_device::device_timer(emu_timer &timer, device_timer_id id, int param
}
}
-READ8_MEMBER(nsc810_device::read)
+uint8_t nsc810_device::read(offs_t offset)
{
uint8_t res = 0xff;
@@ -191,7 +191,7 @@ READ8_MEMBER(nsc810_device::read)
return res;
}
-WRITE8_MEMBER(nsc810_device::write)
+void nsc810_device::write(offs_t offset, uint8_t data)
{
uint32_t rate;
diff --git a/src/devices/machine/nsc810.h b/src/devices/machine/nsc810.h
index bebeb8f82a6..520591208f7 100644
--- a/src/devices/machine/nsc810.h
+++ b/src/devices/machine/nsc810.h
@@ -16,24 +16,38 @@ class nsc810_device : public device_t
{
public:
// construction/destruction
+ nsc810_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, uint32_t clk0, uint32_t clk1)
+ : nsc810_device(mconfig, tag, owner, clock)
+ {
+ set_timer0_clock(clk0);
+ set_timer1_clock(clk1);
+ }
+
+ nsc810_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, const XTAL &clk0, const XTAL &clk1)
+ : nsc810_device(mconfig, tag, owner, clock)
+ {
+ set_timer0_clock(clk0.value());
+ set_timer1_clock(clk1.value());
+ }
+
nsc810_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
- template <class Object> devcb_base &set_portA_read_callback(Object &&cb) { return m_portA_r.set_callback(std::forward<Object>(cb)); }
- template <class Object> devcb_base &set_portB_read_callback(Object &&cb) { return m_portB_r.set_callback(std::forward<Object>(cb)); }
- template <class Object> devcb_base &set_portC_read_callback(Object &&cb) { return m_portC_r.set_callback(std::forward<Object>(cb)); }
- template <class Object> devcb_base &set_portA_write_callback(Object &&cb) { return m_portA_w.set_callback(std::forward<Object>(cb)); }
- template <class Object> devcb_base &set_portB_write_callback(Object &&cb) { return m_portB_w.set_callback(std::forward<Object>(cb)); }
- template <class Object> devcb_base &set_portC_write_callback(Object &&cb) { return m_portC_w.set_callback(std::forward<Object>(cb)); }
- template <class Object> devcb_base &set_timer0_callback(Object &&cb) { return m_timer0_out.set_callback(std::forward<Object>(cb)); }
- template <class Object> devcb_base &set_timer1_callback(Object &&cb) { return m_timer1_out.set_callback(std::forward<Object>(cb)); }
+ auto portA_read_callback() { return m_portA_r.bind(); }
+ auto portB_read_callback() { return m_portB_r.bind(); }
+ auto portC_read_callback() { return m_portC_r.bind(); }
+ auto portA_write_callback() { return m_portA_w.bind(); }
+ auto portB_write_callback() { return m_portB_w.bind(); }
+ auto portC_write_callback() { return m_portC_w.bind(); }
+ auto timer0_callback() { return m_timer0_out.bind(); }
+ auto timer1_callback() { return m_timer1_out.bind(); }
void set_timer0_clock(uint32_t clk) { m_timer0_clock = clk; }
void set_timer0_clock(const XTAL &clk) { set_timer0_clock(clk.value()); }
void set_timer1_clock(uint32_t clk) { m_timer1_clock = clk; }
void set_timer1_clock(const XTAL &clk) { set_timer1_clock(clk.value()); }
- DECLARE_READ8_MEMBER(read);
- DECLARE_WRITE8_MEMBER(write);
+ uint8_t read(offs_t offset);
+ void write(offs_t offset, uint8_t data);
protected:
virtual void device_start() override;
@@ -102,35 +116,6 @@ private:
};
};
-#define MCFG_NSC810_ADD(_tag, _t0clk, _t1clk) \
- MCFG_DEVICE_ADD(_tag, NSC810, 0) \
- downcast<nsc810_device *>(device)->set_timer0_clock(_t0clk); \
- downcast<nsc810_device *>(device)->set_timer1_clock(_t1clk);
-
-#define MCFG_NSC810_PORTA_READ(_read) \
- downcast<nsc810_device &>(*device).set_portA_read_callback(DEVCB_##_read);
-
-#define MCFG_NSC810_PORTB_READ(_read) \
- downcast<nsc810_device &>(*device).set_portB_read_callback(DEVCB_##_read);
-
-#define MCFG_NSC810_PORTC_READ(_read) \
- downcast<nsc810_device &>(*device).set_portC_read_callback(DEVCB_##_read);
-
-#define MCFG_NSC810_PORTA_WRITE(_write) \
- downcast<nsc810_device &>(*device).set_portA_write_callback(DEVCB_##_write);
-
-#define MCFG_NSC810_PORTB_WRITE(_write) \
- downcast<nsc810_device &>(*device).set_portB_write_callback(DEVCB_##_write);
-
-#define MCFG_NSC810_PORTC_WRITE(_write) \
- downcast<nsc810_device &>(*device).set_portC_write_callback(DEVCB_##_write);
-
-#define MCFG_NSC810_TIMER0_OUT(_write) \
- downcast<nsc810_device &>(*device).set_timer0_callback(DEVCB_##_write);
-
-#define MCFG_NSC810_TIMER1_OUT(_write) \
- downcast<nsc810_device &>(*device).set_timer1_callback(DEVCB_##_write);
-
// device type definition
DECLARE_DEVICE_TYPE(NSC810, nsc810_device)
diff --git a/src/devices/machine/nscsi_bus.cpp b/src/devices/machine/nscsi_bus.cpp
index 328dd7239bd..ef3c0dd9f9a 100644
--- a/src/devices/machine/nscsi_bus.cpp
+++ b/src/devices/machine/nscsi_bus.cpp
@@ -3,13 +3,15 @@
#include "emu.h"
#include "nscsi_bus.h"
-#define LOG_GENERAL (1U << 0)
-#define LOG_STATE (1U << 1)
-#define LOG_CONTROL (1U << 2)
-#define LOG_DATA (1U << 3)
+#define LOG_GENERAL (1U << 0)
+#define LOG_UNSUPPORTED (1U << 1)
+#define LOG_STATE (1U << 2)
+#define LOG_CONTROL (1U << 3)
+#define LOG_DATA (1U << 4)
+#define LOG_DATA_SENT (1U << 5)
//#define VERBOSE (LOG_GENERAL | LOG_STATE | LOG_CONTROL | LOG_DATA)
-#define VERBOSE 0
+#define VERBOSE (LOG_UNSUPPORTED | LOG_DATA_SENT)
#include "logmacro.h"
@@ -440,7 +442,7 @@ void nscsi_full_device::step(bool timeout)
break;
}
- if(command_done()) {
+ if(scsi_command_done(scsi_cmdbuf[0], data_buffer_pos)) {
scsi_cmdsize = data_buffer_pos;
scsi_bus->ctrl_wait(scsi_refid, 0, S_ACK);
scsi_command();
@@ -507,18 +509,17 @@ void nscsi_full_device::target_send_buffer_byte()
target_send_byte(scsi_get_data(data_buffer_id, data_buffer_pos++));
}
-bool nscsi_full_device::command_done()
+bool nscsi_full_device::scsi_command_done(uint8_t command, uint8_t length)
{
- if(!data_buffer_pos)
+ if(!length)
return false;
- uint8_t h = scsi_cmdbuf[0];
- switch(h >> 5) {
- case 0: return data_buffer_pos == 6;
- case 1: return data_buffer_pos == 10;
- case 2: return data_buffer_pos == 10;
+ switch(command >> 5) {
+ case 0: return length == 6;
+ case 1: return length == 10;
+ case 2: return length == 10;
case 3: return true;
case 4: return true;
- case 5: return data_buffer_pos == 12;
+ case 5: return length == 12;
case 6: return true;
case 7: return true;
}
@@ -562,6 +563,17 @@ void nscsi_full_device::scsi_status_complete(uint8_t st)
void nscsi_full_device::scsi_data_in(int buf, int size)
{
+ if((VERBOSE & LOG_DATA_SENT) && buf == 0) {
+ std::string dt = "";
+ int sz = size;
+ if(sz > 50)
+ sz = 50;
+ for(int i=0; i<sz; i++)
+ dt += util::string_format(" %02x", scsi_cmdbuf[i]);
+ if(size > sz)
+ dt += " ...";
+ LOGMASKED(LOG_DATA_SENT, "Sending data (%d)%s\n", size, dt);
+ }
control *c;
c = buf_control_push();
c->action = BC_DATA_IN;
@@ -583,31 +595,28 @@ void nscsi_full_device::sense(bool deferred, uint8_t key, uint8_t asc, uint8_t a
memset(scsi_sense_buffer, 0, sizeof(scsi_sense_buffer));
scsi_sense_buffer[0] = deferred ? 0x71 : 0x70;
scsi_sense_buffer[2] = key;
+ scsi_sense_buffer[7] = sizeof(scsi_sense_buffer) - 8;
scsi_sense_buffer[12] = asc;
scsi_sense_buffer[13] = ascq;
}
void nscsi_full_device::scsi_unknown_command()
{
- LOG("Unhandled command %s", command_names[scsi_cmdbuf[0]]);
+ std::string txt = util::string_format("Unhandled command %s (%d):", command_names[scsi_cmdbuf[0]], scsi_cmdsize);
for(int i=0; i != scsi_cmdsize; i++)
- logerror(" %02x", scsi_cmdbuf[i]);
- logerror("\n");
+ txt += util::string_format(" %02x", scsi_cmdbuf[i]);
+ LOGMASKED(LOG_UNSUPPORTED, "%s\n", txt);
scsi_status_complete(SS_CHECK_CONDITION);
- sense(false, 5);
+ sense(false, SK_ILLEGAL_REQUEST);
}
void nscsi_full_device::scsi_command()
{
switch(scsi_cmdbuf[0]) {
case SC_REQUEST_SENSE:
- LOG("command REQUEST SENSE\n");
- /*
- * Targets shall be capable of returning eighteen bytes of data in
- * response to a REQUEST SENSE command.
- */
- scsi_data_in(SBUF_SENSE, 18);
+ LOG("command REQUEST SENSE alloc=%d\n", scsi_cmdbuf[4]);
+ scsi_data_in(SBUF_SENSE, scsi_cmdbuf[4] ? std::min(scsi_cmdbuf[4], u8(sizeof(scsi_sense_buffer))) : 4);
scsi_status_complete(SS_GOOD);
break;
default:
@@ -623,10 +632,10 @@ void nscsi_full_device::scsi_message()
return;
}
- LOG("Unknown message");
+ std::string txt = "Unknown message";
for(int i=0; i != scsi_cmdsize; i++)
- logerror(" %02x", scsi_cmdbuf[i]);
- logerror("\n");
+ txt += util::string_format(" %02x", scsi_cmdbuf[i]);
+ LOGMASKED(LOG_UNSUPPORTED, "%s\n", txt);
}
int nscsi_full_device::get_lun(int def)
@@ -640,9 +649,7 @@ int nscsi_full_device::get_lun(int def)
void nscsi_full_device::bad_lun()
{
scsi_status_complete(SS_CHECK_CONDITION);
-
- // key:illegal request, asc:logical unit not supported
- sense(false, 5, 0x25);
+ sense(false, SK_ILLEGAL_REQUEST, SK_ASC_LOGICAL_UNIT_NOT_SUPPORTED);
}
// Arbitration delay (2.4us)
diff --git a/src/devices/machine/nscsi_bus.h b/src/devices/machine/nscsi_bus.h
index 5e7d7dcecab..244eda94fe8 100644
--- a/src/devices/machine/nscsi_bus.h
+++ b/src/devices/machine/nscsi_bus.h
@@ -6,19 +6,12 @@
#pragma once
-#define MCFG_NSCSI_BUS_ADD(_tag) \
- MCFG_DEVICE_ADD(_tag, NSCSI_BUS, 0)
-
-#define MCFG_NSCSI_ADD(_tag, _slot_intf, _def_slot, _fixed) \
- MCFG_DEVICE_ADD(_tag, NSCSI_CONNECTOR, 0) \
- MCFG_DEVICE_SLOT_INTERFACE(_slot_intf, _def_slot, _fixed)
-
class nscsi_device;
class nscsi_bus_device : public device_t
{
public:
- nscsi_bus_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ nscsi_bus_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
void ctrl_w(int refid, uint32_t lines, uint32_t mask);
void data_w(int refid, uint32_t lines);
@@ -49,10 +42,19 @@ private:
};
class nscsi_connector: public device_t,
- public device_slot_interface
+ public device_slot_interface
{
public:
- nscsi_connector(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ template <typename T>
+ nscsi_connector(const machine_config &mconfig, const char *tag, device_t *owner, T &&opts, const char *dflt, bool fixed = false)
+ : nscsi_connector(mconfig, tag, owner, 0)
+ {
+ option_reset();
+ opts(*this);
+ set_default_option(dflt);
+ set_fixed(fixed);
+ }
+ nscsi_connector(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
virtual ~nscsi_connector();
nscsi_device *get_device();
@@ -167,7 +169,9 @@ protected:
// SCSI addtional sense code qualifiers
enum {
- SK_ASC_MEDIUM_NOT_PRESENT = 0x3a
+ SK_ASC_INVALID_FIELD_IN_CDB = 0x24,
+ SK_ASC_LOGICAL_UNIT_NOT_SUPPORTED = 0x25,
+ SK_ASC_MEDIUM_NOT_PRESENT = 0x3a
};
// SCSI commands
@@ -304,6 +308,7 @@ protected:
virtual void scsi_message();
virtual void scsi_command();
+ virtual bool scsi_command_done(uint8_t command, uint8_t length);
void scsi_unknown_command();
void scsi_status_complete(uint8_t st);
@@ -444,7 +449,6 @@ private:
void target_recv_byte();
void target_send_byte(uint8_t val);
void target_send_buffer_byte();
- bool command_done();
};
diff --git a/src/devices/machine/nscsi_cb.h b/src/devices/machine/nscsi_cb.h
index b5156935a98..575e8f19298 100644
--- a/src/devices/machine/nscsi_cb.h
+++ b/src/devices/machine/nscsi_cb.h
@@ -8,48 +8,20 @@
#include "machine/nscsi_bus.h"
-#define MCFG_NSCSICB_RST_HANDLER(_line) \
- downcast<nscsi_callback_device *>(device)->set_rst_callback(DEVCB_##_line);
-
-#define MCFG_NSCSICB_ATN_HANDLER(_line) \
- downcast<nscsi_callback_device *>(device)->set_atn_callback(DEVCB_##_line);
-
-#define MCFG_NSCSICB_ACK_HANDLER(_line) \
- downcast<nscsi_callback_device *>(device)->set_ack_callback(DEVCB_##_line);
-
-#define MCFG_NSCSICB_REQ_HANDLER(_line) \
- downcast<nscsi_callback_device *>(device)->set_req_callback(DEVCB_##_line);
-
-#define MCFG_NSCSICB_MSG_HANDLER(_line) \
- downcast<nscsi_callback_device *>(device)->set_msg_callback(DEVCB_##_line);
-
-#define MCFG_NSCSICB_IO_HANDLER(_line) \
- downcast<nscsi_callback_device *>(device)->set_io_callback(DEVCB_##_line);
-
-#define MCFG_NSCSICB_CD_HANDLER(_line) \
- downcast<nscsi_callback_device *>(device)->set_cd_callback(DEVCB_##_line);
-
-#define MCFG_NSCSICB_SEL_HANDLER(_line) \
- downcast<nscsi_callback_device *>(device)->set_sel_callback(DEVCB_##_line);
-
-#define MCFG_NSCSICB_BSY_HANDLER(_line) \
- downcast<nscsi_callback_device *>(device)->set_bsy_callback(DEVCB_##_line);
-
-
class nscsi_callback_device : public nscsi_device
{
public:
nscsi_callback_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
- template <class Line> devcb_base &set_rst_callback(Line &&cb) { return m_write_rst.set_callback(std::forward<Line>(cb)); }
- template <class Line> devcb_base &set_atn_callback(Line &&cb) { return m_write_atn.set_callback(std::forward<Line>(cb)); }
- template <class Line> devcb_base &set_ack_callback(Line &&cb) { return m_write_ack.set_callback(std::forward<Line>(cb)); }
- template <class Line> devcb_base &set_req_callback(Line &&cb) { return m_write_req.set_callback(std::forward<Line>(cb)); }
- template <class Line> devcb_base &set_msg_callback(Line &&cb) { return m_write_msg.set_callback(std::forward<Line>(cb)); }
- template <class Line> devcb_base &set_io_callback(Line &&cb) { return m_write_io.set_callback(std::forward<Line>(cb)); }
- template <class Line> devcb_base &set_cd_callback(Line &&cb) { return m_write_cd.set_callback(std::forward<Line>(cb)); }
- template <class Line> devcb_base &set_sel_callback(Line &&cb) { return m_write_sel.set_callback(std::forward<Line>(cb)); }
- template <class Line> devcb_base &set_bsy_callback(Line &&cb) { return m_write_bsy.set_callback(std::forward<Line>(cb)); }
+ auto rst_callback() { return m_write_rst.bind(); }
+ auto atn_callback() { return m_write_atn.bind(); }
+ auto ack_callback() { return m_write_ack.bind(); }
+ auto req_callback() { return m_write_req.bind(); }
+ auto msg_callback() { return m_write_msg.bind(); }
+ auto io_callback() { return m_write_io.bind(); }
+ auto cd_callback() { return m_write_cd.bind(); }
+ auto sel_callback() { return m_write_sel.bind(); }
+ auto bsy_callback() { return m_write_bsy.bind(); }
virtual void scsi_ctrl_changed() override;
diff --git a/src/devices/machine/nscsi_cd.cpp b/src/devices/machine/nscsi_cd.cpp
index fc1898eecd5..0446c600e9f 100644
--- a/src/devices/machine/nscsi_cd.cpp
+++ b/src/devices/machine/nscsi_cd.cpp
@@ -7,6 +7,7 @@
#include "logmacro.h"
DEFINE_DEVICE_TYPE(NSCSI_CDROM, nscsi_cdrom_device, "scsi_cdrom", "SCSI CD-ROM")
+DEFINE_DEVICE_TYPE(NSCSI_CDROM_SGI, nscsi_cdrom_sgi_device, "scsi_cdrom_sgi", "SCSI CD-ROM SGI")
DEFINE_DEVICE_TYPE(NSCSI_RRD45, nscsi_dec_rrd45_device, "nrrd45", "RRD45 CD-ROM (New)")
DEFINE_DEVICE_TYPE(NSCSI_XM3301, nscsi_toshiba_xm3301_device, "nxm3301", "XM-3301TA CD-ROM (New)")
DEFINE_DEVICE_TYPE(NSCSI_XM5301SUN, nscsi_toshiba_xm5301_sun_device, "nxm5301sun", "XM-5301B Sun 4x CD-ROM (New)")
@@ -19,6 +20,11 @@ nscsi_cdrom_device::nscsi_cdrom_device(const machine_config &mconfig, const char
{
}
+nscsi_cdrom_sgi_device::nscsi_cdrom_sgi_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
+ nscsi_cdrom_device(mconfig, NSCSI_CDROM_SGI, tag, owner, "Sony", "CDU-76S", "1.0", 0x00, 0x05)
+{
+}
+
nscsi_dec_rrd45_device::nscsi_dec_rrd45_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
nscsi_cdrom_device(mconfig, NSCSI_RRD45, tag, owner, "DEC ", "RRD45 (C) DEC ", "0436", 0x98, 0x02)
{
@@ -76,10 +82,19 @@ void nscsi_cdrom_device::device_reset()
cur_sector = -1;
}
-MACHINE_CONFIG_START(nscsi_cdrom_device::device_add_mconfig)
- MCFG_CDROM_ADD("image")
- MCFG_CDROM_INTERFACE("cdrom")
-MACHINE_CONFIG_END
+void nscsi_cdrom_device::device_add_mconfig(machine_config &config)
+{
+ CDROM(config, image).set_interface("cdrom");
+}
+
+int nscsi_cdrom_device::to_msf(int frame)
+{
+ int m = frame / (75 * 60);
+ int s = (frame / 75) % 60;
+ int f = frame % 75;
+
+ return (m << 16) | (s << 8) | f;
+}
void nscsi_cdrom_device::set_block_size(u32 block_size)
{
@@ -193,21 +208,16 @@ void nscsi_cdrom_device::scsi_command()
* is returned with sense data ILLEGAL REQUEST and LOGICAL UNIT NOT
* SUPPORTED.
*/
- if(lun) {
- bad_lun();
- return;
- }
-
int page = scsi_cmdbuf[2];
int size = scsi_cmdbuf[4];
switch(page) {
case 0:
std::fill_n(scsi_cmdbuf, 36, 0);
- // vendor and product information must be padded with spaces
- std::fill_n(&scsi_cmdbuf[8], 28, 0x20);
-
- scsi_cmdbuf[0] = 0x05; // device is present, device is CD/DVD (MMC-3)
+ if (lun != 0)
+ scsi_cmdbuf[0] = 0x7f;
+ else
+ scsi_cmdbuf[0] = 0x05; // device is present, device is CD/DVD (MMC-3)
scsi_cmdbuf[1] = 0x80; // media is removable
scsi_cmdbuf[2] = compliance; // device complies with SPC-3 standard
scsi_cmdbuf[3] = 0x02; // response data format = SPC-3 standard
@@ -216,6 +226,12 @@ void nscsi_cdrom_device::scsi_command()
strncpy((char *)&scsi_cmdbuf[8], manufacturer, 8);
strncpy((char *)&scsi_cmdbuf[16], product, 16);
strncpy((char *)&scsi_cmdbuf[32], revision, 4);
+
+ // vendor and product information must be padded with spaces
+ for(int i = 8; i < 36; i++)
+ if(scsi_cmdbuf[i] == 0)
+ scsi_cmdbuf[i] = 0x20;
+
if(size > 36)
size = 36;
scsi_data_in(SBUF_MAIN, size);
@@ -241,6 +257,48 @@ void nscsi_cdrom_device::scsi_command()
scsi_status_complete(SS_GOOD);
break;
+ case SC_RECIEVE_DIAG_RES: {
+ LOG("command RECIEVE DIAGNOSTICS RESULTS");
+ int size = (scsi_cmdbuf[3] << 8) | scsi_cmdbuf[4];
+ int pos = 0;
+ scsi_cmdbuf[pos++] = 0;
+ scsi_cmdbuf[pos++] = 6;
+ scsi_cmdbuf[pos++] = 0; // ROM is OK
+ scsi_cmdbuf[pos++] = 0; // RAM is OK
+ scsi_cmdbuf[pos++] = 0; // Data buffer is OK
+ scsi_cmdbuf[pos++] = 0; // Interface is OK
+ scsi_cmdbuf[pos++] = 0;
+ if(size > pos)
+ size = pos;
+ scsi_data_in(0, size);
+ scsi_status_complete(SS_GOOD);
+ break;
+ }
+
+ case SC_SEND_DIAGNOSTICS: {
+ LOG("command SEND DIAGNOSTICS");
+ int size = (scsi_cmdbuf[3] << 8) | scsi_cmdbuf[4];
+ if(scsi_cmdbuf[1] & 4) {
+ // Self-test
+ scsi_status_complete(SS_GOOD);
+ break;
+ }
+ int pos = 0;
+ scsi_cmdbuf[pos++] = 0;
+ scsi_cmdbuf[pos++] = 6;
+ scsi_cmdbuf[pos++] = 0; // ROM is OK
+ scsi_cmdbuf[pos++] = 0; // RAM is OK
+ scsi_cmdbuf[pos++] = 0; // Data buffer is OK
+ scsi_cmdbuf[pos++] = 0; // Interface is OK
+ scsi_cmdbuf[pos++] = 0;
+ scsi_cmdbuf[pos++] = 0;
+ if(size > pos)
+ size = pos;
+ scsi_data_in(0, size);
+ scsi_status_complete(SS_GOOD);
+ break;
+ }
+
case SC_READ_CAPACITY: {
if(!cdrom) {
return_no_cd();
@@ -250,7 +308,7 @@ void nscsi_cdrom_device::scsi_command()
LOG("command READ CAPACITY\n");
// get the last used block on the disc
- const uint32_t temp = cdrom_get_track_start(cdrom, 0xaa) * (bytes_per_sector / bytes_per_block) - 1;
+ const u32 temp = cdrom_get_track_start(cdrom, 0xaa) * (bytes_per_sector / bytes_per_block) - 1;
scsi_cmdbuf[0] = (temp>>24) & 0xff;
scsi_cmdbuf[1] = (temp>>16) & 0xff;
@@ -267,15 +325,14 @@ void nscsi_cdrom_device::scsi_command()
}
case SC_READ_10:
- if(!cdrom) {
- return_no_cd();
- break;
- }
-
lba = (scsi_cmdbuf[2]<<24) | (scsi_cmdbuf[3]<<16) | (scsi_cmdbuf[4]<<8) | scsi_cmdbuf[5];
blocks = (scsi_cmdbuf[7] << 8) | scsi_cmdbuf[8];
LOG("command READ EXTENDED start=%08x blocks=%04x\n", lba, blocks);
+ if(!cdrom) {
+ return_no_cd();
+ break;
+ }
scsi_data_in(2, blocks*bytes_per_block);
scsi_status_complete(SS_GOOD);
@@ -297,7 +354,7 @@ void nscsi_cdrom_device::scsi_command()
scsi_cmdbuf[pos++] = 0x80; // WP, cache
// get the last used block on the disc
- const uint32_t temp = cdrom_get_track_start(cdrom, 0xaa) * (bytes_per_sector / bytes_per_block) - 1;
+ const u32 temp = cdrom_get_track_start(cdrom, 0xaa) * (bytes_per_sector / bytes_per_block) - 1;
scsi_cmdbuf[pos++] = 0x08; // Block descriptor length
scsi_cmdbuf[pos++] = 0x00; // density code
@@ -309,10 +366,11 @@ void nscsi_cdrom_device::scsi_command()
scsi_cmdbuf[pos++] = (bytes_per_block>>8)&0xff;
scsi_cmdbuf[pos++] = (bytes_per_block & 0xff);
+ bool fail = false;
int pmax = page == 0x3f ? 0x3e : page;
int pmin = page == 0x3f ? 0x00 : page;
- for(int page=pmax; page >= pmin; page--) {
- switch(page) {
+ for(int p=pmax; p >= pmin; p--) {
+ switch(p) {
case 0x00: // Vendor specific (does not require page format)
scsi_cmdbuf[pos++] = 0x80; // PS, page id
scsi_cmdbuf[pos++] = 0x02; // Page length
@@ -340,7 +398,10 @@ void nscsi_cdrom_device::scsi_command()
break;
default:
- LOG("mode sense page %02x unhandled\n", page);
+ if (page != 0x3f) {
+ LOG("mode sense page %02x unhandled\n", p);
+ fail = true;
+ }
break;
}
}
@@ -348,8 +409,13 @@ void nscsi_cdrom_device::scsi_command()
if(pos > size)
pos = size;
- scsi_data_in(0, pos);
- scsi_status_complete(SS_GOOD);
+ if (!fail) {
+ scsi_data_in(0, pos);
+ scsi_status_complete(SS_GOOD);
+ } else {
+ scsi_status_complete(SS_CHECK_CONDITION);
+ sense(false, SK_ILLEGAL_REQUEST, SK_ASC_INVALID_FIELD_IN_CDB);
+ }
break;
}
@@ -359,10 +425,186 @@ void nscsi_cdrom_device::scsi_command()
scsi_status_complete(SS_GOOD);
break;
- default:
- logerror("unhandled command %02x\n", scsi_cmdbuf[0]);
+ case SC_READ_TOC_PMA_ATIP: {
+ /*
+ Track numbers are problematic here: 0 = lead-in, 0xaa = lead-out.
+ That makes sense in terms of how real-world CDs are referred to, but
+ our internal routines for tracks use "0" as track 1. That probably
+ should be fixed...
+ */
+ static const char *const format_names[16] = {
+ "TOC",
+ "Session info",
+ "Full TOC",
+ "PMA",
+ "ATIP"
+ "Reserved 5",
+ "Reserved 6",
+ "Reserved 7",
+ "Reserved 8",
+ "Reserved 9",
+ "Reserved 10",
+ "Reserved 11",
+ "Reserved 12",
+ "Reserved 13",
+ "Reserved 14",
+ "Reserved 15"
+ };
+
+ bool msf = (scsi_cmdbuf[1] & 0x2) != 0;
+ u16 size = (scsi_cmdbuf[7] << 7) | scsi_cmdbuf[8];
+ u8 format = scsi_cmdbuf[2] & 15;
+
+ /// SFF8020 legacy format field (see T10/1836-D Revision 2g page 643)
+ if(!format)
+ format = (scsi_cmdbuf[9] >> 6) & 3;
+
+ LOG("command READ TOC PMA ATIP, format %s msf=%d size=%d\n", format_names[format], msf, size);
+
+ int pos = 0;
+ switch (format) {
+ case 0: {
+ int start_track = scsi_cmdbuf[6];
+ int end_track = cdrom_get_last_track(cdrom);
+
+ int tracks;
+ if(start_track == 0)
+ tracks = end_track + 1;
+ else if(start_track <= end_track)
+ tracks = (end_track - start_track) + 2;
+ else if(start_track <= 0xaa)
+ tracks = 1;
+ else
+ tracks = 0;
+
+ int len = 2 + (tracks * 8);
+
+ // the returned TOC DATA LENGTH must be the full amount,
+ // regardless of how much we're able to pass back due to size
+ scsi_cmdbuf[pos++] = (len>>8) & 0xff;
+ scsi_cmdbuf[pos++] = (len & 0xff);
+ scsi_cmdbuf[pos++] = 1;
+ scsi_cmdbuf[pos++] = cdrom_get_last_track(cdrom);
+
+ if (start_track == 0)
+ start_track = 1;
+
+ for(int i = 0; i < tracks; i++) {
+ int track = start_track + i;
+ int cdrom_track = track - 1;
+ if(i == tracks-1) {
+ track = 0xaa;
+ cdrom_track = 0xaa;
+ }
+
+ scsi_cmdbuf[pos++] = 0;
+ scsi_cmdbuf[pos++] = cdrom_get_adr_control(cdrom, cdrom_track);
+ scsi_cmdbuf[pos++] = track;
+ scsi_cmdbuf[pos++] = 0;
+
+ u32 tstart = cdrom_get_track_start(cdrom, cdrom_track);
+
+ if(msf)
+ tstart = to_msf(tstart+150);
+
+ scsi_cmdbuf[pos++] = (tstart>>24) & 0xff;
+ scsi_cmdbuf[pos++] = (tstart>>16) & 0xff;
+ scsi_cmdbuf[pos++] = (tstart>>8) & 0xff;
+ scsi_cmdbuf[pos++] = (tstart & 0xff);
+ }
+ break;
+ }
+
+ case 1: {
+ int len = 2 + (8 * 1);
+
+ scsi_cmdbuf[pos++] = (len>>8) & 0xff;
+ scsi_cmdbuf[pos++] = (len & 0xff);
+ scsi_cmdbuf[pos++] = 1;
+ scsi_cmdbuf[pos++] = 1;
+
+ scsi_cmdbuf[pos++] = 0;
+ scsi_cmdbuf[pos++] = cdrom_get_adr_control(cdrom, 0);
+ scsi_cmdbuf[pos++] = 1;
+ scsi_cmdbuf[pos++] = 0;
+
+ u32 tstart = cdrom_get_track_start(cdrom, 0);
+
+ if (msf)
+ tstart = to_msf(tstart+150);
+
+ scsi_cmdbuf[pos++] = (tstart>>24) & 0xff;
+ scsi_cmdbuf[pos++] = (tstart>>16) & 0xff;
+ scsi_cmdbuf[pos++] = (tstart>>8) & 0xff;
+ scsi_cmdbuf[pos++] = (tstart & 0xff);
+ break;
+ }
+
+ default:
+ LOG("Unhandled format %d\n", format_names[format]);
+ break;
+ }
+
+ if(pos) {
+ if(pos > size)
+ pos = size;
+
+ scsi_data_in(0, pos);
+ scsi_status_complete(SS_GOOD);
+ } else {
+ // report unit attention condition
+ scsi_status_complete(SS_CHECK_CONDITION);
+ sense(false, SK_ILLEGAL_REQUEST);
+ break;
+ }
+ break;
+ }
+ default:
nscsi_full_device::scsi_command();
break;
}
}
+
+enum sgi_scsi_command_e : uint8_t {
+ /*
+ * The SGI supplied CD-ROM drives (and possibly those from some other vendors)
+ * identify themselves as hard disk drives at poweron, and after SCSI bus resets,
+ * until issued a vendor specific command (0xc9). This is done because older
+ * systems would otherwise be unable to boot and load miniroots from CD, due to
+ * their design (they attempted to protect the user from booting from
+ * "ridiculous" devices, long before CD-ROM drives existed). The SGI drives are
+ * sent a command to "revert" to CD-ROM inquiry information during boot if on
+ * a SCSI bus handled by the PROM, but not all possible buses are handled by all
+ * PROMs; additionally, a SCSI bus reset causes the CD-ROM drives to revert to
+ * the poweron default, and this could happen before the hardware inventory code
+ * in the kernel runs, if there are SCSI problems.
+ */
+ SGI_HD2CDROM = 0xc9,
+};
+
+void nscsi_cdrom_sgi_device::scsi_command()
+{
+ switch (scsi_cmdbuf[0]) {
+ case SGI_HD2CDROM:
+ LOG("command SGI_HD2CDROM");
+ // No need to do anything (yet). Just acknowledge the command.
+ scsi_status_complete(SS_GOOD);
+ break;
+
+ default:
+ nscsi_cdrom_device::scsi_command();
+ break;
+ }
+}
+
+bool nscsi_cdrom_sgi_device::scsi_command_done(uint8_t command, uint8_t length)
+{
+ switch (command) {
+ case SGI_HD2CDROM:
+ return length == 10;
+
+ default:
+ return nscsi_full_device::scsi_command_done(command, length);
+ }
+}
diff --git a/src/devices/machine/nscsi_cd.h b/src/devices/machine/nscsi_cd.h
index f3ce871c70a..48097cea42f 100644
--- a/src/devices/machine/nscsi_cd.h
+++ b/src/devices/machine/nscsi_cd.h
@@ -54,6 +54,17 @@ private:
uint8_t compliance;
void return_no_cd();
+ static int to_msf(int frame);
+};
+
+class nscsi_cdrom_sgi_device : public nscsi_cdrom_device
+{
+public:
+ nscsi_cdrom_sgi_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
+
+protected:
+ virtual void scsi_command() override;
+ virtual bool scsi_command_done(uint8_t command, uint8_t length) override;
};
class nscsi_dec_rrd45_device : public nscsi_cdrom_device
@@ -93,6 +104,7 @@ public:
};
DECLARE_DEVICE_TYPE(NSCSI_CDROM, nscsi_cdrom_device)
+DECLARE_DEVICE_TYPE(NSCSI_CDROM_SGI, nscsi_cdrom_sgi_device)
DECLARE_DEVICE_TYPE(NSCSI_RRD45, nscsi_dec_rrd45_device)
DECLARE_DEVICE_TYPE(NSCSI_XM3301, nscsi_toshiba_xm3301_device)
DECLARE_DEVICE_TYPE(NSCSI_XM5301SUN, nscsi_toshiba_xm5301_sun_device)
diff --git a/src/devices/machine/nscsi_hd.cpp b/src/devices/machine/nscsi_hd.cpp
index c83a2c17ef9..6684942c9d6 100644
--- a/src/devices/machine/nscsi_hd.cpp
+++ b/src/devices/machine/nscsi_hd.cpp
@@ -20,7 +20,7 @@ nscsi_harddisk_device::nscsi_harddisk_device(const machine_config &mconfig, cons
}
nscsi_harddisk_device::nscsi_harddisk_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock) :
- nscsi_full_device(mconfig, type, tag, owner, clock), harddisk(nullptr), lba(0), cur_lba(0), blocks(0), bytes_per_sector(0)
+ nscsi_full_device(mconfig, type, tag, owner, clock), image(*this, "image"), harddisk(nullptr), lba(0), cur_lba(0), blocks(0), bytes_per_sector(0)
{
}
@@ -37,8 +37,7 @@ void nscsi_harddisk_device::device_start()
void nscsi_harddisk_device::device_reset()
{
nscsi_full_device::device_reset();
- harddisk_image_device *hd = subdevice<harddisk_image_device>("image");
- harddisk = hd->get_hard_disk_file();
+ harddisk = image->get_hard_disk_file();
if(!harddisk) {
scsi_id = -1;
bytes_per_sector = 0;
@@ -46,18 +45,17 @@ void nscsi_harddisk_device::device_reset()
const hard_disk_info *hdinfo = hard_disk_get_info(harddisk);
bytes_per_sector = hdinfo->sectorbytes;
- chd_file *chd = hd->get_chd_file();
+ chd_file *chd = image->get_chd_file();
if(chd != nullptr)
chd->read_metadata(HARD_DISK_IDENT_METADATA_TAG, 0, m_inquiry_data);
}
cur_lba = -1;
}
-MACHINE_CONFIG_START(nscsi_harddisk_device::device_add_mconfig)
- MCFG_HARDDISK_ADD("image")
- MCFG_HARDDISK_INTERFACE("scsi_hdd")
-MACHINE_CONFIG_END
-
+void nscsi_harddisk_device::device_add_mconfig(machine_config &config)
+{
+ HARDDISK(config, image).set_interface("scsi_hdd");
+}
uint8_t nscsi_harddisk_device::scsi_get_data(int id, int pos)
{
@@ -92,9 +90,9 @@ void nscsi_harddisk_device::scsi_put_data(int id, int pos, uint8_t data)
int offset = pos % bytes_per_sector;
block[offset] = data;
- int clba = lba + pos / bytes_per_sector;
+ cur_lba = lba + pos / bytes_per_sector;
if(offset == bytes_per_sector-1) {
- if(!hard_disk_write(harddisk, clba, block))
+ if(!hard_disk_write(harddisk, cur_lba, block))
LOG("HD WRITE ERROR !\n");
}
}
@@ -168,8 +166,8 @@ void nscsi_harddisk_device::scsi_command()
// Apple HD SC setup utility needs to see this
strcpy((char *)&scsi_cmdbuf[8], " SEAGATE");
- strcpy((char *)&scsi_cmdbuf[15], " ST225N");
- strcpy((char *)&scsi_cmdbuf[31], "1.00");
+ strcpy((char *)&scsi_cmdbuf[16], " ST225N");
+ strcpy((char *)&scsi_cmdbuf[32], "1.00");
scsi_cmdbuf[36] = 0x00; // # of extents high
scsi_cmdbuf[37] = 0x08; // # of extents low
scsi_cmdbuf[38] = 0x00; // group 0 commands 0-1f
@@ -230,8 +228,10 @@ void nscsi_harddisk_device::scsi_command()
int pmax = page == 0x3f ? 0x3e : page;
int pmin = page == 0x3f ? 0x00 : page;
- for(int page=pmax; page >= pmin; page--) {
- switch(page) {
+
+ bool fail = false;
+ for(int p=pmax; p >= pmin; p--) {
+ switch(p) {
case 0x00: // Unit attention parameters page (weird)
scsi_cmdbuf[pos++] = 0x80; // PS, page id
scsi_cmdbuf[pos++] = 0x02; // Page length
@@ -239,6 +239,40 @@ void nscsi_harddisk_device::scsi_command()
scsi_cmdbuf[pos++] = 0x00; // Double meh
break;
+ case 0x01: // read-write error recovery page
+ scsi_cmdbuf[pos++] = 0x01; // !PS, page id
+ scsi_cmdbuf[pos++] = 0x0a; // page length
+ scsi_cmdbuf[pos++] = 0; // various bits
+ scsi_cmdbuf[pos++] = 0; // read retry count
+ scsi_cmdbuf[pos++] = 0; // correction span
+ scsi_cmdbuf[pos++] = 0; // head offset count
+ scsi_cmdbuf[pos++] = 0; // data strobe offset count
+ scsi_cmdbuf[pos++] = 0; // reserved
+ scsi_cmdbuf[pos++] = 0; // write retry count
+ scsi_cmdbuf[pos++] = 0; // reserved
+ scsi_cmdbuf[pos++] = 0; // recovery time limit (msb)
+ scsi_cmdbuf[pos++] = 0; // recovery time limit (lsb)
+ break;
+
+ case 0x02: // disconnect-reconnect page
+ scsi_cmdbuf[pos++] = 0x02; // !PS, page id
+ scsi_cmdbuf[pos++] = 0x0e; // page length
+ scsi_cmdbuf[pos++] = 0; // buffer full ratio
+ scsi_cmdbuf[pos++] = 0; // buffer empty ratio
+ scsi_cmdbuf[pos++] = 0; // bus inactivity limit (msb)
+ scsi_cmdbuf[pos++] = 0; // bus inactivity limit (lsb)
+ scsi_cmdbuf[pos++] = 0; // disconnect time limit (msb)
+ scsi_cmdbuf[pos++] = 0; // disconnect time limit (lsb)
+ scsi_cmdbuf[pos++] = 0; // connect time limit (msb)
+ scsi_cmdbuf[pos++] = 0; // connect time limit (lsb)
+ scsi_cmdbuf[pos++] = 0; // maximum burst size (msb)
+ scsi_cmdbuf[pos++] = 0; // maximum burst size (lsb)
+ scsi_cmdbuf[pos++] = 0; // reserved
+ scsi_cmdbuf[pos++] = 0; // reserved
+ scsi_cmdbuf[pos++] = 0; // reserved
+ scsi_cmdbuf[pos++] = 0; // reserved
+ break;
+
case 0x03: { // Format parameters page
scsi_cmdbuf[pos++] = 0x83; // PS, page id
scsi_cmdbuf[pos++] = 0x16; // Page length
@@ -295,6 +329,21 @@ void nscsi_harddisk_device::scsi_command()
break;
}
+ case 0x08: // caching page
+ scsi_cmdbuf[pos++] = 0x08; // !PS, page id
+ scsi_cmdbuf[pos++] = 0x0a; // page length
+ scsi_cmdbuf[pos++] = 0;
+ scsi_cmdbuf[pos++] = 0;
+ scsi_cmdbuf[pos++] = 0;
+ scsi_cmdbuf[pos++] = 0;
+ scsi_cmdbuf[pos++] = 0;
+ scsi_cmdbuf[pos++] = 0;
+ scsi_cmdbuf[pos++] = 0;
+ scsi_cmdbuf[pos++] = 0;
+ scsi_cmdbuf[pos++] = 0;
+ scsi_cmdbuf[pos++] = 0;
+ break;
+
case 0x30: { // Apple firmware ID page
scsi_cmdbuf[pos++] = 0xb0; // cPS, page id
scsi_cmdbuf[pos++] = 0x16; // Page length
@@ -324,16 +373,25 @@ void nscsi_harddisk_device::scsi_command()
}
default:
- LOG("mode sense page %02x unhandled\n", page);
+ if (page != 0x3f) {
+ LOG("mode sense page %02x unhandled\n", page);
+ fail = true;
+ }
break;
}
}
- scsi_cmdbuf[0] = pos;
- if(pos > size)
- pos = size;
- scsi_data_in(0, pos);
- scsi_status_complete(SS_GOOD);
+ if (!fail) {
+ scsi_cmdbuf[0] = pos;
+ if (pos > size)
+ pos = size;
+
+ scsi_data_in(0, pos);
+ scsi_status_complete(SS_GOOD);
+ } else {
+ scsi_status_complete(SS_CHECK_CONDITION);
+ sense(false, SK_ILLEGAL_REQUEST, SK_ASC_INVALID_FIELD_IN_CDB);
+ }
break;
}
@@ -342,6 +400,48 @@ void nscsi_harddisk_device::scsi_command()
scsi_status_complete(SS_GOOD);
break;
+ case SC_RECIEVE_DIAG_RES: {
+ LOG("command RECIEVE DIAGNOSTICS RESULTS");
+ int size = (scsi_cmdbuf[3] << 8) | scsi_cmdbuf[4];
+ int pos = 0;
+ scsi_cmdbuf[pos++] = 0;
+ scsi_cmdbuf[pos++] = 6;
+ scsi_cmdbuf[pos++] = 0; // ROM is OK
+ scsi_cmdbuf[pos++] = 0; // RAM is OK
+ scsi_cmdbuf[pos++] = 0; // Data buffer is OK
+ scsi_cmdbuf[pos++] = 0; // Interface is OK
+ scsi_cmdbuf[pos++] = 0;
+ if(size > pos)
+ size = pos;
+ scsi_data_in(0, size);
+ scsi_status_complete(SS_GOOD);
+ break;
+ }
+
+ case SC_SEND_DIAGNOSTICS: {
+ LOG("command SEND DIAGNOSTICS");
+ int size = (scsi_cmdbuf[3] << 8) | scsi_cmdbuf[4];
+ if(scsi_cmdbuf[1] & 4) {
+ // Self-test
+ scsi_status_complete(SS_GOOD);
+ break;
+ }
+ int pos = 0;
+ scsi_cmdbuf[pos++] = 0;
+ scsi_cmdbuf[pos++] = 6;
+ scsi_cmdbuf[pos++] = 0; // ROM is OK
+ scsi_cmdbuf[pos++] = 0; // RAM is OK
+ scsi_cmdbuf[pos++] = 0; // Data buffer is OK
+ scsi_cmdbuf[pos++] = 0; // Interface is OK
+ scsi_cmdbuf[pos++] = 0;
+ scsi_cmdbuf[pos++] = 0;
+ if(size > pos)
+ size = pos;
+ scsi_data_in(0, size);
+ scsi_status_complete(SS_GOOD);
+ break;
+ }
+
case SC_READ_CAPACITY: {
LOG("command READ CAPACITY\n");
@@ -403,6 +503,11 @@ void nscsi_harddisk_device::scsi_command()
scsi_status_complete(SS_GOOD);
break;
+ case SC_MODE_SELECT_6:
+ LOG("command MODE SELECT\n");
+ scsi_status_complete(SS_GOOD);
+ break;
+
default:
LOG("command %02x ***UNKNOWN***\n", scsi_cmdbuf[0]);
nscsi_full_device::scsi_command();
diff --git a/src/devices/machine/nscsi_hd.h b/src/devices/machine/nscsi_hd.h
index 19dfe55c0e5..5ddbf3e8519 100644
--- a/src/devices/machine/nscsi_hd.h
+++ b/src/devices/machine/nscsi_hd.h
@@ -6,7 +6,7 @@
#pragma once
#include "machine/nscsi_bus.h"
-#include "harddisk.h"
+#include "imagedev/harddriv.h"
class nscsi_harddisk_device : public nscsi_full_device
{
@@ -24,6 +24,7 @@ protected:
virtual uint8_t scsi_get_data(int id, int pos) override;
virtual void scsi_put_data(int buf, int offset, uint8_t data) override;
+ required_device<harddisk_image_device> image;
uint8_t block[512];
hard_disk_file *harddisk;
int lba, cur_lba, blocks;
diff --git a/src/devices/machine/output_latch.h b/src/devices/machine/output_latch.h
index c915b4c7207..2498be7f63f 100644
--- a/src/devices/machine/output_latch.h
+++ b/src/devices/machine/output_latch.h
@@ -6,36 +6,11 @@
#pragma once
-#define MCFG_OUTPUT_LATCH_BIT0_HANDLER(_devcb) \
- downcast<output_latch_device &>(*device).set_bit_handler<0>(DEVCB_##_devcb);
-
-#define MCFG_OUTPUT_LATCH_BIT1_HANDLER(_devcb) \
- downcast<output_latch_device &>(*device).set_bit_handler<1>(DEVCB_##_devcb);
-
-#define MCFG_OUTPUT_LATCH_BIT2_HANDLER(_devcb) \
- downcast<output_latch_device &>(*device).set_bit_handler<2>(DEVCB_##_devcb);
-
-#define MCFG_OUTPUT_LATCH_BIT3_HANDLER(_devcb) \
- downcast<output_latch_device &>(*device).set_bit_handler<3>(DEVCB_##_devcb);
-
-#define MCFG_OUTPUT_LATCH_BIT4_HANDLER(_devcb) \
- downcast<output_latch_device &>(*device).set_bit_handler<4>(DEVCB_##_devcb);
-
-#define MCFG_OUTPUT_LATCH_BIT5_HANDLER(_devcb) \
- downcast<output_latch_device &>(*device).set_bit_handler<5>(DEVCB_##_devcb);
-
-#define MCFG_OUTPUT_LATCH_BIT6_HANDLER(_devcb) \
- downcast<output_latch_device &>(*device).set_bit_handler<6>(DEVCB_##_devcb);
-
-#define MCFG_OUTPUT_LATCH_BIT7_HANDLER(_devcb) \
- downcast<output_latch_device &>(*device).set_bit_handler<7>(DEVCB_##_devcb);
-
class output_latch_device : public device_t
{
public:
output_latch_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
- template <unsigned Bit, class Object> devcb_base &set_bit_handler(Object &&cb) { return m_bit_handlers[Bit].set_callback(std::forward<Object>(cb)); }
template <unsigned Bit> auto bit_handler() { return m_bit_handlers[Bit].bind(); }
void write(uint8_t data);
diff --git a/src/devices/machine/pc_fdc.cpp b/src/devices/machine/pc_fdc.cpp
index 601c4c813c5..8f48da0f505 100644
--- a/src/devices/machine/pc_fdc.cpp
+++ b/src/devices/machine/pc_fdc.cpp
@@ -157,7 +157,7 @@ uint8_t pc_fdc_family_device::do_dir_r()
WRITE8_MEMBER( pc_fdc_xt_device::dor_fifo_w)
{
- fdc->fifo_w(space, 0, data, mem_mask);
+ fdc->fifo_w(data);
dor_w(space, 0, data, mem_mask);
}
diff --git a/src/devices/machine/pc_lpt.cpp b/src/devices/machine/pc_lpt.cpp
index b0f97871e87..0d43fbc6eeb 100644
--- a/src/devices/machine/pc_lpt.cpp
+++ b/src/devices/machine/pc_lpt.cpp
@@ -46,7 +46,8 @@ void pc_lpt_device::device_reset()
m_cent_ctrl_out->write(m_control);
}
-MACHINE_CONFIG_START(pc_lpt_device::device_add_mconfig)
+void pc_lpt_device::device_add_mconfig(machine_config &config)
+{
centronics_device &centronics(CENTRONICS(config, "centronics", centronics_devices, "printer"));
centronics.set_data_input_buffer(m_cent_data_in);
centronics.fault_handler().set(m_cent_status_in, FUNC(input_buffer_device::write_bit3));
@@ -64,7 +65,8 @@ MACHINE_CONFIG_START(pc_lpt_device::device_add_mconfig)
INPUT_BUFFER(config, m_cent_ctrl_in);
INPUT_BUFFER(config, m_cent_status_in);
- MCFG_CENTRONICS_OUTPUT_LATCH_ADD("cent_data_out", "centronics")
+ OUTPUT_LATCH(config, m_cent_data_out);
+ centronics.set_output_latch(*m_cent_data_out);
OUTPUT_LATCH(config, m_cent_ctrl_out);
m_cent_ctrl_out->bit_handler<0>().set("centronics", FUNC(centronics_device::write_strobe));
@@ -72,7 +74,7 @@ MACHINE_CONFIG_START(pc_lpt_device::device_add_mconfig)
m_cent_ctrl_out->bit_handler<2>().set("centronics", FUNC(centronics_device::write_init));
m_cent_ctrl_out->bit_handler<3>().set("centronics", FUNC(centronics_device::write_select_in));
m_cent_ctrl_out->bit_handler<4>().set(FUNC(pc_lpt_device::write_irq_enabled));
-MACHINE_CONFIG_END
+}
READ8_MEMBER( pc_lpt_device::data_r )
diff --git a/src/devices/machine/pckeybrd.h b/src/devices/machine/pckeybrd.h
index 7ee6c5c2c14..42a443226f5 100644
--- a/src/devices/machine/pckeybrd.h
+++ b/src/devices/machine/pckeybrd.h
@@ -20,12 +20,11 @@
class pc_keyboard_device : public device_t
{
public:
- pc_keyboard_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ pc_keyboard_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
DECLARE_READ8_MEMBER(read);
DECLARE_WRITE_LINE_MEMBER(enable);
- template <class Object> devcb_base &set_keypress_callback(Object &&cb) { return m_out_keypress_func.set_callback(std::forward<Object>(cb)); }
auto keypress() { return m_out_keypress_func.bind(); }
enum class KEYBOARD_TYPE
@@ -77,7 +76,13 @@ private:
class at_keyboard_device : public pc_keyboard_device
{
public:
- at_keyboard_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ at_keyboard_device(const machine_config &mconfig, const char *tag, device_t *owner, KEYBOARD_TYPE type, int default_set)
+ : at_keyboard_device(mconfig, tag, owner, 0)
+ {
+ set_type(type, default_set);
+ }
+
+ at_keyboard_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
DECLARE_WRITE8_MEMBER( write );
@@ -114,18 +119,4 @@ INPUT_PORTS_EXTERN( at_keyboard );
DECLARE_DEVICE_TYPE(PC_KEYB, pc_keyboard_device)
DECLARE_DEVICE_TYPE(AT_KEYB, at_keyboard_device)
-#define MCFG_PC_KEYB_ADD(_tag, _cb) \
- MCFG_DEVICE_ADD(_tag, PC_KEYB, 0) \
- downcast<pc_keyboard_device &>(*device).set_keypress_callback(DEVCB_##_cb);
-
-#define MCFG_AT_KEYB_ADD(_tag, _def_set, _cb) \
- MCFG_DEVICE_ADD(_tag, AT_KEYB, 0) \
- downcast<at_keyboard_device &>(*device).set_type(pc_keyboard_device::KEYBOARD_TYPE::AT, _def_set); \
- downcast<pc_keyboard_device &>(*device).set_keypress_callback(DEVCB_##_cb);
-
-#define MCFG_AT_MF2_KEYB_ADD(_tag, _def_set, _cb) \
- MCFG_DEVICE_ADD(_tag, AT_KEYB, 0) \
- downcast<at_keyboard_device &>(*device).set_type(pc_keyboard_device::KEYBOARD_TYPE_MF2, _def_set); \
- downcast<pc_keyboard_device &>(*device).set_keypress_callback(DEVCB_##_cb);
-
#endif // MAME_MACHINE_PCKEYBRD_H
diff --git a/src/devices/machine/pdc.cpp b/src/devices/machine/pdc.cpp
index 99964762548..20b0c627dc5 100644
--- a/src/devices/machine/pdc.cpp
+++ b/src/devices/machine/pdc.cpp
@@ -261,7 +261,7 @@ void pdc_device::device_add_mconfig(machine_config &config)
Z80(config, m_pdccpu, XTAL(10'000'000) / 2);
m_pdccpu->set_addrmap(AS_PROGRAM, &pdc_device::pdc_mem);
m_pdccpu->set_addrmap(AS_IO, &pdc_device::pdc_io);
- //MCFG_QUANTUM_PERFECT_CPU(M6502_TAG)
+ //config.m_perfect_cpu_quantum = subtag(M6502_TAG);
/* Floppy Disk Controller - uPD765a - NEC D765AC-2 */
UPD765A(config, m_fdc, 4'000'000, true, true);
@@ -279,6 +279,7 @@ void pdc_device::device_add_mconfig(machine_config &config)
m_dma8237->out_eop_callback().set(FUNC(pdc_device::i8237_eop_w));
m_dma8237->in_memr_callback().set(FUNC(pdc_device::i8237_dma_mem_r));
m_dma8237->out_memw_callback().set(FUNC(pdc_device::i8237_dma_mem_w));
+ //m_dma8237->out_dack_callback<0>().set(m_fdc, FUNC(upd765a_device::dack_w));
m_dma8237->in_ior_callback<0>().set(FUNC(pdc_device::i8237_fdc_dma_r));
m_dma8237->out_iow_callback<0>().set(FUNC(pdc_device::i8237_fdc_dma_w));
m_dma8237->in_ior_callback<1>().set(FUNC(pdc_device::m68k_dma_r));
diff --git a/src/devices/machine/pic8259.h b/src/devices/machine/pic8259.h
index 0b85efd9ac1..298ef1debea 100644
--- a/src/devices/machine/pic8259.h
+++ b/src/devices/machine/pic8259.h
@@ -31,7 +31,7 @@
class pic8259_device : public device_t
{
public:
- pic8259_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ pic8259_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
auto out_int_callback() { return m_out_int_func.bind(); } // Interrupt request output to CPU or master 8259 (active high)
auto in_sp_callback() { return m_in_sp_func.bind(); } // Slave program select (VCC = master; GND = slave; pin becomes EN output in buffered mode)
@@ -118,7 +118,7 @@ private:
class v5x_icu_device : public pic8259_device
{
public:
- v5x_icu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ v5x_icu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
protected:
virtual bool is_x86() const override { return true; }
diff --git a/src/devices/machine/pit8253.cpp b/src/devices/machine/pit8253.cpp
index 6e6f86e5b0e..7d52572ba89 100644
--- a/src/devices/machine/pit8253.cpp
+++ b/src/devices/machine/pit8253.cpp
@@ -74,11 +74,12 @@ fe2010_pit_device::fe2010_pit_device(const machine_config &mconfig, const char *
// device_add_mconfig - add device configuration
//-------------------------------------------------
-MACHINE_CONFIG_START(pit8253_device::device_add_mconfig)
- MCFG_DEVICE_ADD("counter0", PIT_COUNTER, 0)
- MCFG_DEVICE_ADD("counter1", PIT_COUNTER, 0)
- MCFG_DEVICE_ADD("counter2", PIT_COUNTER, 0)
-MACHINE_CONFIG_END
+void pit8253_device::device_add_mconfig(machine_config &config)
+{
+ PIT_COUNTER(config, "counter0", 0);
+ PIT_COUNTER(config, "counter1", 0);
+ PIT_COUNTER(config, "counter2", 0);
+}
//-------------------------------------------------
diff --git a/src/devices/machine/pit8253.h b/src/devices/machine/pit8253.h
index eebee4edbb3..77f0bf552f9 100644
--- a/src/devices/machine/pit8253.h
+++ b/src/devices/machine/pit8253.h
@@ -104,7 +104,7 @@ class pit8253_device : public device_t
public:
// construction/destruction
- pit8253_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ pit8253_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
// configuration helpers
template <unsigned N> void set_clk(double clk) { m_clk[N] = clk; }
@@ -157,7 +157,7 @@ DECLARE_DEVICE_TYPE(PIT8253, pit8253_device)
class pit8254_device : public pit8253_device
{
public:
- pit8254_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ pit8254_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
protected:
virtual void readback_command(uint8_t data) override;
@@ -168,7 +168,7 @@ DECLARE_DEVICE_TYPE(PIT8254, pit8254_device)
class fe2010_pit_device : public pit8253_device
{
public:
- fe2010_pit_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ fe2010_pit_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0);
};
DECLARE_DEVICE_TYPE(FE2010_PIT, fe2010_pit_device)
diff --git a/src/devices/machine/pla.h b/src/devices/machine/pla.h
index 7e4672b7860..b614a968b36 100644
--- a/src/devices/machine/pla.h
+++ b/src/devices/machine/pla.h
@@ -11,24 +11,6 @@
#pragma once
-///*************************************************************************
-// INTERFACE CONFIGURATION MACROS
-///*************************************************************************
-
-#define MCFG_PLA_ADD(tag, inputs, outputs, terms) \
- MCFG_DEVICE_ADD((tag), PLA, 0) \
- downcast<pla_device &>(*device).set_num_inputs((inputs)); \
- downcast<pla_device &>(*device).set_num_outputs((outputs)); \
- downcast<pla_device &>(*device).set_num_terms((terms));
-
-#define MCFG_PLA_INPUTMASK(mask) \
- downcast<pla_device &>(*device).set_inputmask((mask));
-
-#define MCFG_PLA_FILEFORMAT(format) \
- downcast<pla_device &>(*device).set_format((pla_device::FMT::format));
-
-
-// macros for known (and used) devices
// 82S100, 82S101, PLS100, PLS101
// 16x48x8 PLA, 28-pin:
@@ -48,8 +30,7 @@
F4 13 | | 16 F2
GND 14 |_____________| 15 F3
*/
-#define MCFG_PLS100_ADD(tag) \
- MCFG_DEVICE_ADD((tag), PLS100)
+
///*************************************************************************
// TYPE DEFINITIONS
diff --git a/src/devices/machine/pxa255.cpp b/src/devices/machine/pxa255.cpp
index 0e96fec2b27..5a65f1542ae 100644
--- a/src/devices/machine/pxa255.cpp
+++ b/src/devices/machine/pxa255.cpp
@@ -1222,20 +1222,20 @@ uint32_t pxa255_periphs_device::screen_update(screen_device &screen, bitmap_rgb3
return 0;
}
-MACHINE_CONFIG_START(pxa255_periphs_device::device_add_mconfig)
- MCFG_SCREEN_ADD("screen", RASTER)
- MCFG_SCREEN_REFRESH_RATE(60)
- MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
- MCFG_SCREEN_SIZE(1024, 1024)
- MCFG_SCREEN_VISIBLE_AREA(0, 295, 0, 479)
- MCFG_SCREEN_UPDATE_DEVICE(DEVICE_SELF, pxa255_periphs_device, screen_update)
- MCFG_PALETTE_ADD(m_palette, 256)
+void pxa255_periphs_device::device_add_mconfig(machine_config &config)
+{
+ screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER));
+ screen.set_refresh_hz(60);
+ screen.set_vblank_time(ATTOSECONDS_IN_USEC(0));
+ screen.set_size(1024, 1024);
+ screen.set_visarea(0, 295, 0, 479);
+ screen.set_screen_update(FUNC(pxa255_periphs_device::screen_update));
+
+ PALETTE(config, m_palette).set_entries(256);
SPEAKER(config, "lspeaker").front_left();
SPEAKER(config, "rspeaker").front_right();
- MCFG_DEVICE_ADD(m_dmadac[0], DMADAC)
- MCFG_SOUND_ROUTE(ALL_OUTPUTS, "lspeaker", 1.0)
- MCFG_DEVICE_ADD(m_dmadac[1], DMADAC)
- MCFG_SOUND_ROUTE(ALL_OUTPUTS, "rspeaker", 1.0)
-MACHINE_CONFIG_END
+ DMADAC(config, m_dmadac[0]).add_route(ALL_OUTPUTS, "lspeaker", 1.0);
+ DMADAC(config, m_dmadac[1]).add_route(ALL_OUTPUTS, "rspeaker", 1.0);
+}
diff --git a/src/devices/machine/rtc65271.cpp b/src/devices/machine/rtc65271.cpp
index f44cc8255fc..9ccc83997bf 100644
--- a/src/devices/machine/rtc65271.cpp
+++ b/src/devices/machine/rtc65271.cpp
@@ -346,12 +346,12 @@ uint8_t rtc65271_device::read(int xramsel, offs_t offset)
return reply;
}
-READ8_MEMBER( rtc65271_device::rtc_r )
+uint8_t rtc65271_device::rtc_r(offs_t offset)
{
return read(0, offset );
}
-READ8_MEMBER( rtc65271_device::xram_r )
+uint8_t rtc65271_device::xram_r(offs_t offset)
{
return read(1, offset );
}
@@ -436,12 +436,12 @@ void rtc65271_device::write(int xramsel, offs_t offset, uint8_t data)
}
}
-WRITE8_MEMBER( rtc65271_device::rtc_w )
+void rtc65271_device::rtc_w(offs_t offset, uint8_t data)
{
write(0, offset, data );
}
-WRITE8_MEMBER( rtc65271_device::xram_w )
+void rtc65271_device::xram_w(offs_t offset, uint8_t data)
{
write(1, offset, data );
}
diff --git a/src/devices/machine/rtc65271.h b/src/devices/machine/rtc65271.h
index 65ee8233675..1a69b518839 100644
--- a/src/devices/machine/rtc65271.h
+++ b/src/devices/machine/rtc65271.h
@@ -21,10 +21,10 @@ public:
auto interrupt_cb() { return m_interrupt_cb.bind(); }
- DECLARE_READ8_MEMBER( rtc_r );
- DECLARE_READ8_MEMBER( xram_r );
- DECLARE_WRITE8_MEMBER( rtc_w );
- DECLARE_WRITE8_MEMBER( xram_w );
+ uint8_t rtc_r(offs_t offset);
+ uint8_t xram_r(offs_t offset);
+ void rtc_w(offs_t offset, uint8_t data);
+ void xram_w(offs_t offset, uint8_t data);
protected:
// device-level overrides
diff --git a/src/devices/machine/scc2698b.cpp b/src/devices/machine/scc2698b.cpp
index 1f6c537f52d..8a362e26d45 100644
--- a/src/devices/machine/scc2698b.cpp
+++ b/src/devices/machine/scc2698b.cpp
@@ -768,7 +768,8 @@ attotime scc2698b_device::generate_baudrate(int block, int tx, int table_index)
-MACHINE_CONFIG_START(scc2698b_device::device_add_mconfig)
+void scc2698b_device::device_add_mconfig(machine_config &config)
+{
for (required_device<scc2698b_channel> &channel : m_channel)
SCC2698B_CHANNEL(config, channel, 0);
-MACHINE_CONFIG_END
+}
diff --git a/src/devices/machine/scnxx562.cpp b/src/devices/machine/scnxx562.cpp
index 9ccf996782c..c3bfbfacc5d 100644
--- a/src/devices/machine/scnxx562.cpp
+++ b/src/devices/machine/scnxx562.cpp
@@ -126,10 +126,11 @@ DEFINE_DEVICE_TYPE(DUSCC68C562, duscc68c562_device, "duscc68c562", "Philips
//-------------------------------------------------
// device_add_mconfig - add device configuration
//-------------------------------------------------
-MACHINE_CONFIG_START(duscc_device::device_add_mconfig)
- MCFG_DEVICE_ADD(CHANA_TAG, DUSCC_CHANNEL, 0)
- MCFG_DEVICE_ADD(CHANB_TAG, DUSCC_CHANNEL, 0)
-MACHINE_CONFIG_END
+void duscc_device::device_add_mconfig(machine_config &config)
+{
+ DUSCC_CHANNEL(config, CHANA_TAG, 0);
+ DUSCC_CHANNEL(config, CHANB_TAG, 0);
+}
//**************************************************************************
// LIVE DEVICE
diff --git a/src/devices/machine/sis85c496.cpp b/src/devices/machine/sis85c496.cpp
index 186c4894b8d..87b01edf2e6 100644
--- a/src/devices/machine/sis85c496.cpp
+++ b/src/devices/machine/sis85c496.cpp
@@ -45,7 +45,8 @@ void sis85c496_host_device::internal_io_map(address_map &map)
map(0x00e0, 0x00ef).noprw();
}
-MACHINE_CONFIG_START(sis85c496_host_device::device_add_mconfig)
+void sis85c496_host_device::device_add_mconfig(machine_config &config)
+{
PIT8254(config, m_pit8254, 0);
m_pit8254->set_clk<0>(4772720/4); // heartbeat IRQ
m_pit8254->out_handler<0>().set(FUNC(sis85c496_host_device::at_pit8254_out0_changed));
@@ -103,10 +104,10 @@ MACHINE_CONFIG_START(sis85c496_host_device::device_add_mconfig)
m_keybc->kbd_clk().set("pc_kbdc", FUNC(pc_kbdc_device::clock_write_from_mb));
m_keybc->kbd_data().set("pc_kbdc", FUNC(pc_kbdc_device::data_write_from_mb));
- MCFG_DEVICE_ADD("pc_kbdc", PC_KBDC, 0)
- MCFG_PC_KBDC_OUT_CLOCK_CB(WRITELINE("keybc", at_keyboard_controller_device, kbd_clk_w))
- MCFG_PC_KBDC_OUT_DATA_CB(WRITELINE("keybc", at_keyboard_controller_device, kbd_data_w))
- MCFG_PC_KBDC_SLOT_ADD("pc_kbdc", "kbd", pc_at_keyboards, STR_KBD_MICROSOFT_NATURAL)
+ PC_KBDC(config, m_pc_kbdc, 0);
+ m_pc_kbdc->out_clock_cb().set("keybc", FUNC(at_keyboard_controller_device::kbd_clk_w));
+ m_pc_kbdc->out_data_cb().set("keybc", FUNC(at_keyboard_controller_device::kbd_data_w));
+ PC_KBDC_SLOT(config, "kbd", pc_at_keyboards, STR_KBD_MICROSOFT_NATURAL).set_pc_kbdc_slot(subdevice("pc_kbdc"));
DS12885(config, m_ds12885);
m_ds12885->irq().set(m_pic8259_slave, FUNC(pic8259_device::ir0_w));
@@ -115,7 +116,7 @@ MACHINE_CONFIG_START(sis85c496_host_device::device_add_mconfig)
/* sound hardware */
SPEAKER(config, "mono").front_center();
SPEAKER_SOUND(config, m_speaker).add_route(ALL_OUTPUTS, "mono", 0.50);
-MACHINE_CONFIG_END
+}
sis85c496_host_device::sis85c496_host_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
@@ -492,6 +493,8 @@ WRITE_LINE_MEMBER( sis85c496_host_device::at_dma8237_out_eop )
void sis85c496_host_device::pc_select_dma_channel(int channel, bool state)
{
+ //m_isabus->dack_line_w(channel, state);
+
if(!state) {
m_dma_channel = channel;
//if(m_cur_eop)
@@ -541,19 +544,19 @@ WRITE8_MEMBER( sis85c496_host_device::at_portb_w )
READ8_MEMBER( sis85c496_host_device::at_dma8237_2_r )
{
- return m_dma8237_2->read( space, offset / 2);
+ return m_dma8237_2->read( offset / 2);
}
WRITE8_MEMBER( sis85c496_host_device::at_dma8237_2_w )
{
- m_dma8237_2->write( space, offset / 2, data);
+ m_dma8237_2->write( offset / 2, data);
}
READ8_MEMBER( sis85c496_host_device::at_keybc_r )
{
switch (offset)
{
- case 0: return m_keybc->data_r(space, 0);
+ case 0: return m_keybc->data_r();
case 1: return at_portb_r(space, 0);
}
@@ -564,7 +567,7 @@ WRITE8_MEMBER( sis85c496_host_device::at_keybc_w )
{
switch (offset)
{
- case 0: m_keybc->data_w(space, 0, data); break;
+ case 0: m_keybc->data_w(data); break;
case 1: at_portb_w(space, 0, data); break;
}
}
@@ -575,10 +578,10 @@ WRITE8_MEMBER( sis85c496_host_device::write_rtc )
if (offset==0) {
m_nmi_enabled = BIT(data,7);
//m_isabus->set_nmi_state((m_nmi_enabled==0) && (m_channel_check==0));
- m_ds12885->write(space,0,data);
+ m_ds12885->write(0,data);
}
else {
- m_ds12885->write(space,offset,data);
+ m_ds12885->write(offset,data);
}
}
diff --git a/src/devices/machine/smc91c9x.cpp b/src/devices/machine/smc91c9x.cpp
index e081c2c6a17..359a69eefdb 100644
--- a/src/devices/machine/smc91c9x.cpp
+++ b/src/devices/machine/smc91c9x.cpp
@@ -4,92 +4,29 @@
SMC91C9X ethernet controller implementation
- by Aaron Giles, Jean-François DEL NERO
+ by Aaron Giles, Ted Green
-***************************************************************************
-
- Notes:
- * Connected mode working
-
-**************************************************************************/
+***************************************************************************/
#include "emu.h"
#include "smc91c9x.h"
-// Needed for netdev_count???
-#include "osdnet.h"
-
+#include <sstream>
+#include <iomanip>
/***************************************************************************
DEBUGGING
***************************************************************************/
-//#define VERBOSE 1
+#define LOG_GENERAL (1U << 0)
+#define LOG_PACKETS (1U << 1)
+#define LOG_TX (1U << 2)
+#define LOG_RX (1U << 3)
+#define LOG_FILTER (1U << 4)
+//#define VERBOSE (LOG_GENERAL | LOG_PACKETS | LOG_TX | LOG_RX | LOG_FILTER)
#include "logmacro.h"
#define DISPLAY_STATS (0)
-
-
-/***************************************************************************
- CONSTANTS
-***************************************************************************/
-
-/* Ethernet registers - bank 0 */
-#define EREG_TCR (0*8 + 0)
-#define EREG_EPH_STATUS (0*8 + 1)
-#define EREG_RCR (0*8 + 2)
-#define EREG_COUNTER (0*8 + 3)
-#define EREG_MIR (0*8 + 4)
-#define EREG_MCR (0*8 + 5)
-#define EREG_BANK (0*8 + 7)
-
-/* Ethernet registers - bank 1 */
-#define EREG_CONFIG (1*8 + 0)
-#define EREG_BASE (1*8 + 1)
-#define EREG_IA0_1 (1*8 + 2)
-#define EREG_IA2_3 (1*8 + 3)
-#define EREG_IA4_5 (1*8 + 4)
-#define EREG_GENERAL_PURP (1*8 + 5)
-#define EREG_CONTROL (1*8 + 6)
-
-/* Ethernet registers - bank 2 */
-#define EREG_MMU_COMMAND (2*8 + 0)
-#define EREG_PNR_ARR (2*8 + 1)
-#define EREG_FIFO_PORTS (2*8 + 2)
-#define EREG_POINTER (2*8 + 3)
-#define EREG_DATA_0 (2*8 + 4)
-#define EREG_DATA_1 (2*8 + 5)
-#define EREG_INTERRUPT (2*8 + 6)
-
-/* Ethernet registers - bank 3 */
-#define EREG_MT0_1 (3*8 + 0)
-#define EREG_MT2_3 (3*8 + 1)
-#define EREG_MT4_5 (3*8 + 2)
-#define EREG_MT6_7 (3*8 + 3)
-#define EREG_MGMT (3*8 + 4)
-#define EREG_REVISION (3*8 + 5)
-#define EREG_ERCV (3*8 + 6)
-
-/* Ethernet MMU commands */
-#define ECMD_NOP 0
-#define ECMD_ALLOCATE 2
-#define ECMD_RESET_MMU 4
-#define ECMD_REMOVE_TOPFRAME_RX 6
-#define ECMD_REMOVE_TOPFRAME_TX 7
-#define ECMD_REMOVE_RELEASE_TOPFRAME_RX 8
-#define ECMD_RELEASE_PACKET 10
-#define ECMD_ENQUEUE_PACKET 12
-#define ECMD_RESET_FIFOS 14
-
-/* Ethernet interrupt bits */
-#define EINT_RCV 0x01
-#define EINT_TX 0x02
-#define EINT_TX_EMPTY 0x04
-#define EINT_ALLOC 0x08
-#define EINT_RX_OVRN 0x10
-#define EINT_EPH 0x20
-#define EINT_ERCV 0x40
-
/* Ethernet register names */
static const char *const ethernet_regname[64] =
{
@@ -107,73 +44,93 @@ static const char *const ethernet_regname[64] =
DEVICE INTERFACE
***************************************************************************/
-smc91c9x_device::smc91c9x_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock)
+DEFINE_DEVICE_TYPE(SMC91C94, smc91c94_device, "smc91c94", "SMC91C94 Ethernet Controller")
+
+smc91c94_device::smc91c94_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+ : smc91c9x_device(mconfig, SMC91C94, tag, owner, clock, dev_type::SMC91C94)
+{
+ m_num_ebuf = 18;
+}
+
+DEFINE_DEVICE_TYPE(SMC91C96, smc91c96_device, "smc91c96", "SMC91C96 Ethernet Controller")
+
+smc91c96_device::smc91c96_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+ : smc91c9x_device(mconfig, SMC91C96, tag, owner, clock, dev_type::SMC91C96)
+{
+ m_num_ebuf = 24;
+}
+
+smc91c9x_device::smc91c9x_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, dev_type device_type)
: device_t(mconfig, type, tag, owner, clock)
, device_network_interface(mconfig, *this, 10.0f)
+ , m_device_type(device_type)
+ , m_num_ebuf(16)
, m_irq_handler(*this)
, m_link_unconnected(false)
{
}
+const u8 smc91c9x_device::ETH_BROADCAST[] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff };
+const u8 smc91c9x_device::WMS_OUI[] = { 0x00, 0xA0, 0xAF };
+
//-------------------------------------------------
// device_start - device-specific startup
//-------------------------------------------------
void smc91c9x_device::device_start()
{
+ // Allocate main buffer
+ m_buffer = std::make_unique<u8[]>(ETHER_BUFFER_SIZE * m_num_ebuf);
+
// TX timer
- m_tx_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(smc91c9x_device::send_frame), this));
+ m_tx_poll = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(smc91c9x_device::tx_poll), this));
m_irq_handler.resolve_safe();
+ // These registers don't get cleared on reset
+ m_reg[B1_CONFIG] = 0x0030; m_regmask[B1_CONFIG] = 0x17c6;
+ m_reg[B1_BASE] = 0x1866; m_regmask[B1_BASE] = 0xfffe;
+
+ m_reg[B1_IA0_1] = 0x0000; m_regmask[B1_IA0_1] = 0xffff;
+ m_reg[B1_IA2_3] = 0x0000; m_regmask[B1_IA2_3] = 0xffff;
+ m_reg[B1_IA4_5] = 0x0000; m_regmask[B1_IA4_5] = 0xffff;
+
+ // Revision is set based on chip type
+ m_regmask[B3_REVISION] = 0x0000;
+ if (m_device_type == dev_type::SMC91C94)
+ m_reg[B3_REVISION] = 0x3345;
+ else if (m_device_type == dev_type::SMC91C96)
+ m_reg[B3_REVISION] = 0x3346;
+ else
+ fatalerror("device_start: Unknown device type\n");
+
/* register ide states */
save_item(NAME(m_reg));
save_item(NAME(m_regmask));
save_item(NAME(m_irq_state));
- save_item(NAME(m_buffer));
+ save_pointer(NAME(m_buffer), ETHER_BUFFER_SIZE * m_num_ebuf);
save_item(NAME(m_sent));
save_item(NAME(m_recd));
save_item(NAME(m_alloc_rx));
save_item(NAME(m_alloc_tx));
- // Save vector data for proper save state restoration
- save_item(NAME(m_comp_rx_data));
- save_item(NAME(m_comp_tx_data));
- save_item(NAME(m_trans_tx_data));
- // Save vector sizes for proper save state restoration
- save_item(NAME(m_comp_tx_size));
- save_item(NAME(m_comp_rx_size));
- save_item(NAME(m_trans_tx_size));
-}
-
-// Save state presave to save vector sizes
-void smc91c9x_device::device_pre_save()
-{
- m_comp_tx_size = m_comp_tx.size();
- m_comp_rx_size = m_comp_rx.size();
- m_trans_tx_size = m_trans_tx.size();
- memcpy(m_comp_rx_data, m_comp_rx.data(), m_comp_rx_size * sizeof(u32));
- memcpy(m_comp_tx_data, m_comp_tx.data(), m_comp_tx_size * sizeof(u32));
- memcpy(m_trans_tx_data, m_trans_tx.data(), m_trans_tx_size * sizeof(u32));
-
- //osd_printf_info("Save: comp_tx: %d comp_rx: %d trans_tx: %d\n", m_comp_tx_size, m_comp_rx_size, m_trans_tx_size);
- //if (m_comp_tx_size)
- // osd_printf_info("comp_tx packet: %d\n", m_comp_tx.front());
+ save_item(NAME(m_tx_active));
+ save_item(NAME(m_rx_active));
+ save_item(NAME(m_tx_retry_count));
+ save_item(NAME(m_rx_hash));
+ save_item(NAME(m_loopback_result));
+
+ // Circular FIFOs
+ save_item(NAME(m_queued_tx));
+ save_item(NAME(m_queued_tx_h));
+ save_item(NAME(m_queued_tx_t));
+ save_item(NAME(m_completed_tx));
+ save_item(NAME(m_completed_tx_h));
+ save_item(NAME(m_completed_tx_t));
+ save_item(NAME(m_completed_rx));
+ save_item(NAME(m_completed_rx_h));
+ save_item(NAME(m_completed_rx_t));
}
-// Save state preload to restore vector sizes
-void smc91c9x_device::device_post_load()
-{
- m_comp_tx.resize(m_comp_tx_size);
- m_comp_rx.resize(m_comp_rx_size);
- m_trans_tx.resize(m_trans_tx_size);
- memcpy(m_comp_rx.data(), m_comp_rx_data, m_comp_rx_size * sizeof(u32));
- memcpy(m_comp_tx.data(), m_comp_tx_data, m_comp_tx_size * sizeof(u32));
- memcpy(m_trans_tx.data(), m_trans_tx_data, m_trans_tx_size * sizeof(u32));
-
- //osd_printf_info("Restore: comp_tx: %d comp_rx: %d trans_tx: %d\n", m_comp_tx_size, m_comp_rx_size, m_trans_tx_size);
- //if (m_comp_tx_size)
- // osd_printf_info("comp_tx size: %lu comp_tx packet: %d array_data: %d\n", m_comp_tx.size(), m_comp_tx.front(), m_comp_tx_data[0]);
-}
//-------------------------------------------------
// device_reset - device-specific reset
@@ -181,75 +138,43 @@ void smc91c9x_device::device_post_load()
void smc91c9x_device::device_reset()
{
- std::fill(std::begin(m_reg), std::end(m_reg), 0);
-
- std::fill(std::begin(m_regmask), std::end(m_regmask), 0);
-
m_irq_state = 0;
m_sent = 0;
m_recd = 0;
- m_reg[EREG_TCR] = 0x0000; m_regmask[EREG_TCR] = 0x3d87;
- m_reg[EREG_EPH_STATUS] = 0x0000; m_regmask[EREG_EPH_STATUS] = 0x0000;
- m_reg[EREG_RCR] = 0x0000; m_regmask[EREG_RCR] = 0xc307;
- m_reg[EREG_COUNTER] = 0x0000; m_regmask[EREG_COUNTER] = 0x0000;
- m_reg[EREG_MIR] = 0x1212; m_regmask[EREG_MIR] = 0x0000;
- m_reg[EREG_MCR] = 0x3300; m_regmask[EREG_MCR] = 0x00ff;
- m_reg[EREG_BANK] = 0x3300; m_regmask[EREG_BANK] = 0x0007;
-
- m_reg[EREG_CONFIG] = 0x0030; m_regmask[EREG_CONFIG] = 0x17c6;
- m_reg[EREG_BASE] = 0x1866; m_regmask[EREG_BASE] = 0xfffe;
-
- // Default MAC
- m_reg[EREG_IA0_1] = 0x1300; m_regmask[EREG_IA0_1] = 0xffff;
- m_reg[EREG_IA2_3] = 0x12F7; m_regmask[EREG_IA2_3] = 0xffff;
- m_reg[EREG_IA4_5] = 0x5634; m_regmask[EREG_IA4_5] = 0xffff;
-
- m_reg[EREG_GENERAL_PURP] = 0x0000; m_regmask[EREG_GENERAL_PURP] = 0xffff;
- m_reg[EREG_CONTROL] = 0x0100; m_regmask[EREG_CONTROL] = 0x68e7;
-
- m_reg[EREG_MMU_COMMAND] = 0x0000; m_regmask[EREG_MMU_COMMAND] = 0x00e7;
- m_reg[EREG_PNR_ARR] = 0x8000; m_regmask[EREG_PNR_ARR] = 0x00ff;
- m_reg[EREG_FIFO_PORTS] = 0x8080; m_regmask[EREG_FIFO_PORTS] = 0x0000;
- m_reg[EREG_POINTER] = 0x0000; m_regmask[EREG_POINTER] = 0xf7ff;
- m_reg[EREG_DATA_0] = 0x0000; m_regmask[EREG_DATA_0] = 0xffff;
- m_reg[EREG_DATA_1] = 0x0000; m_regmask[EREG_DATA_1] = 0xffff;
- m_reg[EREG_INTERRUPT] = 0x0004; m_regmask[EREG_INTERRUPT] = 0x7f00;
-
- m_reg[EREG_MT0_1] = 0x0000; m_regmask[EREG_MT0_1] = 0xffff;
- m_reg[EREG_MT2_3] = 0x0000; m_regmask[EREG_MT2_3] = 0xffff;
- m_reg[EREG_MT4_5] = 0x0000; m_regmask[EREG_MT4_5] = 0xffff;
- m_reg[EREG_MT6_7] = 0x0000; m_regmask[EREG_MT6_7] = 0xffff;
- m_reg[EREG_MGMT] = 0x3030; m_regmask[EREG_MGMT] = 0x0f0f;
- // TODO: Revision should be set based on chip type
- m_reg[EREG_REVISION] = 0x3345; m_regmask[EREG_REVISION] = 0x0000;
- m_reg[EREG_ERCV] = 0x331f; m_regmask[EREG_ERCV] = 0x009f;
+ m_tx_active = 0;
+ m_rx_active = 0;
+ m_tx_retry_count = 0;
+
+ m_reg[B0_TCR] = 0x0000; m_regmask[B0_TCR] = 0x3d87;
+ m_reg[B0_EPH_STATUS] = 0x0000; m_regmask[B0_EPH_STATUS] = 0x0000;
+ m_reg[B0_RCR] = 0x0000; m_regmask[B0_RCR] = 0xc307;
+ m_reg[B0_COUNTER] = 0x0000; m_regmask[B0_COUNTER] = 0x0000;
+ m_reg[B0_MIR] = 0x1212; m_regmask[B0_MIR] = 0x0000;
+ m_reg[B0_MCR] = 0x3300; m_regmask[B0_MCR] = 0x00ff;
+ m_reg[B0_BANK] = 0x3300; m_regmask[B0_BANK] = 0x0007;
+
+ m_reg[B1_GENERAL_PURP] = 0x0000; m_regmask[B1_GENERAL_PURP] = 0xffff;
+ m_reg[B1_CONTROL] = 0x0100; m_regmask[B1_CONTROL] = 0x68e7;
+
+ m_reg[B2_MMU_COMMAND] = 0x0000; m_regmask[B2_MMU_COMMAND] = 0x00e7;
+ m_reg[B2_PNR_ARR] = 0x8000; m_regmask[B2_PNR_ARR] = 0x00ff;
+ m_reg[B2_FIFO_PORTS] = 0x8080; m_regmask[B2_FIFO_PORTS] = 0x0000;
+ m_reg[B2_POINTER] = 0x0000; m_regmask[B2_POINTER] = 0xf7ff;
+ m_reg[B2_DATA_0] = 0x0000; m_regmask[B2_DATA_0] = 0xffff;
+ m_reg[B2_DATA_1] = 0x0000; m_regmask[B2_DATA_1] = 0xffff;
+ m_reg[B2_INTERRUPT] = 0x0004; m_regmask[B2_INTERRUPT] = 0x7f00;
+
+ m_reg[B3_MT0_1] = 0x0000; m_regmask[B3_MT0_1] = 0xffff;
+ m_reg[B3_MT2_3] = 0x0000; m_regmask[B3_MT2_3] = 0xffff;
+ m_reg[B3_MT4_5] = 0x0000; m_regmask[B3_MT4_5] = 0xffff;
+ m_reg[B3_MT6_7] = 0x0000; m_regmask[B3_MT6_7] = 0xffff;
+ m_reg[B3_MGMT] = 0x3030; m_regmask[B3_MGMT] = 0x0f0f;
+
+ m_reg[B3_ERCV] = 0x331f; m_regmask[B3_ERCV] = 0x009f;
update_ethernet_irq();
- m_tx_timer->reset();
-
- // Setup real network if enabled
- m_network_available = false;
- if (netdev_count()) {
- m_network_available = true;
- osd_list_network_adapters();
- unsigned char const *const mac = (const unsigned char *)get_mac();
- if (VERBOSE & LOG_GENERAL)
- {
- logerror("MAC : ");
- for (int i = 0; i < ETHERNET_ADDR_SIZE; i++)
- logerror("%.2X", mac[i]);
-
- logerror("\n");
- }
-
- set_promisc(true);
- // Interface MAC
- m_reg[EREG_IA0_1] = mac[0] | (mac[1] << 8);
- m_reg[EREG_IA2_3] = mac[2] | (mac[3] << 8);
- m_reg[EREG_IA4_5] = mac[4] | (mac[5] << 8);
- }
// Reset MMU
mmu_reset();
@@ -261,39 +186,36 @@ void smc91c9x_device::mmu_reset()
m_alloc_rx = 0;
m_alloc_tx = 0;
- // Flush fifos.
- clear_tx_fifo();
- clear_rx_fifo();
+ // Reset fifos.
+ reset_tx_fifos();
+ reset_completed_rx();
update_ethernet_irq();
}
-DEFINE_DEVICE_TYPE(SMC91C94, smc91c94_device, "smc91c94", "SMC91C94 Ethernet Controller")
-
-smc91c94_device::smc91c94_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
- : smc91c9x_device(mconfig, SMC91C94, tag, owner, clock)
-{
-}
-
-DEFINE_DEVICE_TYPE(SMC91C96, smc91c96_device, "smc91c96", "SMC91C96 Ethernet Controller")
-
-smc91c96_device::smc91c96_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
- : smc91c9x_device(mconfig, SMC91C96, tag, owner, clock)
+void smc91c9x_device::reset_tx_fifos()
{
+ // Disable transmit timer
+ m_tx_poll->enable(false);
+ // Reset transmit queue
+ reset_queued_tx();
+ // Reset completion FIFOs
+ reset_completed_tx();
}
bool smc91c9x_device::alloc_req(const int tx, int &packet_num)
{
u32 curr_alloc = m_alloc_rx | m_alloc_tx;
- for (int index = 0; index < ETHER_BUFFERS; index++) {
- if (!(curr_alloc & (1 << index))) {
+ for (int index = 0; index < m_num_ebuf; index++)
+ {
+ if (!(curr_alloc & (1 << index)))
+ {
packet_num = index;
- if (tx) {
+ if (tx)
m_alloc_tx |= 1 << index;
- } else {
+ else
m_alloc_rx |= 1 << index;
- }
return true;
}
}
@@ -304,7 +226,8 @@ bool smc91c9x_device::alloc_req(const int tx, int &packet_num)
void smc91c9x_device::alloc_release(const int packet_num)
{
int clear_mask = ~(1 << packet_num);
- if (!((m_alloc_tx | m_alloc_rx) & (1 << packet_num))) {
+ if (!((m_alloc_tx | m_alloc_rx) & (1 << packet_num)))
+ {
logerror("alloc_release: Trying to release a non-allocated packet. packet_num: %02x alloc_tx: %04x alloc_rx: %04x\n",
packet_num, m_alloc_tx, m_alloc_rx);
}
@@ -312,338 +235,448 @@ void smc91c9x_device::alloc_release(const int packet_num)
m_alloc_rx &= clear_mask;
}
-void smc91c9x_device::clear_tx_fifo()
-{
- // Clear transmit timer
- m_tx_timer->reset();
- // Reset transmit queue
- m_trans_tx.clear();
- // Reset completion FIFOs
- m_comp_tx.clear();
-}
+/***************************************************************************
+ INTERNAL HELPERS
+***************************************************************************/
-void smc91c9x_device::clear_rx_fifo()
-{
- // Clear recieve FIFO
- m_comp_rx.clear();
-}
+/*-------------------------------------------------
+ update_ethernet_irq - update the IRQ state
+-------------------------------------------------*/
-int smc91c9x_device::is_broadcast(const uint8_t *mac_address)
+void smc91c9x_device::update_ethernet_irq()
{
- int i;
+ // Check tx completion fifo empty
+ if (empty_completed_tx())
+ m_reg[B2_INTERRUPT] &= ~EINT_TX;
+ else
+ m_reg[B2_INTERRUPT] |= EINT_TX;
+
+ // Check rx completion fifo empty
+ if (empty_completed_rx())
+ m_reg[B2_INTERRUPT] &= ~EINT_RCV;
+ else
+ m_reg[B2_INTERRUPT] |= EINT_RCV;
+
+ uint8_t const mask = m_reg[B2_INTERRUPT] >> 8;
+ uint8_t const state = m_reg[B2_INTERRUPT] & 0xff;
- i = 0;
- while(mac_address[i] == 0xFF)
+ /* update the IRQ state */
+ uint8_t new_state = mask & state;
+ if (m_irq_state ^ new_state)
{
- i++;
+ LOG("update_ethernet_irq: old: %02x new: %02x\n", m_irq_state, new_state);
+ m_irq_state = new_state;
+ m_irq_handler(m_irq_state ? ASSERT_LINE : CLEAR_LINE);
}
+}
- if ( i == 6 )
- return 1;
- return 0;
+/*-------------------------------------------------
+ update_stats - draw statistics
+-------------------------------------------------*/
+
+void smc91c9x_device::update_stats()
+{
+ if ( DISPLAY_STATS )
+ popmessage("Sent:%d Rec'd:%d", m_sent, m_recd);
}
+/*-------------------------------------------------
+dump_bytes - Print packet bytes
+-------------------------------------------------*/
-int smc91c9x_device::ethernet_packet_is_for_me(const uint8_t *mac_address)
+void smc91c9x_device::dump_bytes(u8 *buf, int length)
{
- // tcpdump -i eth0 -q ether host 08:00:1e:01:ae:a5 or ether broadcast or ether dst 09:00:1e:00:00:00 or ether dst 09:00:1e:00:00:01
- // wireshark filter: eth.addr eq 08:00:1e:01:ae:a5 or eth.dst eq ff:ff:ff:ff:ff:ff or eth.dst eq 09:00:1e:00:00:00 or eth.dst eq 09:00:1e:00:00:01
-
- int i;
+ if (VERBOSE & LOG_PACKETS)
+ {
+ std::stringstream ss_bytes;
+ ss_bytes << std::hex << std::setfill('0');
+ for (int i = 0; i < length; i++)
+ {
+ ss_bytes << std::setw(2) << (int) buf[i];
+ // Send newline every 16 bytes and at the end
+ if ((i & 0xf) == 0xf || i == length - 1)
+ {
+ LOGMASKED(LOG_PACKETS, "%s\n", ss_bytes.str());
+ ss_bytes.str("");
+ }
+ else
+ ss_bytes << " ";
+ }
+ }
+}
- LOG("\n");
+/*-------------------------------------------------
+address_filter - Filter the received packet
+-------------------------------------------------*/
- if (VERBOSE & LOG_GENERAL)
+int smc91c9x_device::address_filter(u8 *buf)
+{
+ if (m_reg[B0_RCR] & PRMS)
+ {
+ // TODO: 91C94 doesn't receive it's own transmisson when not in full duplex
+ LOGMASKED(LOG_FILTER, "address_filter accepted (promiscuous mode)\n");
+ return ADDR_UNICAST;
+ }
+ else if (buf[0] & 1)
{
- for ( i = 0 ; i < ETHERNET_ADDR_SIZE ; i++ )
+ // broadcast
+ if (!memcmp(ETH_BROADCAST, buf, 6))
{
- logerror("%.2X", ((u8 *)&m_reg[EREG_IA0_1])[i]);
+ LOGMASKED(LOG_FILTER, "address_filter accepted (broadcast) %02x-%02x-%02x-%02x-%02x-%02x\n",
+ buf[0], buf[1], buf[2], buf[3], buf[4], buf[5]);
+
+ return ADDR_BROADCAST;
}
- logerror("=");
- for ( i = 0 ; i < ETHERNET_ADDR_SIZE ; i++ )
+
+ // multicast
+ /*
+ * Multicast address matching is performed by computing the fcs crc of
+ * the destination address, and then using the upper 6 bits as an index
+ * into the 64-bit logical address filter.
+ */
+ // Check for all multicast bit
+ if (m_reg[B0_RCR] & ALMUL)
+ return ADDR_MULTICAST;
+
+ u32 const crc = util::crc32_creator::simple(buf, 6);
+ // The hash is based on the top 6 MSBs of the CRC
+ // The CRC needs to be inverted and reflected
+ m_rx_hash = 0x0;
+ for (int i = 0; i < 6; i++)
+ m_rx_hash |= (((~crc) >> i) & 1) << (5 - i);
+ u64 multicast_addr = *(u64*)&m_reg[B3_MT0_1];
+ if (BIT(multicast_addr, m_rx_hash))
{
- logerror("%.2X",mac_address[i]);
+ LOGMASKED(LOG_FILTER, "address_filter accepted (multicast address match) %02x-%02x-%02x-%02x-%02x-%02x\n",
+ buf[0], buf[1], buf[2], buf[3], buf[4], buf[5]);
+
+ return ADDR_MULTICAST;
}
- logerror("?");
+ LOGMASKED(LOG_FILTER, "address_filter rejected multicast %02x-%02x-%02x-%02x-%02x-%02x crc: %08x hash: %02x multi: %16ullx\n",
+ buf[0], buf[1], buf[2], buf[3], buf[4], buf[5], crc, m_rx_hash, *(u64*)&m_reg[B3_MT0_1]);
}
-
- // skip Ethernet broadcast packets if RECV_BROAD is not set
- if (is_broadcast(mac_address))
+ else
{
- LOG(" -- Broadcast rx\n");
- return 2;
- }
+ // unicast
+ if (!memcmp(&m_reg[B1_IA0_1], buf, 6))
+ {
+ LOGMASKED(LOG_FILTER, "address_filter accepted (physical address match)\n");
- if (memcmp(mac_address, &m_reg[EREG_IA0_1], ETHERNET_ADDR_SIZE) == 0)
- {
- LOG(" -- Address Match\n");
- return 1;
+ return ADDR_UNICAST;
+ }
}
-
- LOG(" -- Not Matching\n");
-
- return 0;
+ return ADDR_NOMATCH;
}
-/***************************************************************************
- recv_cb - receive callback - receive and process an ethernet packet
- ***************************************************************************/
+/*-------------------------------------------------
+recv_start_cb - Start receiving packet
+ A return value of 0 will stop rx processing in dinetwork device
+ Any other value will be sent to the recv_complete_cb
+-------------------------------------------------*/
-void smc91c9x_device::recv_cb(uint8_t *data, int length)
+int smc91c9x_device::recv_start_cb(u8 *buf, int length)
{
- LOG("recv_cb : %d/0x%x\n",length,length);
+ // check internal loopback
+ if (m_reg[B0_TCR] & (EPH_LOOP | LOOP))
+ {
+ LOGMASKED(LOG_RX, "receive internal loopback mode, external packet discarded\n");
- int const isforme = ethernet_packet_is_for_me( data );
+ return 0;
+ }
- if (isforme==1 && (length >= ETHERNET_ADDR_SIZE) && (VERBOSE & LOG_GENERAL))
+ // discard bad length packets
+ if (length < 64 || length > 256*6 - 6)
{
- logerror("RX: ");
- for (int i = 0; i < ETHERNET_ADDR_SIZE; i++)
- logerror("%.2X", data[i]);
+ LOGMASKED(LOG_RX, "received bad length packet length %d discarded\n", length);
- logerror(" ");
+ return 0;
+ }
- for (int i = 0; i < length-ETHERNET_ADDR_SIZE; i++)
- logerror("%.2X", data[ETHERNET_ADDR_SIZE + i]);
+ // discard packets not from WMS
+ if (memcmp(WMS_OUI, &buf[6], 3))
+ {
+ LOGMASKED(LOG_RX, "received non-WMS packet OUI: %02x:%02x:%02x length %d discarded\n", buf[6], buf[7], buf[8], length);
- logerror(" - IsForMe %d - %d/0x%x bytes\n", isforme, length, length);
+ return 0;
}
- if ( (length < ETHERNET_ADDR_SIZE || !isforme) && !(m_reg[EREG_RCR] & 0x0102) )
+ // Check for active transmission
+ if (m_tx_active)
{
- LOG("\n");
+ // TODO: Update collision counters
+ LOGMASKED(LOG_RX, "transmit active COLLISION, rx packet length %d discarded\n", length);
+
+ return 0;
- // skip packet
- return;
}
- /* signal a receive */
+ return receive(buf, length);
+}
+
+/*-------------------------------------------------
+receive - Receive data into buffer
+ Returns the buffer packet number + 1 if successful
+-------------------------------------------------*/
+
+int smc91c9x_device::receive(u8 *buf, int length)
+{
+ // check receiver enabled
+ if (!(m_reg[B0_RCR] & RXEN))
+ {
+ LOGMASKED(LOG_RX, "receive disabled, external packet discarded\n");
+
+ return -1;
+ }
+
+ // address filter
+ int filter = address_filter(buf);
+ if (filter == ADDR_NOMATCH)
+ return -1;
+
+ LOGMASKED(LOG_RX, "receive packet length %d\n", length);
+ dump_bytes(buf, length);
// Try to request a packet number
int packet_num;
- if (!alloc_req(0, packet_num)) {
- logerror("recv_cb: Couldn't allocate a receive packet\n");
- return;
+ if (!alloc_req(0, packet_num))
+ {
+ logerror("recv_cb: Couldn't allocate memory for receive packet\n");
+ return -2;
}
- /* compute the packet length */
+ m_rx_active = 1;
- if ( ( length < ( ETHER_BUFFER_SIZE - ( 2+2+2 ) ) ) )
- {
- uint8_t *const packet = &m_buffer[ packet_num * ETHER_BUFFER_SIZE];
+ // build up the packet
+ uint8_t *const packet = &m_buffer[packet_num * ETHER_BUFFER_SIZE];
- int dst = 0;
+ // Strip CRC
+ if (m_reg[B0_RCR] & STRIP_CRC)
+ length -= 4;
- // build up the packet
+ // Copy received payload
+ memcpy(&packet[4], buf, length);
- // Status word
- packet[dst++] = 0x00;
+ // Status word
+ u16 *rx_status = (u16*)&packet[0];
+ *rx_status = 0x0000;
- // set the broadcast flag
- if ( isforme == 2 )
- packet[dst++] |= 0x40;
- else
- packet[dst++] = 0x00;
+ // set the broadcast flag
+ if (filter == ADDR_BROADCAST)
+ *rx_status |= BRODCAST;
- //bytes count
- packet[dst++] = 0x00;
- packet[dst++] = 0x00;
+ // set the multicast flag and hash
+ if (filter == ADDR_MULTICAST)
+ {
+ *rx_status |= (m_rx_hash << 1) | MULTCAST;
+ }
- memcpy(&packet[dst], data, length );
- dst += length;
+ // Calculate buffer length and set control byte
+ u16 buf_length;
- if ( dst & 1 )
- {
- // ODD Frame
- packet[dst++] = 0x40 | 0x20; // Control
- }
- else
- {
- packet[dst++] = 0x00; // Pad
- packet[dst++] = 0x40 | 0x00; // Control
- }
+ if (length & 1)
+ {
+ // ODD Frame
+ *rx_status |= ODDFRM;
+ packet[length + 4] = EBUF_RX_ALWAYS | EBUF_ODD; // Control
+ buf_length = length + 5;
+ }
+ else
+ {
+ packet[length + 4] = 0x00; // Pad
+ packet[length + 5] = EBUF_RX_ALWAYS; // Control
+ buf_length = length + 6;
+ }
- //dst += 2;
+ // Set buffer length word
+ *(u16*)&packet[2] = buf_length;
- dst &= 0x7FF;
+ return packet_num + 1;
+}
- packet[2] = (dst&0xFF);
- packet[3] = (dst) >> 8;
+/*-------------------------------------------------
+recv_complete_cb - End of receive
+-------------------------------------------------*/
+void smc91c9x_device::recv_complete_cb(int result)
+{
+ if (result > 0)
+ {
// Push packet number to rx completion fifo
- m_comp_rx.push_back(packet_num);
+ push_completed_rx(result - 1);
}
- else
+ // Couldn't allocate memory
+ else if (result == -2)
{
- LOG("Rejected ! Fifo Full ?");
+ m_reg[B2_INTERRUPT] |= EINT_ALLOC;
}
update_ethernet_irq();
- LOG("\n");
+ m_rx_active = 0;
}
-/***************************************************************************
- INTERNAL HELPERS
-***************************************************************************/
-
/*-------------------------------------------------
- update_ethernet_irq - update the IRQ state
+ tx_poll - Starts transmit
-------------------------------------------------*/
-void smc91c9x_device::update_ethernet_irq()
+TIMER_CALLBACK_MEMBER(smc91c9x_device::tx_poll)
{
- // Check tx completion fifo empty
- if (m_comp_tx.empty())
- m_reg[EREG_INTERRUPT] &= ~EINT_TX;
- else
- m_reg[EREG_INTERRUPT] |= EINT_TX;
-
- // Check rx completion fifo empty
- if (m_comp_rx.empty())
- m_reg[EREG_INTERRUPT] &= ~EINT_RCV;
- else
- m_reg[EREG_INTERRUPT] |= EINT_RCV;
+ // Check for active RX and delay if necessary
+ if (m_rx_active)
+ {
+ // TODO: Implement correct CSMA/CD algorithm
+ m_tx_poll->adjust(attotime::from_usec(40));
+ m_tx_retry_count++;
+ LOGMASKED(LOG_TX, "tx_poll: Delaying TX due to active RX retry_count = %d\n", m_tx_retry_count);
+ }
+ // Check if TX is enabled and packet is queued
+ else if ((m_reg[B0_TCR] & TXENA) && !empty_queued_tx())
+ {
+ // Reset retry count
+ m_tx_retry_count = 0;
- uint8_t const mask = m_reg[EREG_INTERRUPT] >> 8;
- uint8_t const state = m_reg[EREG_INTERRUPT] & 0xff;
+ // Get the packet number from the transmit fifo
+ const int packet_num = curr_queued_tx();
+ uint8_t *const tx_buffer = &m_buffer[packet_num * ETHER_BUFFER_SIZE];
+ // Get the length and control fields from buffer
+ u16 length = (*(u16*)&tx_buffer[2]) & 0x7ff;
+ const u8 control = tx_buffer[length - 1];
- /* update the IRQ state */
- uint8_t new_state = mask & state;
- if (m_irq_state ^ new_state)
- {
- LOG("update_ethernet_irq: old: %02x new: %02x\n", m_irq_state, new_state);
- m_irq_state = new_state;
- m_irq_handler(m_irq_state ? ASSERT_LINE : CLEAR_LINE);
- }
-}
+ // Remove [pad], control
+ if (control & EBUF_ODD)
+ length -= 1;
+ else
+ length -= 2;
+ // Add padding up to CRC area
+ // take into account status & length removal (-4) and crc addtion (+4)
+ while (length < 64 + 4 - 4 && (m_reg[B0_TCR] & PAD_EN))
+ tx_buffer[length++] = 0x00;
-/*-------------------------------------------------
- update_stats - draw statistics
--------------------------------------------------*/
+ // Add CRC
+ // TODO: Calculate CRC
+ if (1 && ((control & EBUF_CRC) || !(m_reg[B0_TCR] & NOCRC)))
+ {
+ tx_buffer[length++] = 0x11;
+ tx_buffer[length++] = 0x22;
+ tx_buffer[length++] = 0x33;
+ tx_buffer[length++] = 0x44;
+ }
-void smc91c9x_device::update_stats()
-{
- if ( DISPLAY_STATS )
- popmessage("Sent:%d Rec'd:%d", m_sent, m_recd);
-}
+ // Remove status, length
+ length -= 4;
+ // Reset the EPH register */
+ m_reg[B0_EPH_STATUS] &= LINK_OK;
-/*-------------------------------------------------
- send_frame - push a frame to the interface
--------------------------------------------------*/
+ // Send the frame
+ m_tx_active = 1;
+ m_tx_poll->enable(false);
-TIMER_CALLBACK_MEMBER(smc91c9x_device::send_frame)
-{
- // Get the packet number from the transmit fifo
- const int packet_num = m_trans_tx.front();
- uint8_t *const tx_buffer = &m_buffer[packet_num * ETHER_BUFFER_SIZE];
+ LOGMASKED(LOG_TX, "Start sending packet %d length = %d time: %s\n", packet_num, length, machine().scheduler().time().as_string());
+ dump_bytes(&tx_buffer[4], length);
- // Pop the transmit fifo
- m_trans_tx.erase(m_trans_tx.begin());
+ // Write loopback data and save result
+ if (m_reg[B0_TCR] & (EPH_LOOP | LOOP | FDUPLX))
+ m_loopback_result = receive(&tx_buffer[4], length);
+ else
+ m_loopback_result = 0;
- /* update the EPH register */
- m_reg[EREG_EPH_STATUS] = 0x0001;
+ // Local loopback isn't sent to cable
+ //if ((m_reg[B0_TCR] & (EPH_LOOP | LOOP) || (get_interface() < 0 && (m_reg[B0_TCR] & FDUPLX))))
+ if (m_reg[B0_TCR] & (EPH_LOOP | LOOP))
+ send_complete_cb(length);
+ else
+ send(&tx_buffer[4], length);
- if (is_broadcast(&tx_buffer[4]))
- m_reg[EREG_EPH_STATUS] |= 0x0040;
+ }
+}
- // Check tx completion fifo empty
- if (m_trans_tx.empty())
- m_reg[EREG_INTERRUPT] |= EINT_TX_EMPTY;
+/*-------------------------------------------------
+send_complete_cb - Called after transmit complete
+-------------------------------------------------*/
+void smc91c9x_device::send_complete_cb(int result)
+{
m_sent++;
-
update_stats();
- int buffer_len = ((tx_buffer[3] << 8) | tx_buffer[2]) & 0x7ff;
- // Remove status, length, [pad], control
- if (tx_buffer[buffer_len - 1] & 0x20)
- buffer_len -= 5;
- else
- buffer_len -= 6;
- // Add padding
- if (buffer_len < 64 && (m_reg[EREG_TCR] & 0x0080)) {
- while (buffer_len < 64)
- tx_buffer[4 + buffer_len++] = 0x00;
- }
- if (VERBOSE & LOG_GENERAL)
- {
- logerror("TX: ");
- for (int i = 0; i < ETHERNET_ADDR_SIZE; i++)
- logerror("%.2X", tx_buffer[4 + i]);
+ // Pop the packet number from the transmit fifo
+ const int packet_num = pop_queued_tx();
+ uint8_t *const tx_buffer = &m_buffer[packet_num * ETHER_BUFFER_SIZE];
- logerror(" ");
+ LOGMASKED(LOG_TX, "End sending packet %d result = %d time: %s\n", packet_num, result, machine().scheduler().time().as_string());
- for (int i = ETHERNET_ADDR_SIZE; i < buffer_len; i++)
- logerror("%.2X", tx_buffer[4 + i]);
+ /* update the EPH register */
+ m_reg[B0_EPH_STATUS] |= TX_SUC;
- logerror("--- %d/0x%x bytes\n", buffer_len, buffer_len);
+ // Set LINK_OK in status
+ if (0 && !(m_reg[B0_EPH_STATUS] & LINK_OK))
+ {
+ m_reg[B0_EPH_STATUS] |= LINK_OK;
+ // Set a ethernet phy status interrupt
+ m_reg[B2_INTERRUPT] |= EINT_EPH;
}
- if (buffer_len > 4)
- {
- if (m_link_unconnected)
- {
- // Set lost carrier
- if (m_reg[EREG_TCR] & 0x0400)
- {
- m_reg[EREG_EPH_STATUS] |= 0x400;
- // Clear Tx Enable on error
- m_reg[EREG_TCR] &= ~0x1;
- }
+ // Set Tx broadcast flag
+ if (!memcmp(ETH_BROADCAST, &tx_buffer[4], 6))
+ m_reg[B0_EPH_STATUS] |= LTX_BRD;
- // Set signal quality error
- if (m_reg[EREG_TCR] & 0x1000)
- {
- m_reg[EREG_EPH_STATUS] |= 0x20;
- // Clear Tx Enable on error
- m_reg[EREG_TCR] &= ~0x1;
- }
+ // Check tx queued fifo empty
+ if (empty_queued_tx())
+ m_reg[B2_INTERRUPT] |= EINT_TX_EMPTY;
- // Set a ethernet phy status interrupt
- m_reg[EREG_INTERRUPT] |= EINT_EPH;
+ // Set no-transmission flags
+ if (m_link_unconnected)
+ {
+ //m_reg[B0_EPH_STATUS] &= ~LINK_OK;
+ //m_reg[B0_EPH_STATUS] &= ~TX_SUC;
- // TODO: Is it necessary to clear FIFOs on error?
- // Flush fifos.
- //clear_tx_fifo();
- //clear_rx_fifo();
- }
- else
+ // Set lost carrier
+ if (m_reg[B0_TCR] & MON_CSN)
{
- // Send the frame
- if (!send(&tx_buffer[4], buffer_len))
- {
- // FIXME: failed to send the Ethernet packet
- //logerror("failed to send Ethernet packet\n");
- //LOG(this,("read_command_port(): !!! failed to send Ethernet packet"));
- }
+ m_reg[B0_EPH_STATUS] |= LOST_CARR;
+ // Clear Tx Enable on error
+ m_reg[B0_TCR] &= ~TXENA;
+ }
- // Loopback if loopback is set or fduplx is set
- // TODO: Figure out correct size
- // TODO: Check for addtional filter options for FDUPLX mode
- if ((m_reg[EREG_TCR] & 0x2002) || (m_network_available && (m_reg[EREG_TCR] & 0x0800)))
- recv_cb(&tx_buffer[4], buffer_len);
+ // Set signal quality error
+ if (m_reg[B0_TCR] & STP_SQET)
+ {
+ m_reg[B0_EPH_STATUS] |= SQET;
+ // Clear Tx Enable on error
+ m_reg[B0_TCR] &= ~TXENA;
}
+
+ // Set a ethernet phy status interrupt
+ m_reg[B2_INTERRUPT] |= EINT_EPH;
}
+
// Update status in the transmit word
- tx_buffer[0] = m_reg[EREG_EPH_STATUS];
- tx_buffer[1] = m_reg[EREG_EPH_STATUS] >> 8;
+ *(u16*)&tx_buffer[0] = m_reg[B0_EPH_STATUS];
// Push the packet number onto the tx completion fifo
- m_comp_tx.push_back(packet_num);
+ push_completed_tx(packet_num);
update_ethernet_irq();
- // If there is more packets to transmit then set the tx timer
- if ((m_reg[EREG_TCR] & 0x1) && !m_trans_tx.empty()) {
- // Shortest packet (64 bytes @ 10Mbps = 50us)
- m_tx_timer->adjust(attotime::from_usec(50));
+ // Loopback if loopback is set or fduplx is set
+ if (m_loopback_result)
+ {
+ //int rx_result = receive(&tx_buffer[4], result);
+ recv_complete_cb(m_loopback_result);
}
+
+ // If there is more packets to transmit then start the tx polling
+ if ((m_reg[B0_TCR] & TXENA) && !empty_queued_tx())
+ {
+ m_tx_poll->adjust(attotime::from_usec(10));
+ }
+
+ m_tx_active = 0;
}
/*-------------------------------------------------
@@ -662,53 +695,48 @@ void smc91c9x_device::process_command(uint16_t data)
LOG(" ALLOCATE MEMORY FOR TX (%d)", (data & 7));
{
int packet_num;
- if (alloc_req(1, packet_num)) {
+ if (alloc_req(1, packet_num))
+ {
LOG(" packet_num = %02x\n", (packet_num));
// Set ARR register
- m_reg[EREG_PNR_ARR] &= ~0xff00;
- m_reg[EREG_PNR_ARR] |= packet_num << 8;
- m_reg[EREG_INTERRUPT] |= EINT_ALLOC;
+ m_reg[B2_PNR_ARR] &= ~0xff00;
+ m_reg[B2_PNR_ARR] |= packet_num << 8;
+ m_reg[B2_INTERRUPT] |= EINT_ALLOC;
update_ethernet_irq();
}
- else {
+ else
+ {
logerror("ECMD_ALLOCATE: Couldn't allocate TX memory\n");
}
}
break;
case ECMD_RESET_MMU:
- /*
- 0100
- - RESET MMU TO INITIAL STATE -
- Frees all memory allocations, clears relevant
- interrupts, resets packet FIFO pointers.
- */
-
LOG(" RESET MMU\n");
mmu_reset();
break;
case ECMD_REMOVE_TOPFRAME_TX:
LOG(" REMOVE FRAME FROM TX FIFO\n");
- if (m_comp_tx.empty())
+ if (empty_completed_tx())
logerror("process_command: Trying to remove entry from empty tx completion fifo\n");
else
- m_comp_tx.erase(m_comp_tx.begin());
+ pop_completed_tx();
break;
case ECMD_REMOVE_RELEASE_TOPFRAME_RX:
- LOG(" REMOVE AND RELEASE FRAME FROM RX FIFO (PACK_NUM=%d)\n", m_comp_rx.front());
+ LOG(" REMOVE AND RELEASE FRAME FROM RX FIFO (PACK_NUM=%d)\n", curr_completed_rx());
// Release memory allocation
- alloc_release(m_comp_rx.front());
+ alloc_release(curr_completed_rx());
// Fall through
case ECMD_REMOVE_TOPFRAME_RX:
LOG(" REMOVE FRAME FROM RX FIFO\n");
// remove entry from rx completion queue
- if (m_comp_rx.empty())
+ if (empty_completed_rx())
logerror("process_command: Trying to remove entry from empty rx completion fifo\n");
else
- m_comp_rx.erase(m_comp_rx.begin());
+ pop_completed_rx();
update_ethernet_irq();
m_recd++;
@@ -717,7 +745,7 @@ void smc91c9x_device::process_command(uint16_t data)
case ECMD_RELEASE_PACKET:
{
- const int packet_number = m_reg[EREG_PNR_ARR] & 0xff;
+ const int packet_number = m_reg[B2_PNR_ARR] & 0xff;
alloc_release(packet_number);
LOG(" RELEASE SPECIFIC PACKET %d\n", packet_number);
}
@@ -726,33 +754,31 @@ void smc91c9x_device::process_command(uint16_t data)
case ECMD_ENQUEUE_PACKET:
LOG(" ENQUEUE TX PACKET ");
- if (m_reg[EREG_TCR] & 0x0001) // TX EN ?
+ if (m_reg[B0_TCR] & TXENA)
{
- const int packet_number = m_reg[EREG_PNR_ARR] & 0xff;
+ const int packet_number = m_reg[B2_PNR_ARR] & 0xff;
LOG("(PACKET_NUM=%d)\n", packet_number);
// Push packet number to tx transmit fifo
- m_trans_tx.push_back(packet_number);
- // Calculate transmit time
- //uint8_t *const tx_buffer = &m_buffer[packet_number * ETHER_BUFFER_SIZE];
- //int buffer_len = ((tx_buffer[3] << 8) | tx_buffer[2]) & 0x7ff;
- //buffer_len -= 6;
- //int usec = ((buffer_len * 8) / 10) + 1;
- // Shortest packet (64 bytes @ 10Mbps = 50us)
- m_tx_timer->adjust(attotime::from_usec(50));
+ push_queued_tx(packet_number);
+ // Start timer to send frame if not already transmitting
+ if (!m_tx_active && !m_tx_poll->enabled())
+ {
+ m_tx_poll->adjust(attotime::from_usec(10));
+ LOG("Start polling time: %s\n", machine().scheduler().time().as_string());
+ }
}
break;
case ECMD_RESET_FIFOS:
LOG(" RESET TX FIFOS\n");
// Flush fifos.
- clear_tx_fifo();
+ reset_tx_fifos();
break;
}
// Set Busy (clear on next read)
- m_reg[EREG_MMU_COMMAND] |= 0x0001;
- //LOG("process_command: TxQ: %d TxComp: %d RxComp: %d TxAlloc: %04x RxAlloc: %04x\n",
- // m_trans_tx.size(), m_comp_tx.size(), m_comp_rx.size(), m_alloc_tx, m_alloc_rx);
+ m_reg[B2_MMU_COMMAND] |= 0x0001;
+
}
@@ -771,60 +797,60 @@ READ16_MEMBER( smc91c9x_device::read )
/* determine the effective register */
offset %= 8;
- if ( offset != EREG_BANK )
- offset += 8 * (m_reg[EREG_BANK] & 7);
+ if ( offset != B0_BANK )
+ offset += 8 * (m_reg[B0_BANK] & 7);
result = m_reg[offset];
switch (offset)
{
- case EREG_MMU_COMMAND:
+ case B2_MMU_COMMAND:
// Clear busy
- m_reg[EREG_MMU_COMMAND] &= ~0x0001;
+ m_reg[B2_MMU_COMMAND] &= ~0x0001;
break;
- case EREG_PNR_ARR:
+ case B2_PNR_ARR:
if ( ACCESSING_BITS_8_15 )
{
- m_reg[EREG_INTERRUPT] &= ~EINT_ALLOC;
+ m_reg[B2_INTERRUPT] &= ~EINT_ALLOC;
update_ethernet_irq();
}
break;
- case EREG_FIFO_PORTS:
+ case B2_FIFO_PORTS:
result = 0;
- if (!m_comp_tx.empty())
- result |= m_comp_tx.front();
+ if (!empty_completed_tx())
+ result |= curr_completed_tx();
else
result |= 0x80;
- if (!m_comp_rx.empty())
- result |= m_comp_rx.front() << 8;
+ if (!empty_completed_rx())
+ result |= curr_completed_rx() << 8;
else
result |= 0x80 << 8;
break;
- case EREG_DATA_0: /* data register */
- case EREG_DATA_1: /* data register */
+ case B2_DATA_0: /* data register */
+ case B2_DATA_1: /* data register */
{
uint8_t *buffer;
- int addr = m_reg[EREG_POINTER] & 0x7ff;
+ int addr = m_reg[B2_POINTER] & 0x7ff;
- if ( m_reg[EREG_POINTER] & 0x8000 )
- buffer = &m_buffer[m_comp_rx.front() * ETHER_BUFFER_SIZE];
+ if ( m_reg[B2_POINTER] & 0x8000 )
+ buffer = &m_buffer[curr_completed_rx() * ETHER_BUFFER_SIZE];
else
- buffer = &m_buffer[(m_reg[EREG_PNR_ARR] & 0x1f) * ETHER_BUFFER_SIZE];;
+ buffer = &m_buffer[(m_reg[B2_PNR_ARR] & 0x1f) * ETHER_BUFFER_SIZE];;
result = buffer[addr++];
if ( ACCESSING_BITS_8_15 )
result |= buffer[addr++] << 8;
- if ( m_reg[EREG_POINTER] & 0x4000 )
- m_reg[EREG_POINTER] = (m_reg[EREG_POINTER] & ~0x7ff) | (addr & 0x7ff);
+ if ( m_reg[B2_POINTER] & 0x4000 )
+ m_reg[B2_POINTER] = (m_reg[B2_POINTER] & ~0x7ff) | (addr & 0x7ff);
break;
}
}
- if (offset != EREG_BANK)
+ if (offset != B0_BANK)
LOG("%s:smc91c9x_r(%s) = %04X & %04X\n", machine().describe_context(), ethernet_regname[offset], result, mem_mask);
return result;
}
@@ -838,12 +864,12 @@ WRITE16_MEMBER( smc91c9x_device::write )
{
/* determine the effective register */
offset %= 8;
- if (offset != EREG_BANK)
- offset += 8 * (m_reg[EREG_BANK] & 7);
+ if (offset != B0_BANK)
+ offset += 8 * (m_reg[B0_BANK] & 7);
/* update the data generically */
- if (offset != EREG_BANK && offset < sizeof(m_reg))
+ if (offset != B0_BANK && offset < sizeof(m_reg))
LOG("%s:smc91c9x_w(%s) = [%04X]<-%04X & (%04X & %04X)\n", machine().describe_context(), ethernet_regname[offset], offset, data, mem_mask , m_regmask[offset]);
mem_mask &= m_regmask[offset];
@@ -852,49 +878,62 @@ WRITE16_MEMBER( smc91c9x_device::write )
/* handle it */
switch (offset)
{
- case EREG_TCR: /* transmit control register */
+ case B0_TCR: /* transmit control register */
// Setting Tx Enable clears some status and interrupts
- if ( data & 0x1 ) {
- m_reg[EREG_EPH_STATUS] &= ~0x420;
- m_reg[EREG_INTERRUPT] &= ~EINT_EPH;
- update_ethernet_irq();
+ if ( data & TXENA )
+ {
+ if (m_reg[B0_EPH_STATUS] & (LOST_CARR | SQET | LATCOL | E16COL))
+ {
+ m_reg[B0_EPH_STATUS] &= ~(LOST_CARR | SQET | LATCOL | E16COL);
+ m_reg[B2_INTERRUPT] &= ~EINT_EPH;
+ update_ethernet_irq();
+ }
+ }
+ if (VERBOSE & LOG_GENERAL)
+ {
+ if (data & FDSE) LOG(" FDSE\n");
+ if (data & EPH_LOOP) LOG(" EPH LOOP\n");
+ if (data & STP_SQET) LOG(" STP SQET\n");
+ if (data & FDUPLX) LOG(" FDUPLX\n");
+ if (data & MON_CSN) LOG(" MON_CSN\n");
+ if (data & NOCRC) LOG(" NOCRC\n");
+ if (data & PAD_EN) LOG(" PAD_EN\n");
+ if (data & FORCOL) LOG(" FORCOL\n");
+ if (data & LOOP) LOG(" LOOP\n");
+ if (data & TXENA) LOG(" TXENA\n");
}
-
- if (data & 0x2000) LOG(" EPH LOOP\n");
- if (data & 0x1000) LOG(" STP SQET\n");
- if (data & 0x0800) LOG(" FDUPLX\n");
- if (data & 0x0400) LOG(" MON_CSN\n");
- if (data & 0x0100) LOG(" NOCRC\n");
- if (data & 0x0080) LOG(" PAD_EN\n");
- if (data & 0x0004) LOG(" FORCOL\n");
- if (data & 0x0002) LOG(" LOOP\n");
- if (data & 0x0001) LOG(" TXENA\n");
break;
- case EREG_RCR: /* receive control register */
+ case B0_RCR: /* receive control register */
- if ( data & 0x8000 )
+ if ( data & SOFT_RST)
{
- clear_rx_fifo();
- clear_tx_fifo();
+ reset();
}
- if ( !(data & 0x0100) )
+ if ( !(data & RXEN) )
+ {
+ reset_completed_rx();
+ }
+ if (data & RXEN)
{
- clear_rx_fifo();
+ // Set LINK_OK in status
+ m_reg[B0_EPH_STATUS] |= LINK_OK;
}
- if (data & 0x8000) reset();
- if (data & 0x8000) LOG(" SOFT RST\n");
- if (data & 0x4000) LOG(" FILT_CAR\n");
- if (data & 0x0200) LOG(" STRIP CRC\n");
- if (data & 0x0100) LOG(" RXEN\n");
- if (data & 0x0004) LOG(" ALMUL\n");
- if (data & 0x0002) LOG(" PRMS\n");
- if (data & 0x0001) LOG(" RX_ABORT\n");
+ if (VERBOSE & LOG_GENERAL)
+ {
+ if (data & SOFT_RST) LOG(" SOFT RST\n");
+ if (data & FILT_CAR) LOG(" FILT_CAR\n");
+ if (data & STRIP_CRC) LOG(" STRIP CRC\n");
+ if (data & RXEN) LOG(" RXEN\n");
+ if (data & ALMUL) LOG(" ALMUL\n");
+ if (data & PRMS) LOG(" PRMS\n");
+ if (data & RX_ABORT) LOG(" RX_ABORT\n");
+ }
break;
- case EREG_CONFIG: /* configuration register */
+ case B1_CONFIG: /* configuration register */
if (data & 0x1000) LOG(" NO WAIT\n");
if (data & 0x0400) LOG(" FULL STEP\n");
if (data & 0x0200) LOG(" SET SQLCH\n");
@@ -905,64 +944,86 @@ WRITE16_MEMBER( smc91c9x_device::write )
if (data & 0x0002) LOG(" INT SEL0\n");
break;
- case EREG_BASE: /* base address register */
+ case B1_BASE: /* base address register */
LOG(" base = $%04X\n", (data & 0xe000) | ((data & 0x1f00) >> 3));
LOG(" romsize = %d\n", ((data & 0xc0) >> 6));
LOG(" romaddr = $%05X\n", ((data & 0x3e) << 13));
break;
- case EREG_CONTROL: /* control register */
- if (data & 0x4000) LOG(" RCV_BAD\n");
- if (data & 0x2000) LOG(" PWRDN\n");
- if (data & 0x0800) LOG(" AUTO RELEASE\n");
- if (data & 0x0080) LOG(" LE ENABLE\n");
- if (data & 0x0040) LOG(" CR ENABLE\n");
- if (data & 0x0020) LOG(" TE ENABLE\n");
- if (data & 0x0004) LOG(" EEPROM SELECT\n");
- if (data & 0x0002) LOG(" RELOAD\n");
- if (data & 0x0001) LOG(" STORE\n");
+ case B1_IA4_5:
+ set_promisc(m_reg[B0_RCR] & PRMS);
+ set_mac((char *)&m_reg[B1_IA0_1]);
+
+ break;
+
+ case B1_CONTROL: /* control register */
+ // Clearing LE_EN clears interrupt from LINK_OK status change
+ if (!(data & LE_ENABLE))
+ {
+ m_reg[B2_INTERRUPT] &= ~EINT_EPH;
+ update_ethernet_irq();
+ }
+ if (0 && (data & LE_ENABLE))
+ {
+ if (m_reg[B0_EPH_STATUS] & LINK_OK)
+ {
+ m_reg[B0_EPH_STATUS] &= ~(LINK_OK);
+ m_reg[B2_INTERRUPT] &= ~EINT_EPH;
+ update_ethernet_irq();
+ }
+ }
+ if (VERBOSE & LOG_GENERAL)
+ {
+ if (data & RCV_BAD) LOG(" RCV_BAD\n");
+ if (data & PWRDN) LOG(" PWRDN\n");
+ if (data & WAKEUP_EN) LOG(" WAKEUP ENABLE\n");
+ if (data & AUTO_RELEASE) LOG(" AUTO RELEASE\n");
+ if (data & LE_ENABLE) LOG(" LE ENABLE\n");
+ if (data & CR_ENABLE) LOG(" CR ENABLE\n");
+ if (data & TE_ENABLE) LOG(" TE ENABLE\n");
+ if (data & EEPROM_SEL) LOG(" EEPROM SELECT\n");
+ if (data & RELOAD) LOG(" RELOAD\n");
+ if (data & STORE) LOG(" STORE\n");
+ }
break;
- case EREG_MMU_COMMAND: /* command register */
+ case B2_MMU_COMMAND: /* command register */
process_command(data);
break;
- case EREG_DATA_0: /* data register */
- case EREG_DATA_1: /* data register */
+ case B2_DATA_0: /* data register */
+ case B2_DATA_1: /* data register */
{
uint8_t *buffer;
- int addr = m_reg[EREG_POINTER] & 0x7ff;
+ int addr = m_reg[B2_POINTER] & PTR;
- if (m_reg[EREG_POINTER] & 0x8000)
- buffer = &m_buffer[m_comp_rx.front() * ETHER_BUFFER_SIZE];
+ if (m_reg[B2_POINTER] & RCV)
+ buffer = &m_buffer[curr_completed_rx() * ETHER_BUFFER_SIZE];
else
- buffer = &m_buffer[(m_reg[EREG_PNR_ARR] & 0x1f) * ETHER_BUFFER_SIZE];;
+ buffer = &m_buffer[(m_reg[B2_PNR_ARR] & 0x1f) * ETHER_BUFFER_SIZE];;
- // TODO: Should be checking if incr is set
buffer[addr++] = data;
if ( ACCESSING_BITS_8_15 )
buffer[addr++] = data >> 8;
- if ( m_reg[EREG_POINTER] & 0x4000 )
- m_reg[EREG_POINTER] = (m_reg[EREG_POINTER] & ~0x7ff) | (addr & 0x7ff);
+ if ( m_reg[B2_POINTER] & AUTO_INCR)
+ m_reg[B2_POINTER] = (m_reg[B2_POINTER] & ~PTR) | (addr & PTR);
break;
}
- case EREG_INTERRUPT:
+ case B2_INTERRUPT:
// Pop tx fifo packet from completion fifo if clear tx int is set
- if (m_reg[EREG_INTERRUPT] & data & EINT_TX) {
- if (m_comp_tx.empty()) {
+ if (m_reg[B2_INTERRUPT] & data & EINT_TX)
+ {
+ if (empty_completed_tx())
logerror("write: Trying to remove an entry from empty tx completion fifo\n");
+ else
+ {
+ LOG("Removing tx completion packet_num = %d\n", curr_completed_tx());
+ pop_completed_tx();
}
- else {
- LOG("Removing tx completion packet_num = %d\n", m_comp_tx.front());
- m_comp_tx.erase(m_comp_tx.begin());
- }
- }
- // Clear TX_EMPTY interrupt if clear tx empty bit is set
- if (m_reg[EREG_INTERRUPT] & data & EINT_TX_EMPTY) {
- m_reg[EREG_INTERRUPT] &= ~EINT_TX_EMPTY;
}
- m_reg[EREG_INTERRUPT] &= ~(data & 0x56);
+ // Clear interrupts
+ m_reg[B2_INTERRUPT] &= ~(data & (EINT_ERCV | EINT_RX_OVRN | EINT_TX_EMPTY | EINT_TX));
update_ethernet_irq();
break;
}
diff --git a/src/devices/machine/smc91c9x.h b/src/devices/machine/smc91c9x.h
index 79fb52fcd0d..b84f6070ef7 100644
--- a/src/devices/machine/smc91c9x.h
+++ b/src/devices/machine/smc91c9x.h
@@ -4,13 +4,15 @@
SMC91C9X ethernet controller implementation
- by Aaron Giles, Jean-François DEL NERO
+ by Aaron Giles, Ted Green
**************************************************************************/
#ifndef MAME_MACHINE_SMC91C9X_H
#define MAME_MACHINE_SMC91C9X_H
+#pragma once
+
/***************************************************************************
TYPE DEFINITIONS
***************************************************************************/
@@ -22,39 +24,206 @@ public:
DECLARE_READ16_MEMBER( read );
DECLARE_WRITE16_MEMBER( write );
- TIMER_CALLBACK_MEMBER(send_frame);
- virtual void recv_cb(uint8_t *data, int length) override;
void set_link_connected(bool connected) { m_link_unconnected = !connected; };
protected:
- smc91c9x_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
+ enum class dev_type {
+ SMC91C94,
+ SMC91C96
+ };
+
+ smc91c9x_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, dev_type device_type);
// device-level overrides
virtual void device_start() override;
virtual void device_reset() override;
- virtual void device_pre_save(void) override;
- virtual void device_post_load(void) override;
+ // device_network_interface overrides
+ virtual void send_complete_cb(int result) override;
+ virtual int recv_start_cb(u8 *buf, int length) override;
+ virtual void recv_complete_cb(int result) override;
-private:
- static constexpr unsigned ETHER_BUFFER_SIZE = 2048;
- // TODO: 96 device is larger
- static constexpr unsigned ETHER_BUFFERS = 16;
- static constexpr unsigned ETHERNET_ADDR_SIZE = 6;
+ void dump_bytes(u8 *buf, int length);
+ int address_filter(u8 *buf);
+ int receive(u8 *buf, int length);
+
+ TIMER_CALLBACK_MEMBER(tx_poll);
- // external network is present
- bool m_network_available;
+ const dev_type m_device_type;
+ unsigned m_num_ebuf;
+
+private:
+ // Ethernet registers - bank 0
+ enum bank0_addr : u8 {
+ B0_TCR = (0 * 8 + 0),
+ B0_EPH_STATUS = (0 * 8 + 1),
+ B0_RCR = (0 * 8 + 2),
+ B0_COUNTER = (0 * 8 + 3),
+ B0_MIR = (0 * 8 + 4),
+ B0_MCR = (0 * 8 + 5),
+ B0_BANK = (0 * 8 + 7)
+ };
+
+ // Ethernet registers - bank 1
+ enum bank1_addr : u8 {
+ B1_CONFIG = (1 * 8 + 0),
+ B1_BASE = (1 * 8 + 1),
+ B1_IA0_1 = (1 * 8 + 2),
+ B1_IA2_3 = (1 * 8 + 3),
+ B1_IA4_5 = (1 * 8 + 4),
+ B1_GENERAL_PURP = (1 * 8 + 5),
+ B1_CONTROL = (1 * 8 + 6)
+ };
+
+ // Ethernet registers - bank 2
+ enum bank2_addr : u8 {
+ B2_MMU_COMMAND = (2 * 8 + 0),
+ B2_PNR_ARR = (2 * 8 + 1),
+ B2_FIFO_PORTS = (2 * 8 + 2),
+ B2_POINTER = (2 * 8 + 3),
+ B2_DATA_0 = (2 * 8 + 4),
+ B2_DATA_1 = (2 * 8 + 5),
+ B2_INTERRUPT = (2 * 8 + 6)
+ };
+
+ // Ethernet registers - bank 3
+ enum bank3_addr : u8 {
+ B3_MT0_1 = (3 * 8 + 0),
+ B3_MT2_3 = (3 * 8 + 1),
+ B3_MT4_5 = (3 * 8 + 2),
+ B3_MT6_7 = (3 * 8 + 3),
+ B3_MGMT = (3 * 8 + 4),
+ B3_REVISION = (3 * 8 + 5),
+ B3_ERCV = (3 * 8 + 6)
+ };
+
+ // Ethernet MMU commands
+ enum mmu_cmd : u8 {
+ ECMD_NOP = 0,
+ ECMD_ALLOCATE = 2,
+ ECMD_RESET_MMU = 4,
+ ECMD_REMOVE_TOPFRAME_RX = 6,
+ ECMD_REMOVE_TOPFRAME_TX = 7,
+ ECMD_REMOVE_RELEASE_TOPFRAME_RX = 8,
+ ECMD_RELEASE_PACKET = 10,
+ ECMD_ENQUEUE_PACKET = 12,
+ ECMD_RESET_FIFOS = 14
+ };
+
+ // Ethernet interrupt bits
+ enum eint_def : u8 {
+ EINT_RCV = 0x01,
+ EINT_TX = 0x02,
+ EINT_TX_EMPTY = 0x04,
+ EINT_ALLOC = 0x08,
+ EINT_RX_OVRN = 0x10,
+ EINT_EPH = 0x20,
+ EINT_ERCV = 0x40, // 91c92 only
+ EINT_TX_IDLE = 0x80 // 91c94 only
+ };
+
+ // Address filter return codes
+ enum addr_filter_def : int {
+ ADDR_NOMATCH = 0,
+ ADDR_UNICAST = 1,
+ ADDR_BROADCAST = 2,
+ ADDR_MULTICAST = 3
+ };
+
+ // Rx/Tx control bits
+ enum control_mask : u8 {
+ EBUF_RX_ALWAYS = 0x40, // Always set on receive buffer control byte
+ EBUF_ODD = 0x20, // Odd number of data payload bytes
+ EBUF_CRC = 0x10 // Tx add CRC
+ };
+
+ // Receive buffer status
+ enum rx_status_mask : u16 {
+ ALGNERR = 0x8000,
+ BRODCAST = 0x4000,
+ BADCRC = 0x2000,
+ ODDFRM = 0x1000,
+ TOOLNG = 0x0800, // Received fram is longer than 1518 bytes on cable
+ TOOSHORT = 0x0400, // Received fram is shorter than 64 bytes on cable
+ HASHVALUE = 0x007e,
+ MULTCAST = 0x0001
+ };
+
+ // EPH Status bits
+ enum eph_mask : u16 {
+ LINK_OK = 0x4000, // State of link integrity test
+ CTR_ROL = 0x1000, // Counter roll Over
+ EXC_DEF = 0x0800, // Excessive deferral
+ LOST_CARR = 0x0400, // Lost carrier sense
+ LATCOL = 0x0200, // Late collisions detected
+ WAKEUP = 0x0100, // Magic packet received
+ TX_DEFER = 0x0080, // Transmit deferred
+ LTX_BRD = 0x0040, // Last transmit frame was a broadcast
+ SQET = 0x0020, // Signal Quality Error Test
+ E16COL = 0x0010, // 16 collisions reached
+ LTX_MULT = 0x0008, // Last transmit frame was a multicast
+ MULCOL = 0x0004, // Multiple collisions detected
+ SNGLCOL = 0x0002, // Single collision detected
+ TX_SUC = 0x0001 // Last transmit frame was successful
+ };
+
+ // CTR register bits
+ enum ctr_mask : u16 {
+ RCV_BAD = 0x4000, // Receive bad CRC packets
+ PWRDN = 0x2000, // Power down ethernet
+ WAKEUP_EN = 0x1000, // Enable magic packet wakeup
+ AUTO_RELEASE = 0x0800, // Release transmit packets on good transmission
+ LE_ENABLE = 0x0080, // Link Error enable
+ CR_ENABLE = 0x0040, // Counter Roll over enable
+ TE_ENABLE = 0x0020, // Transmit Error enable
+ EEPROM_SEL = 0x0004, // EEPROM address
+ RELOAD = 0x0002, // Reload config from EEPROM
+ STORE = 0x0001 // Store config to EEPROM
+ };
+
+ // Transmit Control Register bits
+ enum tcr_mask : u16 {
+ FDSE = 0x8000,
+ EPH_LOOP = 0x2000,
+ STP_SQET = 0x1000,
+ FDUPLX = 0x0800,
+ MON_CSN = 0x0400,
+ NOCRC = 0x0100,
+ PAD_EN = 0x0080,
+ FORCOL = 0x0004,
+ LOOP = 0x0002,
+ TXENA = 0x0001
+ };
+
+ // Receive Control Register bits
+ enum rcr_mask : u16 {
+ SOFT_RST = 0x8000,
+ FILT_CAR = 0x4000,
+ STRIP_CRC = 0x0200,
+ RXEN = 0x0100,
+ ALMUL = 0x0004,
+ PRMS = 0x0002,
+ RX_ABORT = 0x0001
+ };
+
+ // Pointer Register bits
+ enum pointer_mask : u16 {
+ RCV = 0x8000,
+ AUTO_INCR = 0x4000,
+ READ = 0x2000,
+ PTR = 0x07ff
+ };
+
+ static constexpr unsigned ETHER_BUFFER_SIZE = 256 * 6;
+ static const u8 ETH_BROADCAST[];
+ static const u8 WMS_OUI[];
// mmu
+
// The bits in these vectors indicate a packet has been allocated
u32 m_alloc_rx, m_alloc_tx;
- std::vector<u32> m_comp_tx, m_comp_rx;
- // Fifo for allocated (queued) transmit packets
- std::vector<u32> m_trans_tx;
- // Save vector data and sizes for proper save state restoration
- u32 m_comp_tx_data[ETHER_BUFFERS], m_comp_rx_data[ETHER_BUFFERS], m_trans_tx_data[ETHER_BUFFERS];
- u32 m_comp_tx_size, m_comp_rx_size, m_trans_tx_size;
+
// Requests a packet allocation and returns true
// and sets the packet number if successful
bool alloc_req(const int tx, int &packet_num);
@@ -77,23 +246,56 @@ private:
uint8_t m_irq_state;
// Main memory
- uint8_t m_buffer[ETHER_BUFFER_SIZE * ETHER_BUFFERS];
+ std::unique_ptr<u8[]> m_buffer;
/* counters */
uint32_t m_sent;
uint32_t m_recd;
- emu_timer* m_tx_timer;
+ emu_timer* m_tx_poll;
- int ethernet_packet_is_for_me(const uint8_t *mac_address);
- int is_broadcast(const uint8_t *mac_address);
+ int m_tx_active;
+ int m_rx_active;
+ int m_tx_retry_count;
+ u8 m_rx_hash;
+ u8 m_loopback_result;
void update_ethernet_irq();
void update_stats();
void process_command(uint16_t data);
- void clear_tx_fifo();
- void clear_rx_fifo();
+ void reset_tx_fifos();
+
+ // TODO: Make circular fifo a separate device
+ // Simple circular FIFO, power of 2 size, no over/under run checking
+ static constexpr unsigned FIFO_SIZE = 1 << 5;
+
+ // FIFO for allocated (queued) transmit packets
+ u8 m_queued_tx[FIFO_SIZE];
+ int m_queued_tx_h, m_queued_tx_t;
+ void reset_queued_tx() { m_queued_tx_t = m_queued_tx_h = 0; };
+ void push_queued_tx(const u8 &data) { m_queued_tx[m_queued_tx_h++] = data; m_queued_tx_h &= FIFO_SIZE - 1; };
+ u8 pop_queued_tx() { u8 val = m_queued_tx[m_queued_tx_t++]; m_queued_tx_t &= FIFO_SIZE - 1; return val; };
+ bool empty_queued_tx() const { return m_queued_tx_h == m_queued_tx_t; };
+ u8 curr_queued_tx() const { return m_queued_tx[m_queued_tx_t]; };
+
+ // FIFO for completed transmit packets
+ u8 m_completed_tx[FIFO_SIZE];
+ int m_completed_tx_h, m_completed_tx_t;
+ void reset_completed_tx() { m_completed_tx_t = m_completed_tx_h = 0; };
+ void push_completed_tx(const u8 &data) { m_completed_tx[m_completed_tx_h++] = data; m_completed_tx_h &= FIFO_SIZE - 1; };
+ u8 pop_completed_tx() { u8 val = m_completed_tx[m_completed_tx_t++]; m_completed_tx_t &= FIFO_SIZE - 1; return val; };
+ bool empty_completed_tx() const { return m_completed_tx_h == m_completed_tx_t; };
+ u8 curr_completed_tx() const { return m_completed_tx[m_completed_tx_t]; };
+
+ // FIFO for completed receive packets
+ u8 m_completed_rx[FIFO_SIZE];
+ int m_completed_rx_h, m_completed_rx_t;
+ void reset_completed_rx() { m_completed_rx_t = m_completed_rx_h = 0; };
+ void push_completed_rx(const u8 &data) { m_completed_rx[m_completed_rx_h++] = data; m_completed_rx_h &= FIFO_SIZE - 1; };
+ u8 pop_completed_rx() { u8 val = m_completed_rx[m_completed_rx_t++]; m_completed_rx_t &= FIFO_SIZE - 1; return val; };
+ bool empty_completed_rx() const { return m_completed_rx_h == m_completed_rx_t; };
+ u8 curr_completed_rx() const { return m_completed_rx[m_completed_rx_t]; };
};
diff --git a/src/devices/machine/smpc.cpp b/src/devices/machine/smpc.cpp
index 042fc06d590..c62e65e1703 100644
--- a/src/devices/machine/smpc.cpp
+++ b/src/devices/machine/smpc.cpp
@@ -205,7 +205,7 @@ void smpc_hle_device::smpc_regs(address_map &map)
smpc_hle_device::smpc_hle_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: device_t(mconfig, SMPC_HLE, tag, owner, clock),
device_memory_interface(mconfig, *this),
- m_space_config("regs", ENDIANNESS_LITTLE, 8, 7, 0, address_map_constructor(), address_map_constructor(FUNC(smpc_hle_device::smpc_regs), this)),
+ m_space_config("regs", ENDIANNESS_LITTLE, 8, 7, 0, address_map_constructor(FUNC(smpc_hle_device::smpc_regs), this)),
m_mini_nvram(*this, "smem"),
m_mshres(*this),
m_mshnmi(*this),
diff --git a/src/devices/machine/sonydriv.h b/src/devices/machine/sonydriv.h
index b6e4358eadb..322db3f3342 100644
--- a/src/devices/machine/sonydriv.h
+++ b/src/devices/machine/sonydriv.h
@@ -58,22 +58,4 @@ protected:
// device type definition
DECLARE_DEVICE_TYPE(FLOPPY_SONY, sonydriv_floppy_image_device)
-#define MCFG_LEGACY_FLOPPY_SONY_2_DRIVES_ADD(_config) \
- MCFG_DEVICE_ADD(FLOPPY_0, FLOPPY_SONY, 0) \
- MCFG_LEGACY_FLOPPY_CONFIG(_config) \
- MCFG_DEVICE_ADD(FLOPPY_1, FLOPPY_SONY, 0) \
- MCFG_LEGACY_FLOPPY_CONFIG(_config)
-
-#define MCFG_LEGACY_FLOPPY_SONY_2_DRIVES_ADDITIONAL_ADD(_config) \
- MCFG_DEVICE_ADD(FLOPPY_2, FLOPPY_SONY, 0) \
- MCFG_LEGACY_FLOPPY_CONFIG(_config) \
- MCFG_DEVICE_ADD(FLOPPY_3, FLOPPY_SONY, 0) \
- MCFG_LEGACY_FLOPPY_CONFIG(_config)
-
-#define MCFG_LEGACY_FLOPPY_SONY_2_DRIVES_MODIFY(_config) \
- MCFG_DEVICE_MODIFY(FLOPPY_0) \
- MCFG_LEGACY_FLOPPY_CONFIG(_config) \
- MCFG_DEVICE_MODIFY(FLOPPY_1) \
- MCFG_LEGACY_FLOPPY_CONFIG(_config)
-
#endif // MAME_MACHINE_SONYDRIV_H
diff --git a/src/devices/machine/spg110.cpp b/src/devices/machine/spg110.cpp
new file mode 100644
index 00000000000..9f9256f4b27
--- /dev/null
+++ b/src/devices/machine/spg110.cpp
@@ -0,0 +1,669 @@
+// license:BSD-3-Clause
+// copyright-holders:David Haywood
+/*****************************************************************************
+
+ SunPlus SPG110-series SoC peripheral emulation
+
+ 0032xx looks like it could be the same as 003dxx on spg2xx
+ but the video seems to have differences, and data
+ is fetched from private buffers filled by DMA instead of
+ main space? tile attributes different? palette format different
+
+**********************************************************************/
+
+#include "emu.h"
+#include "spg110.h"
+
+DEFINE_DEVICE_TYPE(SPG110, spg110_device, "spg110", "SPG110 System-on-a-Chip")
+
+spg110_device::spg110_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock)
+ : device_t(mconfig, type, tag, owner, clock)
+ , device_memory_interface(mconfig, *this)
+ , m_space_config("spg110", ENDIANNESS_BIG, 16, 32, 0, address_map_constructor(FUNC(spg110_device::map_video), this))
+ , m_cpu(*this, finder_base::DUMMY_TAG)
+ , m_screen(*this, finder_base::DUMMY_TAG)
+ , m_palette(*this, "palette")
+ , m_gfxdecode(*this, "gfxdecode")
+ , m_palram(*this, "palram")
+ , m_spg_io(*this, "spg_io")
+ , m_porta_out(*this)
+ , m_portb_out(*this)
+ , m_portc_out(*this)
+ , m_porta_in(*this)
+ , m_portb_in(*this)
+ , m_portc_in(*this)
+ , m_adc_in{{*this}, {*this}}
+ , m_chip_sel(*this)
+{
+}
+
+template<spg110_device::flipx_t FlipX>
+void spg110_device::blit(const rectangle &cliprect, uint32_t line, uint32_t xoff, uint32_t yoff, uint32_t attr, uint32_t ctrl, uint32_t bitmap_addr, uint16_t tile)
+{
+ address_space &space = m_cpu->space(AS_PROGRAM);
+
+ int32_t h = 8 << ((attr & PAGE_TILE_HEIGHT_MASK) >> PAGE_TILE_HEIGHT_SHIFT);
+ int32_t w = 8 << ((attr & PAGE_TILE_WIDTH_MASK) >> PAGE_TILE_WIDTH_SHIFT);
+
+ uint32_t yflipmask = attr & TILE_Y_FLIP ? h - 1 : 0;
+
+ uint32_t nc = ((attr & 0x0003) + 1) << 1;
+
+ uint32_t palette_offset = (attr & 0x0f00) >> 4;
+
+ palette_offset >>= nc;
+ palette_offset <<= nc;
+
+ uint32_t bits_per_row = nc * w / 16;
+ uint32_t words_per_tile = bits_per_row * h;
+ uint32_t m = bitmap_addr + words_per_tile * tile + bits_per_row * (line ^ yflipmask);
+ uint32_t bits = 0;
+ uint32_t nbits = 0;
+ uint32_t y = line;
+
+ int yy = (yoff + y) & 0x1ff;
+ if (yy >= 0x01c0)
+ yy -= 0x0200;
+
+ if (yy > 240 || yy < 0)
+ return;
+
+ int y_index = yy * 320;
+
+ for (int32_t x = FlipX ? (w - 1) : 0; FlipX ? x >= 0 : x < w; FlipX ? x-- : x++)
+ {
+ int xx = xoff + x;
+
+ bits <<= nc;
+
+ if (nbits < nc)
+ {
+ uint16_t b = space.read_word(m++ & 0x3fffff);
+ //b = (b << 8) | (b >> 8);
+ bits |= b << (nc - nbits);
+ nbits += 16;
+ }
+ nbits -= nc;
+
+ uint32_t pal = palette_offset + (bits >> 16);
+ bits &= 0xffff;
+
+ xx &= 0x01ff;
+ if (xx >= 0x01c0)
+ xx -= 0x0200;
+
+ if (xx >= 0 && xx < 320)
+ {
+ // TODO, this is completely wrong for this palette system
+ int pix_index = xx + y_index;
+ uint16_t rawpal = m_palram[pal];
+ const pen_t *pens = m_palette->pens();
+ uint32_t paldata = pens[pal];
+
+ if (!(rawpal & 0x8000))
+ {
+ m_screenbuf[pix_index] = paldata;
+ }
+ }
+ }
+}
+
+void spg110_device::blit_page(const rectangle &cliprect, uint32_t scanline, int depth, uint32_t bitmap_addr, uint16_t *regs)
+{
+ uint32_t xscroll = regs[0];
+ uint32_t yscroll = regs[1];
+ uint32_t attr = regs[2];
+ uint32_t ctrl = regs[3];
+ uint32_t tilemap = regs[4];
+ uint32_t palette_map = regs[5];
+ address_space &space2 = this->space(0);
+
+ if (!(ctrl & PAGE_ENABLE_MASK))
+ {
+ return;
+ }
+
+ if (((attr & PAGE_DEPTH_FLAG_MASK) >> PAGE_DEPTH_FLAG_SHIFT) != depth)
+ {
+ return;
+ }
+
+ uint32_t tile_h = 8 << ((attr & PAGE_TILE_HEIGHT_MASK) >> PAGE_TILE_HEIGHT_SHIFT);
+ uint32_t tile_w = 8 << ((attr & PAGE_TILE_WIDTH_MASK) >> PAGE_TILE_WIDTH_SHIFT);
+
+ uint32_t tile_count_x = 512 / tile_w;
+
+ uint32_t bitmap_y = (scanline + yscroll) & 0xff;
+ uint32_t y0 = bitmap_y / tile_h;
+ uint32_t tile_scanline = bitmap_y % tile_h;
+ uint32_t tile_address = tile_count_x * y0;
+
+ for (uint32_t x0 = 0; x0 < tile_count_x; x0++, tile_address++)
+ {
+ uint32_t yy = ((tile_h * y0 - yscroll + 0x10) & 0xff) - 0x10;
+ uint32_t xx = (tile_w * x0 - xscroll) & 0x1ff;
+ uint16_t tile = (ctrl & PAGE_WALLPAPER_MASK) ? space2.read_word(tilemap*2) : space2.read_word((tilemap + tile_address)*2);
+ uint16_t palette = 0;
+
+ if (!tile)
+ continue;
+
+ palette = space2.read_word(palette_map + tile_address / 2);
+ if (x0 & 1)
+ palette = (palette & 0xff00) >> 8;
+ else
+ palette = (palette & 0x00ff);
+
+
+ bool flip_x = 0;//(tileattr & TILE_X_FLIP);
+
+ if (flip_x)
+ blit<FlipXOn>(cliprect, tile_scanline, xx, yy, attr, ctrl, bitmap_addr, tile);
+ else
+ blit<FlipXOff>(cliprect, tile_scanline, xx, yy, attr, ctrl, bitmap_addr, tile);
+
+ }
+}
+
+
+/* correct, 4bpp gfxs */
+static const gfx_layout charlayout =
+{
+ 8,8,
+ RGN_FRAC(1,1),
+ 4,
+ { STEP4(0,1) },
+ { 0*4,1*4,2*4,3*4,4*4,5*4,6*4,7*4 },
+ { STEP8(0,4*8) },
+ 8*8*4
+};
+
+static const gfx_layout charlayout6 =
+{
+ 8,8,
+ RGN_FRAC(1,1),
+ 6,
+ { 0,1,2,3,4,5 },
+ { STEP8(0,6) },
+ { STEP8(0,6*8) },
+ 8*8*6
+};
+
+static const gfx_layout char16layout =
+{
+ 16,16,
+ RGN_FRAC(1,1),
+ 4,
+ { STEP4(0,1) },
+ { 0*4,1*4,2*4,3*4,4*4,5*4,6*4,7*4, 8*4,9*4,10*4,11*4,12*4,13*4,14*4,15*4 },
+ { STEP16(0,4*16) },
+ 16*16*4
+};
+
+static const gfx_layout char32layout =
+{
+ 32,32,
+ RGN_FRAC(1,1),
+ 4,
+ { STEP4(0,1) },
+ { STEP32(0,4) },
+ { STEP32(0,4*32) },
+ 32*32*4
+};
+
+
+
+static GFXDECODE_START( gfx )
+ GFXDECODE_ENTRY( ":maincpu", 0, charlayout, 0, 16 )
+ GFXDECODE_ENTRY( ":maincpu", 0, char16layout, 0, 16 )
+ GFXDECODE_ENTRY( ":maincpu", 0, char32layout, 0, 16 )
+ GFXDECODE_ENTRY( ":maincpu", 0, charlayout6, 0, 16 ) // correct for lots of the tiles inc. startup text
+GFXDECODE_END
+
+void spg110_device::configure_spg_io(spg2xx_io_device* io)
+{
+ io->porta_in().set(FUNC(spg110_device::porta_r));
+ io->portb_in().set(FUNC(spg110_device::portb_r));
+ io->portc_in().set(FUNC(spg110_device::portc_r));
+ io->porta_out().set(FUNC(spg110_device::porta_w));
+ io->portb_out().set(FUNC(spg110_device::portb_w));
+ io->portc_out().set(FUNC(spg110_device::portc_w));
+ io->adc_in<0>().set(FUNC(spg110_device::adc_r<0>));
+ io->adc_in<1>().set(FUNC(spg110_device::adc_r<1>));
+ io->chip_select().set(FUNC(spg110_device::cs_w));
+// io->pal_read_callback().set(FUNC(spg110_device::get_pal_r));
+// io->write_timer_irq_callback().set(FUNC(spg110_device::timerirq_w));
+// io->write_uart_adc_irq_callback().set(FUNC(spg110_device::uartirq_w));
+// io->write_external_irq_callback().set(FUNC(spg110_device::extirq_w));
+// io->write_ffrq_tmr1_irq_callback().set(FUNC(spg110_device::ffreq1_w));
+// io->write_ffrq_tmr2_irq_callback().set(FUNC(spg110_device::ffreq2_w));
+}
+
+void spg110_device::device_add_mconfig(machine_config &config)
+{
+// PALETTE(config, m_palette).set_format(palette_device::xRGB_555, 0x100);
+// PALETTE(config, m_palette).set_format(palette_device::RGB_565, 0x100);
+// PALETTE(config, m_palette).set_format(palette_device::IRGB_4444, 0x100);
+// PALETTE(config, m_palette).set_format(palette_device::RGBI_4444, 0x100);
+// PALETTE(config, m_palette).set_format(palette_device::xRGB_555, 0x100);
+ PALETTE(config, m_palette, palette_device::BLACK, 256);
+
+ GFXDECODE(config, m_gfxdecode, m_palette, gfx);
+
+ SPG24X_IO(config, m_spg_io, DERIVED_CLOCK(1, 1), m_cpu, m_screen);
+ configure_spg_io(m_spg_io);
+
+}
+
+
+device_memory_interface::space_config_vector spg110_device::memory_space_config() const
+{
+ return space_config_vector {
+ std::make_pair(0, &m_space_config)
+ };
+}
+
+spg110_device::spg110_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+ : spg110_device(mconfig, SPG110, tag, owner, clock)
+{
+}
+
+// irq source or similar?
+READ16_MEMBER(spg110_device::spg110_2063_r)
+{
+ // checks for bits 0x20 and 0x08 in the IRQ function (all IRQs point to the same place)
+ return 0x0008;
+}
+
+WRITE16_MEMBER(spg110_device::spg110_2063_w)
+{
+ // writes 0x28, probably clears the IRQ / IRQ sources? 0x63 is the same offset for this in spg2xx but bits used seem to be different
+ m_cpu->set_state_unsynced(UNSP_IRQ0_LINE, CLEAR_LINE);
+}
+
+
+WRITE16_MEMBER(spg110_device::spg110_201c_w) { }
+WRITE16_MEMBER(spg110_device::spg110_2020_w) { }
+WRITE16_MEMBER(spg110_device::spg110_2042_w) { }
+WRITE16_MEMBER(spg110_device::spg110_2031_w) { }
+WRITE16_MEMBER(spg110_device::spg110_2032_w) { }
+WRITE16_MEMBER(spg110_device::spg110_2033_w) { }
+WRITE16_MEMBER(spg110_device::spg110_2034_w) { }
+WRITE16_MEMBER(spg110_device::spg110_2035_w) { }
+WRITE16_MEMBER(spg110_device::spg110_2036_w) { COMBINE_DATA(&m_2036_scroll); }
+WRITE16_MEMBER(spg110_device::spg110_2039_w) { }
+WRITE16_MEMBER(spg110_device::spg110_2037_w) { }
+WRITE16_MEMBER(spg110_device::spg110_203c_w) { }
+WRITE16_MEMBER(spg110_device::spg110_203d_w) { }
+WRITE16_MEMBER(spg110_device::spg110_2045_w) { }
+
+
+WRITE16_MEMBER(spg110_device::spg110_2028_w) { }
+WRITE16_MEMBER(spg110_device::spg110_2029_w) { }
+
+READ16_MEMBER(spg110_device::spg110_2028_r) { return 0x0000; }
+READ16_MEMBER(spg110_device::spg110_2029_r) { return 0x0000; }
+
+
+WRITE16_MEMBER(spg110_device::spg110_2050_w) { }
+WRITE16_MEMBER(spg110_device::spg110_2051_w) { }
+WRITE16_MEMBER(spg110_device::spg110_2052_w) { }
+WRITE16_MEMBER(spg110_device::spg110_2053_w) { }
+WRITE16_MEMBER(spg110_device::spg110_2054_w) { }
+WRITE16_MEMBER(spg110_device::spg110_2055_w) { }
+WRITE16_MEMBER(spg110_device::spg110_2056_w) { }
+WRITE16_MEMBER(spg110_device::spg110_2057_w) { }
+WRITE16_MEMBER(spg110_device::spg110_2058_w) { }
+WRITE16_MEMBER(spg110_device::spg110_2059_w) { }
+WRITE16_MEMBER(spg110_device::spg110_205a_w) { }
+WRITE16_MEMBER(spg110_device::spg110_205b_w) { }
+WRITE16_MEMBER(spg110_device::spg110_205c_w) { }
+WRITE16_MEMBER(spg110_device::spg110_205d_w) { }
+WRITE16_MEMBER(spg110_device::spg110_205e_w) { }
+WRITE16_MEMBER(spg110_device::spg110_205f_w) { }
+
+WRITE16_MEMBER(spg110_device::dma_unk_2061_w) { COMBINE_DATA(&m_dma_unk_2061); }
+WRITE16_MEMBER(spg110_device::dma_dst_step_w) { COMBINE_DATA(&m_dma_dst_step); }
+WRITE16_MEMBER(spg110_device::dma_unk_2067_w) { COMBINE_DATA(&m_dma_unk_2067); }
+WRITE16_MEMBER(spg110_device::dma_src_step_w) { COMBINE_DATA(&m_dma_src_step); }
+
+WRITE16_MEMBER(spg110_device::dma_dst_w) { COMBINE_DATA(&m_dma_dst); }
+WRITE16_MEMBER(spg110_device::dma_src_w) { COMBINE_DATA(&m_dma_src); }
+
+WRITE16_MEMBER(spg110_device::dma_len_trigger_w)
+{
+ int length = data & 0x1fff;
+
+ // this is presumably a counter that underflows to 0x1fff, because that's what the wait loop waits for?
+ logerror("%s: (trigger len) %04x with values (unk) %04x (dststep) %04x (unk) %04x (src step) %04x | (dst) %04x (src) %04x\n", machine().describe_context(), data, m_dma_unk_2061, m_dma_dst_step, m_dma_unk_2067, m_dma_src_step, m_dma_dst, m_dma_src);
+
+ if ((m_dma_unk_2061!=0x0000) || (m_dma_unk_2067 != 0x0000))
+ fatalerror("unknown DMA params are not zero!\n");
+
+ int source = m_dma_src;
+ int dest = m_dma_dst;
+
+ for (int i = 0; i < length; i++)
+ {
+ address_space &mem = m_cpu->space(AS_PROGRAM);
+ uint16_t val = mem.read_word(source);
+
+ this->space(0).write_word(dest * 2, val, 0xffff);
+
+ source+=m_dma_src_step;
+ dest+=m_dma_dst_step;
+ }
+}
+
+READ16_MEMBER(spg110_device::dma_len_status_r)
+{
+ return 0x1fff; // DMA related?
+}
+
+READ16_MEMBER(spg110_device::spg110_2037_r) { return 0x0000; }
+READ16_MEMBER(spg110_device::spg110_2042_r) { return 0x0000; }
+
+
+WRITE16_MEMBER(spg110_device::spg110_3100_w) { }
+WRITE16_MEMBER(spg110_device::spg110_3101_w) { }
+WRITE16_MEMBER(spg110_device::spg110_3102_w) { }
+WRITE16_MEMBER(spg110_device::spg110_3104_w) { }
+WRITE16_MEMBER(spg110_device::spg110_3105_w) { }
+WRITE16_MEMBER(spg110_device::spg110_3106_w) { }
+WRITE16_MEMBER(spg110_device::spg110_3107_w) { }
+WRITE16_MEMBER(spg110_device::spg110_3108_w) { }
+WRITE16_MEMBER(spg110_device::spg110_3109_w) { }
+WRITE16_MEMBER(spg110_device::spg110_310b_w) { }
+WRITE16_MEMBER(spg110_device::spg110_310c_w) { }
+WRITE16_MEMBER(spg110_device::spg110_310d_w) { }
+
+READ16_MEMBER(spg110_device::spg110_310f_r) { return 0x0000; }
+
+READ16_MEMBER(spg110_device::tmap0_regs_r) { return tmap0_regs[offset]; }
+READ16_MEMBER(spg110_device::tmap1_regs_r) { return tmap1_regs[offset]; }
+
+void spg110_device::tilemap_write_regs(int which, uint16_t* regs, int regno, uint16_t data)
+{
+ switch (regno)
+ {
+ case 0x0: // Page X scroll
+ logerror("video_w: Page %d X Scroll = %04x\n", which, data & 0x01ff);
+ regs[regno] = data & 0x01ff;
+ break;
+
+ case 0x1: // Page Y scroll
+ logerror("video_w: Page %d Y Scroll = %04x\n", which, data & 0x00ff);
+ regs[regno] = data & 0x00ff;
+ break;
+
+ case 0x2: // Page Attributes
+ // 'depth' (aka z value) can't be depth here as it is on spg2xx, or the scores in attract will be behind the table, it really seems to be per attribute bit instead
+
+ logerror("video_w: Page %d Attributes = %04x (Depth:%d, Palette:%d, VSize:%d, HSize:%d, FlipY:%d, FlipX:%d, BPP:%d)\n", which, data
+ , (data >> 12) & 3, (data >> 8) & 15, 8 << ((data >> 6) & 3), 8 << ((data >> 4) & 3), BIT(data, 3), BIT(data, 2), 2 * ((data & 3) + 1));
+ regs[regno] = data;
+ break;
+
+ case 0x3: // Page Control
+ logerror("video_w: Page %d Control = %04x (Blend:%d, HiColor:%d, RowScroll:%d, Enable:%d, Wallpaper:%d, RegSet:%d, Bitmap:%d)\n", which, data
+ , BIT(data, 8), BIT(data, 7), BIT(data, 4), BIT(data, 3), BIT(data, 2), BIT(data, 1), BIT(data, 0));
+ regs[regno] = data;
+ break;
+
+ case 0x4: // Page Tile Address
+ logerror("video_w: Page %d Tile Address = %04x\n", which, data);
+ regs[regno] = data;
+ break;
+
+ case 0x5: // Page Attribute Address
+ logerror("video_w: Page %d Attribute Address = %04x\n", which, data);
+ regs[regno] = data;
+ break;
+ }
+}
+
+
+WRITE16_MEMBER(spg110_device::tmap0_regs_w)
+{
+ tilemap_write_regs(0, tmap0_regs,offset,data);
+}
+
+
+WRITE16_MEMBER(spg110_device::tmap1_regs_w)
+{
+ tilemap_write_regs(1, tmap1_regs,offset,data);
+}
+
+void spg110_device::map(address_map &map)
+{
+ map(0x000000, 0x000fff).ram();
+
+
+ // vregs are at 2000?
+ map(0x002010, 0x002015).rw(FUNC(spg110_device::tmap0_regs_r), FUNC(spg110_device::tmap0_regs_w));
+ map(0x002016, 0x00201b).rw(FUNC(spg110_device::tmap1_regs_r), FUNC(spg110_device::tmap1_regs_w));
+
+ map(0x00201c, 0x00201c).w(FUNC(spg110_device::spg110_201c_w));
+
+ map(0x002020, 0x002020).w(FUNC(spg110_device::spg110_2020_w));
+
+ map(0x002028, 0x002028).rw(FUNC(spg110_device::spg110_2028_r), FUNC(spg110_device::spg110_2028_w));
+ map(0x002029, 0x002029).rw(FUNC(spg110_device::spg110_2029_r), FUNC(spg110_device::spg110_2029_w));
+
+ map(0x002031, 0x002031).w(FUNC(spg110_device::spg110_2031_w)); // sometimes 14a?
+ map(0x002032, 0x002032).w(FUNC(spg110_device::spg110_2032_w)); // always 14a?
+ map(0x002033, 0x002033).w(FUNC(spg110_device::spg110_2033_w));
+ map(0x002034, 0x002034).w(FUNC(spg110_device::spg110_2034_w));
+ map(0x002035, 0x002035).w(FUNC(spg110_device::spg110_2035_w));
+ map(0x002036, 0x002036).w(FUNC(spg110_device::spg110_2036_w)); // possible scroll register?
+ map(0x002037, 0x002037).rw(FUNC(spg110_device::spg110_2037_r), FUNC(spg110_device::spg110_2037_w));
+
+ map(0x002039, 0x002039).w(FUNC(spg110_device::spg110_2039_w));
+
+ map(0x00203c, 0x00203c).w(FUNC(spg110_device::spg110_203c_w));
+
+ map(0x00203d, 0x00203d).w(FUNC(spg110_device::spg110_203d_w)); // possible scroll register?
+
+ map(0x002042, 0x002042).rw(FUNC(spg110_device::spg110_2042_r),FUNC(spg110_device::spg110_2042_w));
+
+ map(0x002045, 0x002045).w(FUNC(spg110_device::spg110_2045_w));
+
+ // seems to be 16 entries for.. something?
+ map(0x002050, 0x002050).w(FUNC(spg110_device::spg110_2050_w));
+ map(0x002051, 0x002051).w(FUNC(spg110_device::spg110_2051_w));
+ map(0x002052, 0x002052).w(FUNC(spg110_device::spg110_2052_w));
+ map(0x002053, 0x002053).w(FUNC(spg110_device::spg110_2053_w));
+ map(0x002054, 0x002054).w(FUNC(spg110_device::spg110_2054_w));
+ map(0x002055, 0x002055).w(FUNC(spg110_device::spg110_2055_w));
+ map(0x002056, 0x002056).w(FUNC(spg110_device::spg110_2056_w));
+ map(0x002057, 0x002057).w(FUNC(spg110_device::spg110_2057_w));
+ map(0x002058, 0x002058).w(FUNC(spg110_device::spg110_2058_w));
+ map(0x002059, 0x002059).w(FUNC(spg110_device::spg110_2059_w));
+ map(0x00205a, 0x00205a).w(FUNC(spg110_device::spg110_205a_w));
+ map(0x00205b, 0x00205b).w(FUNC(spg110_device::spg110_205b_w));
+ map(0x00205c, 0x00205c).w(FUNC(spg110_device::spg110_205c_w));
+ map(0x00205d, 0x00205d).w(FUNC(spg110_device::spg110_205d_w));
+ map(0x00205e, 0x00205e).w(FUNC(spg110_device::spg110_205e_w));
+ map(0x00205f, 0x00205f).w(FUNC(spg110_device::spg110_205f_w));
+
+ //map(0x002010, 0x00205f).ram();
+
+ // everything (dma? and interrupt flag?!)
+ map(0x002060, 0x002060).w(FUNC(spg110_device::dma_dst_w));
+ map(0x002061, 0x002061).w(FUNC(spg110_device::dma_unk_2061_w));
+ map(0x002062, 0x002062).rw(FUNC(spg110_device::dma_len_status_r),FUNC(spg110_device::dma_len_trigger_w));
+ map(0x002063, 0x002063).rw(FUNC(spg110_device::spg110_2063_r),FUNC(spg110_device::spg110_2063_w)); // this looks like interrupt stuff and is checked in the irq like an irq source, but why in the middle of what otherwise look like some kind of DMA?
+ map(0x002064, 0x002064).w(FUNC(spg110_device::dma_dst_step_w));
+ map(0x002066, 0x002066).w(FUNC(spg110_device::dma_src_w));
+ map(0x002067, 0x002067).w(FUNC(spg110_device::dma_unk_2067_w));
+ map(0x002068, 0x002068).w(FUNC(spg110_device::dma_src_step_w));
+
+ map(0x002200, 0x0022ff).ram(); // looks like per-pen brightness or similar? strange because palette isn't memory mapped here
+
+ map(0x003000, 0x00307f).ram(); // sound registers? seems to be 8 long entries, only uses up to 0x7f?
+ map(0x003080, 0x0030ff).ram();
+
+ map(0x003100, 0x003100).w(FUNC(spg110_device::spg110_3100_w));
+ map(0x003101, 0x003101).w(FUNC(spg110_device::spg110_3101_w));
+ map(0x003102, 0x003102).w(FUNC(spg110_device::spg110_3102_w));
+
+ map(0x003104, 0x003104).w(FUNC(spg110_device::spg110_3104_w));
+ map(0x003105, 0x003105).w(FUNC(spg110_device::spg110_3105_w));
+ map(0x003106, 0x003106).w(FUNC(spg110_device::spg110_3106_w));
+ map(0x003107, 0x003107).w(FUNC(spg110_device::spg110_3107_w));
+ map(0x003108, 0x003108).w(FUNC(spg110_device::spg110_3108_w));
+ map(0x003109, 0x003109).w(FUNC(spg110_device::spg110_3109_w));
+
+ map(0x00310b, 0x00310b).w(FUNC(spg110_device::spg110_310b_w));
+ map(0x00310c, 0x00310c).w(FUNC(spg110_device::spg110_310c_w));
+ map(0x00310d, 0x00310d).w(FUNC(spg110_device::spg110_310d_w));
+
+ map(0x00310f, 0x00310f).r(FUNC(spg110_device::spg110_310f_r));
+
+ // 0032xx looks like it could be the same as 003d00 on spg2xx
+ map(0x003200, 0x00322f).rw(m_spg_io, FUNC(spg2xx_io_device::io_r), FUNC(spg2xx_io_device::io_w));
+}
+
+// this seems to be a different, non-cpu mapped space only accessible via the DMA?
+void spg110_device::map_video(address_map &map)
+{
+ // are these addresses hardcoded, or can they move (in which case tilemap system isn't really suitable)
+ map(0x00000, 0x03fff).ram(); // 2fff?
+
+ map(0x04000, 0x04fff).ram(); // seems to be 3 blocks, almost certainly spritelist
+
+// map(0x08000, 0x081ff).ram().w(m_palette, FUNC(palette_device::write16)).share("palette"); // probably? format unknown tho
+ map(0x08000, 0x081ff).ram().share("palram");
+}
+
+
+/*
+TIMER_CALLBACK_MEMBER(spg110_device::test_timer)
+{
+ //
+}
+*/
+
+
+
+void spg110_device::device_start()
+{
+// m_test_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(spg110_device::test_timer), this));
+ save_item(NAME(m_dma_src_step));
+ save_item(NAME(m_dma_dst_step));
+ save_item(NAME(m_dma_unk_2061));
+ save_item(NAME(m_dma_unk_2067));
+ save_item(NAME(m_dma_dst));
+ save_item(NAME(m_dma_src));
+ save_item(NAME(m_bg_scrollx));
+ save_item(NAME(m_bg_scrolly));
+ save_item(NAME(m_2036_scroll));
+
+ m_porta_out.resolve_safe();
+ m_portb_out.resolve_safe();
+ m_portc_out.resolve_safe();
+ m_porta_in.resolve_safe(0);
+ m_portb_in.resolve_safe(0);
+ m_portc_in.resolve_safe(0);
+ m_adc_in[0].resolve_safe(0x0fff);
+ m_adc_in[1].resolve_safe(0x0fff);
+ m_chip_sel.resolve_safe();
+
+}
+
+void spg110_device::device_reset()
+{
+ m_dma_src_step = 0;
+ m_dma_dst_step = 0;
+ m_dma_unk_2061 = 0;
+ m_dma_unk_2067 = 0;
+ m_dma_dst = 0;
+ m_dma_src = 0;
+ m_bg_scrollx = 0;
+ m_bg_scrolly = 0;
+ m_2036_scroll = 0;
+}
+
+double spg110_device::hue2rgb(double p, double q, double t)
+{
+ if (t < 0) t += 1;
+ if (t > 1) t -= 1;
+ if (t < 1 / 6.0f) return p + (q - p) * 6 * t;
+ if (t < 1 / 2.0f) return q;
+ if (t < 2 / 3.0f) return p + (q - p) * (2 / 3.0f - t) * 6;
+ return p;
+}
+
+uint32_t spg110_device::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect)
+{
+ // Palette, this is still wrong!
+ int offs = 0;
+ for (int index = 0;index < 256; index++)
+ {
+ uint16_t dat = m_palram[offs++];
+
+ // llll lsss sshh hhhh
+ int l_raw = (dat & 0xf800) >> 11;
+ int sl_raw = (dat & 0x07c0) >> 6;
+ int h_raw = (dat & 0x003f) >> 0;
+
+ double l = (double)l_raw / 31.0f;
+ double s = (double)sl_raw / 31.0f;
+ double h = (double)h_raw / 47.0f;
+
+ double r, g, b;
+
+ if (s == 0) {
+ r = g = b = l; // greyscale
+ } else {
+ double q = l < 0.5f ? l * (1 + s) : l + s - l * s;
+ double p = 2 * l - q;
+ r = hue2rgb(p, q, h + 1/3.0f);
+ g = hue2rgb(p, q, h);
+ b = hue2rgb(p, q, h - 1/3.0f);
+ }
+
+ int r_real = r * 255.0f;
+ int g_real = g * 255.0f;
+ int b_real = b * 255.0f;
+
+ m_palette->set_pen_color(index, r_real, g_real, b_real);
+ }
+
+ memset(&m_screenbuf[320 * cliprect.min_y], 0, 4 * 320 * ((cliprect.max_y - cliprect.min_y) + 1));
+
+ const uint32_t page1_addr = 0;//0x40 * m_video_regs[0x20];
+ const uint32_t page2_addr = 0;//0x40 * m_video_regs[0x21];
+ uint16_t *page1_regs = tmap0_regs;
+ uint16_t *page2_regs = tmap1_regs;
+
+ for (uint32_t scanline = (uint32_t)cliprect.min_y; scanline <= (uint32_t)cliprect.max_y; scanline++)
+ {
+ for (int i = 0; i < 4; i++)
+ {
+ blit_page(cliprect, scanline, i, page2_addr, page2_regs);
+ blit_page(cliprect, scanline, i, page1_addr, page1_regs);
+ //blit_sprites(cliprect, scanline, i);
+ }
+ }
+
+ for (int y = cliprect.min_y; y <= cliprect.max_y; y++)
+ {
+ uint32_t *dest = &bitmap.pix32(y, cliprect.min_x);
+ uint32_t *src = &m_screenbuf[cliprect.min_x + 320 * y];
+ memcpy(dest, src, sizeof(uint32_t) * ((cliprect.max_x - cliprect.min_x) + 1));
+ }
+
+ return 0;
+}
+
+WRITE_LINE_MEMBER(spg110_device::vblank)
+{
+ if (!state)
+ {
+ m_cpu->set_state_unsynced(UNSP_IRQ0_LINE, ASSERT_LINE);
+ // m_test_timer->adjust(attotime::from_usec(100), 0);
+ }
+
+ return;
+}
diff --git a/src/devices/machine/spg110.h b/src/devices/machine/spg110.h
new file mode 100644
index 00000000000..64464e1ba9d
--- /dev/null
+++ b/src/devices/machine/spg110.h
@@ -0,0 +1,220 @@
+// license:BSD-3-Clause
+// copyright-holders:David Haywood
+
+#ifndef MAME_MACHINE_SPG110_H
+#define MAME_MACHINE_SPG110_H
+
+#pragma once
+
+//#include "spg2xx.h"
+#include "cpu/unsp/unsp.h"
+#include "emupal.h"
+#include "spg2xx_io.h"
+
+
+class spg110_device : public device_t, public device_memory_interface
+
+{
+public:
+ spg110_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
+ spg110_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+
+ template <typename T, typename U>
+ spg110_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, T &&cpu_tag, U &&screen_tag)
+ : spg110_device(mconfig, tag, owner, clock)
+ {
+ m_cpu.set_tag(std::forward<T>(cpu_tag));
+ m_screen.set_tag(std::forward<U>(screen_tag));
+ }
+
+ void map(address_map &map);
+ void map_video(address_map &map);
+
+ double hue2rgb(double p, double q, double t);
+ uint32_t screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
+ DECLARE_WRITE_LINE_MEMBER(vblank);
+
+ auto porta_out() { return m_porta_out.bind(); }
+ auto portb_out() { return m_portb_out.bind(); }
+ auto portc_out() { return m_portc_out.bind(); }
+ auto porta_in() { return m_porta_in.bind(); }
+ auto portb_in() { return m_portb_in.bind(); }
+ auto portc_in() { return m_portc_in.bind(); }
+
+ template <size_t Line> auto adc_in() { return m_adc_in[Line].bind(); }
+
+ auto chip_select() { return m_chip_sel.bind(); }
+
+protected:
+ virtual void device_start() override;
+ virtual void device_reset() override;
+
+ virtual void device_add_mconfig(machine_config &config) override;
+
+ virtual space_config_vector memory_space_config() const override;
+
+ address_space_config m_space_config;
+
+private:
+ enum
+ {
+ PAGE_ENABLE_MASK = 0x0008,
+ PAGE_WALLPAPER_MASK = 0x0004,
+
+ PAGE_DEPTH_FLAG_MASK = 0x3000,
+ PAGE_DEPTH_FLAG_SHIFT = 12,
+ PAGE_TILE_HEIGHT_MASK = 0x00c0,
+ PAGE_TILE_HEIGHT_SHIFT = 6,
+ PAGE_TILE_WIDTH_MASK = 0x0030,
+ PAGE_TILE_WIDTH_SHIFT = 4,
+
+ TILE_X_FLIP = 0x0004,
+ TILE_Y_FLIP = 0x0008
+ };
+
+ enum flipx_t : bool
+ {
+ FlipXOff = false,
+ FlipXOn = true
+ };
+
+ required_device<unsp_device> m_cpu;
+ required_device<screen_device> m_screen;
+ required_device<palette_device> m_palette;
+ required_device<gfxdecode_device> m_gfxdecode;
+ required_shared_ptr<uint16_t> m_palram;
+ required_device<spg2xx_io_device> m_spg_io;
+
+ //TIMER_CALLBACK_MEMBER(test_timer);
+ //emu_timer *m_test_timer;
+
+
+ DECLARE_WRITE16_MEMBER(spg110_201c_w);
+ DECLARE_WRITE16_MEMBER(spg110_2020_w);
+
+ DECLARE_WRITE16_MEMBER(spg110_2028_w);
+ DECLARE_WRITE16_MEMBER(spg110_2029_w);
+
+ DECLARE_READ16_MEMBER(spg110_2028_r);
+ DECLARE_READ16_MEMBER(spg110_2029_r);
+
+ DECLARE_WRITE16_MEMBER(spg110_2031_w);
+ DECLARE_WRITE16_MEMBER(spg110_2032_w);
+ DECLARE_WRITE16_MEMBER(spg110_2033_w);
+ DECLARE_WRITE16_MEMBER(spg110_2034_w);
+ DECLARE_WRITE16_MEMBER(spg110_2035_w);
+ DECLARE_WRITE16_MEMBER(spg110_2036_w);
+ DECLARE_WRITE16_MEMBER(spg110_2037_w);
+ DECLARE_WRITE16_MEMBER(spg110_2039_w);
+
+ DECLARE_WRITE16_MEMBER(spg110_203c_w);
+ DECLARE_WRITE16_MEMBER(spg110_203d_w);
+
+ DECLARE_WRITE16_MEMBER(spg110_2042_w);
+
+ DECLARE_WRITE16_MEMBER(spg110_2045_w);
+
+ DECLARE_WRITE16_MEMBER(spg110_2050_w);
+ DECLARE_WRITE16_MEMBER(spg110_2051_w);
+ DECLARE_WRITE16_MEMBER(spg110_2052_w);
+ DECLARE_WRITE16_MEMBER(spg110_2053_w);
+ DECLARE_WRITE16_MEMBER(spg110_2054_w);
+ DECLARE_WRITE16_MEMBER(spg110_2055_w);
+ DECLARE_WRITE16_MEMBER(spg110_2056_w);
+ DECLARE_WRITE16_MEMBER(spg110_2057_w);
+ DECLARE_WRITE16_MEMBER(spg110_2058_w);
+ DECLARE_WRITE16_MEMBER(spg110_2059_w);
+ DECLARE_WRITE16_MEMBER(spg110_205a_w);
+ DECLARE_WRITE16_MEMBER(spg110_205b_w);
+ DECLARE_WRITE16_MEMBER(spg110_205c_w);
+ DECLARE_WRITE16_MEMBER(spg110_205d_w);
+ DECLARE_WRITE16_MEMBER(spg110_205e_w);
+ DECLARE_WRITE16_MEMBER(spg110_205f_w);
+
+
+ DECLARE_READ16_MEMBER(spg110_2037_r);
+ DECLARE_READ16_MEMBER(spg110_2042_r);
+
+ DECLARE_WRITE16_MEMBER(dma_dst_w);
+ DECLARE_WRITE16_MEMBER(dma_unk_2061_w);
+ DECLARE_WRITE16_MEMBER(dma_len_trigger_w);
+ DECLARE_WRITE16_MEMBER(spg110_2063_w);
+ DECLARE_WRITE16_MEMBER(dma_dst_step_w);
+ DECLARE_WRITE16_MEMBER(dma_src_w);
+ DECLARE_WRITE16_MEMBER(dma_unk_2067_w);
+ DECLARE_WRITE16_MEMBER(dma_src_step_w);
+
+ DECLARE_READ16_MEMBER(dma_len_status_r);
+ DECLARE_READ16_MEMBER(spg110_2063_r);
+
+ DECLARE_WRITE16_MEMBER(spg110_3100_w);
+
+ DECLARE_WRITE16_MEMBER(spg110_3101_w);
+ DECLARE_WRITE16_MEMBER(spg110_3102_w);
+ DECLARE_WRITE16_MEMBER(spg110_3104_w);
+ DECLARE_WRITE16_MEMBER(spg110_3105_w);
+ DECLARE_WRITE16_MEMBER(spg110_3106_w);
+ DECLARE_WRITE16_MEMBER(spg110_3107_w);
+ DECLARE_WRITE16_MEMBER(spg110_3108_w);
+ DECLARE_WRITE16_MEMBER(spg110_3109_w);
+
+ DECLARE_WRITE16_MEMBER(spg110_310b_w);
+ DECLARE_WRITE16_MEMBER(spg110_310c_w);
+ DECLARE_WRITE16_MEMBER(spg110_310d_w);
+
+ DECLARE_READ16_MEMBER(spg110_310f_r);
+
+ DECLARE_READ16_MEMBER(tmap0_regs_r);
+ DECLARE_READ16_MEMBER(tmap1_regs_r);
+ DECLARE_WRITE16_MEMBER(tmap0_regs_w);
+ DECLARE_WRITE16_MEMBER(tmap1_regs_w);
+
+ uint16_t tmap0_regs[0x6];
+ uint16_t tmap1_regs[0x6];
+
+ uint16_t m_dma_src_step;
+ uint16_t m_dma_dst_step;
+ uint16_t m_dma_unk_2061;
+ uint16_t m_dma_unk_2067;
+
+ uint16_t m_dma_dst;
+ uint16_t m_dma_src;
+
+ uint16_t m_bg_scrollx;
+ uint16_t m_bg_scrolly;
+ uint16_t m_2036_scroll;
+
+ void tilemap_write_regs(int which, uint16_t* regs, int regno, uint16_t data);
+
+ template<flipx_t FlipX>
+ void blit(const rectangle &cliprect, uint32_t line, uint32_t xoff, uint32_t yoff, uint32_t attr, uint32_t ctrl, uint32_t bitmap_addr, uint16_t tile);
+ void blit_page(const rectangle &cliprect, uint32_t scanline, int depth, uint32_t bitmap_addr, uint16_t *regs);
+ uint32_t m_screenbuf[320 * 240];
+
+ devcb_write16 m_porta_out;
+ devcb_write16 m_portb_out;
+ devcb_write16 m_portc_out;
+ devcb_read16 m_porta_in;
+ devcb_read16 m_portb_in;
+ devcb_read16 m_portc_in;
+
+ devcb_read16 m_adc_in[2];
+
+ devcb_write8 m_chip_sel;
+
+ DECLARE_READ16_MEMBER(porta_r) { return m_porta_in(); };
+ DECLARE_READ16_MEMBER(portb_r) { return m_portb_in(); };
+ DECLARE_READ16_MEMBER(portc_r) { return m_portc_in(); };
+ DECLARE_WRITE16_MEMBER(porta_w) { m_porta_out(offset, data, mem_mask); };
+ DECLARE_WRITE16_MEMBER(portb_w) { m_portb_out(offset, data, mem_mask); };
+ DECLARE_WRITE16_MEMBER(portc_w) { m_portc_out(offset, data, mem_mask); };
+ template <size_t Line> DECLARE_READ16_MEMBER(adc_r) { return m_adc_in[Line](); };
+ DECLARE_WRITE8_MEMBER(cs_w) { m_chip_sel(offset, data, mem_mask); };
+ DECLARE_READ16_MEMBER(get_pal_r) { return 0; /*m_pal_flag;*/ };
+ void configure_spg_io(spg2xx_io_device* io);
+
+};
+
+DECLARE_DEVICE_TYPE(SPG110, spg110_device)
+
+#endif // MAME_MACHINE_SPG110_H
diff --git a/src/devices/machine/spg2xx.cpp b/src/devices/machine/spg2xx.cpp
index a325346558d..3a3a22abac3 100644
--- a/src/devices/machine/spg2xx.cpp
+++ b/src/devices/machine/spg2xx.cpp
@@ -17,57 +17,38 @@
DEFINE_DEVICE_TYPE(SPG24X, spg24x_device, "spg24x", "SPG240-series System-on-a-Chip")
DEFINE_DEVICE_TYPE(SPG28X, spg28x_device, "spg28x", "SPG280-series System-on-a-Chip")
-#define LOG_IO_READS (1U << 1)
-#define LOG_IO_WRITES (1U << 2)
#define LOG_UNKNOWN_IO (1U << 3)
#define LOG_IRQS (1U << 4)
#define LOG_VLINES (1U << 5)
-#define LOG_GPIO (1U << 6)
-#define LOG_UART (1U << 7)
-#define LOG_I2C (1U << 8)
#define LOG_DMA (1U << 9)
-#define LOG_SEGMENT (1U << 10)
-#define LOG_WATCHDOG (1U << 11)
-#define LOG_TIMERS (1U << 12)
-#define LOG_SPU_READS (1U << 13)
-#define LOG_SPU_WRITES (1U << 14)
-#define LOG_UNKNOWN_SPU (1U << 15)
-#define LOG_CHANNEL_READS (1U << 16)
-#define LOG_CHANNEL_WRITES (1U << 17)
-#define LOG_ENVELOPES (1U << 18)
-#define LOG_SAMPLES (1U << 19)
-#define LOG_RAMPDOWN (1U << 20)
-#define LOG_BEAT (1U << 21)
#define LOG_PPU_READS (1U << 22)
#define LOG_PPU_WRITES (1U << 23)
#define LOG_UNKNOWN_PPU (1U << 24)
-#define LOG_IO (LOG_IO_READS | LOG_IO_WRITES | LOG_IRQS | LOG_GPIO | LOG_UART | LOG_I2C | LOG_DMA | LOG_TIMERS | LOG_UNKNOWN_IO)
-#define LOG_CHANNELS (LOG_CHANNEL_READS | LOG_CHANNEL_WRITES)
-#define LOG_SPU (LOG_SPU_READS | LOG_SPU_WRITES | LOG_UNKNOWN_SPU | LOG_CHANNEL_READS | LOG_CHANNEL_WRITES \
- | LOG_ENVELOPES | LOG_SAMPLES | LOG_RAMPDOWN | LOG_BEAT)
+#define LOG_IO (LOG_IRQS | LOG_DMA | LOG_UNKNOWN_IO)
#define LOG_PPU (LOG_PPU_READS | LOG_PPU_WRITES | LOG_UNKNOWN_PPU)
-#define LOG_ALL (LOG_IO | LOG_SPU | LOG_PPU | LOG_VLINES | LOG_SEGMENT)
+#define LOG_ALL (LOG_IO | LOG_PPU | LOG_VLINES )
-#define VERBOSE (LOG_UART | LOG_UNKNOWN_IO)
+#define VERBOSE (0)
#include "logmacro.h"
#define SPG_DEBUG_VIDEO (0)
-#define SPG_DEBUG_AUDIO (0)
-#define IO_IRQ_ENABLE m_io_regs[0x21]
-#define IO_IRQ_STATUS m_io_regs[0x22]
#define VIDEO_IRQ_ENABLE m_video_regs[0x62]
#define VIDEO_IRQ_STATUS m_video_regs[0x63]
spg2xx_device::spg2xx_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock)
: device_t(mconfig, type, tag, owner, clock)
- , device_sound_interface(mconfig, *this)
+ , device_mixer_interface(mconfig, *this, 2)
+ , m_spg_audio(*this, "spgaudio")
+ , m_spg_io(*this, "spgio")
+ , m_rowscrolloffset(15)
, m_porta_out(*this)
, m_portb_out(*this)
, m_portc_out(*this)
, m_porta_in(*this)
, m_portb_in(*this)
, m_portc_in(*this)
+ , m_adc_in{{*this}, {*this}}
, m_eeprom_w(*this)
, m_eeprom_r(*this)
, m_uart_tx(*this)
@@ -97,212 +78,234 @@ void spg2xx_device::map(address_map &map)
map(0x002900, 0x002aff).ram().share("scrollram");
map(0x002b00, 0x002bff).ram().share("paletteram");
map(0x002c00, 0x002fff).ram().share("spriteram");
- map(0x003000, 0x0037ff).rw(FUNC(spg2xx_device::audio_r), FUNC(spg2xx_device::audio_w));
- map(0x003d00, 0x003eff).rw(FUNC(spg2xx_device::io_r), FUNC(spg2xx_device::io_w));
+ map(0x003000, 0x0031ff).rw(m_spg_audio, FUNC(spg2xx_audio_device::audio_r), FUNC(spg2xx_audio_device::audio_w));
+ map(0x003200, 0x0033ff).rw(m_spg_audio, FUNC(spg2xx_audio_device::audio_phase_r), FUNC(spg2xx_audio_device::audio_phase_w));
+ map(0x003400, 0x0037ff).rw(m_spg_audio, FUNC(spg2xx_audio_device::audio_ctrl_r), FUNC(spg2xx_audio_device::audio_ctrl_w));
+ map(0x003d00, 0x003d2f).rw(m_spg_io, FUNC(spg2xx_io_device::io_r), FUNC(spg2xx_io_device::io_w));
+ map(0x003d30, 0x003dff).rw(m_spg_io, FUNC(spg2xx_io_device::io_extended_r), FUNC(spg2xx_io_device::io_extended_w));
+ map(0x003e00, 0x003e03).rw(FUNC(spg2xx_device::dma_r), FUNC(spg2xx_device::dma_w));
}
void spg2xx_device::device_start()
{
+ for (uint8_t i = 0; i < 32; i++)
+ {
+ m_rgb5_to_rgb8[i] = (i << 3) | (i >> 2);
+ }
+ for (uint16_t i = 0; i < 0x8000; i++)
+ {
+ m_rgb555_to_rgb888[i] = (m_rgb5_to_rgb8[(i >> 10) & 0x1f] << 16) |
+ (m_rgb5_to_rgb8[(i >> 5) & 0x1f] << 8) |
+ (m_rgb5_to_rgb8[(i >> 0) & 0x1f] << 0);
+ }
m_porta_out.resolve_safe();
m_portb_out.resolve_safe();
m_portc_out.resolve_safe();
m_porta_in.resolve_safe(0);
m_portb_in.resolve_safe(0);
m_portc_in.resolve_safe(0);
+ m_adc_in[0].resolve_safe(0x0fff);
+ m_adc_in[1].resolve_safe(0x0fff);
m_eeprom_w.resolve_safe();
m_eeprom_r.resolve_safe(0);
m_uart_tx.resolve_safe();
m_chip_sel.resolve_safe();
- m_tmb1 = timer_alloc(TIMER_TMB1);
- m_tmb2 = timer_alloc(TIMER_TMB2);
- m_tmb1->adjust(attotime::never);
- m_tmb2->adjust(attotime::never);
-
m_screenpos_timer = timer_alloc(TIMER_SCREENPOS);
m_screenpos_timer->adjust(attotime::never);
- m_audio_beat = timer_alloc(TIMER_BEAT);
- m_audio_beat->adjust(attotime::never);
+ save_item(NAME(m_hide_page0));
+ save_item(NAME(m_hide_page1));
+ save_item(NAME(m_hide_sprites));
+ save_item(NAME(m_debug_sprites));
+ save_item(NAME(m_debug_blit));
+ save_item(NAME(m_debug_palette));
+ save_item(NAME(m_sprite_index_to_debug));
- m_stream = stream_alloc(0, 2, 44100);
+ save_item(NAME(m_dma_regs));
- m_channel_debug = -1;
+ save_item(NAME(m_video_regs));
+ save_item(NAME(m_sprite_limit));
+ save_item(NAME(m_pal_flag));
}
void spg2xx_device::device_reset()
{
- memset(m_audio_regs, 0, 0x800 * sizeof(uint16_t));
- memset(m_sample_shift, 0, 16);
- memset(m_sample_count, 0, sizeof(uint32_t) * 16);
- memset(m_sample_addr, 0, sizeof(uint32_t) * 16);
- memset(m_channel_rate, 0, sizeof(double) * 16);
- memset(m_channel_rate_accum, 0, sizeof(double) * 16);
- memset(m_rampdown_frame, 0, sizeof(uint32_t) * 16);
- memset(m_envclk_frame, 4, sizeof(uint32_t) * 16);
- memset(m_envelope_addr, 0, sizeof(uint32_t) * 16);
-
memset(m_video_regs, 0, 0x100 * sizeof(uint16_t));
- memset(m_io_regs, 0, 0x200 * sizeof(uint16_t));
-
- m_io_regs[0x23] = 0x0028;
- m_uart_rx_available = false;
- memset(m_uart_rx_fifo, 0, ARRAY_LENGTH(m_uart_rx_fifo));
- m_uart_rx_fifo_start = 0;
- m_uart_rx_fifo_end = 0;
- m_uart_rx_fifo_count = 0;
+ memset(m_dma_regs, 0, 0x4 * sizeof(uint16_t));
m_video_regs[0x36] = 0xffff;
m_video_regs[0x37] = 0xffff;
m_video_regs[0x3c] = 0x0020;
+ m_video_regs[0x42] = 0x0001;
m_hide_page0 = false;
m_hide_page1 = false;
m_hide_sprites = false;
m_debug_sprites = false;
m_debug_blit = false;
+ m_debug_palette = false;
m_sprite_index_to_debug = 0;
+}
- m_debug_samples = false;
- m_debug_rates = false;
- m_audio_curr_beat_base_count = 0;
- m_audio_regs[AUDIO_CHANNEL_REPEAT] = 0x3f;
- m_audio_regs[AUDIO_CHANNEL_ENV_MODE] = 0x3f;
+WRITE_LINE_MEMBER(spg2xx_device::audioirq_w)
+{
+ m_cpu->set_state_unsynced(UNSP_IRQ4_LINE, state);
+}
- m_audio_beat->adjust(attotime::from_ticks(4, 281250), 0, attotime::from_ticks(4, 281250));
+WRITE_LINE_MEMBER(spg2xx_device::timerirq_w)
+{
+ m_cpu->set_state_unsynced(UNSP_IRQ2_LINE, state);
}
+WRITE_LINE_MEMBER(spg2xx_device::uartirq_w)
+{
+ m_cpu->set_state_unsynced(UNSP_IRQ3_LINE, state);
+}
-/*************************
-* Video Hardware *
-*************************/
+WRITE_LINE_MEMBER(spg2xx_device::extirq_w)
+{
+ m_cpu->set_state_unsynced(UNSP_IRQ5_LINE, state);
+}
-inline uint8_t spg2xx_device::expand_rgb5_to_rgb8(uint8_t val)
+WRITE_LINE_MEMBER(spg2xx_device::ffreq1_w)
{
- uint8_t temp = val & 0x1f;
- return (temp << 3) | (temp >> 2);
+ m_cpu->set_state_unsynced(UNSP_IRQ6_LINE, state);
}
-// Perform a lerp between a and b
-inline uint8_t spg2xx_device::mix_channel(uint8_t bottom, uint8_t top)
+WRITE_LINE_MEMBER(spg2xx_device::ffreq2_w)
{
- uint8_t alpha = (m_video_regs[0x2a] & 3) << 6;
- return ((256 - alpha) * bottom + alpha * top) >> 8;
+ m_cpu->set_state_unsynced(UNSP_IRQ7_LINE, state);
}
-void spg2xx_device::mix_pixel(uint32_t offset, uint16_t rgb)
+
+
+READ16_MEMBER(spg2xx_device::space_r)
{
- m_screenbuf[offset].r = mix_channel(m_screenbuf[offset].r, expand_rgb5_to_rgb8(rgb >> 10));
- m_screenbuf[offset].g = mix_channel(m_screenbuf[offset].g, expand_rgb5_to_rgb8(rgb >> 5));
- m_screenbuf[offset].b = mix_channel(m_screenbuf[offset].b, expand_rgb5_to_rgb8(rgb));
+ address_space &cpuspace = m_cpu->space(AS_PROGRAM);
+ return cpuspace.read_word(offset);
}
-void spg2xx_device::set_pixel(uint32_t offset, uint16_t rgb)
+/*************************
+* Video Hardware *
+*************************/
+
+// Perform a lerp between a and b
+inline uint8_t spg2xx_device::mix_channel(uint8_t bottom, uint8_t top)
{
- m_screenbuf[offset].r = expand_rgb5_to_rgb8(rgb >> 10);
- m_screenbuf[offset].g = expand_rgb5_to_rgb8(rgb >> 5);
- m_screenbuf[offset].b = expand_rgb5_to_rgb8(rgb);
+ uint8_t alpha = (m_video_regs[0x2a] & 3) << 6;
+ return ((256 - alpha) * bottom + alpha * top) >> 8;
}
-void spg2xx_device::blit(const rectangle &cliprect, uint32_t xoff, uint32_t yoff, uint32_t attr, uint32_t ctrl, uint32_t bitmap_addr, uint16_t tile)
+template<spg2xx_device::blend_enable_t Blend, spg2xx_device::rowscroll_enable_t RowScroll, spg2xx_device::flipx_t FlipX>
+void spg2xx_device::blit(const rectangle &cliprect, uint32_t line, uint32_t xoff, uint32_t yoff, uint32_t attr, uint32_t ctrl, uint32_t bitmap_addr, uint16_t tile)
{
address_space &space = m_cpu->space(AS_PROGRAM);
- uint32_t h = 8 << ((attr & PAGE_TILE_HEIGHT_MASK) >> PAGE_TILE_HEIGHT_SHIFT);
- uint32_t w = 8 << ((attr & PAGE_TILE_WIDTH_MASK) >> PAGE_TILE_WIDTH_SHIFT);
+ int32_t h = 8 << ((attr & PAGE_TILE_HEIGHT_MASK) >> PAGE_TILE_HEIGHT_SHIFT);
+ int32_t w = 8 << ((attr & PAGE_TILE_WIDTH_MASK) >> PAGE_TILE_WIDTH_SHIFT);
uint32_t yflipmask = attr & TILE_Y_FLIP ? h - 1 : 0;
- uint32_t xflipmask = attr & TILE_X_FLIP ? w - 1 : 0;
uint32_t nc = ((attr & 0x0003) + 1) << 1;
uint32_t palette_offset = (attr & 0x0f00) >> 4;
- if (m_debug_blit && SPG_DEBUG_VIDEO)
+ if (SPG_DEBUG_VIDEO && m_debug_blit)
{
- printf("xy:%08x,%08x attr:%08x ctrl:%08x bitmap_addr:%08x tile:%04x\n", xoff, yoff, attr, ctrl, bitmap_addr, tile);
- printf("hw:%d,%d f:%d,%d fm:%d,%d ncols:%d pobs:%02x ", w, h, (attr & TILE_X_FLIP) ? 1 : 0, (attr & TILE_Y_FLIP) ? 1 : 0, xflipmask, yflipmask, nc, palette_offset);
+ printf("s:%d line:%d xy:%08x,%08x attr:%08x ctrl:%08x bitmap_addr:%08x tile:%04x\n", cliprect.min_x, line, xoff, yoff, attr, ctrl, bitmap_addr, tile);
+ printf("hw:%d,%d f:%d,%d yfm:%d ncols:%d pobs:%02x ", w, h, (attr & TILE_X_FLIP) ? 1 : 0, (attr & TILE_Y_FLIP) ? 1 : 0, yflipmask, nc, palette_offset);
}
palette_offset >>= nc;
palette_offset <<= nc;
- if (m_debug_blit && SPG_DEBUG_VIDEO)
+ if (SPG_DEBUG_VIDEO && m_debug_blit)
{
printf("poas:%02x\n", palette_offset);
}
- uint32_t m = bitmap_addr + nc * w*h / 16 * tile;
+ uint32_t bits_per_row = nc * w / 16;
+ uint32_t words_per_tile = bits_per_row * h;
+ uint32_t m = bitmap_addr + words_per_tile * tile + bits_per_row * (line ^ yflipmask);
uint32_t bits = 0;
uint32_t nbits = 0;
+ uint32_t y = line;
- for (uint32_t y = 0; y < h; y++)
- {
- int yy = (yoff + (y ^ yflipmask)) & 0x1ff;
- if (yy >= 0x01c0)
- yy -= 0x0200;
+ int yy = (yoff + y) & 0x1ff;
+ if (yy >= 0x01c0)
+ yy -= 0x0200;
- if (m_debug_blit && SPG_DEBUG_VIDEO)
- printf("%3d:\n", yy);
+ if (yy > 240 || yy < 0)
+ return;
- for (uint32_t x = 0; x < w; x++)
+ if (SPG_DEBUG_VIDEO && m_debug_blit)
+ printf("%3d:\n", yy);
+
+ int y_index = yy * 320;
+
+ for (int32_t x = FlipX ? (w - 1) : 0; FlipX ? x >= 0 : x < w; FlipX ? x-- : x++)
+ {
+ int xx = xoff + x;
+
+ bits <<= nc;
+ if (SPG_DEBUG_VIDEO && m_debug_blit)
+ printf(" %08x:%d ", bits, nbits);
+ if (nbits < nc)
{
- int xx = xoff + (x ^ xflipmask);
+ uint16_t b = space.read_word(m++ & 0x3fffff);
+ b = (b << 8) | (b >> 8);
+ bits |= b << (nc - nbits);
+ nbits += 16;
+ if (SPG_DEBUG_VIDEO && m_debug_blit)
+ printf("(%04x:%08x:%d) ", b, bits, nbits);
+ }
+ nbits -= nc;
- bits <<= nc;
- if (m_debug_blit && SPG_DEBUG_VIDEO)
- printf(" %08x:%d ", bits, nbits);
- if (nbits < nc)
- {
- uint16_t b = space.read_word(m++ & 0x3fffff);
- b = (b << 8) | (b >> 8);
- bits |= b << (nc - nbits);
- nbits += 16;
- if (m_debug_blit && SPG_DEBUG_VIDEO)
- printf("(%04x:%08x:%d) ", b, bits, nbits);
- }
- nbits -= nc;
+ uint32_t pal = palette_offset + (bits >> 16);
+ if (SPG_DEBUG_VIDEO && m_debug_blit)
+ printf("%02x:%02x:%04x ", bits >> 16, pal, bits & 0xffff);
+ bits &= 0xffff;
+
+ if (RowScroll)
+ xx -= (int16_t)m_scrollram[(yy + m_rowscrolloffset) & 0x1ff];
- uint32_t pal = palette_offset + (bits >> 16);
- if (m_debug_blit && SPG_DEBUG_VIDEO)
- printf("%02x:%02x:%04x ", bits >> 16, pal, bits & 0xffff);
- bits &= 0xffff;
+ xx &= 0x01ff;
+ if (xx >= 0x01c0)
+ xx -= 0x0200;
- if ((ctrl & 0x0010) && yy < 240)
- xx -= (int16_t)m_scrollram[yy + 15];
+ if (xx >= 0 && xx < 320)
+ {
+ int pix_index = xx + y_index;
- xx &= 0x01ff;
- if (xx >= 0x01c0)
- xx -= 0x0200;
+ uint16_t rgb = m_paletteram[pal];
+ if (SPG_DEBUG_VIDEO && m_debug_blit)
+ printf("rgb:%04x ", rgb);
- if (xx >= 0 && xx < 320 && yy >= 0 && yy < 240)
+ if (!(rgb & 0x8000))
{
- uint16_t rgb = m_paletteram[pal];
- if (m_debug_blit && SPG_DEBUG_VIDEO)
- printf("rgb:%04x ", rgb);
- if (!(rgb & 0x8000))
+ if (Blend)
{
- if (attr & 0x4000 || ctrl & 0x0100)
- {
- if (m_debug_blit && SPG_DEBUG_VIDEO)
- printf("M\n");
- mix_pixel(xx + 320 * yy, rgb);
- }
- else
- {
- if (m_debug_blit && SPG_DEBUG_VIDEO)
- printf("S\n");
- set_pixel(xx + 320 * yy, rgb);
- }
+ if (SPG_DEBUG_VIDEO && m_debug_blit)
+ printf("M\n");
+ m_screenbuf[pix_index] = (mix_channel((uint8_t)(m_screenbuf[pix_index] >> 16), m_rgb5_to_rgb8[(rgb >> 10) & 0x1f]) << 16) |
+ (mix_channel((uint8_t)(m_screenbuf[pix_index] >> 8), m_rgb5_to_rgb8[(rgb >> 5) & 0x1f]) << 8) |
+ (mix_channel((uint8_t)(m_screenbuf[pix_index] >> 0), m_rgb5_to_rgb8[rgb & 0x1f]));
}
- else if (m_debug_blit && SPG_DEBUG_VIDEO)
+ else
{
- printf("X\n");
+ if (SPG_DEBUG_VIDEO && m_debug_blit)
+ printf("S\n");
+ m_screenbuf[pix_index] = m_rgb555_to_rgb888[rgb];
}
}
+ else if (SPG_DEBUG_VIDEO && m_debug_blit)
+ {
+ printf("X\n");
+ }
}
}
}
-void spg2xx_device::blit_page(const rectangle &cliprect, int depth, uint32_t bitmap_addr, uint16_t *regs)
+void spg2xx_device::blit_page(const rectangle &cliprect, uint32_t scanline, int depth, uint32_t bitmap_addr, uint16_t *regs)
{
uint32_t xscroll = regs[0];
uint32_t yscroll = regs[1];
@@ -322,62 +325,98 @@ void spg2xx_device::blit_page(const rectangle &cliprect, int depth, uint32_t bit
return;
}
- uint32_t h = 8 << ((attr & PAGE_TILE_HEIGHT_MASK) >> PAGE_TILE_HEIGHT_SHIFT);
- uint32_t w = 8 << ((attr & PAGE_TILE_WIDTH_MASK) >> PAGE_TILE_WIDTH_SHIFT);
+ uint32_t tile_h = 8 << ((attr & PAGE_TILE_HEIGHT_MASK) >> PAGE_TILE_HEIGHT_SHIFT);
+ uint32_t tile_w = 8 << ((attr & PAGE_TILE_WIDTH_MASK) >> PAGE_TILE_WIDTH_SHIFT);
+
+ uint32_t tile_count_x = 512 / tile_w;
- uint32_t hn = 256 / h;
- uint32_t wn = 512 / w;
+ uint32_t bitmap_y = (scanline + yscroll) & 0xff;
+ uint32_t y0 = bitmap_y / tile_h;
+ uint32_t tile_scanline = bitmap_y % tile_h;
+ uint32_t tile_address = tile_count_x * y0;
+ if (SPG_DEBUG_VIDEO && machine().input().code_pressed(KEYCODE_H))
+ printf("s:%3d | baddr:%08x | yscr:%3d | bity:%3d | y0:%2d | ts:%2d\n", scanline, bitmap_addr, yscroll, bitmap_y, y0, tile_scanline);
- for (uint32_t y0 = 0; y0 < hn; y0++)
+ if (SPG_DEBUG_VIDEO && machine().input().code_pressed(KEYCODE_EQUALS))
+ m_debug_blit = true;
+ for (uint32_t x0 = 0; x0 < tile_count_x; x0++, tile_address++)
{
- for (uint32_t x0 = 0; x0 < wn; x0++)
- {
- uint16_t tile = (ctrl & PAGE_WALLPAPER_MASK) ? space.read_word(tilemap) : space.read_word(tilemap + x0 + wn * y0);
- uint16_t palette = 0;
- uint32_t xx, yy;
+ uint32_t yy = ((tile_h * y0 - yscroll + 0x10) & 0xff) - 0x10;
+ uint32_t xx = (tile_w * x0 - xscroll) & 0x1ff;
+ uint16_t tile = (ctrl & PAGE_WALLPAPER_MASK) ? space.read_word(tilemap) : space.read_word(tilemap + tile_address);
+ uint16_t palette = 0;
- if (!tile)
- {
- continue;
- }
+ if (!tile)
+ continue;
- palette = space.read_word(palette_map + (x0 + wn * y0) / 2);
- if (x0 & 1)
- {
- palette >>= 8;
- }
+ palette = (ctrl & PAGE_WALLPAPER_MASK) ? space.read_word(palette_map) : space.read_word(palette_map + tile_address / 2);
+ if (x0 & 1)
+ palette >>= 8;
- uint32_t tileattr = attr;
- uint32_t tilectrl = ctrl;
- if ((ctrl & 2) == 0)
- { // -(1) bld(1) flip(2) pal(4)
- tileattr &= ~0x000c;
- tileattr |= (palette >> 2) & 0x000c; // flip
+ uint32_t tileattr = attr;
+ uint32_t tilectrl = ctrl;
+ if ((ctrl & 2) == 0)
+ { // -(1) bld(1) flip(2) pal(4)
+ tileattr &= ~0x000c;
+ tileattr |= (palette >> 2) & 0x000c; // flip
- tileattr &= ~0x0f00;
- tileattr |= (palette << 8) & 0x0f00; // palette
+ tileattr &= ~0x0f00;
+ tileattr |= (palette << 8) & 0x0f00; // palette
- tilectrl &= ~0x0100;
- tilectrl |= (palette << 2) & 0x0100; // blend
- }
+ tilectrl &= ~0x0100;
+ tilectrl |= (palette << 2) & 0x0100; // blend
+ }
- yy = ((h*y0 - yscroll + 0x10) & 0xff) - 0x10;
- xx = (w*x0 - xscroll) & 0x1ff;
+ bool blend = (tileattr & 0x4000 || tilectrl & 0x0100);
+ bool row_scroll = (tilectrl & 0x0010);
+ bool flip_x = (tileattr & TILE_X_FLIP);
- blit(cliprect, xx, yy, tileattr, tilectrl, bitmap_addr, tile);
+ if (blend)
+ {
+ if (row_scroll)
+ {
+ if (flip_x)
+ blit<BlendOn, RowScrollOn, FlipXOn>(cliprect, tile_scanline, xx, yy, tileattr, tilectrl, bitmap_addr, tile);
+ else
+ blit<BlendOn, RowScrollOn, FlipXOff>(cliprect, tile_scanline, xx, yy, tileattr, tilectrl, bitmap_addr, tile);
+ }
+ else
+ {
+ if (flip_x)
+ blit<BlendOn, RowScrollOff, FlipXOn>(cliprect, tile_scanline, xx, yy, tileattr, tilectrl, bitmap_addr, tile);
+ else
+ blit<BlendOn, RowScrollOff, FlipXOff>(cliprect, tile_scanline, xx, yy, tileattr, tilectrl, bitmap_addr, tile);
+ }
+ }
+ else
+ {
+ if (row_scroll)
+ {
+ if (flip_x)
+ blit<BlendOff, RowScrollOn, FlipXOn>(cliprect, tile_scanline, xx, yy, tileattr, tilectrl, bitmap_addr, tile);
+ else
+ blit<BlendOff, RowScrollOn, FlipXOff>(cliprect, tile_scanline, xx, yy, tileattr, tilectrl, bitmap_addr, tile);
+ }
+ else
+ {
+ if (flip_x)
+ blit<BlendOff, RowScrollOff, FlipXOn>(cliprect, tile_scanline, xx, yy, tileattr, tilectrl, bitmap_addr, tile);
+ else
+ blit<BlendOff, RowScrollOff, FlipXOff>(cliprect, tile_scanline, xx, yy, tileattr, tilectrl, bitmap_addr, tile);
+ }
}
}
+ if (SPG_DEBUG_VIDEO && machine().input().code_pressed(KEYCODE_EQUALS))
+ m_debug_blit = false;
}
-void spg2xx_device::blit_sprite(const rectangle &cliprect, int depth, uint32_t base_addr)
+void spg2xx_device::blit_sprite(const rectangle &cliprect, uint32_t scanline, int depth, uint32_t base_addr)
{
- address_space &space = m_cpu->space(AS_PROGRAM);
uint32_t bitmap_addr = 0x40 * m_video_regs[0x22];
-
- uint16_t tile = space.read_word(base_addr + 0);
- int16_t x = space.read_word(base_addr + 1);
- int16_t y = space.read_word(base_addr + 2);
- uint16_t attr = space.read_word(base_addr + 3);
+ uint16_t tile = m_spriteram[base_addr + 0];
+ int16_t x = m_spriteram[base_addr + 1];
+ int16_t y = m_spriteram[base_addr + 2];
+ uint16_t attr = m_spriteram[base_addr + 3];
if (!tile)
{
@@ -389,32 +428,68 @@ void spg2xx_device::blit_sprite(const rectangle &cliprect, int depth, uint32_t b
return;
}
+ const uint32_t h = 8 << ((attr & PAGE_TILE_HEIGHT_MASK) >> PAGE_TILE_HEIGHT_SHIFT);
+ const uint32_t w = 8 << ((attr & PAGE_TILE_WIDTH_MASK) >> PAGE_TILE_WIDTH_SHIFT);
+
if (!(m_video_regs[0x42] & SPRITE_COORD_TL_MASK))
{
- x = 160 + x;
- y = 120 - y;
-
- uint32_t h = 8 << ((attr & PAGE_TILE_HEIGHT_MASK) >> PAGE_TILE_HEIGHT_SHIFT);
- uint32_t w = 8 << ((attr & PAGE_TILE_WIDTH_MASK) >> PAGE_TILE_WIDTH_SHIFT);
-
- x -= (w / 2);
- y -= (h / 2) - 8;
+ x = (160 + x) - w / 2;
+ y = (120 - y) - (h / 2) + 8;
}
x &= 0x01ff;
y &= 0x01ff;
+ uint32_t tile_line = ((scanline - y) + 0x200) % h;
+ int16_t test_y = (y + tile_line) & 0x1ff;
+ if (test_y >= 0x01c0)
+ test_y -= 0x0200;
+
+ if (test_y != scanline)
+ {
+ return;
+ }
+
+ bool blend = (attr & 0x4000);
+ bool flip_x = (attr & TILE_X_FLIP);
+
#if SPG_DEBUG_VIDEO
if (m_debug_sprites && machine().input().code_pressed(KEYCODE_MINUS))
m_debug_blit = true;
- blit(cliprect, x, y, attr, 0, bitmap_addr, tile);
+ if (blend)
+ {
+ if (flip_x)
+ blit<BlendOn, RowScrollOff, FlipXOn>(cliprect, tile_line, x, y, attr, 0, bitmap_addr, tile);
+ else
+ blit<BlendOn, RowScrollOff, FlipXOff>(cliprect, tile_line, x, y, attr, 0, bitmap_addr, tile);
+ }
+ else
+ {
+ if (flip_x)
+ blit<BlendOff, RowScrollOff, FlipXOn>(cliprect, tile_line, x, y, attr, 0, bitmap_addr, tile);
+ else
+ blit<BlendOff, RowScrollOff, FlipXOff>(cliprect, tile_line, x, y, attr, 0, bitmap_addr, tile);
+ }
m_debug_blit = false;
#else
- blit(cliprect, x, y, attr, 0, bitmap_addr, tile);
+ if (blend)
+ {
+ if (flip_x)
+ blit<BlendOn, RowScrollOff, FlipXOn>(cliprect, tile_line, x, y, attr, 0, bitmap_addr, tile);
+ else
+ blit<BlendOn, RowScrollOff, FlipXOff>(cliprect, tile_line, x, y, attr, 0, bitmap_addr, tile);
+ }
+ else
+ {
+ if (flip_x)
+ blit<BlendOff, RowScrollOff, FlipXOn>(cliprect, tile_line, x, y, attr, 0, bitmap_addr, tile);
+ else
+ blit<BlendOff, RowScrollOff, FlipXOff>(cliprect, tile_line, x, y, attr, 0, bitmap_addr, tile);
+ }
#endif
}
-void spg2xx_device::blit_sprites(const rectangle &cliprect, int depth)
+void spg2xx_device::blit_sprites(const rectangle &cliprect, uint32_t scanline, int depth)
{
if (!(m_video_regs[0x42] & SPRITE_ENABLE_MASK))
{
@@ -427,13 +502,13 @@ void spg2xx_device::blit_sprites(const rectangle &cliprect, int depth)
#endif
for (uint32_t n = 0; n < m_sprite_limit; n++)
{
- blit_sprite(cliprect, depth, 0x2c00 + 4 * n);
+ blit_sprite(cliprect, scanline, depth, 4 * n);
}
#if SPG_DEBUG_VIDEO
}
else
{
- blit_sprite(cliprect, depth, 0x2c00 + 4 * m_sprite_index_to_debug);
+ blit_sprite(cliprect, scanline, depth, 4 * m_sprite_index_to_debug);
}
#endif
}
@@ -447,12 +522,13 @@ void spg2xx_device::apply_saturation(const rectangle &cliprect)
const float sat_adjust = (0xff - (m_video_regs[0x3c] & 0x00ff)) / (float)(0xff - 0x20);
for (int y = cliprect.min_y; y <= cliprect.max_y; y++)
{
- rgbtriad_t *src = &m_screenbuf[cliprect.min_x + 320 * y];
+ uint32_t *src = &m_screenbuf[cliprect.min_x + 320 * y];
for (int x = cliprect.min_x; x <= cliprect.max_x; x++)
{
- const float src_r = src->r * s_u8_to_float;
- const float src_g = src->g * s_u8_to_float;
- const float src_b = src->b * s_u8_to_float;
+ const uint32_t src_rgb = *src;
+ const float src_r = (uint8_t)(src_rgb >> 16) * s_u8_to_float;
+ const float src_g = (uint8_t)(src_rgb >> 8) * s_u8_to_float;
+ const float src_b = (uint8_t)(src_rgb >> 0) * s_u8_to_float;
const float luma = src_r * s_gray_r + src_g * s_gray_g + src_b * s_gray_b;
const float adjusted_r = luma + (src_r - luma) * sat_adjust;
const float adjusted_g = luma + (src_g - luma) * sat_adjust;
@@ -460,50 +536,55 @@ void spg2xx_device::apply_saturation(const rectangle &cliprect)
const int integer_r = (int)floor(adjusted_r * 255.0f);
const int integer_g = (int)floor(adjusted_g * 255.0f);
const int integer_b = (int)floor(adjusted_b * 255.0f);
- src->r = integer_r > 255 ? 255 : (integer_r < 0 ? 0 : (uint8_t)integer_r);
- src->g = integer_g > 255 ? 255 : (integer_g < 0 ? 0 : (uint8_t)integer_g);
- src->b = integer_b > 255 ? 255 : (integer_b < 0 ? 0 : (uint8_t)integer_b);
- src++;
+ *src++ = (integer_r > 255 ? 0xff0000 : (integer_r < 0 ? 0 : ((uint8_t)integer_r << 16))) |
+ (integer_g > 255 ? 0x00ff00 : (integer_g < 0 ? 0 : ((uint8_t)integer_g << 8))) |
+ (integer_b > 255 ? 0x0000ff : (integer_b < 0 ? 0 : (uint8_t)integer_b));
}
}
}
void spg2xx_device::apply_fade(const rectangle &cliprect)
{
- const uint16_t fade_offset = m_video_regs[0x30] << 1;
+ const ui