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Diffstat (limited to 'src/devices/machine/z80scc.cpp')
-rw-r--r--src/devices/machine/z80scc.cpp63
1 files changed, 55 insertions, 8 deletions
diff --git a/src/devices/machine/z80scc.cpp b/src/devices/machine/z80scc.cpp
index 1abc94fec86..d2aa4a5f5bd 100644
--- a/src/devices/machine/z80scc.cpp
+++ b/src/devices/machine/z80scc.cpp
@@ -154,8 +154,8 @@ z80scc_device::z80scc_device(const machine_config &mconfig, device_type type, co
m_out_txdrqb_cb(*this),
m_variant(variant),
m_wr0_ptrbits(0){
- for (int i = 0; i < 6; i++)
- m_int_state[i] = 0;
+ for (auto & elem : m_int_state)
+ elem = 0;
}
z80scc_device::z80scc_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
@@ -184,8 +184,8 @@ z80scc_device::z80scc_device(const machine_config &mconfig, const char *tag, dev
m_out_txdrqb_cb(*this),
m_variant(TYPE_Z80SCC)
{
- for (int i = 0; i < 6; i++)
- m_int_state[i] = 0;
+ for (auto & elem : m_int_state)
+ elem = 0;
}
scc8030_device::scc8030_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
@@ -379,9 +379,9 @@ void z80scc_device::reset_interrupts()
{
LOG(("%s %s \n",FUNCNAME, tag()));
// reset internal interrupt sources
- for (int i = 0; i < 6; i++)
+ for (auto & elem : m_int_state)
{
- m_int_state[i] = 0;
+ elem = 0;
}
// check external interrupt sources
@@ -425,10 +425,10 @@ UINT8 z80scc_device::modify_vector(UINT8 vec, int i, UINT8 src)
void z80scc_device::trigger_interrupt(int index, int state)
{
UINT8 vector = m_chanB->m_wr2;
- UINT8 source = 0;
+ UINT8 source;
int priority;
- int prio_level = 0;
+ int prio_level;
LOG(("%s %s:%c %d \n",FUNCNAME, tag(), 'A' + index, state));
@@ -613,6 +613,53 @@ WRITE8_MEMBER( z80scc_device::ba_cd_w )
channel->data_write(data);
}
+//-------------------------------------------------
+// ba_cd_r - Universal Bus read
+//-------------------------------------------------
+
+READ8_MEMBER( z80scc_device::ba_cd_inv_r )
+{
+ int ba = BIT(offset, 1);
+ int cd = BIT(offset, 0);
+ z80scc_channel *channel = ba ? m_chanA : m_chanB;
+
+ /* Expell non-Universal Bus variants */
+ if ( !(m_variant & SET_Z85X3X) )
+ {
+ logerror("Z80SCC ba_cd_r not supported by this device variant, you should probably use combinations of c*_r/w and d*_r/w (see z80scc.h)\n");
+ return 0;
+ }
+
+ // LOG(("z80scc_device::ba_cd_inv_r ba:%02x cd:%02x\n", ba, cd));
+ return cd ? channel->data_read() : channel->control_read();
+}
+
+
+//-------------------------------------------------
+// ba_cd_w -
+//-------------------------------------------------
+
+WRITE8_MEMBER( z80scc_device::ba_cd_inv_w )
+{
+ int ba = BIT(offset, 1);
+ int cd = BIT(offset, 0);
+ z80scc_channel *channel = ba ? m_chanA : m_chanB;
+
+ /* Expell non-Universal Bus variants */
+ if ( !(m_variant & SET_Z85X3X) )
+ {
+ logerror("Z80SCC ba_cd_w not supported by this device variant, you should probably use combinations of c*_r/w and d*_r/w (see z80scc.h)\n");
+ return;
+ }
+
+ LOG(("z80scc_device::ba_cd_inv_w ba:%02x cd:%02x\n", ba, cd));
+
+ if (cd)
+ channel->data_write(data);
+ else
+ channel->control_write(data);
+}
+
//**************************************************************************
// SCC CHANNEL
//**************************************************************************