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Diffstat (limited to 'src/devices/machine/z80dma.h')
-rw-r--r--src/devices/machine/z80dma.h101
1 files changed, 65 insertions, 36 deletions
diff --git a/src/devices/machine/z80dma.h b/src/devices/machine/z80dma.h
index 88b162ed4a2..b461330eab0 100644
--- a/src/devices/machine/z80dma.h
+++ b/src/devices/machine/z80dma.h
@@ -49,7 +49,7 @@ class z80dma_device : public device_t,
{
public:
// construction/destruction
- z80dma_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ z80dma_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
auto out_busreq_callback() { return m_out_busreq_cb.bind(); }
auto out_int_callback() { return m_out_int_cb.bind(); }
@@ -60,37 +60,70 @@ public:
auto in_iorq_callback() { return m_in_iorq_cb.bind(); }
auto out_iorq_callback() { return m_out_iorq_cb.bind(); }
- uint8_t read();
- void write(uint8_t data);
+ u8 read();
+ virtual void write(u8 data);
void iei_w(int state) { m_iei = state; interrupt_check(); }
void rdy_w(int state);
- void wait_w(int state);
+ void wait_w(int state) { m_wait = state; }
void bai_w(int state);
-private:
- // device-level overrides
- virtual void device_start() override;
- virtual void device_reset() override;
-
- // device_z80daisy_interface overrides
- virtual int z80daisy_irq_state() override;
- virtual int z80daisy_irq_ack() override;
- virtual void z80daisy_irq_reti() override;
+protected:
+ static inline constexpr int COMMAND_RESET = 0xc3;
+ static inline constexpr int COMMAND_RESET_PORT_A_TIMING = 0xc7;
+ static inline constexpr int COMMAND_RESET_PORT_B_TIMING = 0xcb;
+ static inline constexpr int COMMAND_LOAD = 0xcf;
+ static inline constexpr int COMMAND_CONTINUE = 0xd3;
+ static inline constexpr int COMMAND_DISABLE_INTERRUPTS = 0xaf;
+ static inline constexpr int COMMAND_ENABLE_INTERRUPTS = 0xab;
+ static inline constexpr int COMMAND_RESET_AND_DISABLE_INTERRUPTS = 0xa3;
+ static inline constexpr int COMMAND_ENABLE_AFTER_RETI = 0xb7;
+ static inline constexpr int COMMAND_READ_STATUS_BYTE = 0xbf;
+ static inline constexpr int COMMAND_REINITIALIZE_STATUS_BYTE = 0x8b;
+ static inline constexpr int COMMAND_INITIATE_READ_SEQUENCE = 0xa7;
+ static inline constexpr int COMMAND_FORCE_READY = 0xb3;
+ static inline constexpr int COMMAND_ENABLE_DMA = 0x87;
+ static inline constexpr int COMMAND_DISABLE_DMA = 0x83;
+ static inline constexpr int COMMAND_READ_MASK_FOLLOWS = 0xbb;
+
+ static inline constexpr int TM_TRANSFER = 0x01;
+ static inline constexpr int TM_SEARCH = 0x02;
+ static inline constexpr int TM_SEARCH_TRANSFER = 0x03;
+
+ z80dma_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock);
+
+ // device_t implementation
+ virtual void device_start() override ATTR_COLD;
+ virtual void device_reset() override ATTR_COLD;
// internal helpers
- int is_ready();
+ void enable();
+ void disable();
+ u8 num_follow() const noexcept { return m_num_follow; }
+ virtual int is_ready();
void interrupt_check();
void trigger_interrupt(int level);
void do_read();
- void do_write();
+ virtual void do_write();
void do_transfer_write();
void do_search();
- TIMER_CALLBACK_MEMBER(timerproc);
+ u16 &REG(unsigned m, unsigned s) noexcept { return m_regs[REGNUM(m, s)]; }
+
+ static constexpr unsigned REGNUM(unsigned m, unsigned s) { return (m << 3) + s; }
- void update_status();
+ u16 m_addressA;
+ u16 m_addressB;
+ u16 m_count;
+ u16 m_byte_counter;
+
+private:
+ // device_z80daisy_interface implementation
+ virtual int z80daisy_irq_state() override;
+ virtual int z80daisy_irq_ack() override;
+ virtual void z80daisy_irq_reti() override;
+ TIMER_CALLBACK_MEMBER(clock_w);
TIMER_CALLBACK_MEMBER(rdy_write_callback);
// internal state
@@ -105,34 +138,30 @@ private:
emu_timer *m_timer;
- uint16_t m_regs[(6<<3)+1+1];
- uint8_t m_num_follow;
- uint8_t m_cur_follow;
- uint8_t m_regs_follow[5];
- uint8_t m_read_num_follow;
- uint8_t m_read_cur_follow;
- uint8_t m_read_regs_follow[7];
- uint8_t m_status;
- uint8_t m_dma_enabled;
-
- uint16_t m_addressA;
- uint16_t m_addressB;
- uint16_t m_count;
- uint16_t m_byte_counter;
+ u16 m_regs[(6 << 3) + 1 + 1];
+ u8 m_num_follow;
+ u8 m_cur_follow;
+ u8 m_regs_follow[5];
+ u8 m_read_num_follow;
+ u8 m_read_cur_follow;
+ u8 m_read_regs_follow[7];
+ u8 m_status;
+ int m_dma_seq;
int m_rdy;
int m_force_ready;
- uint8_t m_reset_pointer;
+ u8 m_reset_pointer;
- bool m_is_read;
- uint8_t m_cur_cycle;
- uint8_t m_latch;
+ int m_wait;
+ int m_busrq_ack;
+ bool m_is_pulse;
+ u8 m_latch;
// interrupts
int m_iei; // interrupt enable input
int m_ip; // interrupt pending
int m_ius; // interrupt under service
- uint8_t m_vector; // interrupt vector
+ u8 m_vector; // interrupt vector
};