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Diffstat (limited to 'src/devices/machine/pxa255.h')
-rw-r--r--src/devices/machine/pxa255.h95
1 files changed, 71 insertions, 24 deletions
diff --git a/src/devices/machine/pxa255.h b/src/devices/machine/pxa255.h
index 8f1e90544fe..c90f676b5ee 100644
--- a/src/devices/machine/pxa255.h
+++ b/src/devices/machine/pxa255.h
@@ -37,25 +37,36 @@ public:
auto gpio0_write() { return m_gpio0_w.bind(); }
auto gpio0_read() { return m_gpio0_r.bind(); }
- uint32_t i2s_r(offs_t offset, uint32_t mem_mask = ~0);
- void i2s_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
uint32_t dma_r(offs_t offset, uint32_t mem_mask = ~0);
void dma_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
+ uint32_t i2s_r(offs_t offset, uint32_t mem_mask = ~0);
+ void i2s_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
+ uint32_t rtc_r(offs_t offset, uint32_t mem_mask = ~0);
+ void rtc_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
uint32_t ostimer_r(offs_t offset, uint32_t mem_mask = ~0);
void ostimer_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
uint32_t intc_r(offs_t offset, uint32_t mem_mask = ~0);
void intc_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
+ void gpio_bit_w(offs_t offset, uint8_t data, uint8_t mem_mask = ~0);
uint32_t gpio_r(offs_t offset, uint32_t mem_mask = ~0);
void gpio_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
uint32_t lcd_r(offs_t offset, uint32_t mem_mask = ~0);
void lcd_w(address_space &space, offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
-
- void set_irq_line(uint32_t line, int state);
+ uint32_t power_r(offs_t offset, uint32_t mem_mask = ~0);
+ void power_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
+ uint32_t clocks_r(offs_t offset, uint32_t mem_mask = ~0);
+ void clocks_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
protected:
virtual void device_add_mconfig(machine_config &config) override;
virtual void device_start() override;
virtual void device_reset() override;
+ virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override;
+
+ static const device_timer_id TIMER_DMA0 = 0;
+ static const device_timer_id TIMER_OSTIMER0 = 16;
+ static const device_timer_id TIMER_LCD_EOF0 = 20;
+ static const device_timer_id TIMER_RTC = 22;
void dma_irq_check();
void dma_load_descriptor_and_start(int channel);
@@ -68,11 +79,14 @@ protected:
uint32_t screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
- TIMER_CALLBACK_MEMBER(dma_dma_end);
- TIMER_CALLBACK_MEMBER(ostimer_match);
- TIMER_CALLBACK_MEMBER(lcd_dma_eof);
+ void dma_end_tick(int channel);
+ void ostimer_match_tick(int channel);
+ void lcd_dma_eof_tick(int channel);
+ void rtc_tick();
+
+ void set_irq_line(uint32_t line, int state);
- struct dma_regs_t
+ struct dma_regs
{
uint32_t dcsr[16];
uint32_t pad0[44];
@@ -91,7 +105,7 @@ protected:
emu_timer* timer[16];
};
- struct i2s_regs_t
+ struct i2s_regs
{
uint32_t sacr0;
uint32_t sacr1;
@@ -110,7 +124,16 @@ protected:
uint32_t sadr;
};
- struct ostmr_regs_t
+ struct rtc_regs
+ {
+ uint32_t rcnr;
+ uint32_t rtar;
+ uint32_t rtsr;
+ uint32_t rttr;
+ emu_timer *timer;
+ };
+
+ struct ostmr_regs
{
uint32_t osmr[4];
uint32_t oscr;
@@ -121,7 +144,7 @@ protected:
emu_timer* timer[4];
};
- struct intc_regs_t
+ struct intc_regs
{
uint32_t icip;
uint32_t icmr;
@@ -131,7 +154,7 @@ protected:
uint32_t iccr;
};
- struct gpio_regs_t
+ struct gpio_regs
{
uint32_t gplr0; // GPIO Pin-Level
uint32_t gplr1;
@@ -169,7 +192,7 @@ protected:
uint32_t gafr2u;
};
- struct lcd_dma_regs_t
+ struct lcd_dma_regs
{
uint32_t fdadr;
uint32_t fsadr;
@@ -178,32 +201,56 @@ protected:
emu_timer *eof;
};
- struct lcd_regs_t
+ struct lcd_regs
{
uint32_t lccr0;
uint32_t lccr1;
uint32_t lccr2;
uint32_t lccr3;
- uint32_t pad0[4];
uint32_t fbr[2];
- uint32_t pad1[4];
uint32_t lcsr;
uint32_t liidr;
uint32_t trgbr;
uint32_t tcr;
- uint32_t pad2[110];
- lcd_dma_regs_t dma[2];
+ lcd_dma_regs dma[2];
+ };
+
+ struct power_regs
+ {
+ uint32_t pmcr;
+ uint32_t pssr;
+ uint32_t pspr;
+ uint32_t pwer;
+ uint32_t prer;
+ uint32_t pfer;
+ uint32_t pedr;
+ uint32_t pcfr;
+ uint32_t pgsr0;
+ uint32_t pgsr1;
+ uint32_t pgsr2;
+ uint32_t rcsr;
+ uint32_t pmfw;
+ };
+
+ struct clocks_regs
+ {
+ uint32_t cccr;
+ uint32_t cken;
+ uint32_t oscc;
};
- dma_regs_t m_dma_regs;
- i2s_regs_t m_i2s_regs;
- ostmr_regs_t m_ostimer_regs;
- intc_regs_t m_intc_regs;
- gpio_regs_t m_gpio_regs;
- lcd_regs_t m_lcd_regs;
+ dma_regs m_dma_regs;
+ i2s_regs m_i2s_regs;
+ rtc_regs m_rtc_regs;
+ ostmr_regs m_ostimer_regs;
+ intc_regs m_intc_regs;
+ gpio_regs m_gpio_regs;
+ lcd_regs m_lcd_regs;
+ power_regs m_power_regs;
+ clocks_regs m_clocks_regs;
devcb_write32 m_gpio0_w;
devcb_write32 m_gpio1_w;