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Diffstat (limited to 'src/devices/machine/pdc.cpp')
-rw-r--r--src/devices/machine/pdc.cpp64
1 files changed, 25 insertions, 39 deletions
diff --git a/src/devices/machine/pdc.cpp b/src/devices/machine/pdc.cpp
index 20b0c627dc5..7bb3a4c763c 100644
--- a/src/devices/machine/pdc.cpp
+++ b/src/devices/machine/pdc.cpp
@@ -154,8 +154,8 @@ void pdc_device::pdc_io(address_map &map)
map(0x21, 0x2F).rw(FUNC(pdc_device::fdd_68k_r), FUNC(pdc_device::fdd_68k_w)).mirror(0xFF00);
map(0x38, 0x38).r(FUNC(pdc_device::p38_r)).mirror(0xFF00); // Possibly UPD765 interrupt
map(0x39, 0x39).r(FUNC(pdc_device::p39_r)).mirror(0xFF00); // HDD related
- map(0x3c, 0x3c).portr("SW2").mirror(0xFF00); /* FDC Dipswitch */
- map(0x3d, 0x3d).portr("SW1").mirror(0xFF00); /* HDC Dipswitch */
+ map(0x3c, 0x3c).portr(m_sw2).mirror(0xFF00); /* FDC Dipswitch */
+ map(0x3d, 0x3d).portr(m_sw1).mirror(0xFF00); /* HDC Dipswitch */
map(0x40, 0x41).rw(HDC_TAG, FUNC(hdc9224_device::read), FUNC(hdc9224_device::write)).mirror(0xFF00);
map(0x42, 0x43).m(m_fdc, FUNC(upd765a_device::map)).mirror(0xFF00);
map(0x50, 0x5f).w(FUNC(pdc_device::p50_5f_w)).mirror(0xFF00);
@@ -244,14 +244,6 @@ static void pdc_harddisks(device_slot_interface &device)
}
//-------------------------------------------------
-// FLOPPY_FORMATS( floppy_formats )
-//-------------------------------------------------
-
-FLOPPY_FORMATS_MEMBER( pdc_device::floppy_formats )
- FLOPPY_PC_FORMAT
-FLOPPY_FORMATS_END
-
-//-------------------------------------------------
// device_add_mconfig - add device configuration
//-------------------------------------------------
@@ -269,7 +261,7 @@ void pdc_device::device_add_mconfig(machine_config &config)
m_fdc->drq_wr_callback().set(m_dma8237, FUNC(am9517a_device::dreq0_w)); //.invert();
// Floppy disk drive
- FLOPPY_CONNECTOR(config, FDC_TAG":0", pdc_floppies, "35hd", pdc_device::floppy_formats);
+ FLOPPY_CONNECTOR(config, FDC_TAG":0", pdc_floppies, "35hd", floppy_image_device::default_pc_floppy_formats);
/* DMA Controller - Intel P8237A-5 */
/* Channel 0: uPD765a Floppy Disk Controller */
@@ -312,8 +304,10 @@ pdc_device::pdc_device(const machine_config &mconfig, const char *tag, device_t
m_fdc(*this, FDC_TAG),
m_hdc9224(*this, HDC_TAG),
m_pdc_ram(*this, "pdc_ram"),
- m_m68k_r_cb(*this),
- m_m68k_w_cb(*this)
+ m_m68k_r_cb(*this, 0),
+ m_m68k_w_cb(*this),
+ m_sw1(*this, "SW1"),
+ m_sw2(*this, "SW2")
{
}
@@ -323,10 +317,6 @@ pdc_device::pdc_device(const machine_config &mconfig, const char *tag, device_t
void pdc_device::device_start()
{
- /* Resolve callbacks */
- m_m68k_r_cb.resolve_safe(0);
- m_m68k_w_cb.resolve_safe();
-
/* Save States */
save_item(NAME(reg_p0));
save_item(NAME(reg_p1));
@@ -339,10 +329,6 @@ void pdc_device::device_start()
save_item(NAME(reg_p21));
save_item(NAME(reg_p38));
save_item(NAME(fdd_68k_dma_address));
-
- /* Resolve callbacks */
- m_m68k_r_cb.resolve_safe(0);
- m_m68k_w_cb.resolve_safe();
}
//-------------------------------------------------
@@ -366,43 +352,43 @@ void pdc_device::device_reset()
// I8237 DMA
//-------------------------------------------------
-WRITE_LINE_MEMBER(pdc_device::i8237_hreq_w)
+void pdc_device::i8237_hreq_w(int state)
{
m_pdccpu->set_input_line(INPUT_LINE_HALT, state ? ASSERT_LINE : CLEAR_LINE);
m_dma8237->hack_w(state);
}
-WRITE_LINE_MEMBER(pdc_device::i8237_eop_w)
+void pdc_device::i8237_eop_w(int state)
{
m_fdc->tc_w(state);
reg_p38 |= 4; /* ready for 68k ram DMA */
if(state) m_dma8237->dreq1_w(0);
}
-READ8_MEMBER(pdc_device::i8237_dma_mem_r)
+uint8_t pdc_device::i8237_dma_mem_r(offs_t offset)
{
return m_pdccpu->space(AS_PROGRAM).read_byte(offset);
}
-WRITE8_MEMBER(pdc_device::i8237_dma_mem_w)
+void pdc_device::i8237_dma_mem_w(offs_t offset, uint8_t data)
{
m_pdccpu->space(AS_PROGRAM).write_byte(offset,data);
}
-READ8_MEMBER(pdc_device::i8237_fdc_dma_r)
+uint8_t pdc_device::i8237_fdc_dma_r(offs_t offset)
{
uint8_t ret = m_fdc->dma_r();
if(TRACE_PDC_DMA) logerror("PDC: 8237 DMA CHANNEL 0 READ ADDRESS: %08X, DATA: %02X\n", offset, ret );
return ret;
}
-WRITE8_MEMBER(pdc_device::i8237_fdc_dma_w)
+void pdc_device::i8237_fdc_dma_w(offs_t offset, uint8_t data)
{
if(TRACE_PDC_DMA) logerror("PDC: 8237 DMA CHANNEL 0 WRITE ADDRESS: %08X, DATA: %02X\n", offset, data );
m_fdc->dma_w(data);
}
-READ8_MEMBER(pdc_device::m68k_dma_r)
+uint8_t pdc_device::m68k_dma_r()
{
uint32_t address;
uint8_t data;
@@ -413,23 +399,23 @@ READ8_MEMBER(pdc_device::m68k_dma_r)
return data;
}
-WRITE8_MEMBER(pdc_device::m68k_dma_w)
+void pdc_device::m68k_dma_w(uint8_t data)
{
if(TRACE_PDC_DMA) logerror("PDC: 8237 DMA CHANNEL 1 WRITE ADDRESS: %08X, DATA: %02X\n", fdd_68k_dma_address, data );
m_m68k_w_cb(data);
fdd_68k_dma_address++;
}
-WRITE_LINE_MEMBER(pdc_device::hdd_irq)
+void pdc_device::hdd_irq(int state)
{
m_pdccpu->set_input_line(INPUT_LINE_IRQ0, HOLD_LINE);
}
-WRITE_LINE_MEMBER(pdc_device::fdc_irq)
+void pdc_device::fdc_irq(int state)
{
b_fdc_irq = state != 0;
}
-READ8_MEMBER(pdc_device::p0_7_r)
+uint8_t pdc_device::p0_7_r(offs_t offset)
{
switch(offset)
{
@@ -457,7 +443,7 @@ READ8_MEMBER(pdc_device::p0_7_r)
}
}
-WRITE8_MEMBER(pdc_device::p0_7_w)
+void pdc_device::p0_7_w(offs_t offset, uint8_t data)
{
switch(offset)
{
@@ -477,7 +463,7 @@ WRITE8_MEMBER(pdc_device::p0_7_w)
}
}
-READ8_MEMBER(pdc_device::fdd_68k_r)
+uint8_t pdc_device::fdd_68k_r(offs_t offset)
{
uint8_t address = offset + 0x21;
switch(address)
@@ -487,7 +473,7 @@ READ8_MEMBER(pdc_device::fdd_68k_r)
return 0;
}
}
-WRITE8_MEMBER(pdc_device::fdd_68k_w)
+void pdc_device::fdd_68k_w(offs_t offset, uint8_t data)
{
uint8_t address = offset + 0x21;
switch(address)
@@ -533,21 +519,21 @@ WRITE8_MEMBER(pdc_device::fdd_68k_w)
}
}
-WRITE8_MEMBER(pdc_device::p38_w)
+void pdc_device::p38_w(uint8_t data)
{
if(TRACE_PDC_CMD) logerror("PDC: Port 0x38 WRITE: %i\n", data);
//reg_p38 |= data;
reg_p38 = data;
}
-READ8_MEMBER(pdc_device::p38_r)
+uint8_t pdc_device::p38_r()
{
reg_p38 ^= 0x20; /* Invert bit 5 (32) */
if(TRACE_PDC_CMD) logerror("PDC: Port 0x38 READ: %02X %s\n", reg_p38, machine().describe_context());
return reg_p38;
}
-READ8_MEMBER(pdc_device::p39_r)
+uint8_t pdc_device::p39_r()
{
uint8_t data = 1;
if(b_fdc_irq) data |= 8; // Set bit 3
@@ -555,7 +541,7 @@ READ8_MEMBER(pdc_device::p39_r)
return data;
}
-WRITE8_MEMBER(pdc_device::p50_5f_w)
+void pdc_device::p50_5f_w(offs_t offset, uint8_t data)
{
uint8_t address = 0x50 + offset;
switch(address)