diff options
Diffstat (limited to 'src/devices/machine/pci.cpp')
-rw-r--r-- | src/devices/machine/pci.cpp | 156 |
1 files changed, 78 insertions, 78 deletions
diff --git a/src/devices/machine/pci.cpp b/src/devices/machine/pci.cpp index 289940d353a..55fdfcdfce9 100644 --- a/src/devices/machine/pci.cpp +++ b/src/devices/machine/pci.cpp @@ -129,21 +129,21 @@ void pci_device::unmapped_w(offs_t offset, uint32_t data, uint32_t mem_mask, int logerror("%s: unmapped write to %08x = %08x & %08x (%s)\n", machine().describe_context(), offset*4, data, mem_mask, bank_infos[bank].map.name()); } -READ32_MEMBER(pci_device::unmapped0_r) { return unmapped_r(offset, mem_mask, 0); } -WRITE32_MEMBER(pci_device::unmapped0_w) { return unmapped_w(offset, data, mem_mask, 0); } -READ32_MEMBER(pci_device::unmapped1_r) { return unmapped_r(offset, mem_mask, 1); } -WRITE32_MEMBER(pci_device::unmapped1_w) { return unmapped_w(offset, data, mem_mask, 1); } -READ32_MEMBER(pci_device::unmapped2_r) { return unmapped_r(offset, mem_mask, 2); } -WRITE32_MEMBER(pci_device::unmapped2_w) { return unmapped_w(offset, data, mem_mask, 2); } -READ32_MEMBER(pci_device::unmapped3_r) { return unmapped_r(offset, mem_mask, 3); } -WRITE32_MEMBER(pci_device::unmapped3_w) { return unmapped_w(offset, data, mem_mask, 3); } -READ32_MEMBER(pci_device::unmapped4_r) { return unmapped_r(offset, mem_mask, 4); } -WRITE32_MEMBER(pci_device::unmapped4_w) { return unmapped_w(offset, data, mem_mask, 4); } -READ32_MEMBER(pci_device::unmapped5_r) { return unmapped_r(offset, mem_mask, 5); } -WRITE32_MEMBER(pci_device::unmapped5_w) { return unmapped_w(offset, data, mem_mask, 5); } - - -READ32_MEMBER(pci_device::address_base_r) +uint32_t pci_device::unmapped0_r(offs_t offset, uint32_t mem_mask) { return unmapped_r(offset, mem_mask, 0); } +void pci_device::unmapped0_w(offs_t offset, uint32_t data, uint32_t mem_mask) { return unmapped_w(offset, data, mem_mask, 0); } +uint32_t pci_device::unmapped1_r(offs_t offset, uint32_t mem_mask) { return unmapped_r(offset, mem_mask, 1); } +void pci_device::unmapped1_w(offs_t offset, uint32_t data, uint32_t mem_mask) { return unmapped_w(offset, data, mem_mask, 1); } +uint32_t pci_device::unmapped2_r(offs_t offset, uint32_t mem_mask) { return unmapped_r(offset, mem_mask, 2); } +void pci_device::unmapped2_w(offs_t offset, uint32_t data, uint32_t mem_mask) { return unmapped_w(offset, data, mem_mask, 2); } +uint32_t pci_device::unmapped3_r(offs_t offset, uint32_t mem_mask) { return unmapped_r(offset, mem_mask, 3); } +void pci_device::unmapped3_w(offs_t offset, uint32_t data, uint32_t mem_mask) { return unmapped_w(offset, data, mem_mask, 3); } +uint32_t pci_device::unmapped4_r(offs_t offset, uint32_t mem_mask) { return unmapped_r(offset, mem_mask, 4); } +void pci_device::unmapped4_w(offs_t offset, uint32_t data, uint32_t mem_mask) { return unmapped_w(offset, data, mem_mask, 4); } +uint32_t pci_device::unmapped5_r(offs_t offset, uint32_t mem_mask) { return unmapped_r(offset, mem_mask, 5); } +void pci_device::unmapped5_w(offs_t offset, uint32_t data, uint32_t mem_mask) { return unmapped_w(offset, data, mem_mask, 5); } + + +uint32_t pci_device::address_base_r(offs_t offset) { if(bank_reg_infos[offset].bank == -1) return 0; @@ -154,7 +154,7 @@ READ32_MEMBER(pci_device::address_base_r) return (bank_infos[bid].adr & ~(bank_infos[bid].size - 1)) | (flags & M_IO ? 1 : 0) | (flags & M_64A ? 4 : 0) | (flags & M_PREF ? 8 : 0); } -WRITE32_MEMBER(pci_device::address_base_w) +void pci_device::address_base_w(offs_t offset, uint32_t data) { if(bank_reg_infos[offset].bank == -1) { logerror("write to address base (%d, %08x) not linked to any bank\n", offset, data); @@ -170,22 +170,22 @@ WRITE32_MEMBER(pci_device::address_base_w) remap_cb(); } -READ16_MEMBER(pci_device::vendor_r) +uint16_t pci_device::vendor_r() { return main_id >> 16; } -READ16_MEMBER(pci_device::device_r) +uint16_t pci_device::device_r() { return main_id; } -READ16_MEMBER(pci_device::command_r) +uint16_t pci_device::command_r() { return command; } -WRITE16_MEMBER(pci_device::command_w) +void pci_device::command_w(offs_t offset, uint16_t data, uint16_t mem_mask) { uint16_t old = command; @@ -196,22 +196,22 @@ WRITE16_MEMBER(pci_device::command_w) remap_cb(); } -READ16_MEMBER(pci_device::status_r) +uint16_t pci_device::status_r() { return status; } -READ32_MEMBER(pci_device::class_rev_r) +uint32_t pci_device::class_rev_r() { return (pclass << 8) | revision; } -READ8_MEMBER(pci_device::cache_line_size_r) +uint8_t pci_device::cache_line_size_r() { return 0x00; } -READ8_MEMBER(pci_device::latency_timer_r) +uint8_t pci_device::latency_timer_r() { return 0x00; } @@ -226,28 +226,28 @@ uint8_t pci_device::header_type_r() return is_multifunction_device ? 0x80 : 0x00; } -READ8_MEMBER(pci_device::bist_r) +uint8_t pci_device::bist_r() { return 0x00; } -READ16_MEMBER(pci_device::subvendor_r) +uint16_t pci_device::subvendor_r() { return subsystem_id >> 16; } -READ16_MEMBER(pci_device::subsystem_r) +uint16_t pci_device::subsystem_r() { return subsystem_id; } -READ32_MEMBER(pci_device::expansion_base_r) +uint32_t pci_device::expansion_base_r() { return expansion_rom_base; } -WRITE32_MEMBER(pci_device::expansion_base_w) +void pci_device::expansion_base_w(offs_t offset, uint32_t data, uint32_t mem_mask) { COMBINE_DATA(&expansion_rom_base); if(!expansion_rom_size) @@ -259,30 +259,30 @@ WRITE32_MEMBER(pci_device::expansion_base_w) remap_cb(); } -READ8_MEMBER(pci_device::capptr_r) +uint8_t pci_device::capptr_r() { return 0x00; } -READ8_MEMBER(pci_device::interrupt_line_r) +uint8_t pci_device::interrupt_line_r() { logerror("interrupt_line_r = %02x\n", intr_line); return intr_line; } -WRITE8_MEMBER(pci_device::interrupt_line_w) +void pci_device::interrupt_line_w(offs_t offset, uint8_t data, uint8_t mem_mask) { COMBINE_DATA(&intr_line); logerror("interrupt_line_w %02x\n", data); } -READ8_MEMBER(pci_device::interrupt_pin_r) +uint8_t pci_device::interrupt_pin_r() { logerror("interrupt_pin_r = %02x\n", intr_pin); return intr_pin; } -WRITE8_MEMBER(pci_device::interrupt_pin_w) +void pci_device::interrupt_pin_w(offs_t offset, uint8_t data, uint8_t mem_mask) { COMBINE_DATA(&intr_pin); logerror("interrupt_pin_w = %02x\n", data); @@ -326,12 +326,12 @@ void pci_device::map_device(uint64_t memory_window_start, uint64_t memory_window } uint64_t end = start + bi.size-1; switch(i) { - case 0: space->install_readwrite_handler(start, end, read32_delegate(*this, FUNC(pci_device::unmapped0_r)), write32_delegate(*this, FUNC(pci_device::unmapped0_w))); break; - case 1: space->install_readwrite_handler(start, end, read32_delegate(*this, FUNC(pci_device::unmapped1_r)), write32_delegate(*this, FUNC(pci_device::unmapped1_w))); break; - case 2: space->install_readwrite_handler(start, end, read32_delegate(*this, FUNC(pci_device::unmapped2_r)), write32_delegate(*this, FUNC(pci_device::unmapped2_w))); break; - case 3: space->install_readwrite_handler(start, end, read32_delegate(*this, FUNC(pci_device::unmapped3_r)), write32_delegate(*this, FUNC(pci_device::unmapped3_w))); break; - case 4: space->install_readwrite_handler(start, end, read32_delegate(*this, FUNC(pci_device::unmapped4_r)), write32_delegate(*this, FUNC(pci_device::unmapped4_w))); break; - case 5: space->install_readwrite_handler(start, end, read32_delegate(*this, FUNC(pci_device::unmapped5_r)), write32_delegate(*this, FUNC(pci_device::unmapped5_w))); break; + case 0: space->install_readwrite_handler(start, end, read32s_delegate(*this, FUNC(pci_device::unmapped0_r)), write32s_delegate(*this, FUNC(pci_device::unmapped0_w))); break; + case 1: space->install_readwrite_handler(start, end, read32s_delegate(*this, FUNC(pci_device::unmapped1_r)), write32s_delegate(*this, FUNC(pci_device::unmapped1_w))); break; + case 2: space->install_readwrite_handler(start, end, read32s_delegate(*this, FUNC(pci_device::unmapped2_r)), write32s_delegate(*this, FUNC(pci_device::unmapped2_w))); break; + case 3: space->install_readwrite_handler(start, end, read32s_delegate(*this, FUNC(pci_device::unmapped3_r)), write32s_delegate(*this, FUNC(pci_device::unmapped3_w))); break; + case 4: space->install_readwrite_handler(start, end, read32s_delegate(*this, FUNC(pci_device::unmapped4_r)), write32s_delegate(*this, FUNC(pci_device::unmapped4_w))); break; + case 5: space->install_readwrite_handler(start, end, read32s_delegate(*this, FUNC(pci_device::unmapped5_r)), write32s_delegate(*this, FUNC(pci_device::unmapped5_w))); break; } space->install_device_delegate(start, end, *bi.device, bi.map); @@ -629,191 +629,191 @@ void pci_bridge_device::config_write(uint8_t bus, uint8_t device, uint16_t reg, propagate_config_write(bus, device, reg, data, mem_mask); } -READ32_MEMBER (pci_bridge_device::b_address_base_r) +uint32_t pci_bridge_device::b_address_base_r(offs_t offset) { logerror("b_address_base_r %d\n", offset); return 0xffffffff; } -WRITE32_MEMBER(pci_bridge_device::b_address_base_w) +void pci_bridge_device::b_address_base_w(offs_t offset, uint32_t data) { logerror("b_address_base_w %d, %08x\n", offset, data); } -READ8_MEMBER (pci_bridge_device::primary_bus_r) +uint8_t pci_bridge_device::primary_bus_r() { logerror("primary_bus_r\n"); return primary_bus; } -WRITE8_MEMBER (pci_bridge_device::primary_bus_w) +void pci_bridge_device::primary_bus_w(uint8_t data) { primary_bus = data; logerror("primary_bus_w %02x\n", data); } -READ8_MEMBER (pci_bridge_device::secondary_bus_r) +uint8_t pci_bridge_device::secondary_bus_r() { logerror("secondary_bus_r\n"); return secondary_bus; } -WRITE8_MEMBER (pci_bridge_device::secondary_bus_w) +void pci_bridge_device::secondary_bus_w(uint8_t data) { secondary_bus = data; logerror("secondary_bus_w %02x\n", data); } -READ8_MEMBER (pci_bridge_device::subordinate_bus_r) +uint8_t pci_bridge_device::subordinate_bus_r() { logerror("subordinate_bus_r\n"); return subordinate_bus; } -WRITE8_MEMBER (pci_bridge_device::subordinate_bus_w) +void pci_bridge_device::subordinate_bus_w(uint8_t data) { subordinate_bus = data; logerror("subordinate_bus_w %02x\n", data); } -READ8_MEMBER (pci_bridge_device::secondary_latency_r) +uint8_t pci_bridge_device::secondary_latency_r() { logerror("secondary_latency_r\n"); return 0xff; } -WRITE8_MEMBER (pci_bridge_device::secondary_latency_w) +void pci_bridge_device::secondary_latency_w(uint8_t data) { logerror("secondary_latency_w %02x\n", data); } -READ8_MEMBER (pci_bridge_device::iobase_r) +uint8_t pci_bridge_device::iobase_r() { return iobase; } -WRITE8_MEMBER (pci_bridge_device::iobase_w) +void pci_bridge_device::iobase_w(uint8_t data) { iobase = data; logerror("iobase_w %02x\n", data); } -READ8_MEMBER (pci_bridge_device::iolimit_r) +uint8_t pci_bridge_device::iolimit_r() { return iolimit; } -WRITE8_MEMBER (pci_bridge_device::iolimit_w) +void pci_bridge_device::iolimit_w(uint8_t data) { iolimit = data; logerror("iolimit_w %02x\n", data); } -READ16_MEMBER (pci_bridge_device::secondary_status_r) +uint16_t pci_bridge_device::secondary_status_r() { logerror("secondary_status_r\n"); return 0xffff; } -WRITE16_MEMBER(pci_bridge_device::secondary_status_w) +void pci_bridge_device::secondary_status_w(uint16_t data) { logerror("secondary_status_w %04x\n", data); } -READ16_MEMBER (pci_bridge_device::memory_base_r) +uint16_t pci_bridge_device::memory_base_r() { return memory_base; } -WRITE16_MEMBER(pci_bridge_device::memory_base_w) +void pci_bridge_device::memory_base_w(offs_t offset, uint16_t data, uint16_t mem_mask) { COMBINE_DATA(&memory_base); logerror("memory_base_w %04x\n", memory_base); } -READ16_MEMBER (pci_bridge_device::memory_limit_r) +uint16_t pci_bridge_device::memory_limit_r() { return memory_limit; } -WRITE16_MEMBER(pci_bridge_device::memory_limit_w) +void pci_bridge_device::memory_limit_w(offs_t offset, uint16_t data, uint16_t mem_mask) { COMBINE_DATA(&memory_limit); logerror("memory_limit_w %04x\n", memory_limit); } -READ16_MEMBER (pci_bridge_device::prefetch_base_r) +uint16_t pci_bridge_device::prefetch_base_r() { return prefetch_base; } -WRITE16_MEMBER(pci_bridge_device::prefetch_base_w) +void pci_bridge_device::prefetch_base_w(offs_t offset, uint16_t data, uint16_t mem_mask) { COMBINE_DATA(&prefetch_base); logerror("prefetch_base_w %04x\n", prefetch_base); } -READ16_MEMBER (pci_bridge_device::prefetch_limit_r) +uint16_t pci_bridge_device::prefetch_limit_r() { return prefetch_limit; } -WRITE16_MEMBER(pci_bridge_device::prefetch_limit_w) +void pci_bridge_device::prefetch_limit_w(offs_t offset, uint16_t data, uint16_t mem_mask) { COMBINE_DATA(&prefetch_limit); logerror("prefetch_limit_w %04x\n", prefetch_limit); } -READ32_MEMBER (pci_bridge_device::prefetch_baseu_r) +uint32_t pci_bridge_device::prefetch_baseu_r() { return prefetch_baseu; } -WRITE32_MEMBER(pci_bridge_device::prefetch_baseu_w) +void pci_bridge_device::prefetch_baseu_w(offs_t offset, uint32_t data, uint32_t mem_mask) { COMBINE_DATA(&prefetch_baseu); logerror("prefetch_baseu_w %08x\n", prefetch_baseu); } -READ32_MEMBER (pci_bridge_device::prefetch_limitu_r) +uint32_t pci_bridge_device::prefetch_limitu_r() { return prefetch_limitu; } -WRITE32_MEMBER(pci_bridge_device::prefetch_limitu_w) +void pci_bridge_device::prefetch_limitu_w(offs_t offset, uint32_t data, uint32_t mem_mask) { COMBINE_DATA(&prefetch_limitu); logerror("prefetch_limitu_w %08x\n", prefetch_limitu); } -READ16_MEMBER (pci_bridge_device::iobaseu_r) +uint16_t pci_bridge_device::iobaseu_r() { return iobaseu; } -WRITE16_MEMBER(pci_bridge_device::iobaseu_w) +void pci_bridge_device::iobaseu_w(offs_t offset, uint16_t data, uint16_t mem_mask) { COMBINE_DATA(&iobaseu); logerror("iobaseu_w %04x\n", iobaseu); } -READ16_MEMBER (pci_bridge_device::iolimitu_r) +uint16_t pci_bridge_device::iolimitu_r() { return iolimitu; } -WRITE16_MEMBER(pci_bridge_device::iolimitu_w) +void pci_bridge_device::iolimitu_w(offs_t offset, uint16_t data, uint16_t mem_mask) { COMBINE_DATA(&iolimitu); logerror("iolimitu_w %04x\n", iolimitu); } -READ16_MEMBER (pci_bridge_device::bridge_control_r) +uint16_t pci_bridge_device::bridge_control_r() { return bridge_control; } -WRITE16_MEMBER(pci_bridge_device::bridge_control_w) +void pci_bridge_device::bridge_control_w(offs_t offset, uint16_t data, uint16_t mem_mask) { COMBINE_DATA(&bridge_control); logerror("bridge_control_w %04x\n", bridge_control); @@ -888,22 +888,22 @@ void pci_host_device::regenerate_mapping() io_window_start, io_window_end, io_offset, io_space); } -READ32_MEMBER(pci_host_device::config_address_r) +uint32_t pci_host_device::config_address_r() { return config_address; } -WRITE32_MEMBER(pci_host_device::config_address_w) +void pci_host_device::config_address_w(offs_t offset, uint32_t data, uint32_t mem_mask) { COMBINE_DATA(&config_address); } -READ32_MEMBER(pci_host_device::config_data_r) +uint32_t pci_host_device::config_data_r(offs_t offset, uint32_t mem_mask) { return config_address & 0x80000000 ? root_config_read((config_address >> 16) & 0xff, (config_address >> 8) & 0xff, config_address & 0xfc, mem_mask) : 0xffffffff; } -WRITE32_MEMBER(pci_host_device::config_data_w) +void pci_host_device::config_data_w(offs_t offset, uint32_t data, uint32_t mem_mask) { if(config_address & 0x80000000) root_config_write((config_address >> 16) & 0xff, (config_address >> 8) & 0xff, config_address & 0xfc, data, mem_mask); |