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-rw-r--r--src/devices/machine/k056230.cpp170
1 files changed, 120 insertions, 50 deletions
diff --git a/src/devices/machine/k056230.cpp b/src/devices/machine/k056230.cpp
index 68f1a718197..487a26da35d 100644
--- a/src/devices/machine/k056230.cpp
+++ b/src/devices/machine/k056230.cpp
@@ -1,6 +1,6 @@
// license:BSD-3-Clause
// copyright-holders:Fabio Priuli
-/***************************************************************************
+/**************************************************************************************************
Konami IC 056230 (LANC)
@@ -12,9 +12,11 @@ Device Notes:
-PAL(056787A) for zr107.cpp, gticlub.cpp and thunderh's I/O board
-HYC2485S RS485 transceiver
-TODO: nearly everything
+TODO:
+- nearly everything, currently a wrapper to make games happy and don't fail POSTs
+- LANC part name for konami/viper.cpp
-***************************************************************************/
+**************************************************************************************************/
#include "emu.h"
@@ -31,58 +33,53 @@ TODO: nearly everything
#include "logmacro.h"
DEFINE_DEVICE_TYPE(K056230, k056230_device, "k056230", "K056230 LANC")
+DEFINE_DEVICE_TYPE(K056230_VIPER, k056230_viper_device, "k056230_viper", "Konami Viper LANC")
-
-k056230_device::k056230_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
- : device_t(mconfig, K056230, tag, owner, clock)
+k056230_device::k056230_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock)
+ : device_t(mconfig, type, tag, owner, clock)
, m_ram(*this, "lanc_ram", 0x800U * 4, ENDIANNESS_BIG)
, m_irq_cb(*this)
{
}
-void k056230_device::device_start()
+k056230_device::k056230_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
+ : k056230_device(mconfig, K056230, tag, owner, clock)
{
- m_irq_state = CLEAR_LINE;
+}
+void k056230_device::device_start()
+{
save_item(NAME(m_irq_state));
+ save_item(NAME(m_status));
}
-u8 k056230_device::regs_r(offs_t offset)
+void k056230_device::device_reset()
{
- u8 data = 0;
-
- switch (offset)
- {
- case 0: // Status register
- data = 0x08;
- LOGMASKED(LOG_REG_READS, "%s: regs_r: Status Register: %02x\n", machine().describe_context(), data);
- break;
-
- case 1: // CRC Error register
- data = 0x00;
- LOGMASKED(LOG_REG_READS, "%s: regs_r: CRC Error Register: %02x\n", machine().describe_context(), data);
- break;
-
- default:
- LOGMASKED(LOG_REG_READS, "%s: regs_r: Unknown Register [%02x]: %02x\n", machine().describe_context(), offset, data);
- break;
- }
-
- return data;
+ m_irq_state = CLEAR_LINE;
+ m_status = 0x08;
}
-void k056230_device::regs_w(offs_t offset, u8 data)
+void k056230_device::regs_map(address_map &map)
{
- switch (offset)
- {
- case 0: // Mode register
- LOGMASKED(LOG_REG_WRITES, "%s: regs_w: Mode Register = %02x\n", machine().describe_context(), data);
- break;
-
- case 1: // Control register
- {
- LOGMASKED(LOG_REG_WRITES, "%s: regs_w: Control Register = %02x\n", machine().describe_context(), data);
- // TODO: This is a literal translation of the previous device behaviour, and seems pretty likely to be incorrect.
+ map(0x00, 0x00).lrw8(
+ NAME([this] (offs_t offset) {
+ LOGMASKED(LOG_REG_READS, "%s: Status Register read %02x\n", machine().describe_context(), m_status);
+ return m_status;
+ }),
+ NAME([this] (offs_t offset, u8 data) {
+ LOGMASKED(LOG_REG_WRITES, "%s: Mode Register read %02x\n", machine().describe_context(), data);
+ })
+ ),
+ map(0x01, 0x01).lrw8(
+ NAME([this] (offs_t offset) {
+ const u8 res = 0x00;
+ LOGMASKED(LOG_REG_READS, "%s: CRC Error Register read %02x\n", machine().describe_context(), res);
+ return res;
+ }),
+ NAME([this] (offs_t offset, u8 data) {
+ LOGMASKED(LOG_REG_WRITES, "%s: Control Register write %02x\n", machine().describe_context(), data);
+ // TODO: This is a literal translation of the previous device behaviour, and is incorrect.
+ // Namely it can't possibly ping irq state on the fly, needs some transaction from the receiver.
const int old_state = m_irq_state;
if (BIT(data, 5))
{
@@ -98,17 +95,13 @@ void k056230_device::regs_w(offs_t offset, u8 data)
{
m_irq_cb(m_irq_state);
}
- break;
- }
-
- case 2: // Sub ID register
+ })
+ );
+ map(0x02, 0x02).lw8(
+ NAME([this] (offs_t offset, u8 data) {
LOGMASKED(LOG_REG_WRITES, "%s: regs_w: Sub ID Register = %02x\n", machine().describe_context(), data);
- break;
-
- default:
- LOGMASKED(LOG_REG_WRITES | LOG_UNKNOWNS, "%s: regs_w: Unknown Register [%02x] = %02x\n", machine().describe_context(), offset, data);
- break;
- }
+ })
+ );
}
u32 k056230_device::ram_r(offs_t offset, u32 mem_mask)
@@ -125,3 +118,80 @@ void k056230_device::ram_w(offs_t offset, u32 data, u32 mem_mask)
LOGMASKED(LOG_RAM_WRITES, "%s: Network RAM write [%04x (%03x)] = %08x & %08x\n", machine().describe_context(), offset << 2, (offset & 0x7ff) << 2, data, mem_mask);
COMBINE_DATA(&lanc_ram[offset & 0x7ff]);
}
+
+/****************************************
+ *
+ * konami/viper.cpp superset overrides
+ *
+ ***************************************/
+
+k056230_viper_device::k056230_viper_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
+ : k056230_device(mconfig, K056230_VIPER, tag, owner, clock)
+{
+}
+
+void k056230_viper_device::device_reset()
+{
+ k056230_device::device_reset();
+ m_control = 0;
+ m_irq_enable = false;
+ m_unk[0] = m_unk[1] = 0;
+}
+
+void k056230_viper_device::regs_map(address_map &map)
+{
+ map(0x00, 0x00).lw8(
+ NAME([this] (offs_t offset, u8 data) {
+ LOGMASKED(LOG_REG_WRITES, "%s: network_id_w = %02x\n", machine().describe_context(), data);
+ })
+ );
+ map(0x01, 0x01).lw8(
+ NAME([this] (offs_t offset, u8 data) {
+ // HACK: more irq bad juju
+ if (!BIT(data, 0))
+ {
+ m_status = 0;
+ m_irq_state = CLEAR_LINE;
+ }
+ else
+ {
+ if(m_irq_enable)
+ m_irq_state = ASSERT_LINE;
+ }
+
+ if (BIT(data, 3))
+ m_status = 0x10;
+
+ m_irq_cb(m_irq_state);
+
+ // TODO: is this readback-able?
+ m_control = data;
+ LOGMASKED(LOG_REG_WRITES, "%s: control_w: %02x\n", machine().describe_context(), m_control);
+ })
+ );
+ map(0x02, 0x02).lr8(
+ NAME([this] (offs_t offset) {
+ LOGMASKED(LOG_REG_READS, "%s: status_r: %02x\n", machine().describe_context(), m_status);
+ return m_status;
+ })
+ );
+ // TODO: unknown regs
+ map(0x03, 0x04).lrw8(
+ NAME([this] (offs_t offset) {
+ LOGMASKED(LOG_REG_READS, "%s: unk%d_r\n", machine().describe_context(), offset + 3, m_unk[offset]);
+ return m_unk[offset];
+ }),
+ NAME([this] (offs_t offset, u8 data) {
+ LOGMASKED(LOG_REG_WRITES, "%s: unk%d_w %02x\n", machine().describe_context(), offset + 3, m_unk[offset], data);
+ m_unk[offset] = data;
+ })
+ );
+ map(0x05, 0x05).lw8(
+ NAME([this] (offs_t offset, u8 data) {
+ // TODO: should sync if an irq is already there
+ m_irq_enable = bool(BIT(data, 0));
+ LOGMASKED(LOG_REG_WRITES, "%s: irq enable: %02x\n", machine().describe_context(), data);
+ })
+ );
+}
+