diff options
Diffstat (limited to 'src/devices/cpu')
-rw-r--r-- | src/devices/cpu/mips/mips1dsm.cpp | 158 | ||||
-rw-r--r-- | src/devices/cpu/mips/mips3dsm.cpp | 202 | ||||
-rw-r--r-- | src/devices/cpu/psx/psxdasm.cpp | 125 | ||||
-rw-r--r-- | src/devices/cpu/rsp/rsp_dasm.cpp | 32 |
4 files changed, 306 insertions, 211 deletions
diff --git a/src/devices/cpu/mips/mips1dsm.cpp b/src/devices/cpu/mips/mips1dsm.cpp index 8fd3af7b5e9..563e9e1715a 100644 --- a/src/devices/cpu/mips/mips1dsm.cpp +++ b/src/devices/cpu/mips/mips1dsm.cpp @@ -84,10 +84,12 @@ const char *const mips1_disassembler::ccreg[4][32] = std::string mips1_disassembler::signed_16bit(int16_t val) { - if (val < 0) - return util::string_format("-$%x", -val); + if (val >= -9 && val <= 9) + return util::string_format("%d", val); + else if (val < 0) + return util::string_format("-0x%x", -val); else - return util::string_format("$%x", val); + return util::string_format("0x%x", val); } uint32_t mips1_disassembler::dasm_cop(uint32_t pc, int cop, uint32_t op, std::ostream &stream) @@ -105,11 +107,9 @@ uint32_t mips1_disassembler::dasm_cop(uint32_t pc, int cop, uint32_t op, std::os case 0x08: /* BC */ switch (rt) { - case 0x00: util::stream_format(stream, "bc%df $%08x", cop, pc + 4 + ((int16_t)op << 2)); flags = STEP_COND | step_over_extra(1); break; - case 0x01: util::stream_format(stream, "bc%dt $%08x", cop, pc + 4 + ((int16_t)op << 2)); flags = STEP_COND | step_over_extra(1); break; - case 0x02: util::stream_format(stream, "bc%dfl [invalid]", cop); break; - case 0x03: util::stream_format(stream, "bc%dtl [invalid]", cop); break; - default: util::stream_format(stream, "dc.l $%08x [invalid]", op); break; + case 0x00: util::stream_format(stream, "bc%df 0x%08x", cop, pc + 4 + ((int16_t)op << 2)); flags = STEP_COND | step_over_extra(1); break; + case 0x01: util::stream_format(stream, "bc%dt 0x%08x", cop, pc + 4 + ((int16_t)op << 2)); flags = STEP_COND | step_over_extra(1); break; + default: util::stream_format(stream, ".word 0x%08x /*invalid*/", op); break; } break; case 0x10: @@ -137,14 +137,13 @@ uint32_t mips1_disassembler::dasm_cop(uint32_t pc, int cop, uint32_t op, std::os case 0x06: util::stream_format(stream, "tlbwr"); break; case 0x08: util::stream_format(stream, "tlbp"); break; case 0x10: util::stream_format(stream, "rfe"); break; - case 0x18: util::stream_format(stream, "eret [invalid]"); break; - default: util::stream_format(stream, "cop%d $%07x", cop, op & 0x01ffffff); break; + default: util::stream_format(stream, "cop%d 0x%07x", cop, op & 0x01ffffff); break; } } else - util::stream_format(stream, "cop%d $%07x", cop, op & 0x01ffffff); + util::stream_format(stream, "cop%d 0x%07x", cop, op & 0x01ffffff); break; - default: util::stream_format(stream, "dc.l $%08x [invalid]", op); break; + default: util::stream_format(stream, ".word 0x%08x /*invalid*/", op); break; } return flags; @@ -176,10 +175,10 @@ uint32_t mips1_disassembler::dasm_cop1(uint32_t pc, uint32_t op, std::ostream &s case 0x08: /* BC */ switch (rt & 3) { - case 0x00: util::stream_format(stream, "bc1f $%08x,%d", pc + 4 + ((int16_t)op << 2), (op >> 18) & 7); flags = STEP_COND | step_over_extra(1); break; - case 0x01: util::stream_format(stream, "bc1t $%08x,%d", pc + 4 + ((int16_t)op << 2), (op >> 18) & 7); flags = STEP_COND | step_over_extra(1); break; - case 0x02: util::stream_format(stream, "bc1fl $%08x,%d", pc + 4 + ((int16_t)op << 2), (op >> 18) & 7); flags = STEP_COND | step_over_extra(1); break; - case 0x03: util::stream_format(stream, "bc1tl $%08x,%d", pc + 4 + ((int16_t)op << 2), (op >> 18) & 7); flags = STEP_COND | step_over_extra(1); break; + case 0x00: util::stream_format(stream, "bc1f 0x%08x,%d", pc + 4 + ((int16_t)op << 2), (op >> 18) & 7); flags = STEP_COND | step_over_extra(1); break; + case 0x01: util::stream_format(stream, "bc1t 0x%08x,%d", pc + 4 + ((int16_t)op << 2), (op >> 18) & 7); flags = STEP_COND | step_over_extra(1); break; + case 0x02: util::stream_format(stream, "bc1fl 0x%08x,%d", pc + 4 + ((int16_t)op << 2), (op >> 18) & 7); flags = STEP_COND | step_over_extra(1); break; + case 0x03: util::stream_format(stream, "bc1tl 0x%08x,%d", pc + 4 + ((int16_t)op << 2), (op >> 18) & 7); flags = STEP_COND | step_over_extra(1); break; } break; default: /* COP */ @@ -226,7 +225,7 @@ uint32_t mips1_disassembler::dasm_cop1(uint32_t pc, uint32_t op, std::ostream &s case 0x3d: util::stream_format(stream, "c.nge.%s %s,%s,%d", fmt, cpreg[1][fs], cpreg[1][ft], (op >> 8) & 7); break; case 0x3e: util::stream_format(stream, "c.le.%s %s,%s,%d", fmt, cpreg[1][fs], cpreg[1][ft], (op >> 8) & 7); break; case 0x3f: util::stream_format(stream, "c.ngt.%s %s,%s,%d", fmt, cpreg[1][fs], cpreg[1][ft], (op >> 8) & 7); break; - default: util::stream_format(stream, "cop1 $%07x", op & 0x01ffffff); break; + default: util::stream_format(stream, "cop1 0x%07x", op & 0x01ffffff); break; } break; } @@ -257,7 +256,7 @@ offs_t mips1_disassembler::disassemble(std::ostream &stream, offs_t pc, const da case 0x04: util::stream_format(stream, "sllv %s,%s,%s", reg[rd], reg[rt], reg[rs]); break; case 0x06: util::stream_format(stream, "srlv %s,%s,%s", reg[rd], reg[rt], reg[rs]); break; case 0x07: util::stream_format(stream, "srav %s,%s,%s", reg[rd], reg[rt], reg[rs]); break; - case 0x08: util::stream_format(stream, "jr %s", reg[rs]); if (rs == 31) flags = STEP_OUT; break; + case 0x08: util::stream_format(stream, "jr %s", reg[rs]); if (rs == 31) flags = STEP_OUT | step_over_extra(1); break; case 0x09: if (rd == 31) util::stream_format(stream, "jalr %s", reg[rs]); else @@ -266,7 +265,6 @@ offs_t mips1_disassembler::disassemble(std::ostream &stream, offs_t pc, const da break; case 0x0c: util::stream_format(stream, "syscall"); flags = STEP_OVER; break; case 0x0d: util::stream_format(stream, "break"); flags = STEP_OVER; break; - case 0x0f: util::stream_format(stream, "sync [invalid]"); break; case 0x10: util::stream_format(stream, "mfhi %s", reg[rd]); break; case 0x11: util::stream_format(stream, "mthi %s", reg[rs]); break; case 0x12: util::stream_format(stream, "mflo %s", reg[rd]); break; @@ -276,75 +274,96 @@ offs_t mips1_disassembler::disassemble(std::ostream &stream, offs_t pc, const da case 0x1a: util::stream_format(stream, "div %s,%s", reg[rs], reg[rt]); break; case 0x1b: util::stream_format(stream, "divu %s,%s", reg[rs], reg[rt]); break; case 0x20: util::stream_format(stream, "add %s,%s,%s", reg[rd], reg[rs], reg[rt]); break; - case 0x21: util::stream_format(stream, "addu %s,%s,%s", reg[rd], reg[rs], reg[rt]); break; - case 0x22: util::stream_format(stream, "sub %s,%s,%s", reg[rd], reg[rs], reg[rt]); break; - case 0x23: util::stream_format(stream, "subu %s,%s,%s", reg[rd], reg[rs], reg[rt]); break; + case 0x21: if (rs == 0 || rt == 0) + util::stream_format(stream, "move %s,%s", reg[rd], reg[rs == 0 ? rt : rs]); + else + util::stream_format(stream, "addu %s,%s,%s", reg[rd], reg[rs], reg[rt]); + break; + case 0x22: if (rs == 0) + util::stream_format(stream, "neg %s,%s", reg[rd], reg[rt]); + else + util::stream_format(stream, "sub %s,%s,%s", reg[rd], reg[rs], reg[rt]); + break; + case 0x23: if (rs == 0) + util::stream_format(stream, "negu %s,%s", reg[rd], reg[rt]); + else + util::stream_format(stream, "subu %s,%s,%s", reg[rd], reg[rs], reg[rt]); + break; case 0x24: util::stream_format(stream, "and %s,%s,%s", reg[rd], reg[rs], reg[rt]); break; - case 0x25: util::stream_format(stream, "or %s,%s,%s", reg[rd], reg[rs], reg[rt]); break; + case 0x25: if (rs == 0 || rt == 0) + util::stream_format(stream, "move %s,%s", reg[rd], reg[rs == 0 ? rt : rs]); + else + util::stream_format(stream, "or %s,%s,%s", reg[rd], reg[rs], reg[rt]); + break; case 0x26: util::stream_format(stream, "xor %s,%s,%s", reg[rd], reg[rs], reg[rt]); break; - case 0x27: util::stream_format(stream, "nor %s,%s,%s", reg[rd], reg[rs], reg[rt]); break; + case 0x27: if (rs == 0) + util::stream_format(stream, "not %s,%s", reg[rd], reg[rt]); + else + util::stream_format(stream, "nor %s,%s,%s", reg[rd], reg[rs], reg[rt]); + break; case 0x2a: util::stream_format(stream, "slt %s,%s,%s", reg[rd], reg[rs], reg[rt]); break; case 0x2b: util::stream_format(stream, "sltu %s,%s,%s", reg[rd], reg[rs], reg[rt]); break; - case 0x30: util::stream_format(stream, "teq [invalid]"); break; - case 0x31: util::stream_format(stream, "tgeu [invalid]"); break; - case 0x32: util::stream_format(stream, "tlt [invalid]"); break; - case 0x33: util::stream_format(stream, "tltu [invalid]"); break; - case 0x34: util::stream_format(stream, "tge [invalid]"); break; - case 0x36: util::stream_format(stream, "tne [invalid]"); break; - default: util::stream_format(stream, "dc.l $%08x [invalid]", op); break; + default: util::stream_format(stream, ".word 0x%08x /*invalid*/", op); break; } break; case 0x01: /* REGIMM */ switch ((op >> 16) & 31) { - case 0x00: util::stream_format(stream, "bltz %s,$%08x", reg[rs], pc + 4 + ((int16_t)op << 2)); if (rs != 0) flags = STEP_COND | step_over_extra(1); break; - case 0x01: util::stream_format(stream, "bgez %s,$%08x", reg[rs], pc + 4 + ((int16_t)op << 2)); if (rs != 0) flags = STEP_COND | step_over_extra(1); break; - case 0x02: util::stream_format(stream, "bltzl [invalid]"); break; - case 0x03: util::stream_format(stream, "bgezl [invalid]"); break; - case 0x08: util::stream_format(stream, "tgei [invalid]"); break; - case 0x09: util::stream_format(stream, "tgeiu [invalid]"); break; - case 0x0a: util::stream_format(stream, "tlti [invalid]"); break; - case 0x0b: util::stream_format(stream, "tltiu [invalid]"); break; - case 0x0c: util::stream_format(stream, "teqi [invalid]"); break; - case 0x0e: util::stream_format(stream, "tnei [invalid]"); break; - case 0x10: util::stream_format(stream, "bltzal %s,$%08x", reg[rs], pc + 4 + ((int16_t)op << 2)); if (rs != 0) flags = STEP_OVER | STEP_COND | step_over_extra(1); break; - case 0x11: util::stream_format(stream, "bgezal %s,$%08x", reg[rs], pc + 4 + ((int16_t)op << 2)); flags = STEP_OVER | (rs != 0 ? STEP_COND : 0) | step_over_extra(1); break; - case 0x12: util::stream_format(stream, "bltzall [invalid]"); break; - case 0x13: util::stream_format(stream, "bgezall [invalid]"); break; - default: util::stream_format(stream, "dc.l $%08x [invalid]", op); break; + case 0x00: util::stream_format(stream, "bltz %s,0x%08x", reg[rs], pc + 4 + ((int16_t)op << 2)); if (rs != 0) flags = STEP_COND | step_over_extra(1); break; + case 0x01: util::stream_format(stream, "bgez %s,0x%08x", reg[rs], pc + 4 + ((int16_t)op << 2)); if (rs != 0) flags = STEP_COND | step_over_extra(1); break; + case 0x10: util::stream_format(stream, "bltzal %s,0x%08x", reg[rs], pc + 4 + ((int16_t)op << 2)); if (rs != 0) flags = STEP_OVER | STEP_COND | step_over_extra(1); break; + case 0x11: if (rs == 0) + util::stream_format(stream, "bal 0x%08x", pc + 4 + ((int16_t)op << 2)); + else + util::stream_format(stream, "bgezal %s,0x%08x", reg[rs], pc + 4 + ((int16_t)op << 2)); + flags = STEP_OVER | (rs != 0 ? STEP_COND : 0) | step_over_extra(1); + break; + default: util::stream_format(stream, ".word 0x%08x /*invalid*/", op); break; } break; - case 0x02: util::stream_format(stream, "j $%08x", (pc & 0xf0000000) | ((op & 0x03ffffff) << 2)); break; - case 0x03: util::stream_format(stream, "jal $%08x", (pc & 0xf0000000) | ((op & 0x03ffffff) << 2)); flags = STEP_OVER | step_over_extra(1); break; + case 0x02: util::stream_format(stream, "j 0x%08x", (pc & 0xf0000000) | ((op & 0x03ffffff) << 2)); break; + case 0x03: util::stream_format(stream, "jal 0x%08x", (pc & 0xf0000000) | ((op & 0x03ffffff) << 2)); flags = STEP_OVER | step_over_extra(1); break; case 0x04: if (rs == 0 && rt == 0) - util::stream_format(stream, "b $%08x", pc + 4 + ((int16_t)op << 2)); + util::stream_format(stream, "b 0x%08x", pc + 4 + ((int16_t)op << 2)); else { - util::stream_format(stream, "beq %s,%s,$%08x", reg[rs], reg[rt], pc + 4 + ((int16_t)op << 2)); + if (rt == 0) + util::stream_format(stream, "beqz %s,0x%08x", reg[rs], pc + 4 + ((int16_t)op << 2)); + else + util::stream_format(stream, "beq %s,%s,0x%08x", reg[rs], reg[rt], pc + 4 + ((int16_t)op << 2)); flags = STEP_COND | step_over_extra(1); } - break; - case 0x05: util::stream_format(stream, "bne %s,%s,$%08x", reg[rs], reg[rt], pc + 4 + ((int16_t)op << 2)); flags = STEP_COND | step_over_extra(1); break; - case 0x06: util::stream_format(stream, "blez %s,$%08x", reg[rs], pc + 4 + ((int16_t)op << 2)); flags = STEP_COND | step_over_extra(1); break; - case 0x07: util::stream_format(stream, "bgtz %s,$%08x", reg[rs], pc + 4 + ((int16_t)op << 2)); flags = STEP_COND | step_over_extra(1); break; + break; + case 0x05: if (rt == 0) + util::stream_format(stream, "bnez %s,0x%08x", reg[rs], pc + 4 + ((int16_t)op << 2)); + else + util::stream_format(stream, "bne %s,%s,0x%08x", reg[rs], reg[rt], pc + 4 + ((int16_t)op << 2)); + flags = STEP_COND | step_over_extra(1); + break; + case 0x06: util::stream_format(stream, "blez %s,0x%08x", reg[rs], pc + 4 + ((int16_t)op << 2)); flags = STEP_COND | step_over_extra(1); break; + case 0x07: util::stream_format(stream, "bgtz %s,0x%08x", reg[rs], pc + 4 + ((int16_t)op << 2)); flags = STEP_COND | step_over_extra(1); break; case 0x08: util::stream_format(stream, "addi %s,%s,%s", reg[rt], reg[rs], signed_16bit(op)); break; - case 0x09: util::stream_format(stream, "addiu %s,%s,%s", reg[rt], reg[rs], signed_16bit(op)); break; + case 0x09: if (rs == 0) + util::stream_format(stream, "li %s,%s", reg[rt], signed_16bit(op)); + else + util::stream_format(stream, "addiu %s,%s,%s", reg[rt], reg[rs], signed_16bit(op)); + break; case 0x0a: util::stream_format(stream, "slti %s,%s,%s", reg[rt], reg[rs], signed_16bit(op)); break; case 0x0b: util::stream_format(stream, "sltiu %s,%s,%s", reg[rt], reg[rs], signed_16bit(op)); break; - case 0x0c: util::stream_format(stream, "andi %s,%s,$%04x", reg[rt], reg[rs], (uint16_t)op); break; - case 0x0d: util::stream_format(stream, "ori %s,%s,$%04x", reg[rt], reg[rs], (uint16_t)op); break; - case 0x0e: util::stream_format(stream, "xori %s,%s,$%04x", reg[rt], reg[rs], (uint16_t)op); break; - case 0x0f: util::stream_format(stream, "lui %s,$%04x", reg[rt], (uint16_t)op); break; + case 0x0c: util::stream_format(stream, "andi %s,%s,0x%04x", reg[rt], reg[rs], (uint16_t)op); break; + case 0x0d: if (rs == 0) + util::stream_format(stream, "li %s,0x%04x", reg[rt], (uint16_t)op); + else + util::stream_format(stream, "ori %s,%s,0x%04x", reg[rt], reg[rs], (uint16_t)op); + break; + case 0x0e: util::stream_format(stream, "xori %s,%s,0x%04x", reg[rt], reg[rs], (uint16_t)op); break; + case 0x0f: util::stream_format(stream, "lui %s,0x%04x", reg[rt], (uint16_t)op); break; case 0x10: flags = dasm_cop(pc, 0, op, stream); break; case 0x11: flags = dasm_cop1(pc, op, stream); break; case 0x12: flags = dasm_cop(pc, 2, op, stream); break; case 0x13: flags = dasm_cop(pc, 3, op, stream); break; - case 0x14: util::stream_format(stream, "beql [invalid]"); break; - case 0x15: util::stream_format(stream, "bnel [invalid]"); break; - case 0x16: util::stream_format(stream, "blezl [invalid]"); break; - case 0x17: util::stream_format(stream, "bgtzl [invalid]"); break; case 0x20: util::stream_format(stream, "lb %s,%s(%s)", reg[rt], signed_16bit(op), reg[rs]); break; case 0x21: util::stream_format(stream, "lh %s,%s(%s)", reg[rt], signed_16bit(op), reg[rs]); break; case 0x22: util::stream_format(stream, "lwl %s,%s(%s)", reg[rt], signed_16bit(op), reg[rs]); break; @@ -357,24 +376,13 @@ offs_t mips1_disassembler::disassemble(std::ostream &stream, offs_t pc, const da case 0x2a: util::stream_format(stream, "swl %s,%s(%s)", reg[rt], signed_16bit(op), reg[rs]); break; case 0x2b: util::stream_format(stream, "sw %s,%s(%s)", reg[rt], signed_16bit(op), reg[rs]); break; case 0x2e: util::stream_format(stream, "swr %s,%s(%s)", reg[rt], signed_16bit(op), reg[rs]); break; - case 0x2f: util::stream_format(stream, "cache [invalid]"); break; - case 0x30: util::stream_format(stream, "ll [invalid]"); break; case 0x31: util::stream_format(stream, "lwc1 %s,%s(%s)", cpreg[1][rt], signed_16bit(op), reg[rs]); break; case 0x32: util::stream_format(stream, "lwc2 %s,%s(%s)", cpreg[2][rt], signed_16bit(op), reg[rs]); break; case 0x33: util::stream_format(stream, "lwc3 %s,%s(%s)", cpreg[3][rt], signed_16bit(op), reg[rs]); break; - case 0x34: util::stream_format(stream, "ldc0 [invalid]"); break; - case 0x35: util::stream_format(stream, "ldc1 [invalid]"); break; - case 0x36: util::stream_format(stream, "ldc2 [invalid]"); break; - case 0x37: util::stream_format(stream, "ldc3 [invalid]"); break; - case 0x38: util::stream_format(stream, "sc [invalid]"); break; case 0x39: util::stream_format(stream, "swc1 %s,%s(%s)", cpreg[1][rt], signed_16bit(op), reg[rs]); break; case 0x3a: util::stream_format(stream, "swc2 %s,%s(%s)", cpreg[2][rt], signed_16bit(op), reg[rs]); break; case 0x3b: util::stream_format(stream, "swc3 %s,%s(%s)", cpreg[3][rt], signed_16bit(op), reg[rs]); break; - case 0x3c: util::stream_format(stream, "sdc0 [invalid]"); break; - case 0x3d: util::stream_format(stream, "sdc1 [invalid]"); break; - case 0x3e: util::stream_format(stream, "sdc2 [invalid]"); break; - case 0x3f: util::stream_format(stream, "sdc3 [invalid]"); break; - default: util::stream_format(stream, "dc.l $%08x [invalid]", op); break; + default: util::stream_format(stream, ".word 0x%08x /*invalid*/", op); break; } return 4 | flags | SUPPORTED; } diff --git a/src/devices/cpu/mips/mips3dsm.cpp b/src/devices/cpu/mips/mips3dsm.cpp index d15e75faffa..cdad3375ae7 100644 --- a/src/devices/cpu/mips/mips3dsm.cpp +++ b/src/devices/cpu/mips/mips3dsm.cpp @@ -124,10 +124,12 @@ const char *const mips3_disassembler::ccreg[4][32] = inline std::string mips3_disassembler::signed_16bit(int16_t val) { - if (val < 0) - return util::string_format("-$%x", -val); + if (val >= -9 && val <= 9) + return util::string_format("%d", val); + else if (val < 0) + return util::string_format("-0x%x", -val); else - return util::string_format("$%x", val); + return util::string_format("0x%x", val); } uint32_t mips3_disassembler::dasm_cop0(uint32_t pc, uint32_t op, std::ostream &stream) @@ -147,11 +149,9 @@ uint32_t mips3_disassembler::dasm_cop0(uint32_t pc, uint32_t op, std::ostream &s case 0x08: /* BC */ switch (rt) { - case 0x00: util::stream_format(stream, "bc0f $%08x", pc + 4 + ((int16_t)op << 2)); flags = STEP_COND | step_over_extra(1); break; - case 0x01: util::stream_format(stream, "bc0t $%08x", pc + 4 + ((int16_t)op << 2)); flags = STEP_COND | step_over_extra(1); break; - case 0x02: util::stream_format(stream, "bc0fl [invalid]"); break; - case 0x03: util::stream_format(stream, "bc0tl [invalid]"); break; - default: util::stream_format(stream, "dc.l $%08x [invalid]", op); break; + case 0x00: util::stream_format(stream, "bc0f 0x%08x", pc + 4 + ((int16_t)op << 2)); flags = STEP_COND | step_over_extra(1); break; + case 0x01: util::stream_format(stream, "bc0t 0x%08x", pc + 4 + ((int16_t)op << 2)); flags = STEP_COND | step_over_extra(1); break; + default: util::stream_format(stream, ".word 0x%08x /*invalid*/", op); break; } break; case 0x10: @@ -181,14 +181,14 @@ uint32_t mips3_disassembler::dasm_cop0(uint32_t pc, uint32_t op, std::ostream &s default: dasm_extra_cop0(pc, op, stream); break; } break; - default: util::stream_format(stream, "dc.l $%08x [invalid]", op); break; + default: util::stream_format(stream, ".word 0x%08x /*invalid*/", op); break; } return flags; } uint32_t mips3_disassembler::dasm_extra_cop0(uint32_t pc, uint32_t op, std::ostream &stream) { - util::stream_format(stream, "cop0 $%07x", op & 0x01ffffff); + util::stream_format(stream, "cop0 0x%07x", op & 0x01ffffff); return 0; } @@ -218,10 +218,10 @@ uint32_t mips3_disassembler::dasm_cop1(uint32_t pc, uint32_t op, std::ostream &s case 0x08: /* BC */ switch (rt & 3) { - case 0x00: util::stream_format(stream, "bc1f $%08x,%d", pc + 4 + ((int16_t)op << 2), (op >> 18) & 7); flags = STEP_COND | step_over_extra(1); break; - case 0x01: util::stream_format(stream, "bc1t $%08x,%d", pc + 4 + ((int16_t)op << 2), (op >> 18) & 7); flags = STEP_COND | step_over_extra(1); break; - case 0x02: util::stream_format(stream, "bc1fl $%08x,%d", pc + 4 + ((int16_t)op << 2), (op >> 18) & 7); flags = STEP_COND | step_over_extra(1); break; - case 0x03: util::stream_format(stream, "bc1tl $%08x,%d", pc + 4 + ((int16_t)op << 2), (op >> 18) & 7); flags = STEP_COND | step_over_extra(1); break; + case 0x00: util::stream_format(stream, "bc1f 0x%08x,%d", pc + 4 + ((int16_t)op << 2), (op >> 18) & 7); flags = STEP_COND | step_over_extra(1); break; + case 0x01: util::stream_format(stream, "bc1t 0x%08x,%d", pc + 4 + ((int16_t)op << 2), (op >> 18) & 7); flags = STEP_COND | step_over_extra(1); break; + case 0x02: util::stream_format(stream, "bc1fl 0x%08x,%d", pc + 4 + ((int16_t)op << 2), (op >> 18) & 7); flags = STEP_COND | step_over_extra(1); break; + case 0x03: util::stream_format(stream, "bc1tl 0x%08x,%d", pc + 4 + ((int16_t)op << 2), (op >> 18) & 7); flags = STEP_COND | step_over_extra(1); break; } break; default: /* COP */ @@ -277,7 +277,7 @@ uint32_t mips3_disassembler::dasm_cop1(uint32_t pc, uint32_t op, std::ostream &s uint32_t mips3_disassembler::dasm_extra_cop1(uint32_t pc, uint32_t op, std::ostream &stream) { - util::stream_format(stream, "cop1 $%07x", op & 0x01ffffff); + util::stream_format(stream, "cop1 0x%07x", op & 0x01ffffff); return 0; } @@ -336,7 +336,7 @@ uint32_t mips3_disassembler::dasm_cop1x(uint32_t pc, uint32_t op, std::ostream & case 0x3d: case 0x3e: case 0x3f: util::stream_format(stream, "nmsub.%s %s,%s,%s,%s", fmt3, cpreg[1][fd], cpreg[1][fr], cpreg[1][fs], cpreg[1][ft]); break; - default: util::stream_format(stream, "cop1 $%07x", op & 0x01ffffff); break; + default: util::stream_format(stream, "cop1 0x%07x", op & 0x01ffffff); break; } return flags; } @@ -358,11 +358,9 @@ uint32_t mips3_disassembler::dasm_cop2(uint32_t pc, uint32_t op, std::ostream &s case 0x08: /* BC */ switch (rt) { - case 0x00: util::stream_format(stream, "bc2f $%08x", pc + 4 + ((int16_t)op << 2)); flags = STEP_COND | step_over_extra(1); break; - case 0x01: util::stream_format(stream, "bc2t $%08x", pc + 4 + ((int16_t)op << 2)); flags = STEP_COND | step_over_extra(1); break; - case 0x02: util::stream_format(stream, "bc2fl [invalid]"); break; - case 0x03: util::stream_format(stream, "bc2tl [invalid]"); break; - default: util::stream_format(stream, "dc.l $%08x [invalid]", op); break; + case 0x00: util::stream_format(stream, "bc2f 0x%08x", pc + 4 + ((int16_t)op << 2)); flags = STEP_COND | step_over_extra(1); break; + case 0x01: util::stream_format(stream, "bc2t 0x%08x", pc + 4 + ((int16_t)op << 2)); flags = STEP_COND | step_over_extra(1); break; + default: util::stream_format(stream, ".word 0x%08x /*invalid*/", op); break; } break; case 0x10: @@ -383,14 +381,14 @@ uint32_t mips3_disassembler::dasm_cop2(uint32_t pc, uint32_t op, std::ostream &s case 0x1f: /* COP */ flags = dasm_extra_cop2(pc, op, stream); break; - default: util::stream_format(stream, "dc.l $%08x [invalid]", op); break; + default: util::stream_format(stream, ".word 0x%08x /*invalid*/", op); break; } return flags; } uint32_t mips3_disassembler::dasm_extra_cop2(uint32_t pc, uint32_t op, std::ostream &stream) { - util::stream_format(stream, "cop2 $%07x", op & 0x01ffffff); + util::stream_format(stream, "cop2 0x%07x", op & 0x01ffffff); return 0; } @@ -408,7 +406,7 @@ uint32_t mips3_disassembler::dasm_idt(uint32_t pc, uint32_t op, std::ostream &st case 1: util::stream_format(stream, "madu %s,%s", reg[rs], reg[rt]); break; case 2: util::stream_format(stream, "mul %s,%s,%s", reg[rd], reg[rs], reg[rt]); break; case 4: util::stream_format(stream, "msub %s,%s", reg[rs], reg[rt]); break; - default:util::stream_format(stream, "dc.l $%08x [invalid]", op); break; + default:util::stream_format(stream, ".word 0x%08x /*invalid*/", op); break; } return flags; @@ -416,19 +414,19 @@ uint32_t mips3_disassembler::dasm_idt(uint32_t pc, uint32_t op, std::ostream &st uint32_t mips3_disassembler::dasm_extra_base(uint32_t pc, uint32_t op, std::ostream &stream) { - util::stream_format(stream, "dc.l $%08x [invalid]", op); + util::stream_format(stream, ".word 0x%08x /*invalid*/", op); return 0; } uint32_t mips3_disassembler::dasm_extra_regimm(uint32_t pc, uint32_t op, std::ostream &stream) { - util::stream_format(stream, "dc.l $%08x [invalid]", op); + util::stream_format(stream, ".word 0x%08x /*invalid*/", op); return 0; } uint32_t mips3_disassembler::dasm_extra_special(uint32_t pc, uint32_t op, std::ostream &stream) { - util::stream_format(stream, "dc.l $%08x [invalid]", op); + util::stream_format(stream, ".word 0x%08x /*invalid*/", op); return 0; } @@ -438,7 +436,7 @@ uint32_t ee_disassembler::dasm_extra_cop0(uint32_t pc, uint32_t op, std::ostream { case 0x38: util::stream_format(stream, "ei"); break; case 0x39: util::stream_format(stream, "di"); break; - default: util::stream_format(stream, "cop1 $%07x", op & 0x01ffffff); break; + default: util::stream_format(stream, "cop1 0x%07x", op & 0x01ffffff); break; } return 0; } @@ -453,7 +451,7 @@ uint32_t ee_disassembler::dasm_extra_cop1(uint32_t pc, uint32_t op, std::ostream { case 0x18: util::stream_format(stream, "adda.s %s,%s", cpreg[1][fs], cpreg[1][ft]); break; case 0x1c: util::stream_format(stream, "madd.s %s,%s,%s", cpreg[1][fd], cpreg[1][fs], cpreg[1][ft]); break; - default: util::stream_format(stream, "dc.l $%08x [invalid]", op); break; + default: util::stream_format(stream, ".word 0x%08x /*invalid*/", op); break; } return 0; } @@ -522,10 +520,10 @@ uint32_t ee_disassembler::dasm_extra_cop2(uint32_t pc, uint32_t op, std::ostream case 0x2f: util::stream_format(stream, "vmini.%s %s%s %s%s %s%s", dest, vfreg[rd], destc, vfreg[rs], destc, vfreg[rt], dest); break; case 0x30: util::stream_format(stream, "viadd %s, %s, %s", vireg[rd], vireg[rs], vireg[rt]); break; case 0x31: util::stream_format(stream, "visub %s, %s, %s", vireg[rd], vireg[rs], vireg[rt]); break; - case 0x32: util::stream_format(stream, "viaddi %s, %s, $%x", vireg[rt], vireg[rs], imm5); break; + case 0x32: util::stream_format(stream, "viaddi %s, %s, 0x%x", vireg[rt], vireg[rs], imm5); break; case 0x34: util::stream_format(stream, "viand %s, %s, %s", vireg[rd], vireg[rs], vireg[rt]); break; case 0x35: util::stream_format(stream, "vior %s, %s, %s", vireg[rd], vireg[rs], vireg[rt]); break; - case 0x38: util::stream_format(stream, "vcallms $06x", (op & 0x001fffc0) >> 3); break; + case 0x38: util::stream_format(stream, "vcallms 0x%06x", (op & 0x001fffc0) >> 3); break; case 0x39: util::stream_format(stream, "vcallmsr $vi27"); break; case 0x3c: case 0x3d: case 0x3e: case 0x3f: switch (ext) @@ -588,10 +586,10 @@ uint32_t ee_disassembler::dasm_extra_cop2(uint32_t pc, uint32_t op, std::ostream case 0x41: util::stream_format(stream, "vrget.%s %s%s R", dest, vfreg[rt], destc); break; case 0x42: util::stream_format(stream, "vrinit R, %s%s", vfreg[rs], fsf); break; case 0x43: util::stream_format(stream, "vrxor R, %s%s", vfreg[rs], fsf); break; - default: util::stream_format(stream, "dc.l $%08x [invalid]", op); break; + default: util::stream_format(stream, ".word 0x%08x /*invalid*/", op); break; } break; - default: util::stream_format(stream, "dc.l $%08x [invalid]", op); break; + default: util::stream_format(stream, ".word 0x%08x /*invalid*/", op); break; } return 0; @@ -663,14 +661,14 @@ uint32_t ee_disassembler::dasm_idt(uint32_t pc, uint32_t op, std::ostream &strea case 2: util::stream_format(stream, "pmfhl.slw %s", reg[rd]); break; case 3: util::stream_format(stream, "pmfhl.lh %s", reg[rd]); break; case 4: util::stream_format(stream, "pmfhl.sh %s", reg[rd]); break; - default: util::stream_format(stream, "dc.l $%08x [invalid]", op); break; + default: util::stream_format(stream, ".word 0x%08x /*invalid*/", op); break; } break; case 0x31: switch (fmt) { case 0: util::stream_format(stream, "pmthl.lw %s", reg[rd]); break; - default: util::stream_format(stream, "dc.l $%08x [invalid]", op); break; + default: util::stream_format(stream, ".word 0x%08x /*invalid*/", op); break; } break; case 0x34: util::stream_format(stream, "psllh %s,%s,%d", reg[rd], reg[rt], shift); break; @@ -679,7 +677,7 @@ uint32_t ee_disassembler::dasm_idt(uint32_t pc, uint32_t op, std::ostream &strea case 0x3c: util::stream_format(stream, "psllw %s,%s,%d", reg[rd], reg[rt], shift); break; case 0x3e: util::stream_format(stream, "psrlw %s,%s,%d", reg[rd], reg[rt], shift); break; case 0x3f: util::stream_format(stream, "psraw %s,%s,%d", reg[rd], reg[rt], shift); break; - default: util::stream_format(stream, "dc.l $%08x [invalid]", op); break; + default: util::stream_format(stream, ".word 0x%08x /*invalid*/", op); break; } return flags; @@ -719,7 +717,7 @@ uint32_t ee_disassembler::dasm_mmi0(uint32_t pc, uint32_t op, std::ostream &stre case 0x1b: util::stream_format(stream, "ppacb %s,%s,%s", reg[rd], reg[rs], reg[rt]); break; case 0x1e: util::stream_format(stream, "pext5 %s,%s", reg[rd], reg[rt]); break; case 0x1f: util::stream_format(stream, "ppac5 %s,%s", reg[rd], reg[rt]); break; - default: util::stream_format(stream, "dc.l $%08x [invalid]", op); break; + default: util::stream_format(stream, ".word 0x%08x /*invalid*/", op); break; } return 0; @@ -752,7 +750,7 @@ uint32_t ee_disassembler::dasm_mmi1(uint32_t pc, uint32_t op, std::ostream &stre case 0x19: util::stream_format(stream, "psubub %s,%s,%s", reg[rd], reg[rs], reg[rt]); break; case 0x1a: util::stream_format(stream, "pextub %s,%s,%s", reg[rd], reg[rs], reg[rt]); break; case 0x1b: util::stream_format(stream, "qfsrv %s,%s,%s", reg[rd], reg[rs], reg[rt]); break; - default: util::stream_format(stream, "dc.l $%08x [invalid]", op); break; + default: util::stream_format(stream, ".word 0x%08x /*invalid*/", op); break; } return 0; @@ -789,7 +787,7 @@ uint32_t ee_disassembler::dasm_mmi2(uint32_t pc, uint32_t op, std::ostream &stre case 0x1d: util::stream_format(stream, "pdivbw %s,%s", reg[rs], reg[rt]); break; case 0x1e: util::stream_format(stream, "pexew %s,%s", reg[rd], reg[rt]); break; case 0x1f: util::stream_format(stream, "prot3w %s,%s", reg[rd], reg[rt]); break; - default: util::stream_format(stream, "dc.l $%08x [invalid]", op); break; + default: util::stream_format(stream, ".word 0x%08x /*invalid*/", op); break; } return 0; @@ -817,7 +815,7 @@ uint32_t ee_disassembler::dasm_mmi3(uint32_t pc, uint32_t op, std::ostream &stre case 0x1a: util::stream_format(stream, "pexch %s,%s", reg[rd], reg[rt]); break; case 0x1b: util::stream_format(stream, "pcpyh %s,%s", reg[rd], reg[rt]); break; case 0x1e: util::stream_format(stream, "pexcw %s,%s", reg[rd], reg[rt]); break; - default: util::stream_format(stream, "dc.l $%08x [invalid]", op); break; + default: util::stream_format(stream, ".word 0x%08x /*invalid*/", op); break; } return 0; @@ -832,7 +830,7 @@ uint32_t ee_disassembler::dasm_extra_base(uint32_t pc, uint32_t op, std::ostream { case 0x1e: util::stream_format(stream, "lq %s,%s(%s)", reg[rt], signed_16bit(op), reg[rs]); break; case 0x1f: util::stream_format(stream, "sq %s,%s(%s)", reg[rt], signed_16bit(op), reg[rs]); break; - default: util::stream_format(stream, "dc.l $%08x [invalid]", op); break; + default: util::stream_format(stream, ".word 0x%08x /*invalid*/", op); break; } return 0; @@ -847,7 +845,7 @@ uint32_t ee_disassembler::dasm_extra_special(uint32_t pc, uint32_t op, std::ostr { case 0x28: util::stream_format(stream, "mfsa %s", reg[rd]); break; case 0x29: util::stream_format(stream, "mtsa %s", reg[rs]); break; - default: util::stream_format(stream, "dc.l $%08x [invalid]", op); break; + default: util::stream_format(stream, ".word 0x%08x /*invalid*/", op); break; } return 0; } @@ -860,7 +858,7 @@ uint32_t ee_disassembler::dasm_extra_regimm(uint32_t pc, uint32_t op, std::ostre { case 0x18: util::stream_format(stream, "mtsab %s,%s", reg[rs], signed_16bit(op)); break; case 0x19: util::stream_format(stream, "mtsah %s,%s", reg[rs], signed_16bit(op)); break; - default: util::stream_format(stream, "dc.l $%08x [invalid]", op); break; + default: util::stream_format(stream, ".word 0x%08x /*invalid*/", op); break; } return 0; } @@ -894,7 +892,7 @@ offs_t mips3_disassembler::dasm_one(std::ostream &stream, offs_t pc, u32 op) case 0x04: util::stream_format(stream, "sllv %s,%s,%s", reg[rd], reg[rt], reg[rs]); break; case 0x06: util::stream_format(stream, "srlv %s,%s,%s", reg[rd], reg[rt], reg[rs]); break; case 0x07: util::stream_format(stream, "srav %s,%s,%s", reg[rd], reg[rt], reg[rs]); break; - case 0x08: util::stream_format(stream, "jr %s", reg[rs]); if (rs == 31) flags = STEP_OUT; break; + case 0x08: util::stream_format(stream, "jr %s", reg[rs]); if (rs == 31) flags = STEP_OUT | step_over_extra(1); break; case 0x09: if (rd == 31) util::stream_format(stream, "jalr %s", reg[rs]); else @@ -922,13 +920,33 @@ offs_t mips3_disassembler::dasm_one(std::ostream &stream, offs_t pc, u32 op) case 0x1e: util::stream_format(stream, "ddiv %s,%s", reg[rs], reg[rt]); break; case 0x1f: util::stream_format(stream, "ddivu %s,%s", reg[rs], reg[rt]); break; case 0x20: util::stream_format(stream, "add %s,%s,%s", reg[rd], reg[rs], reg[rt]); break; - case 0x21: util::stream_format(stream, "addu %s,%s,%s", reg[rd], reg[rs], reg[rt]); break; - case 0x22: util::stream_format(stream, "sub %s,%s,%s", reg[rd], reg[rs], reg[rt]); break; - case 0x23: util::stream_format(stream, "subu %s,%s,%s", reg[rd], reg[rs], reg[rt]); break; + case 0x21: if (rs == 0 || rt == 0) + util::stream_format(stream, "move %s,%s", reg[rd], reg[rs == 0 ? rt : rs]); + else + util::stream_format(stream, "addu %s,%s,%s", reg[rd], reg[rs], reg[rt]); + break; + case 0x22: if (rs == 0) + util::stream_format(stream, "neg %s,%s", reg[rd], reg[rt]); + else + util::stream_format(stream, "sub %s,%s,%s", reg[rd], reg[rs], reg[rt]); + break; + case 0x23: if (rs == 0) + util::stream_format(stream, "negu %s,%s", reg[rd], reg[rt]); + else + util::stream_format(stream, "subu %s,%s,%s", reg[rd], reg[rs], reg[rt]); + break; case 0x24: util::stream_format(stream, "and %s,%s,%s", reg[rd], reg[rs], reg[rt]); break; - case 0x25: util::stream_format(stream, "or %s,%s,%s", reg[rd], reg[rs], reg[rt]); break; + case 0x25: if (rs == 0 || rt == 0) + util::stream_format(stream, "move %s,%s", reg[rd], reg[rs == 0 ? rt : rs]); + else + util::stream_format(stream, "or %s,%s,%s", reg[rd], reg[rs], reg[rt]); + break; case 0x26: util::stream_format(stream, "xor %s,%s,%s", reg[rd], reg[rs], reg[rt]); break; - case 0x27: util::stream_format(stream, "nor %s,%s,%s", reg[rd], reg[rs], reg[rt]); break; + case 0x27: if (rs == 0) + util::stream_format(stream, "not %s,%s", reg[rd], reg[rt]); + else + util::stream_format(stream, "nor %s,%s,%s", reg[rd], reg[rs], reg[rt]); + break; case 0x2a: util::stream_format(stream, "slt %s,%s,%s", reg[rd], reg[rs], reg[rt]); break; case 0x2b: util::stream_format(stream, "sltu %s,%s,%s", reg[rd], reg[rs], reg[rt]); break; case 0x2c: util::stream_format(stream, "dadd %s,%s,%s", reg[rd], reg[rs], reg[rt]); break; @@ -954,50 +972,84 @@ offs_t mips3_disassembler::dasm_one(std::ostream &stream, offs_t pc, u32 op) case 0x01: /* REGIMM */ switch ((op >> 16) & 31) { - case 0x00: util::stream_format(stream, "bltz %s,$%08x", reg[rs], pc + 4 + ((int16_t)op << 2)); if (rs != 0) flags = STEP_COND | step_over_extra(1); break; - case 0x01: util::stream_format(stream, "bgez %s,$%08x", reg[rs], pc + 4 + ((int16_t)op << 2)); if (rs != 0) flags = STEP_COND | step_over_extra(1); break; - case 0x02: util::stream_format(stream, "bltzl %s,$%08x", reg[rs], pc + 4 + ((int16_t)op << 2)); if (rs != 0) flags = STEP_COND | step_over_extra(1); break; - case 0x03: util::stream_format(stream, "bgezl %s,$%08x", reg[rs], pc + 4 + ((int16_t)op << 2)); if (rs != 0) flags = STEP_COND | step_over_extra(1); break; + case 0x00: util::stream_format(stream, "bltz %s,0x%08x", reg[rs], pc + 4 + ((int16_t)op << 2)); if (rs != 0) flags = STEP_COND | step_over_extra(1); break; + case 0x01: util::stream_format(stream, "bgez %s,0x%08x", reg[rs], pc + 4 + ((int16_t)op << 2)); if (rs != 0) flags = STEP_COND | step_over_extra(1); break; + case 0x02: util::stream_format(stream, "bltzl %s,0x%08x", reg[rs], pc + 4 + ((int16_t)op << 2)); if (rs != 0) flags = STEP_COND | step_over_extra(1); break; + case 0x03: util::stream_format(stream, "bgezl %s,0x%08x", reg[rs], pc + 4 + ((int16_t)op << 2)); if (rs != 0) flags = STEP_COND | step_over_extra(1); break; case 0x08: util::stream_format(stream, "tgei %s,%s", reg[rs], signed_16bit(op)); flags = STEP_OVER | STEP_COND; break; case 0x09: util::stream_format(stream, "tgeiu %s,%s", reg[rs], signed_16bit(op)); flags = STEP_OVER | STEP_COND; break; case 0x0a: util::stream_format(stream, "tlti %s,%s", reg[rs], signed_16bit(op)); flags = STEP_OVER | STEP_COND; break; case 0x0b: util::stream_format(stream, "tltiu %s,%s", reg[rs], signed_16bit(op)); flags = STEP_OVER | STEP_COND; break; case 0x0c: util::stream_format(stream, "teqi %s,%s", reg[rs], signed_16bit(op)); flags = STEP_OVER | STEP_COND; break; case 0x0e: util::stream_format(stream, "tnei %s,%s", reg[rs], signed_16bit(op)); flags = STEP_OVER | STEP_COND; break; - case 0x10: util::stream_format(stream, "bltzal %s,$%08x", reg[rs], pc + 4 + ((int16_t)op << 2)); if (rs != 0) flags = STEP_OVER | STEP_COND | step_over_extra(1); break; - case 0x11: util::stream_format(stream, "bgezal %s,$%08x", reg[rs], pc + 4 + ((int16_t)op << 2)); flags = STEP_OVER | (rs != 0 ? STEP_COND : 0) | step_over_extra(1); break; - case 0x12: util::stream_format(stream, "bltzall %s,$%08x", reg[rs], pc + 4 + ((int16_t)op << 2)); if (rs != 0) flags = STEP_OVER | STEP_COND | step_over_extra(1); break; - case 0x13: util::stream_format(stream, "bgezall %s,$%08x", reg[rs], pc + 4 + ((int16_t)op << 2)); flags = STEP_OVER | (rs != 0 ? STEP_COND : 0) | step_over_extra(1); break; + case 0x10: util::stream_format(stream, "bltzal %s,0x%08x", reg[rs], pc + 4 + ((int16_t)op << 2)); if (rs != 0) flags = STEP_OVER | STEP_COND | step_over_extra(1); break; + case 0x11: if (rs == 0) + util::stream_format(stream, "bal 0x%08x", pc + 4 + ((int16_t)op << 2)); + else + util::stream_format(stream, "bgezal %s,0x%08x", reg[rs], pc + 4 + ((int16_t)op << 2)); + flags = STEP_OVER | (rs != 0 ? STEP_COND : 0) | step_over_extra(1); + break; + case 0x12: util::stream_format(stream, "bltzall %s,0x%08x", reg[rs], pc + 4 + ((int16_t)op << 2)); if (rs != 0) flags = STEP_OVER | STEP_COND | step_over_extra(1); break; + case 0x13: util::stream_format(stream, "bgezall %s,0x%08x", reg[rs], pc + 4 + ((int16_t)op << 2)); flags = STEP_OVER | (rs != 0 ? STEP_COND : 0) | step_over_extra(1); break; default: flags = dasm_extra_regimm(pc, op, stream); break; } break; - case 0x02: util::stream_format(stream, "j $%08x", (pc & 0xf0000000) | ((op & 0x03ffffff) << 2)); break; - case 0x03: util::stream_format(stream, "jal $%08x", (pc & 0xf0000000) | ((op & 0x03ffffff) << 2)); flags = STEP_OVER | step_over_extra(1); break; + case 0x02: util::stream_format(stream, "j 0x%08x", (pc & 0xf0000000) | ((op & 0x03ffffff) << 2)); break; + case 0x03: util::stream_format(stream, "jal 0x%08x", (pc & 0xf0000000) | ((op & 0x03ffffff) << 2)); flags = STEP_OVER | step_over_extra(1); break; case 0x04: if (rs == 0 && rt == 0) - util::stream_format(stream, "b $%08x", pc + 4 + ((int16_t)op << 2)); + util::stream_format(stream, "b 0x%08x", pc + 4 + ((int16_t)op << 2)); else - util::stream_format(stream, "beq %s,%s,$%08x", reg[rs], reg[rt], pc + 4 + ((int16_t)op << 2)); - break; - case 0x05: util::stream_format(stream, "bne %s,%s,$%08x", reg[rs], reg[rt], pc + 4 + ((int16_t)op << 2));break; - case 0x06: util::stream_format(stream, "blez %s,$%08x", reg[rs], pc + 4 + ((int16_t)op << 2)); break; - case 0x07: util::stream_format(stream, "bgtz %s,$%08x", reg[rs], pc + 4 + ((int16_t)op << 2)); break; + { + if (rt == 0) + util::stream_format(stream, "beqz %s,0x%08x", reg[rs], pc + 4 + ((int16_t)op << 2)); + else + util::stream_format(stream, "beq %s,%s,0x%08x", reg[rs], reg[rt], pc + 4 + ((int16_t)op << 2)); + flags = STEP_COND | step_over_extra(1); + } + break; + case 0x05: if (rt == 0) + util::stream_format(stream, "bnez %s,0x%08x", reg[rs], pc + 4 + ((int16_t)op << 2)); + else + util::stream_format(stream, "bne %s,%s,0x%08x", reg[rs], reg[rt], pc + 4 + ((int16_t)op << 2)); + flags = STEP_COND | step_over_extra(1); + break; + case 0x06: util::stream_format(stream, "blez %s,0x%08x", reg[rs], pc + 4 + ((int16_t)op << 2)); if (rs != 0) flags = STEP_COND | step_over_extra(1); break; + case 0x07: util::stream_format(stream, "bgtz %s,0x%08x", reg[rs], pc + 4 + ((int16_t)op << 2)); flags = STEP_COND | step_over_extra(1); break; case 0x08: util::stream_format(stream, "addi %s,%s,%s", reg[rt], reg[rs], signed_16bit(op)); break; - case 0x09: util::stream_format(stream, "addiu %s,%s,%s", reg[rt], reg[rs], signed_16bit(op)); break; + case 0x09: if (rs == 0) + util::stream_format(stream, "li %s,%s", reg[rt], signed_16bit(op)); + else + util::stream_format(stream, "addiu %s,%s,%s", reg[rt], reg[rs], signed_16bit(op)); + break; case 0x0a: util::stream_format(stream, "slti %s,%s,%s", reg[rt], reg[rs], signed_16bit(op)); break; case 0x0b: util::stream_format(stream, "sltiu %s,%s,%s", reg[rt], reg[rs], signed_16bit(op)); break; - case 0x0c: util::stream_format(stream, "andi %s,%s,$%04x", reg[rt], reg[rs], (uint16_t)op); break; - case 0x0d: util::stream_format(stream, "ori %s,%s,$%04x", reg[rt], reg[rs], (uint16_t)op); break; - case 0x0e: util::stream_format(stream, "xori %s,%s,$%04x", reg[rt], reg[rs], (uint16_t)op); break; - case 0x0f: util::stream_format(stream, "lui %s,$%04x", reg[rt], (uint16_t)op); break; + case 0x0c: util::stream_format(stream, "andi %s,%s,0x%04x", reg[rt], reg[rs], (uint16_t)op); break; + case 0x0d: if (rs == 0) + util::stream_format(stream, "li %s,0x%04x", reg[rt], (uint16_t)op); + else + util::stream_format(stream, "ori %s,%s,0x%04x", reg[rt], reg[rs], (uint16_t)op); + break; + case 0x0e: util::stream_format(stream, "xori %s,%s,0x%04x", reg[rt], reg[rs], (uint16_t)op); break; + case 0x0f: util::stream_format(stream, "lui %s,0x%04x", reg[rt], (uint16_t)op); break; case 0x10: flags = dasm_cop0(pc, op, stream); break; case 0x11: flags = dasm_cop1(pc, op, stream); break; case 0x12: flags = dasm_cop2(pc, op, stream); break; case 0x13: flags = dasm_cop1x(pc, op, stream); break; - case 0x14: util::stream_format(stream, "beql %s,%s,$%08x", reg[rs], reg[rt], pc + 4 + ((int16_t)op << 2));break; - case 0x15: util::stream_format(stream, "bnel %s,%s,$%08x", reg[rs], reg[rt], pc + 4 + ((int16_t)op << 2));break; - case 0x16: util::stream_format(stream, "blezl %s,%s,$%08x", reg[rs], reg[rt], pc + 4 + ((int16_t)op << 2));break; - case 0x17: util::stream_format(stream, "bgtzl %s,%s,$%08x", reg[rs], reg[rt], pc + 4 + ((int16_t)op << 2));break; + case 0x14: if (rt == 0) + util::stream_format(stream, "beqzl %s,0x%08x", reg[rs], pc + 4 + ((int16_t)op << 2)); + else + util::stream_format(stream, "beql %s,%s,0x%08x", reg[rs], reg[rt], pc + 4 + ((int16_t)op << 2)); + if (rs != 0 || rt != 0) flags = STEP_COND | step_over_extra(1); + break; + case 0x15: if (rt == 0) + util::stream_format(stream, "bnezl %s,0x%08x", reg[rs], pc + 4 + ((int16_t)op << 2)); + else + util::stream_format(stream, "bnel %s,%s,0x%08x", reg[rs], reg[rt], pc + 4 + ((int16_t)op << 2)); + flags = STEP_COND | step_over_extra(1); + break; + case 0x16: util::stream_format(stream, "blezl %s,0x%08x", reg[rs], pc + 4 + ((int16_t)op << 2)); if (rs != 0) flags = STEP_COND | step_over_extra(1); break; + case 0x17: util::stream_format(stream, "bgtzl %s,0x%08x", reg[rs], pc + 4 + ((int16_t)op << 2)); flags = STEP_COND | step_over_extra(1); break; case 0x18: util::stream_format(stream, "daddi %s,%s,%s", reg[rt], reg[rs], signed_16bit(op)); break; case 0x19: util::stream_format(stream, "daddiu %s,%s,%s", reg[rt], reg[rs], signed_16bit(op)); break; case 0x1a: util::stream_format(stream, "ldl %s,%s(%s)", reg[rt], signed_16bit(op), reg[rs]); break; @@ -1022,7 +1074,7 @@ offs_t mips3_disassembler::dasm_one(std::ostream &stream, offs_t pc, u32 op) case 0x30: util::stream_format(stream, "ll %s,%s(%s)", reg[rt], signed_16bit(op), reg[rs]); break; case 0x31: util::stream_format(stream, "lwc1 %s,%s(%s)", cpreg[1][rt], signed_16bit(op), reg[rs]); break; case 0x32: util::stream_format(stream, "lwc2 %s,%s(%s)", cpreg[2][rt], signed_16bit(op), reg[rs]); break; - case 0x33: util::stream_format(stream, "pref $%x,%s(%s)", rt, signed_16bit(op), reg[rs]); break; + case 0x33: util::stream_format(stream, "pref 0x%x,%s(%s)", rt, signed_16bit(op), reg[rs]); break; case 0x34: util::stream_format(stream, "lld %s,%s(%s)", reg[rt], signed_16bit(op), reg[rs]); break; case 0x35: util::stream_format(stream, "ldc1 %s,%s(%s)", cpreg[1][rt], signed_16bit(op), reg[rs]); break; case 0x36: util::stream_format(stream, "ldc2 %s,%s(%s)", cpreg[2][rt], signed_16bit(op), reg[rs]); break; diff --git a/src/devices/cpu/psx/psxdasm.cpp b/src/devices/cpu/psx/psxdasm.cpp index bd7c3bcdcae..706b5523535 100644 --- a/src/devices/cpu/psx/psxdasm.cpp +++ b/src/devices/cpu/psx/psxdasm.cpp @@ -15,13 +15,17 @@ std::string psxcpu_disassembler::make_signed_hex_str_16( uint32_t value ) { - if( value & 0x8000 ) + if( int16_t( value & 0xffff ) >= -9 && int16_t( value & 0xffff ) <= 9 ) { - return util::string_format("-$%x", -value & 0xffff ); + return util::string_format("%d", int16_t( value & 0xffff ) ); + } + else if( value & 0x8000 ) + { + return util::string_format("-0x%x", -value & 0xffff ); } else { - return util::string_format("$%x", value & 0xffff ); + return util::string_format("0x%x", value & 0xffff ); } } @@ -159,15 +163,15 @@ std::string psxcpu_disassembler::upper_address( uint32_t op, offs_t pos, const d if( INS_OP( nextop ) == OP_ORI && INS_RT( op ) == INS_RS( nextop ) ) { - return util::string_format("$%04x ; 0x%08x", INS_IMMEDIATE( op ), ( INS_IMMEDIATE( op ) << 16 ) | INS_IMMEDIATE( nextop ) ); + return util::string_format("0x%04x ; 0x%08x", INS_IMMEDIATE( op ), ( INS_IMMEDIATE( op ) << 16 ) | INS_IMMEDIATE( nextop ) ); } else if( INS_OP( nextop ) == OP_ADDIU && INS_RT( op ) == INS_RS( nextop ) ) { - return util::string_format("$%04x ; 0x%08x", INS_IMMEDIATE( op ), ( INS_IMMEDIATE( op ) << 16 ) + (int16_t) INS_IMMEDIATE( nextop ) ); + return util::string_format("0x%04x ; 0x%08x", INS_IMMEDIATE( op ), ( INS_IMMEDIATE( op ) << 16 ) + (int16_t) INS_IMMEDIATE( nextop ) ); } else { - return util::string_format("$%04x", INS_IMMEDIATE( op ) ); + return util::string_format("0x%04x", INS_IMMEDIATE( op ) ); } } @@ -198,19 +202,19 @@ offs_t psxcpu_disassembler::disassemble(std::ostream &stream, offs_t pc, const d case FUNCT_SLL: if( op == 0 ) { - /* the standard nop is "sll zero,zero,$0000" */ + /* the standard nop is "sll zero,zero,0x0000" */ util::stream_format( stream, "nop" ); } else { - util::stream_format( stream, "sll %s,%s,$%02x", s_cpugenreg[ INS_RD( op ) ], s_cpugenreg[ INS_RT( op ) ], INS_SHAMT( op ) ); + util::stream_format( stream, "sll %s,%s,0x%02x", s_cpugenreg[ INS_RD( op ) ], s_cpugenreg[ INS_RT( op ) ], INS_SHAMT( op ) ); } break; case FUNCT_SRL: - util::stream_format( stream, "srl %s,%s,$%02x", s_cpugenreg[ INS_RD( op ) ], s_cpugenreg[ INS_RT( op ) ], INS_SHAMT( op ) ); + util::stream_format( stream, "srl %s,%s,0x%02x", s_cpugenreg[ INS_RD( op ) ], s_cpugenreg[ INS_RT( op ) ], INS_SHAMT( op ) ); break; case FUNCT_SRA: - util::stream_format( stream, "sra %s,%s,$%02x", s_cpugenreg[ INS_RD( op ) ], s_cpugenreg[ INS_RT( op ) ], INS_SHAMT( op ) ); + util::stream_format( stream, "sra %s,%s,0x%02x", s_cpugenreg[ INS_RD( op ) ], s_cpugenreg[ INS_RT( op ) ], INS_SHAMT( op ) ); break; case FUNCT_SLLV: util::stream_format( stream, "sllv %s,%s,%s", s_cpugenreg[ INS_RD( op ) ], s_cpugenreg[ INS_RT( op ) ], s_cpugenreg[ INS_RS( op ) ] ); @@ -225,7 +229,7 @@ offs_t psxcpu_disassembler::disassemble(std::ostream &stream, offs_t pc, const d util::stream_format( stream, "jr %s", s_cpugenreg[ INS_RS( op ) ] ); if( INS_RS( op ) == 31 ) { - flags = STEP_OUT; + flags = STEP_OUT | step_over_extra( 1 ); } break; case FUNCT_JALR: @@ -233,11 +237,11 @@ offs_t psxcpu_disassembler::disassemble(std::ostream &stream, offs_t pc, const d flags = STEP_OVER | step_over_extra( 1 ); break; case FUNCT_SYSCALL: - util::stream_format( stream, "syscall $%05x", INS_CODE( op ) ); + util::stream_format( stream, "syscall 0x%05x", INS_CODE( op ) ); flags = STEP_OVER; break; case FUNCT_BREAK: - util::stream_format( stream, "break $%05x", INS_CODE( op ) ); + util::stream_format( stream, "break 0x%05x", INS_CODE( op ) ); flags = STEP_OVER; break; case FUNCT_MFHI: @@ -268,13 +272,22 @@ offs_t psxcpu_disassembler::disassemble(std::ostream &stream, offs_t pc, const d util::stream_format( stream, "add %s,%s,%s", s_cpugenreg[ INS_RD( op ) ], s_cpugenreg[ INS_RS( op ) ], s_cpugenreg[ INS_RT( op ) ] ); break; case FUNCT_ADDU: - util::stream_format( stream, "addu %s,%s,%s", s_cpugenreg[ INS_RD( op ) ], s_cpugenreg[ INS_RS( op ) ], s_cpugenreg[ INS_RT( op ) ] ); + if( INS_RT( op ) == 0 ) + util::stream_format( stream, "move %s,%s", s_cpugenreg[ INS_RD( op ) ], s_cpugenreg[ INS_RS( op ) ] ); + else + util::stream_format( stream, "addu %s,%s,%s", s_cpugenreg[ INS_RD( op ) ], s_cpugenreg[ INS_RS( op ) ], s_cpugenreg[ INS_RT( op ) ] ); break; case FUNCT_SUB: - util::stream_format( stream, "sub %s,%s,%s", s_cpugenreg[ INS_RD( op ) ], s_cpugenreg[ INS_RS( op ) ], s_cpugenreg[ INS_RT( op ) ] ); + if( INS_RS( op ) == 0 ) + util::stream_format( stream, "neg %s,%s", s_cpugenreg[ INS_RD( op ) ], s_cpugenreg[ INS_RT( op ) ] ); + else + util::stream_format( stream, "sub %s,%s,%s", s_cpugenreg[ INS_RD( op ) ], s_cpugenreg[ INS_RS( op ) ], s_cpugenreg[ INS_RT( op ) ] ); break; case FUNCT_SUBU: - util::stream_format( stream, "subu %s,%s,%s", s_cpugenreg[ INS_RD( op ) ], s_cpugenreg[ INS_RS( op ) ], s_cpugenreg[ INS_RT( op ) ] ); + if( INS_RS( op ) == 0 ) + util::stream_format( stream, "negu %s,%s", s_cpugenreg[ INS_RD( op ) ], s_cpugenreg[ INS_RT( op ) ] ); + else + util::stream_format( stream, "subu %s,%s,%s", s_cpugenreg[ INS_RD( op ) ], s_cpugenreg[ INS_RS( op ) ], s_cpugenreg[ INS_RT( op ) ] ); break; case FUNCT_AND: util::stream_format( stream, "and %s,%s,%s", s_cpugenreg[ INS_RD( op ) ], s_cpugenreg[ INS_RS( op ) ], s_cpugenreg[ INS_RT( op ) ] ); @@ -286,7 +299,10 @@ offs_t psxcpu_disassembler::disassemble(std::ostream &stream, offs_t pc, const d util::stream_format( stream, "xor %s,%s,%s", s_cpugenreg[ INS_RD( op ) ], s_cpugenreg[ INS_RS( op ) ], s_cpugenreg[ INS_RT( op ) ] ); break; case FUNCT_NOR: - util::stream_format( stream, "nor %s,%s,%s", s_cpugenreg[ INS_RD( op ) ], s_cpugenreg[ INS_RS( op ) ], s_cpugenreg[ INS_RT( op ) ] ); + if( INS_RS( op ) == 0 || INS_RT( op ) == 0 ) + util::stream_format( stream, "not %s,%s", s_cpugenreg[ INS_RD( op ) ], s_cpugenreg[ INS_RS( op ) != 0 ? INS_RS( op ) : INS_RT( op ) ] ); + else + util::stream_format( stream, "nor %s,%s,%s", s_cpugenreg[ INS_RD( op ) ], s_cpugenreg[ INS_RS( op ) ], s_cpugenreg[ INS_RT( op ) ] ); break; case FUNCT_SLT: util::stream_format( stream, "slt %s,%s,%s", s_cpugenreg[ INS_RD( op ) ], s_cpugenreg[ INS_RS( op ) ], s_cpugenreg[ INS_RT( op ) ] ); @@ -302,13 +318,13 @@ offs_t psxcpu_disassembler::disassemble(std::ostream &stream, offs_t pc, const d case RT_BLTZ: if( INS_RT( op ) == RT_BLTZAL ) { - util::stream_format( stream, "bltzal %s,$%08x", s_cpugenreg[ INS_RS( op ) ], relative_address( pc, op ) ); + util::stream_format( stream, "bltzal %s,0x%08x", s_cpugenreg[ INS_RS( op ) ], relative_address( pc, op ) ); if( INS_RS( op ) != 0 ) flags = STEP_OVER | STEP_COND | step_over_extra( 1 ); } else { - util::stream_format( stream, "bltz %s,$%08x", s_cpugenreg[ INS_RS( op ) ], relative_address( pc, op ) ); + util::stream_format( stream, "bltz %s,0x%08x", s_cpugenreg[ INS_RS( op ) ], relative_address( pc, op ) ); if( INS_RS( op ) != 0 ) flags = STEP_COND | step_over_extra( 1 ); } @@ -316,14 +332,14 @@ offs_t psxcpu_disassembler::disassemble(std::ostream &stream, offs_t pc, const d case RT_BGEZ: if( INS_RT( op ) == RT_BGEZAL ) { - util::stream_format( stream, "bgezal %s,$%08x", s_cpugenreg[ INS_RS( op ) ], relative_address( pc, op ) ); + util::stream_format( stream, "bgezal %s,0x%08x", s_cpugenreg[ INS_RS( op ) ], relative_address( pc, op ) ); flags = STEP_OVER | step_over_extra( 1 ); if( INS_RS( op ) != 0 ) flags |= STEP_COND; } else { - util::stream_format( stream, "bgez %s,$%08x", s_cpugenreg[ INS_RS( op ) ], relative_address( pc, op ) ); + util::stream_format( stream, "bgez %s,0x%08x", s_cpugenreg[ INS_RS( op ) ], relative_address( pc, op ) ); if( INS_RS( op ) != 0 ) flags = STEP_COND | step_over_extra( 1 ); } @@ -331,33 +347,49 @@ offs_t psxcpu_disassembler::disassemble(std::ostream &stream, offs_t pc, const d } break; case OP_J: - util::stream_format( stream, "j $%08x", jump_address( pc, op ) ); + util::stream_format( stream, "j 0x%08x", jump_address( pc, op ) ); break; case OP_JAL: - util::stream_format( stream, "jal $%08x", jump_address( pc, op ) ); + util::stream_format( stream, "jal 0x%08x", jump_address( pc, op ) ); flags = STEP_OVER | step_over_extra( 1 ); break; case OP_BEQ: - util::stream_format( stream, "beq %s,%s,$%08x", s_cpugenreg[ INS_RS( op ) ], s_cpugenreg[ INS_RT( op ) ], relative_address( pc, op ) ); - flags = STEP_COND | step_over_extra( 1 ); + if( INS_RS( op ) == 0 && INS_RT( op ) == 0 ) + { + util::stream_format( stream, "b 0x%08x", relative_address( pc, op ) ); + } + else + { + if( INS_RT( op ) == 0 ) + util::stream_format( stream, "beqz %s,0x%08x", s_cpugenreg[ INS_RS( op ) ], relative_address( pc, op ) ); + else + util::stream_format( stream, "beq %s,%s,0x%08x", s_cpugenreg[ INS_RS( op ) ], s_cpugenreg[ INS_RT( op ) ], relative_address( pc, op ) ); + flags = STEP_COND | step_over_extra( 1 ); + } break; case OP_BNE: - util::stream_format( stream, "bne %s,%s,$%08x", s_cpugenreg[ INS_RS( op ) ], s_cpugenreg[ INS_RT( op ) ], relative_address( pc, op ) ); + if( INS_RT( op ) == 0 ) + util::stream_format( stream, "bnez %s,0x%08x", s_cpugenreg[ INS_RS( op ) ], relative_address( pc, op ) ); + else + util::stream_format( stream, "bne %s,%s,0x%08x", s_cpugenreg[ INS_RS( op ) ], s_cpugenreg[ INS_RT( op ) ], relative_address( pc, op ) ); flags = STEP_COND | step_over_extra( 1 ); break; case OP_BLEZ: - util::stream_format( stream, "blez %s,%s,$%08x", s_cpugenreg[ INS_RS( op ) ], s_cpugenreg[ INS_RT( op ) ], relative_address( pc, op ) ); + util::stream_format( stream, "blez %s,0x%08x", s_cpugenreg[ INS_RS( op ) ], relative_address( pc, op ) ); flags = STEP_COND | step_over_extra( 1 ); break; case OP_BGTZ: - util::stream_format( stream, "bgtz %s,%s,$%08x", s_cpugenreg[ INS_RS( op ) ], s_cpugenreg[ INS_RT( op ) ], relative_address( pc, op ) ); + util::stream_format( stream, "bgtz %s,0x%08x", s_cpugenreg[ INS_RS( op ) ], relative_address( pc, op ) ); flags = STEP_COND | step_over_extra( 1 ); break; case OP_ADDI: util::stream_format( stream, "addi %s,%s,%s", s_cpugenreg[ INS_RT( op ) ], s_cpugenreg[ INS_RS( op ) ], make_signed_hex_str_16( INS_IMMEDIATE( op ) ) ); break; case OP_ADDIU: - util::stream_format( stream, "addiu %s,%s,%s", s_cpugenreg[ INS_RT( op ) ], s_cpugenreg[ INS_RS( op ) ], make_signed_hex_str_16( INS_IMMEDIATE( op ) ) ); + if( INS_RS( op ) == 0 ) + util::stream_format( stream, "li %s,%s", s_cpugenreg[ INS_RT( op ) ], make_signed_hex_str_16( INS_IMMEDIATE( op ) ) ); + else + util::stream_format( stream, "addiu %s,%s,%s", s_cpugenreg[ INS_RT( op ) ], s_cpugenreg[ INS_RS( op ) ], make_signed_hex_str_16( INS_IMMEDIATE( op ) ) ); break; case OP_SLTI: util::stream_format( stream, "slti %s,%s,%s", s_cpugenreg[ INS_RT( op ) ], s_cpugenreg[ INS_RS( op ) ], make_signed_hex_str_16( INS_IMMEDIATE( op ) ) ); @@ -366,13 +398,16 @@ offs_t psxcpu_disassembler::disassemble(std::ostream &stream, offs_t pc, const d util::stream_format( stream, "sltiu %s,%s,%s", s_cpugenreg[ INS_RT( op ) ], s_cpugenreg[ INS_RS( op ) ], make_signed_hex_str_16( INS_IMMEDIATE( op ) ) ); break; case OP_ANDI: - util::stream_format( stream, "andi %s,%s,$%04x", s_cpugenreg[ INS_RT( op ) ], s_cpugenreg[ INS_RS( op ) ], INS_IMMEDIATE( op ) ); + util::stream_format( stream, "andi %s,%s,0x%04x", s_cpugenreg[ INS_RT( op ) ], s_cpugenreg[ INS_RS( op ) ], INS_IMMEDIATE( op ) ); break; case OP_ORI: - util::stream_format( stream, "ori %s,%s,$%04x", s_cpugenreg[ INS_RT( op ) ], s_cpugenreg[ INS_RS( op ) ], INS_IMMEDIATE( op ) ); + if( INS_RS( op ) == 0 ) + util::stream_format( stream, "li %s,0x%04x", s_cpugenreg[ INS_RT( op ) ], INS_IMMEDIATE( op ) ); + else + util::stream_format( stream, "ori %s,%s,0x%04x", s_cpugenreg[ INS_RT( op ) ], s_cpugenreg[ INS_RS( op ) ], INS_IMMEDIATE( op ) ); break; case OP_XORI: - util::stream_format( stream, "xori %s,%s,$%04x", s_cpugenreg[ INS_RT( op ) ], s_cpugenreg[ INS_RS( op ) ], INS_IMMEDIATE( op ) ); + util::stream_format( stream, "xori %s,%s,0x%04x", s_cpugenreg[ INS_RT( op ) ], s_cpugenreg[ INS_RS( op ) ], INS_IMMEDIATE( op ) ); break; case OP_LUI: util::stream_format( stream, "lui %s,%s", s_cpugenreg[ INS_RT( op ) ], upper_address( op, pos, opcodes ) ); @@ -397,10 +432,10 @@ offs_t psxcpu_disassembler::disassemble(std::ostream &stream, offs_t pc, const d switch( INS_BC( op ) ) { case BC_BCF: - util::stream_format( stream, "bc0f $%08x", relative_address( pc, op ) ); + util::stream_format( stream, "bc0f 0x%08x", relative_address( pc, op ) ); break; case BC_BCT: - util::stream_format( stream, "bc0t $%08x", relative_address( pc, op ) ); + util::stream_format( stream, "bc0t 0x%08x", relative_address( pc, op ) ); break; } flags = STEP_COND | step_over_extra( 1 ); @@ -427,7 +462,7 @@ offs_t psxcpu_disassembler::disassemble(std::ostream &stream, offs_t pc, const d util::stream_format( stream, "rfe" ); break; default: - util::stream_format(stream, "cop0 $%07x", INS_COFUN(op)); + util::stream_format(stream, "cop0 0x%07x", INS_COFUN(op)); break; } break; @@ -455,10 +490,10 @@ offs_t psxcpu_disassembler::disassemble(std::ostream &stream, offs_t pc, const d switch( INS_BC( op ) ) { case BC_BCF: - util::stream_format( stream, "bc1f $%08x", relative_address( pc, op ) ); + util::stream_format( stream, "bc1f 0x%08x", relative_address( pc, op ) ); break; case BC_BCT: - util::stream_format( stream, "bc1t $%08x", relative_address( pc, op ) ); + util::stream_format( stream, "bc1t 0x%08x", relative_address( pc, op ) ); break; } flags = STEP_COND | step_over_extra( 1 ); @@ -467,7 +502,7 @@ offs_t psxcpu_disassembler::disassemble(std::ostream &stream, offs_t pc, const d switch( INS_CO( op ) ) { case 1: - util::stream_format( stream, "cop1 $%07x", INS_COFUN( op ) ); + util::stream_format( stream, "cop1 0x%07x", INS_COFUN( op ) ); break; } break; @@ -493,10 +528,10 @@ offs_t psxcpu_disassembler::disassemble(std::ostream &stream, offs_t pc, const d switch( INS_BC( op ) ) { case BC_BCF: - util::stream_format( stream, "bc2f $%08x", relative_address( pc, op ) ); + util::stream_format( stream, "bc2f 0x%08x", relative_address( pc, op ) ); break; case BC_BCT: - util::stream_format( stream, "bc2t $%08x", relative_address( pc, op ) ); + util::stream_format( stream, "bc2t 0x%08x", relative_address( pc, op ) ); break; } flags = STEP_COND | step_over_extra( 1 ); @@ -577,7 +612,7 @@ offs_t psxcpu_disassembler::disassemble(std::ostream &stream, offs_t pc, const d util::stream_format( stream, "ncct%s%s", s_gtesf[ GTE_SF( op ) ], s_gtelm[ GTE_LM( op ) ] ); break; default: - util::stream_format(stream, "cop2 $%07x", INS_COFUN(op)); + util::stream_format(stream, "cop2 0x%07x", INS_COFUN(op)); break; } } @@ -604,10 +639,10 @@ offs_t psxcpu_disassembler::disassemble(std::ostream &stream, offs_t pc, const d switch( INS_BC( op ) ) { case BC_BCF: - util::stream_format( stream, "bc3f $%08x", relative_address( pc, op ) ); + util::stream_format( stream, "bc3f 0x%08x", relative_address( pc, op ) ); break; case BC_BCT: - util::stream_format( stream, "bc3t $%08x", relative_address( pc, op ) ); + util::stream_format( stream, "bc3t 0x%08x", relative_address( pc, op ) ); break; } flags = STEP_COND | step_over_extra( 1 ); @@ -616,7 +651,7 @@ offs_t psxcpu_disassembler::disassemble(std::ostream &stream, offs_t pc, const d switch( INS_CO( op ) ) { case 1: - util::stream_format( stream, "cop3 $%07x", INS_COFUN( op ) ); + util::stream_format( stream, "cop3 0x%07x", INS_COFUN( op ) ); break; } break; @@ -687,7 +722,7 @@ offs_t psxcpu_disassembler::disassemble(std::ostream &stream, offs_t pc, const d // fall back if we have not emitted anything if (current_pos == stream.tellp()) { - util::stream_format(stream, "dw $%08x", op); + util::stream_format(stream, "dw 0x%08x", op); } return ( pos - pc ) | flags | SUPPORTED; diff --git a/src/devices/cpu/rsp/rsp_dasm.cpp b/src/devices/cpu/rsp/rsp_dasm.cpp index 8c266c0df21..765c03bb7d3 100644 --- a/src/devices/cpu/rsp/rsp_dasm.cpp +++ b/src/devices/cpu/rsp/rsp_dasm.cpp @@ -64,11 +64,11 @@ inline std::string rsp_disassembler::signed_imm16(uint32_t op) if (value < 0) { - return util::string_format("-$%04x", -value); + return util::string_format("-0x%04x", -value); } else { - return util::string_format("$%04x", value); + return util::string_format("0x%04x", value); } } @@ -303,30 +303,30 @@ offs_t rsp_disassembler::dasm_one(std::ostream &stream, offs_t pc, u32 op) { switch ((op >> 16) & 0x1f) { - case 0x00: util::stream_format(stream, "bltz %s, $%08X", reg[rs], pc + 4 + ((int16_t)op << 2)); if (rs != 0) flags = STEP_COND | step_over_extra(1); break; - case 0x01: util::stream_format(stream, "bgez %s, $%08X", reg[rs], pc + 4 + ((int16_t)op << 2)); if (rs != 0) flags = STEP_COND | step_over_extra(1); break; - case 0x10: util::stream_format(stream, "bltzal %s, $%08X", reg[rs], pc + 4 + ((int16_t)op << 2)); if (rs != 0) flags = STEP_OVER | STEP_COND | step_over_extra(1); break; - case 0x11: util::stream_format(stream, "bgezal %s, $%08X", reg[rs], pc + 4 + ((int16_t)op << 2)); flags = STEP_OVER | step_over_extra(1); if (rs != 0) flags |= STEP_COND; break; + case 0x00: util::stream_format(stream, "bltz %s, 0x%08X", reg[rs], pc + 4 + ((int16_t)op << 2)); if (rs != 0) flags = STEP_COND | step_over_extra(1); break; + case 0x01: util::stream_format(stream, "bgez %s, 0x%08X", reg[rs], pc + 4 + ((int16_t)op << 2)); if (rs != 0) flags = STEP_COND | step_over_extra(1); break; + case 0x10: util::stream_format(stream, "bltzal %s, 0x%08X", reg[rs], pc + 4 + ((int16_t)op << 2)); if (rs != 0) flags = STEP_OVER | STEP_COND | step_over_extra(1); break; + case 0x11: util::stream_format(stream, "bgezal %s, 0x%08X", reg[rs], pc + 4 + ((int16_t)op << 2)); flags = STEP_OVER | step_over_extra(1); if (rs != 0) flags |= STEP_COND; break; default: util::stream_format(stream, "???"); break; } break; } - case 0x02: util::stream_format(stream, "j $%08X", (op & 0x03ffffff) << 2); break; - case 0x03: util::stream_format(stream, "jal $%08X", (op & 0x03ffffff) << 2); break; - case 0x04: util::stream_format(stream, "beq %s, %s, $%08X", reg[rs], reg[rt], pc + 4 + ((int16_t)(op) << 2)); if (rs != rt) flags = STEP_COND | step_over_extra(1); break; - case 0x05: util::stream_format(stream, "bne %s, %s, $%08X", reg[rs], reg[rt], pc + 4 + ((int16_t)(op) << 2)); if (rs != rt) flags = STEP_COND | step_over_extra(1); break; - case 0x06: util::stream_format(stream, "blez %s, $%08X", reg[rs], pc + 4 + ((int16_t)(op) << 2)); if (rs != 0) flags = STEP_COND | step_over_extra(1); break; - case 0x07: util::stream_format(stream, "bgtz %s, $%08X", reg[rs], pc + 4 + ((int16_t)(op) << 2)); if (rs != 0) flags = STEP_COND | step_over_extra(1); break; + case 0x02: util::stream_format(stream, "j 0x%08X", (op & 0x03ffffff) << 2); break; + case 0x03: util::stream_format(stream, "jal 0x%08X", (op & 0x03ffffff) << 2); break; + case 0x04: util::stream_format(stream, "beq %s, %s, 0x%08X", reg[rs], reg[rt], pc + 4 + ((int16_t)(op) << 2)); if (rs != rt) flags = STEP_COND | step_over_extra(1); break; + case 0x05: util::stream_format(stream, "bne %s, %s, 0x%08X", reg[rs], reg[rt], pc + 4 + ((int16_t)(op) << 2)); if (rs != rt) flags = STEP_COND | step_over_extra(1); break; + case 0x06: util::stream_format(stream, "blez %s, 0x%08X", reg[rs], pc + 4 + ((int16_t)(op) << 2)); if (rs != 0) flags = STEP_COND | step_over_extra(1); break; + case 0x07: util::stream_format(stream, "bgtz %s, 0x%08X", reg[rs], pc + 4 + ((int16_t)(op) << 2)); if (rs != 0) flags = STEP_COND | step_over_extra(1); break; case 0x08: util::stream_format(stream, "addi %s, %s, %s", reg[rt], reg[rs], signed_imm16(op)); break; case 0x09: util::stream_format(stream, "addiu %s, %s, %s", reg[rt], reg[rs], signed_imm16(op)); break; case 0x0a: util::stream_format(stream, "slti %s, %s, %s", reg[rt], reg[rs], signed_imm16(op)); break; case 0x0b: util::stream_format(stream, "sltiu %s, %s, %s", reg[rt], reg[rs], signed_imm16(op)); break; - case 0x0c: util::stream_format(stream, "andi %s, %s, $%04X", reg[rt], reg[rs], (uint16_t)(op)); break; - case 0x0d: util::stream_format(stream, "ori %s, %s, $%04X", reg[rt], reg[rs], (uint16_t)(op)); break; - case 0x0e: util::stream_format(stream, "xori %s, %s, $%04X", reg[rt], reg[rs], (uint16_t)(op)); break; - case 0x0f: util::stream_format(stream, "lui %s, %s, $%04X", reg[rt], reg[rs], (uint16_t)(op)); break; + case 0x0c: util::stream_format(stream, "andi %s, %s, 0x%04X", reg[rt], reg[rs], (uint16_t)(op)); break; + case 0x0d: util::stream_format(stream, "ori %s, %s, 0x%04X", reg[rt], reg[rs], (uint16_t)(op)); break; + case 0x0e: util::stream_format(stream, "xori %s, %s, 0x%04X", reg[rt], reg[rs], (uint16_t)(op)); break; + case 0x0f: util::stream_format(stream, "lui %s, %s, 0x%04X", reg[rt], reg[rs], (uint16_t)(op)); break; case 0x10: disasm_cop0(stream, op); break; case 0x12: disasm_cop2(stream, op); break; |