diff options
Diffstat (limited to 'src/devices/cpu/tms1000/tms1k_base.h')
-rw-r--r-- | src/devices/cpu/tms1000/tms1k_base.h | 116 |
1 files changed, 58 insertions, 58 deletions
diff --git a/src/devices/cpu/tms1000/tms1k_base.h b/src/devices/cpu/tms1000/tms1k_base.h index 136a54e61c7..fa2ce2b7e8d 100644 --- a/src/devices/cpu/tms1000/tms1k_base.h +++ b/src/devices/cpu/tms1000/tms1k_base.h @@ -73,67 +73,67 @@ protected: // microinstructions enum { - M_15TN = (1<<0), /* 15 to -ALU */ - M_ATN = (1<<1), /* ACC to -ALU */ - M_AUTA = (1<<2), /* ALU to ACC */ - M_AUTY = (1<<3), /* ALU to Y */ - M_C8 = (1<<4), /* CARRY8 to STATUS */ - M_CIN = (1<<5), /* Carry In to ALU */ - M_CKM = (1<<6), /* CKB to MEM */ - M_CKN = (1<<7), /* CKB to -ALU */ - M_CKP = (1<<8), /* CKB to +ALU */ - M_MTN = (1<<9), /* MEM to -ALU */ - M_MTP = (1<<10), /* MEM to +ALU */ - M_NATN = (1<<11), /* ~ACC to -ALU */ - M_NE = (1<<12), /* COMP to STATUS */ - M_STO = (1<<13), /* ACC to MEM */ - M_STSL = (1<<14), /* STATUS to Status Latch */ - M_YTP = (1<<15), /* Y to +ALU */ - - M_CME = (1<<16), /* Conditional Memory Enable */ - M_DMTP = (1<<17), /* DAM to +ALU */ - M_NDMTP = (1<<18), /* ~DAM to +ALU */ - M_SSE = (1<<19), /* Special Status Enable */ - M_SSS = (1<<20), /* Special Status Sample */ - - M_SETR = (1<<21), /* -> line #0d, F_SETR (TP0320 custom), */ - M_RSTR = (1<<22), /* -> line #36, F_RSTR (TMS02x0 custom), */ - M_UNK1 = (1<<23) /* -> line #37, F_???? (TMS0270 custom), */ + M_15TN = (1U << 0), // 15 to -ALU + M_ATN = (1U << 1), // ACC to -ALU + M_AUTA = (1U << 2), // ALU to ACC + M_AUTY = (1U << 3), // ALU to Y + M_C8 = (1U << 4), // CARRY8 to STATUS + M_CIN = (1U << 5), // Carry In to ALU + M_CKM = (1U << 6), // CKB to MEM + M_CKN = (1U << 7), // CKB to -ALU + M_CKP = (1U << 8), // CKB to +ALU + M_MTN = (1U << 9), // MEM to -ALU + M_MTP = (1U << 10), // MEM to +ALU + M_NATN = (1U << 11), // ~ACC to -ALU + M_NE = (1U << 12), // COMP to STATUS + M_STO = (1U << 13), // ACC to MEM + M_STSL = (1U << 14), // STATUS to Status Latch + M_YTP = (1U << 15), // Y to +ALU + + M_CME = (1U << 16), // Conditional Memory Enable + M_DMTP = (1U << 17), // DAM to +ALU + M_NDMTP = (1U << 18), // ~DAM to +ALU + M_SSE = (1U << 19), // Special Status Enable + M_SSS = (1U << 20), // Special Status Sample + + M_SETR = (1U << 21), // -> line #0d, F_SETR (TP0320 custom) + M_RSTR = (1U << 22), // -> line #36, F_RSTR (TMS02x0 custom) + M_UNK1 = (1U << 23) // -> line #37, F_???? (TMS0270 custom) }; // standard/fixed instructions - these are documented more in their specific handlers enum { - F_BR = (1<<0), - F_CALL = (1<<1), - F_CLO = (1<<2), - F_COMC = (1<<3), - F_COMX = (1<<4), - F_COMX8 = (1<<5), - F_LDP = (1<<6), - F_LDX = (1<<7), - F_RBIT = (1<<8), - F_RETN = (1<<9), - F_RSTR = (1<<10), - F_SBIT = (1<<11), - F_SETR = (1<<12), - F_TDO = (1<<13), - F_TPC = (1<<14), - - F_TAX = (1<<15), - F_TXA = (1<<16), - F_TRA = (1<<17), - F_TAC = (1<<18), - F_TCA = (1<<19), - F_TADM = (1<<20), - F_TMA = (1<<21), - - F_OFF = (1<<22), - F_REAC = (1<<23), - F_SAL = (1<<24), - F_SBL = (1<<25), - F_SEAC = (1<<26), - F_XDA = (1<<27) + F_BR = (1ULL << 0), + F_CALL = (1ULL << 1), + F_CLO = (1ULL << 2), + F_COMC = (1ULL << 3), + F_COMX = (1ULL << 4), + F_COMX8 = (1ULL << 5), + F_LDP = (1ULL << 6), + F_LDX = (1ULL << 7), + F_RBIT = (1ULL << 8), + F_RETN = (1ULL << 9), + F_RSTR = (1ULL << 10), + F_SBIT = (1ULL << 11), + F_SETR = (1ULL << 12), + F_TDO = (1ULL << 13), + F_TPC = (1ULL << 14), + + F_TAX = (1ULL << 15), + F_TXA = (1ULL << 16), + F_TRA = (1ULL << 17), + F_TAC = (1ULL << 18), + F_TCA = (1ULL << 19), + F_TADM = (1ULL << 20), + F_TMA = (1ULL << 21), + + F_OFF = (1ULL << 22), + F_REAC = (1ULL << 23), + F_SAL = (1ULL << 24), + F_SBL = (1ULL << 25), + F_SEAC = (1ULL << 26), + F_XDA = (1ULL << 27) }; void rom_10bit(address_map &map); @@ -231,7 +231,7 @@ protected: u8 m_ram_address; u16 m_rom_address; u16 m_opcode; - u32 m_fixed; + u64 m_fixed; u32 m_micro; int m_subcycle; u8 m_o_index; @@ -272,7 +272,7 @@ protected: int m_state_count; // lookup tables - std::vector<u32> m_fixed_decode; + std::vector<u64> m_fixed_decode; std::vector<u32> m_micro_decode; std::vector<u32> m_micro_direct; }; |