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Diffstat (limited to 'src/devices/cpu/s2650/s2650.cpp')
-rw-r--r--src/devices/cpu/s2650/s2650.cpp1127
1 files changed, 554 insertions, 573 deletions
diff --git a/src/devices/cpu/s2650/s2650.cpp b/src/devices/cpu/s2650/s2650.cpp
index 0b306682249..fbcd2d07afc 100644
--- a/src/devices/cpu/s2650/s2650.cpp
+++ b/src/devices/cpu/s2650/s2650.cpp
@@ -13,30 +13,32 @@
*************************************************************************/
#include "emu.h"
-#include "debugger.h"
#include "s2650.h"
-#include "s2650cpu.h"
-/* define this to have some interrupt information logged */
+// define this to have some interrupt information logged
//#define VERBOSE 1
#include "logmacro.h"
-/* define this to expand all EA calculations inline */
+// define this to enable Z80 mnemonics in the debugger
+#define DEBUG_Z80 0
+
+// define this to expand all EA calculations inline
#define INLINE_EA 1
-DEFINE_DEVICE_TYPE(S2650, s2650_device, "s2650", "Signetics S2650")
+DEFINE_DEVICE_TYPE(S2650, s2650_device, "s2650", "Signetics 2650")
s2650_device::s2650_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: cpu_device(mconfig, S2650, tag, owner, clock)
- , m_program_config("program", ENDIANNESS_LITTLE, 8, 15)
- , m_io_config("io", ENDIANNESS_LITTLE, 8, 8)
- , m_data_config("data", ENDIANNESS_LITTLE, 8, 1)
- , m_sense_handler(*this)
- , m_flag_handler(*this), m_intack_handler(*this)
+ , m_program_config("program", ENDIANNESS_BIG, 8, 15)
+ , m_io_config("io", ENDIANNESS_BIG, 8, 8)
+ , m_data_config("data", ENDIANNESS_BIG, 8, 1)
+ , m_sense_handler(*this, 0)
+ , m_flag_handler(*this)
+ , m_intack_handler(*this, 0x00)
, m_ppc(0), m_page(0), m_iar(0), m_ea(0), m_psl(0), m_psu(0), m_r(0)
- , m_halt(0), m_ir(0), m_irq_state(0), m_icount(0), m_cache(nullptr)
+ , m_halt(0), m_ir(0), m_irq_state(0)
, m_debugger_temp(0)
{
memset(m_reg, 0x00, sizeof(m_reg));
@@ -44,8 +46,7 @@ s2650_device::s2650_device(const machine_config &mconfig, const char *tag, devic
bool s2650_device::get_z80_mnemonics_mode() const
{
- // Needs to become configurable live
- return false;
+ return bool(DEBUG_Z80);
}
std::unique_ptr<util::disasm_interface> s2650_device::create_disassembler()
@@ -55,7 +56,8 @@ std::unique_ptr<util::disasm_interface> s2650_device::create_disassembler()
device_memory_interface::space_config_vector s2650_device::memory_space_config() const
{
- return space_config_vector {
+ return space_config_vector
+ {
// Memory-mapped: M/~IO=1
std::make_pair(AS_PROGRAM, &m_program_config),
@@ -70,8 +72,9 @@ device_memory_interface::space_config_vector s2650_device::memory_space_config()
}
-/* condition code changes for a byte */
-static const uint8_t ccc[0x200] = {
+// condition code changes for a byte
+static const uint8_t ccc[0x100] =
+{
0x00,0x40,0x40,0x40,0x40,0x40,0x40,0x40,
0x40,0x40,0x40,0x40,0x40,0x40,0x40,0x40,
0x40,0x40,0x40,0x40,0x40,0x40,0x40,0x40,
@@ -103,71 +106,45 @@ static const uint8_t ccc[0x200] = {
0x80,0x80,0x80,0x80,0x80,0x80,0x80,0x80,
0x80,0x80,0x80,0x80,0x80,0x80,0x80,0x80,
0x80,0x80,0x80,0x80,0x80,0x80,0x80,0x80,
- 0x80,0x80,0x80,0x80,0x80,0x80,0x80,0x80,
- 0x04,0x44,0x44,0x44,0x44,0x44,0x44,0x44,
- 0x44,0x44,0x44,0x44,0x44,0x44,0x44,0x44,
- 0x44,0x44,0x44,0x44,0x44,0x44,0x44,0x44,
- 0x44,0x44,0x44,0x44,0x44,0x44,0x44,0x44,
- 0x44,0x44,0x44,0x44,0x44,0x44,0x44,0x44,
- 0x44,0x44,0x44,0x44,0x44,0x44,0x44,0x44,
- 0x44,0x44,0x44,0x44,0x44,0x44,0x44,0x44,
- 0x44,0x44,0x44,0x44,0x44,0x44,0x44,0x44,
- 0x44,0x44,0x44,0x44,0x44,0x44,0x44,0x44,
- 0x44,0x44,0x44,0x44,0x44,0x44,0x44,0x44,
- 0x44,0x44,0x44,0x44,0x44,0x44,0x44,0x44,
- 0x44,0x44,0x44,0x44,0x44,0x44,0x44,0x44,
- 0x44,0x44,0x44,0x44,0x44,0x44,0x44,0x44,
- 0x44,0x44,0x44,0x44,0x44,0x44,0x44,0x44,
- 0x44,0x44,0x44,0x44,0x44,0x44,0x44,0x44,
- 0x44,0x44,0x44,0x44,0x44,0x44,0x44,0x44,
- 0x84,0x84,0x84,0x84,0x84,0x84,0x84,0x84,
- 0x84,0x84,0x84,0x84,0x84,0x84,0x84,0x84,
- 0x84,0x84,0x84,0x84,0x84,0x84,0x84,0x84,
- 0x84,0x84,0x84,0x84,0x84,0x84,0x84,0x84,
- 0x84,0x84,0x84,0x84,0x84,0x84,0x84,0x84,
- 0x84,0x84,0x84,0x84,0x84,0x84,0x84,0x84,
- 0x84,0x84,0x84,0x84,0x84,0x84,0x84,0x84,
- 0x84,0x84,0x84,0x84,0x84,0x84,0x84,0x84,
- 0x84,0x84,0x84,0x84,0x84,0x84,0x84,0x84,
- 0x84,0x84,0x84,0x84,0x84,0x84,0x84,0x84,
- 0x84,0x84,0x84,0x84,0x84,0x84,0x84,0x84,
- 0x84,0x84,0x84,0x84,0x84,0x84,0x84,0x84,
- 0x84,0x84,0x84,0x84,0x84,0x84,0x84,0x84,
- 0x84,0x84,0x84,0x84,0x84,0x84,0x84,0x84,
- 0x84,0x84,0x84,0x84,0x84,0x84,0x84,0x84,
- 0x84,0x84,0x84,0x84,0x84,0x84,0x84,0x84
+ 0x80,0x80,0x80,0x80,0x80,0x80,0x80,0x80
};
+
/***************************************************************
- * handy table to build PC relative offsets
- * from HR (holding register)
+ * macros for CPU registers/flags
***************************************************************/
-static const int S2650_relative[0x100] =
-{
- 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
- 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31,
- 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47,
- 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63,
- -64,-63,-62,-61,-60,-59,-58,-57,-56,-55,-54,-53,-52,-51,-50,-49,
- -48,-47,-46,-45,-44,-43,-42,-41,-40,-39,-38,-37,-36,-35,-34,-33,
- -32,-31,-30,-29,-28,-27,-26,-25,-24,-23,-22,-21,-20,-19,-18,-17,
- -16,-15,-14,-13,-12,-11,-10, -9, -8, -7, -6, -5, -4, -3, -2, -1,
- 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
- 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31,
- 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47,
- 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63,
- -64,-63,-62,-61,-60,-59,-58,-57,-56,-55,-54,-53,-52,-51,-50,-49,
- -48,-47,-46,-45,-44,-43,-42,-41,-40,-39,-38,-37,-36,-35,-34,-33,
- -32,-31,-30,-29,-28,-27,-26,-25,-24,-23,-22,-21,-20,-19,-18,-17,
- -16,-15,-14,-13,-12,-11,-10, -9, -8, -7, -6, -5, -4, -3, -2, -1,
-};
+#define PMSK 0x1fff // mask page offset
+#define PLEN 0x2000 // page length
+#define PAGE 0x6000 // mask page
+#define AMSK 0x7fff // mask address range
+
+// processor status lower
+#define C 0x01 // carry flag
+#define COM 0x02 // compare: 0 binary, 1 2s complement
+#define OVF 0x04 // 2s complement overflow
+#define WC 0x08 // with carry: use carry in arithmetic / rotate ops
+#define RS 0x10 // register select 0: R0/R1/R2/R3 1: R0/R4/R5/R6
+#define IDC 0x20 // inter digit carry: bit-3-to-bit-4 carry
+#define CC 0xc0 // condition code
+
+// processor status upper
+#define SP 0x07 // stack pointer: indexing 8 15bit words
+#define PSU34 0x18 // unused bits
+#define II 0x20 // interrupt inhibit 0: allow, 1: inhibit
+#define FO 0x40 // flag output
+#define SI 0x80 // sense input
+
+#define R0 m_reg[0]
+#define R1 m_reg[1]
+#define R2 m_reg[2]
+#define R3 m_reg[3]
/***************************************************************
* RDMEM
* read memory byte from addr
***************************************************************/
-#define RDMEM(addr) space(AS_PROGRAM).read_byte(addr)
+#define RDMEM(addr) m_program.read_byte(addr)
inline void s2650_device::set_psu(uint8_t new_val)
{
@@ -180,7 +157,7 @@ inline void s2650_device::set_psu(uint8_t new_val)
inline uint8_t s2650_device::get_psu()
{
- if (!m_sense_handler.isnull())
+ if (!m_sense_handler.isunset())
{
if (m_sense_handler())
m_psu |= SI;
@@ -207,26 +184,27 @@ inline int s2650_device::check_irq_line()
if (m_irq_state != CLEAR_LINE)
{
- if( (m_psu & II) == 0 )
+ if ((m_psu & II) == 0)
{
- int vector;
if (m_halt)
{
m_halt = 0;
m_iar = (m_iar + 1) & PMSK;
}
- vector = standard_irq_callback(0) & 0xff;
+ standard_irq_callback(0, m_page + m_iar);
- /* Say hi */
- m_intack_handler(true);
+ // Say hi
+ int vector = m_intack_handler();
- /* build effective address within first 8K page */
- m_ea = S2650_relative[vector] & PMSK;
- if (vector & 0x80) /* indirect bit set ? */
+ // build effective address within first 8K page
+ cycles += 9; // ZBSR
+ m_ea = util::sext(vector, 7) & PMSK;
+ if (vector & 0x80) // indirect bit set ?
{
int addr = m_ea;
cycles += 6;
- /* build indirect 32K address */
+
+ // build indirect 32K address
m_ea = RDMEM(addr) << 8;
if (!(++addr & PMSK)) addr -= PLEN;
m_ea = (m_ea + RDMEM(addr)) & AMSK;
@@ -239,6 +217,7 @@ inline int s2650_device::check_irq_line()
m_iar = m_ea & PMSK;
}
}
+
return cycles;
}
@@ -247,18 +226,7 @@ inline int s2650_device::check_irq_line()
* set condition code (zero,plus,minus) from result
***************************************************************/
#define SET_CC(result) \
- m_psl = (m_psl & ~CC) | ccc[result]
-
-/***************************************************************
- *
- * set condition code (zero,plus,minus) and overflow
- ***************************************************************/
-#define SET_CC_OVF(result,value) \
- m_psl = (m_psl & ~(OVF+CC)) | \
- ccc[result + (((value) & 0x80) << 1)]
-
-#define SET_CC_OVF_ADD(result,value1,value2) SET_CC_OVF(result,~((value1) ^ (value2)) & ((value1) ^ (result)))
-#define SET_CC_OVF_SUB(result,value1,value2) SET_CC_OVF(result,~((value1) ^ (value2)) & ((value1) ^ (result)))
+ m_psl = (m_psl & ~CC) | ccc[result & 0xff]
/***************************************************************
* ROP
@@ -266,7 +234,7 @@ inline int s2650_device::check_irq_line()
***************************************************************/
inline uint8_t s2650_device::ROP()
{
- uint8_t result = m_cache->read_byte(m_page + m_iar);
+ uint8_t result = m_cprogram.read_byte(m_page + m_iar);
m_iar = (m_iar + 1) & PMSK;
return result;
}
@@ -277,7 +245,7 @@ inline uint8_t s2650_device::ROP()
***************************************************************/
inline uint8_t s2650_device::ARG()
{
- uint8_t result = m_cache->read_byte(m_page + m_iar);
+ uint8_t result = m_cprogram.read_byte(m_page + m_iar);
m_iar = (m_iar + 1) & PMSK;
return result;
}
@@ -290,13 +258,15 @@ inline uint8_t s2650_device::ARG()
{ \
uint8_t hr = ARG(); /* get 'holding register' */ \
/* build effective address within current 8K page */ \
- m_ea = page + ((m_iar + S2650_relative[hr]) & PMSK); \
- if (hr & 0x80) { /* indirect bit set ? */ \
- int addr = m_ea; \
- m_icount -= 6; \
+ m_ea = page + ((m_iar + util::sext(hr, 7)) & PMSK); \
+ if (hr & 0x80) \
+ { \
+ /* indirect bit set ? */ \
+ int addr = m_ea; \
+ m_icount -= 6; \
/* build indirect 32K address */ \
- m_ea = RDMEM(addr) << 8; \
- if( (++addr & PMSK) == 0 ) addr -= PLEN; /* page wrap */\
+ m_ea = RDMEM(addr) << 8; \
+ if ((++addr & PMSK) == 0) addr -= PLEN; /* page wrap */ \
m_ea = (m_ea + RDMEM(addr)) & AMSK; \
} \
}
@@ -309,13 +279,15 @@ inline uint8_t s2650_device::ARG()
{ \
uint8_t hr = ARG(); /* get 'holding register' */ \
/* build effective address from 0 */ \
- m_ea = (S2650_relative[hr] & PMSK); \
- if (hr & 0x80) { /* indirect bit set ? */ \
- int addr = m_ea; \
- m_icount -= 6; \
+ m_ea = (util::sext(hr, 7) & PMSK); \
+ if (hr & 0x80) \
+ { \
+ /* indirect bit set ? */ \
+ int addr = m_ea; \
+ m_icount -= 6; \
/* build indirect 32K address */ \
- m_ea = RDMEM(addr) << 8; \
- if( (++addr & PMSK) == 0 ) addr -= PLEN; /* page wrap */\
+ m_ea = RDMEM(addr) << 8; \
+ if ((++addr & PMSK) == 0) addr -= PLEN; /* page wrap */ \
m_ea = (m_ea + RDMEM(addr)) & AMSK; \
} \
}
@@ -326,38 +298,40 @@ inline uint8_t s2650_device::ARG()
***************************************************************/
#define _ABS_EA() \
{ \
- uint8_t hr, dr; \
- hr = ARG(); /* get 'holding register' */ \
- dr = ARG(); /* get 'data bus register' */ \
+ uint8_t hr, dr; \
+ hr = ARG(); /* get 'holding register' */ \
+ dr = ARG(); /* get 'data bus register' */ \
/* build effective address within current 8K page */ \
m_ea = m_page + (((hr << 8) + dr) & PMSK); \
/* indirect addressing ? */ \
- if (hr & 0x80) { \
- int addr = m_ea; \
- m_icount -= 6; \
+ if (hr & 0x80) \
+ { \
+ int addr = m_ea; \
+ m_icount -= 6; \
/* build indirect 32K address */ \
/* build indirect 32K address */ \
- m_ea = RDMEM(addr) << 8; \
- if( (++addr & PMSK) == 0 ) addr -= PLEN; /* page wrap */\
+ m_ea = RDMEM(addr) << 8; \
+ if ((++addr & PMSK) == 0) addr -= PLEN; /* page wrap */ \
m_ea = (m_ea + RDMEM(addr)) & AMSK; \
} \
/* check indexed addressing modes */ \
- switch (hr & 0x60) { \
+ switch (hr & 0x60) \
+ { \
case 0x00: /* not indexed */ \
break; \
case 0x20: /* auto increment indexed */ \
m_reg[m_r] += 1; \
- m_ea = (m_ea & PAGE)+((m_ea+m_reg[m_r]) & PMSK); \
- m_r = 0; /* absolute addressing reg is R0 */ \
+ m_ea = (m_ea & PAGE) + ((m_ea + m_reg[m_r]) & PMSK);\
+ m_r = 0; /* absolute addressing reg is R0 */ \
break; \
case 0x40: /* auto decrement indexed */ \
m_reg[m_r] -= 1; \
- m_ea = (m_ea & PAGE)+((m_ea+m_reg[m_r]) & PMSK); \
- m_r = 0; /* absolute addressing reg is R0 */ \
+ m_ea = (m_ea & PAGE) + ((m_ea + m_reg[m_r]) & PMSK);\
+ m_r = 0; /* absolute addressing reg is R0 */ \
break; \
case 0x60: /* indexed */ \
- m_ea = (m_ea & PAGE)+((m_ea+m_reg[m_r]) & PMSK); \
- m_r = 0; /* absolute addressing reg is R0 */ \
+ m_ea = (m_ea & PAGE) + ((m_ea + m_reg[m_r]) & PMSK);\
+ m_r = 0; /* absolute addressing reg is R0 */ \
break; \
} \
}
@@ -368,18 +342,19 @@ inline uint8_t s2650_device::ARG()
***************************************************************/
#define _BRA_EA() \
{ \
- uint8_t hr, dr; \
- hr = ARG(); /* get 'holding register' */ \
- dr = ARG(); /* get 'data bus register' */ \
+ uint8_t hr, dr; \
+ hr = ARG(); /* get 'holding register' */ \
+ dr = ARG(); /* get 'data bus register' */ \
/* build address in 32K address space */ \
- m_ea = ((hr << 8) + dr) & AMSK; \
+ m_ea = ((hr << 8) + dr) & AMSK; \
/* indirect addressing ? */ \
- if (hr & 0x80) { \
- int addr = m_ea; \
- m_icount -= 6; \
+ if (hr & 0x80) \
+ { \
+ int addr = m_ea; \
+ m_icount -= 6; \
/* build indirect 32K address */ \
- m_ea = RDMEM(addr) << 8; \
- if( (++addr & PMSK) == 0 ) addr -= PLEN; /* page wrap */\
+ m_ea = RDMEM(addr) << 8; \
+ if ((++addr & PMSK) == 0) addr -= PLEN; /* page wrap */ \
m_ea = (m_ea + RDMEM(addr)) & AMSK; \
} \
}
@@ -391,16 +366,16 @@ inline uint8_t s2650_device::ARG()
***************************************************************/
#define SWAP_REGS \
{ \
- uint8_t tmp; \
- tmp = m_reg[1]; \
+ uint8_t tmp; \
+ tmp = m_reg[1]; \
m_reg[1] = m_reg[4]; \
- m_reg[4] = tmp; \
- tmp = m_reg[2]; \
+ m_reg[4] = tmp; \
+ tmp = m_reg[2]; \
m_reg[2] = m_reg[5]; \
- m_reg[5] = tmp; \
- tmp = m_reg[3]; \
+ m_reg[5] = tmp; \
+ tmp = m_reg[3]; \
m_reg[3] = m_reg[6]; \
- m_reg[6] = tmp; \
+ m_reg[6] = tmp; \
}
/***************************************************************
@@ -411,10 +386,14 @@ inline uint8_t s2650_device::ARG()
{ \
if (cond) \
{ \
- REL_EA( m_page ); \
+ REL_EA(m_page); \
m_page = m_ea & PAGE; \
m_iar = m_ea & PMSK; \
- } else m_iar = (m_iar + 1) & PMSK; \
+ } \
+ else \
+ { \
+ m_iar = (m_iar + 1) & PMSK; \
+ } \
}
/***************************************************************
@@ -423,7 +402,7 @@ inline uint8_t s2650_device::ARG()
***************************************************************/
#define M_ZBRR() \
{ \
- REL_ZERO( 0 ); \
+ REL_ZERO(0); \
m_page = m_ea & PAGE; \
m_iar = m_ea & PMSK; \
}
@@ -434,12 +413,16 @@ inline uint8_t s2650_device::ARG()
***************************************************************/
#define M_BRA(cond) \
{ \
- if( cond ) \
+ if (cond) \
{ \
BRA_EA(); \
m_page = m_ea & PAGE; \
m_iar = m_ea & PMSK; \
- } else m_iar = (m_iar + 2) & PMSK; \
+ } \
+ else \
+ { \
+ m_iar = (m_iar + 2) & PMSK; \
+ } \
}
/***************************************************************
@@ -449,7 +432,7 @@ inline uint8_t s2650_device::ARG()
#define M_BXA() \
{ \
BRA_EA(); \
- m_ea = (m_ea + m_reg[3]) & AMSK; \
+ m_ea = (m_ea + m_reg[3]) & AMSK; \
m_page = m_ea & PAGE; \
m_iar = m_ea & PMSK; \
}
@@ -460,14 +443,18 @@ inline uint8_t s2650_device::ARG()
***************************************************************/
#define M_BSR(cond) \
{ \
- if( cond ) \
+ if (cond) \
{ \
- REL_EA(m_page); \
- set_sp(get_sp() + 1); \
+ REL_EA(m_page); \
+ set_sp(get_sp() + 1); \
m_ras[get_sp()] = m_page + m_iar; \
- m_page = m_ea & PAGE; \
- m_iar = m_ea & PMSK; \
- } else m_iar = (m_iar + 1) & PMSK; \
+ m_page = m_ea & PAGE; \
+ m_iar = m_ea & PMSK; \
+ } \
+ else \
+ { \
+ m_iar = (m_iar + 1) & PMSK; \
+ } \
}
/***************************************************************
@@ -477,10 +464,10 @@ inline uint8_t s2650_device::ARG()
#define M_ZBSR() \
{ \
REL_ZERO(0); \
- set_sp(get_sp() + 1); \
+ set_sp(get_sp() + 1); \
m_ras[get_sp()] = m_page + m_iar; \
- m_page = m_ea & PAGE; \
- m_iar = m_ea & PMSK; \
+ m_page = m_ea & PAGE; \
+ m_iar = m_ea & PMSK; \
}
/***************************************************************
@@ -489,14 +476,18 @@ inline uint8_t s2650_device::ARG()
***************************************************************/
#define M_BSA(cond) \
{ \
- if( cond ) \
+ if (cond) \
{ \
BRA_EA(); \
- set_sp(get_sp() + 1); \
+ set_sp(get_sp() + 1); \
m_ras[get_sp()] = m_page + m_iar; \
m_page = m_ea & PAGE; \
m_iar = m_ea & PMSK; \
- } else m_iar = (m_iar + 2) & PMSK; \
+ } \
+ else \
+ { \
+ m_iar = (m_iar + 2) & PMSK; \
+ } \
}
/***************************************************************
@@ -506,8 +497,8 @@ inline uint8_t s2650_device::ARG()
#define M_BSXA() \
{ \
BRA_EA(); \
- m_ea = (m_ea + m_reg[3]) & AMSK; \
- set_sp(get_sp() + 1); \
+ m_ea = (m_ea + m_reg[3]) & AMSK; \
+ set_sp(get_sp() + 1); \
m_ras[get_sp()] = m_page + m_iar; \
m_page = m_ea & PAGE; \
m_iar = m_ea & PMSK; \
@@ -519,13 +510,13 @@ inline uint8_t s2650_device::ARG()
***************************************************************/
#define M_RET(cond) \
{ \
- if( cond ) \
+ if (cond) \
{ \
- m_icount -= 6; \
- m_ea = m_ras[get_sp()]; \
- set_sp(get_sp() - 1); \
- m_page = m_ea & PAGE; \
- m_iar = m_ea & PMSK; \
+ m_icount -= 6; \
+ m_ea = m_ras[get_sp()]; \
+ set_sp(get_sp() - 1); \
+ m_page = m_ea & PAGE; \
+ m_iar = m_ea & PMSK; \
} \
}
@@ -537,14 +528,14 @@ inline uint8_t s2650_device::ARG()
***************************************************************/
#define M_RETE(cond) \
{ \
- if( cond ) \
+ if (cond) \
{ \
- m_ea = m_ras[get_sp()]; \
- set_sp(get_sp() - 1); \
- m_page = m_ea & PAGE; \
- m_iar = m_ea & PMSK; \
- set_psu(m_psu & ~II); \
- m_icount -= check_irq_line(); \
+ m_ea = m_ras[get_sp()]; \
+ set_sp(get_sp() - 1); \
+ m_page = m_ea & PAGE; \
+ m_iar = m_ea & PMSK; \
+ set_psu(m_psu & ~II); \
+ m_icount -= check_irq_line(); \
} \
}
@@ -563,7 +554,7 @@ inline uint8_t s2650_device::ARG()
* Store source register to memory addr (CC unchanged)
***************************************************************/
#define M_STR(address,source) \
- space(AS_PROGRAM).write_byte(address, source)
+ m_program.write_byte(address, source)
/***************************************************************
* M_AND
@@ -602,15 +593,16 @@ inline uint8_t s2650_device::ARG()
***************************************************************/
#define M_ADD(dest,_source) \
{ \
- uint8_t source = _source; \
- uint8_t before = dest; \
+ uint8_t source = _source; \
+ uint8_t before = dest; \
/* add source; carry only if WC is set */ \
- uint16_t res = dest + source + ((m_psl >> 3) & m_psl & C); \
- m_psl &= ~(C | OVF | IDC); \
- if(res & 0x100) m_psl |= C; \
+ uint16_t res = dest + source + ((m_psl >> 3) & m_psl & C); \
+ m_psl &= ~(C | OVF | IDC); \
+ if (res & 0x100) m_psl |= C; \
dest = res & 0xff; \
- if( (dest & 15) < (before & 15) ) m_psl |= IDC; \
- SET_CC_OVF_ADD(dest,before,source); \
+ if ((dest ^ before ^ source) & 0x10) m_psl |= IDC; \
+ if ((before ^ dest) & (source ^ dest) & 0x80) m_psl |= OVF; \
+ SET_CC(dest); \
}
/***************************************************************
@@ -620,15 +612,16 @@ inline uint8_t s2650_device::ARG()
***************************************************************/
#define M_SUB(dest,_source) \
{ \
- uint8_t source = _source; \
- uint8_t before = dest; \
+ uint8_t source = _source; \
+ uint8_t before = dest; \
/* subtract source; borrow only if WC is set */ \
- uint16_t res = dest - source - ((m_psl >> 3) & (m_psl ^ C) & C); \
- m_psl &= ~(C | OVF | IDC); \
- if((res & 0x100)==0) m_psl |= C; \
+ uint16_t res = dest - source - ((m_psl >> 3) & (m_psl ^ C) & C); \
+ m_psl &= ~(C | OVF | IDC); \
+ if ((res & 0x100) == 0) m_psl |= C; \
dest = res & 0xff; \
- if( (dest & 15) <= (before & 15) ) m_psl |= IDC; \
- SET_CC_OVF_SUB(dest,before,source); \
+ if (~(dest ^ before ^ source) & 0x10) m_psl |= IDC; \
+ if ((before ^ source) & (before ^ dest) & 0x80) m_psl |= OVF; \
+ SET_CC(dest); \
}
/***************************************************************
@@ -638,13 +631,12 @@ inline uint8_t s2650_device::ARG()
***************************************************************/
#define M_COM(reg,val) \
{ \
- int d; \
- m_psl &= ~CC; \
- if (m_psl & COM) d = (uint8_t)reg - (uint8_t)val; \
- else d = (int8_t)reg - (int8_t)val; \
- if( d < 0 ) m_psl |= 0x80; \
- else \
- if( d > 0 ) m_psl |= 0x40; \
+ int16_t res; \
+ m_psl &= ~CC; \
+ if (m_psl & COM) res = (uint8_t)reg - (uint8_t)val; \
+ else res = (int8_t)reg - (int8_t)val; \
+ if (res < 0) m_psl |= 0x80; \
+ else if (res > 0) m_psl |= 0x40; \
}
/***************************************************************
@@ -653,8 +645,8 @@ inline uint8_t s2650_device::ARG()
***************************************************************/
#define M_DAR(dest) \
{ \
- if ((m_psl & C) == 0) dest += 0xA0; \
- if ((m_psl & IDC) == 0) dest = (dest & 0xF0) | ((dest + 0x0A) & 0x0F);\
+ if ((m_psl & C) == 0) dest += 0xa0; \
+ if ((m_psl & IDC) == 0) dest = (dest & 0xf0) | ((dest + 0x0a) & 0x0f); \
}
/***************************************************************
@@ -664,13 +656,13 @@ inline uint8_t s2650_device::ARG()
***************************************************************/
#define M_RRL(dest) \
{ \
- uint8_t before = dest; \
- if( m_psl & WC ) \
+ uint8_t before = dest; \
+ if (m_psl & WC) \
{ \
uint8_t c = m_psl & C; \
- m_psl &= ~(C + IDC); \
+ m_psl &= ~(C + IDC); \
dest = (before << 1) | c; \
- m_psl |= (before >> 7) + (dest & IDC); \
+ m_psl |= (before >> 7) + (dest & IDC); \
} \
else \
{ \
@@ -687,14 +679,18 @@ inline uint8_t s2650_device::ARG()
***************************************************************/
#define M_RRR(dest) \
{ \
- uint8_t before = dest; \
- if (m_psl & WC) \
+ uint8_t before = dest; \
+ if (m_psl & WC) \
{ \
uint8_t c = m_psl & C; \
- m_psl &= ~(C + IDC); \
+ m_psl &= ~(C + IDC); \
dest = (before >> 1) | (c << 7); \
- m_psl |= (before & C) + (dest & IDC); \
- } else dest = (before >> 1) | (before << 7); \
+ m_psl |= (before & C) + (dest & IDC); \
+ } \
+ else \
+ { \
+ dest = (before >> 1) | (before << 7); \
+ } \
SET_CC(dest); \
m_psl = (m_psl & ~OVF) | (((dest ^ before) >> 5) & OVF); \
}
@@ -718,7 +714,7 @@ inline uint8_t s2650_device::ARG()
***************************************************************/
#define M_SPSL() \
{ \
- R0 = m_psl; \
+ R0 = m_psl; \
SET_CC(R0); \
}
@@ -729,8 +725,8 @@ inline uint8_t s2650_device::ARG()
#define M_CPSU() \
{ \
uint8_t cpsu = ARG() & ~SI; \
- set_psu(m_psu & ~cpsu); \
- m_icount -= check_irq_line(); \
+ set_psu(m_psu & ~cpsu); \
+ m_icount -= check_irq_line(); \
}
/***************************************************************
@@ -739,11 +735,11 @@ inline uint8_t s2650_device::ARG()
***************************************************************/
#define M_CPSL() \
{ \
- uint8_t cpsl = ARG(); \
+ uint8_t cpsl = ARG(); \
/* select other register set now ? */ \
- if( (cpsl & RS) && (m_psl & RS) ) \
+ if ((cpsl & RS) && (m_psl & RS)) \
SWAP_REGS; \
- m_psl = m_psl & ~cpsl; \
+ m_psl = m_psl & ~cpsl; \
}
/***************************************************************
@@ -753,8 +749,8 @@ inline uint8_t s2650_device::ARG()
***************************************************************/
#define M_PPSU() \
{ \
- uint8_t ppsu = (ARG() & ~PSU34) & ~SI; \
- set_psu(m_psu | ppsu); \
+ uint8_t ppsu = (ARG() & ~PSU34) & ~SI; \
+ set_psu(m_psu | ppsu); \
}
/***************************************************************
@@ -765,7 +761,7 @@ inline uint8_t s2650_device::ARG()
{ \
uint8_t ppsl = ARG(); \
/* select 2nd register set now ? */ \
- if ((ppsl & RS) && !(m_psl & RS)) \
+ if ((ppsl & RS) && !(m_psl & RS)) \
SWAP_REGS; \
m_psl = m_psl | ppsl; \
}
@@ -778,9 +774,9 @@ inline uint8_t s2650_device::ARG()
{ \
uint8_t tpsu = ARG(); \
uint8_t rpsu = get_psu(); \
- m_psl &= ~CC; \
- if( (rpsu & tpsu) != tpsu ) \
- m_psl |= 0x80; \
+ m_psl &= ~CC; \
+ if ((rpsu & tpsu) != tpsu) \
+ m_psl |= 0x80; \
}
/***************************************************************
@@ -790,10 +786,10 @@ inline uint8_t s2650_device::ARG()
#define M_TPSL() \
{ \
uint8_t tpsl = ARG(); \
- if( (m_psl & tpsl) != tpsl ) \
+ if ((m_psl & tpsl) != tpsl) \
m_psl = (m_psl & ~CC) | 0x80; \
else \
- m_psl &= ~CC; \
+ m_psl &= ~CC; \
}
/***************************************************************
@@ -802,10 +798,10 @@ inline uint8_t s2650_device::ARG()
***************************************************************/
#define M_TMI(value) \
{ \
- uint8_t tmi = ARG(); \
- m_psl &= ~CC; \
- if( (value & tmi) != tmi ) \
- m_psl |= 0x80; \
+ uint8_t tmi = ARG(); \
+ m_psl &= ~CC; \
+ if ((value & tmi) != tmi) \
+ m_psl |= 0x80; \
}
#if INLINE_EA
@@ -822,11 +818,10 @@ static void BRA_EA(void) _BRA_EA()
void s2650_device::device_start()
{
- m_sense_handler.resolve();
- m_flag_handler.resolve_safe();
- m_intack_handler.resolve_safe();
-
- m_cache = space(AS_PROGRAM).cache<0, 0, ENDIANNESS_LITTLE>();
+ space(AS_PROGRAM).cache(m_cprogram);
+ space(AS_PROGRAM).specific(m_program);
+ space(AS_DATA).specific(m_data);
+ space(AS_IO).specific(m_io);
save_item(NAME(m_ppc));
save_item(NAME(m_page));
@@ -913,7 +908,7 @@ void s2650_device::state_string_export(const device_state_entry &entry, std::str
switch (entry.index())
{
case STATE_GENFLAGS:
- str = string_format("%c%c%c%c%c%c%c%c%c%c%c%c%c%c%c%c",
+ str = string_format("%c%c%c%c%c%c%c%c %c%c%c%c%c%c%c%c",
m_psu & 0x80 ? 'S':'.',
m_psu & 0x40 ? 'O':'.',
m_psu & 0x20 ? 'I':'.',
@@ -948,7 +943,7 @@ void s2650_device::device_reset()
memset(m_ras, 0, sizeof(m_ras));
m_psl = COM | WC;
- /* force write */
+ // force write
m_psu = 0xff;
set_psu(0);
}
@@ -994,9 +989,8 @@ void s2650_device::s2650_set_sense(int state)
void s2650_device::execute_run()
{
- /* check for external irqs */
- int cycles = check_irq_line();
- m_icount -= cycles;
+ // check for external irqs
+ m_icount -= check_irq_line();
do
{
@@ -1005,602 +999,589 @@ void s2650_device::execute_run()
debugger_instruction_hook(m_page + m_iar);
m_ir = ROP();
- m_r = m_ir & 3; /* register / value */
- switch (m_ir) {
- case 0x00: /* LODZ,0 */
- case 0x01: /* LODZ,1 */
- case 0x02: /* LODZ,2 */
- case 0x03: /* LODZ,3 */
+ m_r = m_ir & 3; // register / value
+ switch (m_ir)
+ {
+ case 0x00: // LODZ,0
+ case 0x01: // LODZ,1
+ case 0x02: // LODZ,2
+ case 0x03: // LODZ,3
m_icount -= 6;
- M_LOD( R0, m_reg[m_r] );
+ M_LOD(R0, m_reg[m_r]);
break;
- case 0x04: /* LODI,0 v */
- case 0x05: /* LODI,1 v */
- case 0x06: /* LODI,2 v */
- case 0x07: /* LODI,3 v */
+ case 0x04: // LODI,0 v
+ case 0x05: // LODI,1 v
+ case 0x06: // LODI,2 v
+ case 0x07: // LODI,3 v
m_icount -= 6;
- M_LOD( m_reg[m_r], ARG() );
+ M_LOD(m_reg[m_r], ARG());
break;
- case 0x08: /* LODR,0 (*)a */
- case 0x09: /* LODR,1 (*)a */
- case 0x0a: /* LODR,2 (*)a */
- case 0x0b: /* LODR,3 (*)a */
+ case 0x08: // LODR,0 (*)a
+ case 0x09: // LODR,1 (*)a
+ case 0x0a: // LODR,2 (*)a
+ case 0x0b: // LODR,3 (*)a
m_icount -= 9;
- REL_EA( m_page );
- M_LOD( m_reg[m_r], RDMEM(m_ea) );
+ REL_EA(m_page);
+ M_LOD(m_reg[m_r], RDMEM(m_ea));
break;
- case 0x0c: /* LODA,0 (*)a(,X) */
- case 0x0d: /* LODA,1 (*)a(,X) */
- case 0x0e: /* LODA,2 (*)a(,X) */
- case 0x0f: /* LODA,3 (*)a(,X) */
+ case 0x0c: // LODA,0 (*)a(,X)
+ case 0x0d: // LODA,1 (*)a(,X)
+ case 0x0e: // LODA,2 (*)a(,X)
+ case 0x0f: // LODA,3 (*)a(,X)
m_icount -= 12;
ABS_EA();
- M_LOD( m_reg[m_r], RDMEM(m_ea) );
+ M_LOD(m_reg[m_r], RDMEM(m_ea));
break;
- case 0x10: /* illegal */
- case 0x11: /* illegal */
- m_icount -= 7;
- break;
- case 0x12: /* SPSU */
+ case 0x12: // SPSU
m_icount -= 6;
M_SPSU();
break;
- case 0x13: /* SPSL */
+ case 0x13: // SPSL
m_icount -= 6;
M_SPSL();
break;
- case 0x14: /* RETC,0 (zero) */
- case 0x15: /* RETC,1 (plus) */
- case 0x16: /* RETC,2 (minus) */
- m_icount -= 9; /* +2 cycles if condition is true */
- M_RET( (m_psl >> 6) == m_r );
+ case 0x14: // RETC,0 (zero)
+ case 0x15: // RETC,1 (plus)
+ case 0x16: // RETC,2 (minus)
+ m_icount -= 9; // +2 cycles if condition is true
+ M_RET((m_psl >> 6) == m_r);
break;
- case 0x17: /* RETC,3 (always) */
- m_icount -= 9; /* +2 cycles if condition is true */
- M_RET( 1 );
+ case 0x17: // RETC,3 (always)
+ m_icount -= 9; // +2 cycles if condition is true
+ M_RET(1);
break;
- case 0x18: /* BCTR,0 (*)a */
- case 0x19: /* BCTR,1 (*)a */
- case 0x1a: /* BCTR,2 (*)a */
+ case 0x18: // BCTR,0 (*)a
+ case 0x19: // BCTR,1 (*)a
+ case 0x1a: // BCTR,2 (*)a
m_icount -= 9;
- M_BRR( (m_psl >> 6) == m_r );
+ M_BRR((m_psl >> 6) == m_r);
break;
- case 0x1b: /* BCTR,3 (*)a */
+ case 0x1b: // BCTR,3 (*)a
m_icount -= 9;
- M_BRR( 1 );
+ M_BRR(1);
break;
- case 0x1c: /* BCTA,0 (*)a */
- case 0x1d: /* BCTA,1 (*)a */
- case 0x1e: /* BCTA,2 (*)a */
+ case 0x1c: // BCTA,0 (*)a
+ case 0x1d: // BCTA,1 (*)a
+ case 0x1e: // BCTA,2 (*)a
m_icount -= 9;
- M_BRA( (m_psl >> 6) == m_r );
+ M_BRA((m_psl >> 6) == m_r);
break;
- case 0x1f: /* BCTA,3 (*)a */
+ case 0x1f: // BCTA,3 (*)a
m_icount -= 9;
- M_BRA( 1 );
+ M_BRA(1);
break;
- case 0x20: /* EORZ,0 */
- case 0x21: /* EORZ,1 */
- case 0x22: /* EORZ,2 */
- case 0x23: /* EORZ,3 */
+ case 0x20: // EORZ,0
+ case 0x21: // EORZ,1
+ case 0x22: // EORZ,2
+ case 0x23: // EORZ,3
m_icount -= 6;
- M_EOR( R0, m_reg[m_r] );
+ M_EOR(R0, m_reg[m_r]);
break;
- case 0x24: /* EORI,0 v */
- case 0x25: /* EORI,1 v */
- case 0x26: /* EORI,2 v */
- case 0x27: /* EORI,3 v */
+ case 0x24: // EORI,0 v
+ case 0x25: // EORI,1 v
+ case 0x26: // EORI,2 v
+ case 0x27: // EORI,3 v
m_icount -= 6;
- M_EOR( m_reg[m_r], ARG() );
+ M_EOR(m_reg[m_r], ARG());
break;
- case 0x28: /* EORR,0 (*)a */
- case 0x29: /* EORR,1 (*)a */
- case 0x2a: /* EORR,2 (*)a */
- case 0x2b: /* EORR,3 (*)a */
+ case 0x28: // EORR,0 (*)a
+ case 0x29: // EORR,1 (*)a
+ case 0x2a: // EORR,2 (*)a
+ case 0x2b: // EORR,3 (*)a
m_icount -= 9;
- REL_EA( m_page );
- M_EOR( m_reg[m_r], RDMEM(m_ea) );
+ REL_EA(m_page);
+ M_EOR(m_reg[m_r], RDMEM(m_ea));
break;
- case 0x2c: /* EORA,0 (*)a(,X) */
- case 0x2d: /* EORA,1 (*)a(,X) */
- case 0x2e: /* EORA,2 (*)a(,X) */
- case 0x2f: /* EORA,3 (*)a(,X) */
+ case 0x2c: // EORA,0 (*)a(,X)
+ case 0x2d: // EORA,1 (*)a(,X)
+ case 0x2e: // EORA,2 (*)a(,X)
+ case 0x2f: // EORA,3 (*)a(,X)
m_icount -= 12;
ABS_EA();
- M_EOR( m_reg[m_r], RDMEM(m_ea) );
+ M_EOR(m_reg[m_r], RDMEM(m_ea));
break;
- case 0x30: /* REDC,0 */
- case 0x31: /* REDC,1 */
- case 0x32: /* REDC,2 */
- case 0x33: /* REDC,3 */
+ case 0x30: // REDC,0
+ case 0x31: // REDC,1
+ case 0x32: // REDC,2
+ case 0x33: // REDC,3
m_icount -= 6;
- m_reg[m_r] = space(AS_DATA).read_byte(S2650_CTRL_PORT);
- SET_CC( m_reg[m_r] );
+ m_reg[m_r] = m_data.read_byte(S2650_CTRL_PORT);
+ SET_CC(m_reg[m_r]);
break;
- case 0x34: /* RETE,0 */
- case 0x35: /* RETE,1 */
- case 0x36: /* RETE,2 */
+ case 0x34: // RETE,0
+ case 0x35: // RETE,1
+ case 0x36: // RETE,2
m_icount -= 9;
- M_RETE( (m_psl >> 6) == m_r );
+ M_RETE((m_psl >> 6) == m_r);
break;
- case 0x37: /* RETE,3 */
+ case 0x37: // RETE,3
m_icount -= 9;
- M_RETE( 1 );
+ M_RETE(1);
break;
- case 0x38: /* BSTR,0 (*)a */
- case 0x39: /* BSTR,1 (*)a */
- case 0x3a: /* BSTR,2 (*)a */
+ case 0x38: // BSTR,0 (*)a
+ case 0x39: // BSTR,1 (*)a
+ case 0x3a: // BSTR,2 (*)a
m_icount -= 9;
- M_BSR( (m_psl >> 6) == m_r );
+ M_BSR((m_psl >> 6) == m_r);
break;
- case 0x3b: /* BSTR,R3 (*)a */
+ case 0x3b: // BSTR,R3 (*)a
m_icount -= 9;
- M_BSR( 1 );
+ M_BSR(1);
break;
- case 0x3c: /* BSTA,0 (*)a */
- case 0x3d: /* BSTA,1 (*)a */
- case 0x3e: /* BSTA,2 (*)a */
+ case 0x3c: // BSTA,0 (*)a
+ case 0x3d: // BSTA,1 (*)a
+ case 0x3e: // BSTA,2 (*)a
m_icount -= 9;
- M_BSA( (m_psl >> 6) == m_r );
+ M_BSA((m_psl >> 6) == m_r);
break;
- case 0x3f: /* BSTA,3 (*)a */
+ case 0x3f: // BSTA,3 (*)a
m_icount -= 9;
- M_BSA( 1 );
+ M_BSA(1);
break;
- case 0x40: /* HALT */
+ case 0x40: // HALT
m_icount -= 6;
m_iar = (m_iar - 1) & PMSK;
m_halt = 1;
if (m_icount > 0)
m_icount = 0;
break;
- case 0x41: /* ANDZ,1 */
- case 0x42: /* ANDZ,2 */
- case 0x43: /* ANDZ,3 */
+ case 0x41: // ANDZ,1
+ case 0x42: // ANDZ,2
+ case 0x43: // ANDZ,3
m_icount -= 6;
- M_AND( R0, m_reg[m_r] );
+ M_AND(R0, m_reg[m_r]);
break;
- case 0x44: /* ANDI,0 v */
- case 0x45: /* ANDI,1 v */
- case 0x46: /* ANDI,2 v */
- case 0x47: /* ANDI,3 v */
+ case 0x44: // ANDI,0 v
+ case 0x45: // ANDI,1 v
+ case 0x46: // ANDI,2 v
+ case 0x47: // ANDI,3 v
m_icount -= 6;
- M_AND( m_reg[m_r], ARG() );
+ M_AND(m_reg[m_r], ARG());
break;
- case 0x48: /* ANDR,0 (*)a */
- case 0x49: /* ANDR,1 (*)a */
- case 0x4a: /* ANDR,2 (*)a */
- case 0x4b: /* ANDR,3 (*)a */
+ case 0x48: // ANDR,0 (*)a
+ case 0x49: // ANDR,1 (*)a
+ case 0x4a: // ANDR,2 (*)a
+ case 0x4b: // ANDR,3 (*)a
m_icount -= 9;
- REL_EA( m_page );
- M_AND( m_reg[m_r], RDMEM(m_ea) );
+ REL_EA(m_page);
+ M_AND(m_reg[m_r], RDMEM(m_ea));
break;
- case 0x4c: /* ANDA,0 (*)a(,X) */
- case 0x4d: /* ANDA,1 (*)a(,X) */
- case 0x4e: /* ANDA,2 (*)a(,X) */
- case 0x4f: /* ANDA,3 (*)a(,X) */
+ case 0x4c: // ANDA,0 (*)a(,X)
+ case 0x4d: // ANDA,1 (*)a(,X)
+ case 0x4e: // ANDA,2 (*)a(,X)
+ case 0x4f: // ANDA,3 (*)a(,X)
m_icount -= 12;
ABS_EA();
- M_AND( m_reg[m_r], RDMEM(m_ea) );
+ M_AND(m_reg[m_r], RDMEM(m_ea));
break;
- case 0x50: /* RRR,0 */
- case 0x51: /* RRR,1 */
- case 0x52: /* RRR,2 */
- case 0x53: /* RRR,3 */
+ case 0x50: // RRR,0
+ case 0x51: // RRR,1
+ case 0x52: // RRR,2
+ case 0x53: // RRR,3
m_icount -= 6;
- M_RRR( m_reg[m_r] );
+ M_RRR(m_reg[m_r]);
break;
- case 0x54: /* REDE,0 v */
- case 0x55: /* REDE,1 v */
- case 0x56: /* REDE,2 v */
- case 0x57: /* REDE,3 v */
+ case 0x54: // REDE,0 v
+ case 0x55: // REDE,1 v
+ case 0x56: // REDE,2 v
+ case 0x57: // REDE,3 v
m_icount -= 9;
- m_reg[m_r] = space(AS_IO).read_byte(ARG());
+ m_reg[m_r] = m_io.read_byte(ARG());
SET_CC(m_reg[m_r]);
break;
- case 0x58: /* BRNR,0 (*)a */
- case 0x59: /* BRNR,1 (*)a */
- case 0x5a: /* BRNR,2 (*)a */
- case 0x5b: /* BRNR,3 (*)a */
+ case 0x58: // BRNR,0 (*)a
+ case 0x59: // BRNR,1 (*)a
+ case 0x5a: // BRNR,2 (*)a
+ case 0x5b: // BRNR,3 (*)a
m_icount -= 9;
- M_BRR( m_reg[m_r] );
+ M_BRR(m_reg[m_r]);
break;
- case 0x5c: /* BRNA,0 (*)a */
- case 0x5d: /* BRNA,1 (*)a */
- case 0x5e: /* BRNA,2 (*)a */
- case 0x5f: /* BRNA,3 (*)a */
+ case 0x5c: // BRNA,0 (*)a
+ case 0x5d: // BRNA,1 (*)a
+ case 0x5e: // BRNA,2 (*)a
+ case 0x5f: // BRNA,3 (*)a
m_icount -= 9;
- M_BRA( m_reg[m_r] );
+ M_BRA(m_reg[m_r]);
break;
- case 0x60: /* IORZ,0 */
- case 0x61: /* IORZ,1 */
- case 0x62: /* IORZ,2 */
- case 0x63: /* IORZ,3 */
+ case 0x60: // IORZ,0
+ case 0x61: // IORZ,1
+ case 0x62: // IORZ,2
+ case 0x63: // IORZ,3
m_icount -= 6;
- M_IOR( R0, m_reg[m_r] );
+ M_IOR(R0, m_reg[m_r]);
break;
- case 0x64: /* IORI,0 v */
- case 0x65: /* IORI,1 v */
- case 0x66: /* IORI,2 v */
- case 0x67: /* IORI,3 v */
+ case 0x64: // IORI,0 v
+ case 0x65: // IORI,1 v
+ case 0x66: // IORI,2 v
+ case 0x67: // IORI,3 v
m_icount -= 6;
- M_IOR( m_reg[m_r], ARG() );
+ M_IOR(m_reg[m_r], ARG());
break;
- case 0x68: /* IORR,0 (*)a */
- case 0x69: /* IORR,1 (*)a */
- case 0x6a: /* IORR,2 (*)a */
- case 0x6b: /* IORR,3 (*)a */
+ case 0x68: // IORR,0 (*)a
+ case 0x69: // IORR,1 (*)a
+ case 0x6a: // IORR,2 (*)a
+ case 0x6b: // IORR,3 (*)a
m_icount -= 9;
- REL_EA( m_page );
- M_IOR( m_reg[m_r],RDMEM(m_ea) );
+ REL_EA(m_page);
+ M_IOR(m_reg[m_r],RDMEM(m_ea));
break;
- case 0x6c: /* IORA,0 (*)a(,X) */
- case 0x6d: /* IORA,1 (*)a(,X) */
- case 0x6e: /* IORA,2 (*)a(,X) */
- case 0x6f: /* IORA,3 (*)a(,X) */
+ case 0x6c: // IORA,0 (*)a(,X)
+ case 0x6d: // IORA,1 (*)a(,X)
+ case 0x6e: // IORA,2 (*)a(,X)
+ case 0x6f: // IORA,3 (*)a(,X)
m_icount -= 12;
ABS_EA();
- M_IOR( m_reg[m_r], RDMEM(m_ea) );
+ M_IOR(m_reg[m_r], RDMEM(m_ea));
break;
- case 0x70: /* REDD,0 */
- case 0x71: /* REDD,1 */
- case 0x72: /* REDD,2 */
- case 0x73: /* REDD,3 */
+ case 0x70: // REDD,0
+ case 0x71: // REDD,1
+ case 0x72: // REDD,2
+ case 0x73: // REDD,3
m_icount -= 6;
- m_reg[m_r] = space(AS_DATA).read_byte(S2650_DATA_PORT);
+ m_reg[m_r] = m_data.read_byte(S2650_DATA_PORT);
SET_CC(m_reg[m_r]);
break;
- case 0x74: /* CPSU */
+ case 0x74: // CPSU
m_icount -= 9;
M_CPSU();
break;
- case 0x75: /* CPSL */
+ case 0x75: // CPSL
m_icount -= 9;
M_CPSL();
break;
- case 0x76: /* PPSU */
+ case 0x76: // PPSU
m_icount -= 9;
M_PPSU();
break;
- case 0x77: /* PPSL */
+ case 0x77: // PPSL
m_icount -= 9;
M_PPSL();
break;
- case 0x78: /* BSNR,0 (*)a */
- case 0x79: /* BSNR,1 (*)a */
- case 0x7a: /* BSNR,2 (*)a */
- case 0x7b: /* BSNR,3 (*)a */
+ case 0x78: // BSNR,0 (*)a
+ case 0x79: // BSNR,1 (*)a
+ case 0x7a: // BSNR,2 (*)a
+ case 0x7b: // BSNR,3 (*)a
m_icount -= 9;
- M_BSR( m_reg[m_r] );
+ M_BSR(m_reg[m_r]);
break;
- case 0x7c: /* BSNA,0 (*)a */
- case 0x7d: /* BSNA,1 (*)a */
- case 0x7e: /* BSNA,2 (*)a */
- case 0x7f: /* BSNA,3 (*)a */
+ case 0x7c: // BSNA,0 (*)a
+ case 0x7d: // BSNA,1 (*)a
+ case 0x7e: // BSNA,2 (*)a
+ case 0x7f: // BSNA,3 (*)a
m_icount -= 9;
- M_BSA( m_reg[m_r] );
+ M_BSA(m_reg[m_r]);
break;
- case 0x80: /* ADDZ,0 */
- case 0x81: /* ADDZ,1 */
- case 0x82: /* ADDZ,2 */
- case 0x83: /* ADDZ,3 */
+ case 0x80: // ADDZ,0
+ case 0x81: // ADDZ,1
+ case 0x82: // ADDZ,2
+ case 0x83: // ADDZ,3
m_icount -= 6;
- M_ADD( R0,m_reg[m_r] );
+ M_ADD(R0,m_reg[m_r]);
break;
- case 0x84: /* ADDI,0 v */
- case 0x85: /* ADDI,1 v */
- case 0x86: /* ADDI,2 v */
- case 0x87: /* ADDI,3 v */
+ case 0x84: // ADDI,0 v
+ case 0x85: // ADDI,1 v
+ case 0x86: // ADDI,2 v
+ case 0x87: // ADDI,3 v
m_icount -= 6;
- M_ADD( m_reg[m_r], ARG() );
+ M_ADD(m_reg[m_r], ARG());
break;
- case 0x88: /* ADDR,0 (*)a */
- case 0x89: /* ADDR,1 (*)a */
- case 0x8a: /* ADDR,2 (*)a */
- case 0x8b: /* ADDR,3 (*)a */
+ case 0x88: // ADDR,0 (*)a
+ case 0x89: // ADDR,1 (*)a
+ case 0x8a: // ADDR,2 (*)a
+ case 0x8b: // ADDR,3 (*)a
m_icount -= 9;
REL_EA(m_page);
- M_ADD( m_reg[m_r], RDMEM(m_ea) );
+ M_ADD(m_reg[m_r], RDMEM(m_ea));
break;
- case 0x8c: /* ADDA,0 (*)a(,X) */
- case 0x8d: /* ADDA,1 (*)a(,X) */
- case 0x8e: /* ADDA,2 (*)a(,X) */
- case 0x8f: /* ADDA,3 (*)a(,X) */
+ case 0x8c: // ADDA,0 (*)a(,X)
+ case 0x8d: // ADDA,1 (*)a(,X)
+ case 0x8e: // ADDA,2 (*)a(,X)
+ case 0x8f: // ADDA,3 (*)a(,X)
m_icount -= 12;
ABS_EA();
- M_ADD( m_reg[m_r], RDMEM(m_ea) );
+ M_ADD(m_reg[m_r], RDMEM(m_ea));
break;
- case 0x90: /* illegal */
- case 0x91: /* illegal */
- m_icount -= 7;
- break;
- case 0x92: /* LPSU */
+ case 0x92: // LPSU
m_icount -= 6;
set_psu((R0 & ~PSU34 & ~SI) | (m_psu & SI));
break;
- case 0x93: /* LPSL */
+ case 0x93: // LPSL
m_icount -= 6;
- /* change register set ? */
+ // change register set ?
if ((m_psl ^ R0) & RS)
SWAP_REGS;
m_psl = R0;
break;
- case 0x94: /* DAR,0 */
- case 0x95: /* DAR,1 */
- case 0x96: /* DAR,2 */
- case 0x97: /* DAR,3 */
+ case 0x94: // DAR,0
+ case 0x95: // DAR,1
+ case 0x96: // DAR,2
+ case 0x97: // DAR,3
m_icount -= 9;
- M_DAR( m_reg[m_r] );
+ M_DAR(m_reg[m_r]);
break;
- case 0x98: /* BCFR,0 (*)a */
- case 0x99: /* BCFR,1 (*)a */
- case 0x9a: /* BCFR,2 (*)a */
+ case 0x98: // BCFR,0 (*)a
+ case 0x99: // BCFR,1 (*)a
+ case 0x9a: // BCFR,2 (*)a
m_icount -= 9;
- M_BRR( (m_psl >> 6) != m_r );
+ M_BRR((m_psl >> 6) != m_r);
break;
- case 0x9b: /* ZBRR (*)a */
+ case 0x9b: // ZBRR (*)a
m_icount -= 9;
M_ZBRR();
break;
- case 0x9c: /* BCFA,0 (*)a */
- case 0x9d: /* BCFA,1 (*)a */
- case 0x9e: /* BCFA,2 (*)a */
+ case 0x9c: // BCFA,0 (*)a
+ case 0x9d: // BCFA,1 (*)a
+ case 0x9e: // BCFA,2 (*)a
m_icount -= 9;
- M_BRA( (m_psl >> 6) != m_r );
+ M_BRA((m_psl >> 6) != m_r);
break;
- case 0x9f: /* BXA (*)a */
+ case 0x9f: // BXA (*)a
m_icount -= 9;
M_BXA();
break;
- case 0xa0: /* SUBZ,0 */
- case 0xa1: /* SUBZ,1 */
- case 0xa2: /* SUBZ,2 */
- case 0xa3: /* SUBZ,3 */
+ case 0xa0: // SUBZ,0
+ case 0xa1: // SUBZ,1
+ case 0xa2: // SUBZ,2
+ case 0xa3: // SUBZ,3
m_icount -= 6;
- M_SUB( R0, m_reg[m_r] );
+ M_SUB(R0, m_reg[m_r]);
break;
- case 0xa4: /* SUBI,0 v */
- case 0xa5: /* SUBI,1 v */
- case 0xa6: /* SUBI,2 v */
- case 0xa7: /* SUBI,3 v */
+ case 0xa4: // SUBI,0 v
+ case 0xa5: // SUBI,1 v
+ case 0xa6: // SUBI,2 v
+ case 0xa7: // SUBI,3 v
m_icount -= 6;
- M_SUB( m_reg[m_r], ARG() );
+ M_SUB(m_reg[m_r], ARG());
break;
- case 0xa8: /* SUBR,0 (*)a */
- case 0xa9: /* SUBR,1 (*)a */
- case 0xaa: /* SUBR,2 (*)a */
- case 0xab: /* SUBR,3 (*)a */
+ case 0xa8: // SUBR,0 (*)a
+ case 0xa9: // SUBR,1 (*)a
+ case 0xaa: // SUBR,2 (*)a
+ case 0xab: // SUBR,3 (*)a
m_icount -= 9;
REL_EA(m_page);
- M_SUB( m_reg[m_r], RDMEM(m_ea) );
+ M_SUB(m_reg[m_r], RDMEM(m_ea));
break;
- case 0xac: /* SUBA,0 (*)a(,X) */
- case 0xad: /* SUBA,1 (*)a(,X) */
- case 0xae: /* SUBA,2 (*)a(,X) */
- case 0xaf: /* SUBA,3 (*)a(,X) */
+ case 0xac: // SUBA,0 (*)a(,X)
+ case 0xad: // SUBA,1 (*)a(,X)
+ case 0xae: // SUBA,2 (*)a(,X)
+ case 0xaf: // SUBA,3 (*)a(,X)
m_icount -= 12;
ABS_EA();
- M_SUB( m_reg[m_r], RDMEM(m_ea) );
+ M_SUB(m_reg[m_r], RDMEM(m_ea));
break;
- case 0xb0: /* WRTC,0 */
- case 0xb1: /* WRTC,1 */
- case 0xb2: /* WRTC,2 */
- case 0xb3: /* WRTC,3 */
+ case 0xb0: // WRTC,0
+ case 0xb1: // WRTC,1
+ case 0xb2: // WRTC,2
+ case 0xb3: // WRTC,3
m_icount -= 6;
- space(AS_DATA).write_byte(S2650_CTRL_PORT,m_reg[m_r]);
+ m_data.write_byte(S2650_CTRL_PORT,m_reg[m_r]);
break;
- case 0xb4: /* TPSU */
+ case 0xb4: // TPSU
m_icount -= 9;
M_TPSU();
break;
- case 0xb5: /* TPSL */
+ case 0xb5: // TPSL
m_icount -= 9;
M_TPSL();
break;
- case 0xb6: /* illegal */
- case 0xb7: /* illegal */
- m_icount -= 7;
- break;
- case 0xb8: /* BSFR,0 (*)a */
- case 0xb9: /* BSFR,1 (*)a */
- case 0xba: /* BSFR,2 (*)a */
+ case 0xb8: // BSFR,0 (*)a
+ case 0xb9: // BSFR,1 (*)a
+ case 0xba: // BSFR,2 (*)a
m_icount -= 9;
- M_BSR( (m_psl >> 6) != m_r );
+ M_BSR((m_psl >> 6) != m_r);
break;
- case 0xbb: /* ZBSR (*)a */
+ case 0xbb: // ZBSR (*)a
m_icount -= 9;
M_ZBSR();
break;
- case 0xbc: /* BSFA,0 (*)a */
- case 0xbd: /* BSFA,1 (*)a */
- case 0xbe: /* BSFA,2 (*)a */
+ case 0xbc: // BSFA,0 (*)a
+ case 0xbd: // BSFA,1 (*)a
+ case 0xbe: // BSFA,2 (*)a
m_icount -= 9;
- M_BSA( (m_psl >> 6) != m_r );
+ M_BSA((m_psl >> 6) != m_r);
break;
- case 0xbf: /* BSXA (*)a */
+ case 0xbf: // BSXA (*)a
m_icount -= 9;
M_BSXA();
break;
- case 0xc0: /* NOP */
+ case 0xc0: // NOP
m_icount -= 6;
break;
- case 0xc1: /* STRZ,1 */
- case 0xc2: /* STRZ,2 */
- case 0xc3: /* STRZ,3 */
+ case 0xc1: // STRZ,1
+ case 0xc2: // STRZ,2
+ case 0xc3: // STRZ,3
m_icount -= 6;
- M_LOD( m_reg[m_r], R0 );
- break;
-
- case 0xc4: /* illegal */
- case 0xc5: /* illegal */
- case 0xc6: /* illegal */
- case 0xc7: /* illegal */
- m_icount -= 7;
+ M_LOD(m_reg[m_r], R0);
break;
- case 0xc8: /* STRR,0 (*)a */
- case 0xc9: /* STRR,1 (*)a */
- case 0xca: /* STRR,2 (*)a */
- case 0xcb: /* STRR,3 (*)a */
+ case 0xc8: // STRR,0 (*)a
+ case 0xc9: // STRR,1 (*)a
+ case 0xca: // STRR,2 (*)a
+ case 0xcb: // STRR,3 (*)a
m_icount -= 9;
REL_EA(m_page);
- M_STR( m_ea, m_reg[m_r] );
+ M_STR(m_ea, m_reg[m_r]);
break;
- case 0xcc: /* STRA,0 (*)a(,X) */
- case 0xcd: /* STRA,1 (*)a(,X) */
- case 0xce: /* STRA,2 (*)a(,X) */
- case 0xcf: /* STRA,3 (*)a(,X) */
+ case 0xcc: // STRA,0 (*)a(,X)
+ case 0xcd: // STRA,1 (*)a(,X)
+ case 0xce: // STRA,2 (*)a(,X)
+ case 0xcf: // STRA,3 (*)a(,X)
m_icount -= 12;
ABS_EA();
- M_STR( m_ea, m_reg[m_r] );
+ M_STR(m_ea, m_reg[m_r]);
break;
- case 0xd0: /* RRL,0 */
- case 0xd1: /* RRL,1 */
- case 0xd2: /* RRL,2 */
- case 0xd3: /* RRL,3 */
+ case 0xd0: // RRL,0
+ case 0xd1: // RRL,1
+ case 0xd2: // RRL,2
+ case 0xd3: // RRL,3
m_icount -= 6;
- M_RRL( m_reg[m_r] );
+ M_RRL(m_reg[m_r]);
break;
- case 0xd4: /* WRTE,0 v */
- case 0xd5: /* WRTE,1 v */
- case 0xd6: /* WRTE,2 v */
- case 0xd7: /* WRTE,3 v */
+ case 0xd4: // WRTE,0 v
+ case 0xd5: // WRTE,1 v
+ case 0xd6: // WRTE,2 v
+ case 0xd7: // WRTE,3 v
m_icount -= 9;
- space(AS_IO).write_byte( ARG(), m_reg[m_r] );
+ m_io.write_byte(ARG(), m_reg[m_r]);
break;
- case 0xd8: /* BIRR,0 (*)a */
- case 0xd9: /* BIRR,1 (*)a */
- case 0xda: /* BIRR,2 (*)a */
- case 0xdb: /* BIRR,3 (*)a */
+ case 0xd8: // BIRR,0 (*)a
+ case 0xd9: // BIRR,1 (*)a
+ case 0xda: // BIRR,2 (*)a
+ case 0xdb: // BIRR,3 (*)a
m_icount -= 9;
- M_BRR( ++m_reg[m_r] );
+ M_BRR(++m_reg[m_r]);
break;
- case 0xdc: /* BIRA,0 (*)a */
- case 0xdd: /* BIRA,1 (*)a */
- case 0xde: /* BIRA,2 (*)a */
- case 0xdf: /* BIRA,3 (*)a */
+ case 0xdc: // BIRA,0 (*)a
+ case 0xdd: // BIRA,1 (*)a
+ case 0xde: // BIRA,2 (*)a
+ case 0xdf: // BIRA,3 (*)a
m_icount -= 9;
- M_BRA( ++m_reg[m_r] );
+ M_BRA(++m_reg[m_r]);
break;
- case 0xe0: /* COMZ,0 */
- case 0xe1: /* COMZ,1 */
- case 0xe2: /* COMZ,2 */
- case 0xe3: /* COMZ,3 */
+ case 0xe0: // COMZ,0
+ case 0xe1: // COMZ,1
+ case 0xe2: // COMZ,2
+ case 0xe3: // COMZ,3
m_icount -= 6;
- M_COM( R0, m_reg[m_r] );
+ M_COM(R0, m_reg[m_r]);
break;
- case 0xe4: /* COMI,0 v */
- case 0xe5: /* COMI,1 v */
- case 0xe6: /* COMI,2 v */
- case 0xe7: /* COMI,3 v */
+ case 0xe4: // COMI,0 v
+ case 0xe5: // COMI,1 v
+ case 0xe6: // COMI,2 v
+ case 0xe7: // COMI,3 v
m_icount -= 6;
- M_COM( m_reg[m_r], ARG() );
+ M_COM(m_reg[m_r], ARG());
break;
- case 0xe8: /* COMR,0 (*)a */
- case 0xe9: /* COMR,1 (*)a */
- case 0xea: /* COMR,2 (*)a */
- case 0xeb: /* COMR,3 (*)a */
+ case 0xe8: // COMR,0 (*)a
+ case 0xe9: // COMR,1 (*)a
+ case 0xea: // COMR,2 (*)a
+ case 0xeb: // COMR,3 (*)a
m_icount -= 9;
REL_EA(m_page);
- M_COM( m_reg[m_r], RDMEM(m_ea) );
+ M_COM(m_reg[m_r], RDMEM(m_ea));
break;
- case 0xec: /* COMA,0 (*)a(,X) */
- case 0xed: /* COMA,1 (*)a(,X) */
- case 0xee: /* COMA,2 (*)a(,X) */
- case 0xef: /* COMA,3 (*)a(,X) */
+ case 0xec: // COMA,0 (*)a(,X)
+ case 0xed: // COMA,1 (*)a(,X)
+ case 0xee: // COMA,2 (*)a(,X)
+ case 0xef: // COMA,3 (*)a(,X)
m_icount -= 12;
ABS_EA();
- M_COM( m_reg[m_r], RDMEM(m_ea) );
+ M_COM(m_reg[m_r], RDMEM(m_ea));
break;
- case 0xf0: /* WRTD,0 */
- case 0xf1: /* WRTD,1 */
- case 0xf2: /* WRTD,2 */
- case 0xf3: /* WRTD,3 */
+ case 0xf0: // WRTD,0
+ case 0xf1: // WRTD,1
+ case 0xf2: // WRTD,2
+ case 0xf3: // WRTD,3
m_icount -= 6;
- space(AS_DATA).write_byte(S2650_DATA_PORT, m_reg[m_r]);
+ m_data.write_byte(S2650_DATA_PORT, m_reg[m_r]);
break;
- case 0xf4: /* TMI,0 v */
- case 0xf5: /* TMI,1 v */
- case 0xf6: /* TMI,2 v */
- case 0xf7: /* TMI,3 v */
+ case 0xf4: // TMI,0 v
+ case 0xf5: // TMI,1 v
+ case 0xf6: // TMI,2 v
+ case 0xf7: // TMI,3 v
m_icount -= 9;
- M_TMI( m_reg[m_r] );
+ M_TMI(m_reg[m_r]);
break;
- case 0xf8: /* BDRR,0 (*)a */
- case 0xf9: /* BDRR,1 (*)a */
- case 0xfa: /* BDRR,2 (*)a */
- case 0xfb: /* BDRR,3 (*)a */
+ case 0xf8: // BDRR,0 (*)a
+ case 0xf9: // BDRR,1 (*)a
+ case 0xfa: // BDRR,2 (*)a
+ case 0xfb: // BDRR,3 (*)a
m_icount -= 9;
- M_BRR( --m_reg[m_r] );
+ M_BRR(--m_reg[m_r]);
break;
- case 0xfc: /* BDRA,0 (*)a */
- case 0xfd: /* BDRA,1 (*)a */
- case 0xfe: /* BDRA,2 (*)a */
- case 0xff: /* BDRA,3 (*)a */
+ case 0xfc: // BDRA,0 (*)a
+ case 0xfd: // BDRA,1 (*)a
+ case 0xfe: // BDRA,2 (*)a
+ case 0xff: // BDRA,3 (*)a
m_icount -= 9;
- M_BRA( --m_reg[m_r] );
+ M_BRA(--m_reg[m_r]);
+ break;
+
+ default: // illegal
+ m_icount -= 6;
+ logerror("%s: illegal opcode $%02X @ $%04X\n", tag(), m_ppc, m_ir);
break;
}
- } while( m_icount > 0 );
+ } while (m_icount > 0);
}