diff options
Diffstat (limited to 'src/devices/cpu/lc8670')
-rw-r--r-- | src/devices/cpu/lc8670/lc8670.cpp | 306 | ||||
-rw-r--r-- | src/devices/cpu/lc8670/lc8670.h | 56 | ||||
-rw-r--r-- | src/devices/cpu/lc8670/lc8670dsm.cpp | 2 |
3 files changed, 178 insertions, 186 deletions
diff --git a/src/devices/cpu/lc8670/lc8670.cpp b/src/devices/cpu/lc8670/lc8670.cpp index 325c93eadff..a6c852733b3 100644 --- a/src/devices/cpu/lc8670/lc8670.cpp +++ b/src/devices/cpu/lc8670/lc8670.cpp @@ -16,16 +16,14 @@ ******************************************************************************/ #include "emu.h" -#include "debugger.h" #include "lc8670.h" #include "lc8670dsm.h" -//*************************************************************************** -// DEBUGGING -//*************************************************************************** +#define LOG_TIMERS (1U << 1) +#define LOG_IRQ (1U << 2) -#define LOG_TIMERS 0 -#define LOG_IRQ 0 +#define VERBOSE (0) +#include "logmacro.h" //************************************************************************** @@ -180,6 +178,7 @@ lc8670_cpu_device::lc8670_cpu_device(const machine_config &mconfig, const char * , m_pc(0) , m_ppc(0) , m_bankswitch_func(*this) + , m_lcd_update_func(*this) { memset(m_sfr, 0x00, sizeof(m_sfr)); memset(m_timer0, 0x00, sizeof(m_timer0)); @@ -193,22 +192,21 @@ lc8670_cpu_device::lc8670_cpu_device(const machine_config &mconfig, const char * void lc8670_cpu_device::device_start() { // find address spaces - m_program = &space(AS_PROGRAM); - m_data = &space(AS_DATA); - m_io = &space(AS_IO); - m_cache = m_program->cache<0, 0, ENDIANNESS_BIG>(); + space(AS_PROGRAM).cache(m_cache); + space(AS_PROGRAM).specific(m_program); + space(AS_DATA).specific(m_data); + space(AS_IO).specific(m_io); // set our instruction counter set_icountptr(m_icount); - // resolve callbacks - m_lcd_update_func.bind_relative_to(*owner()); - m_bankswitch_func.resolve(); + // resolve delegates + m_lcd_update_func.resolve_safe(0); // setup timers - m_basetimer = timer_alloc(BASE_TIMER); + m_basetimer = timer_alloc(FUNC(lc8670_cpu_device::base_timer_update), this); m_basetimer->adjust(attotime::from_hz(m_clocks[unsigned(clock_source::SUB)]), 0, attotime::from_hz(m_clocks[unsigned(clock_source::SUB)])); - m_clocktimer = timer_alloc(CLOCK_TIMER); + m_clocktimer = timer_alloc(FUNC(lc8670_cpu_device::clock_timer_update), this); // register state for debugger state_add(LC8670_PC , "PC" , m_pc).callimport().callexport().formatstr("%04X"); @@ -328,26 +326,27 @@ void lc8670_cpu_device::device_reset() //------------------------------------------------- -// device_timer - handler timer events +// base_timer_update //------------------------------------------------- -void lc8670_cpu_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) +TIMER_CALLBACK_MEMBER(lc8670_cpu_device::base_timer_update) { - switch(id) - { - case BASE_TIMER: - if (!(REG_ISL & 0x10)) - base_timer_tick(); - break; + if (!(REG_ISL & 0x10)) + base_timer_tick(); +} - case CLOCK_TIMER: - timer0_prescaler_tick(); - timer1_tick(); - if ((REG_ISL & 0x30) == 0x10) - base_timer_tick(); - break; - } +//------------------------------------------------- +// clock_timer_update +//------------------------------------------------- + +TIMER_CALLBACK_MEMBER(lc8670_cpu_device::clock_timer_update) +{ + timer0_prescaler_tick(); + timer1_tick(); + + if ((REG_ISL & 0x30) == 0x10) + base_timer_tick(); } @@ -421,18 +420,20 @@ void lc8670_cpu_device::execute_run() { check_irqs(); - m_ppc = m_pc; - debugger_instruction_hook(m_pc); - int cycles; if (REG_PCON & HALT_MODE) { + debugger_wait_hook(); + // in HALT state the timers are still updated cycles = 1; } else { + m_ppc = m_pc; + debugger_instruction_hook(m_pc); + // instruction fetch m_op = fetch(); int op_idx = decode_op(m_op); @@ -454,7 +455,7 @@ void lc8670_cpu_device::execute_run() void lc8670_cpu_device::execute_set_input(int inputnum, int state) { - switch(inputnum) + switch (inputnum) { case LC8670_EXT_INT0: if ((REG_I01CR & 0x0c) == 0x00 && m_input_lines[inputnum] && !state) // falling edge @@ -560,9 +561,7 @@ void lc8670_cpu_device::execute_set_input(int inputnum, int state) uint32_t lc8670_cpu_device::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) { - if (!m_lcd_update_func.isnull()) - return m_lcd_update_func(bitmap, cliprect, m_xram, (REG_MCR & 0x08) && (REG_VCCR & 0x80), REG_STAD); - return 0; + return m_lcd_update_func(bitmap, cliprect, m_xram, (REG_MCR & 0x08) && (REG_VCCR & 0x80), REG_STAD); } @@ -595,13 +594,15 @@ void lc8670_cpu_device::check_irqs() // high priority IRQ else if ((REG_IE & 0x80) && ((REG_IP<<3) & m_irq_flag)) { - for(int i=3; i<=10; i++) - if ((m_irq_flag & (REG_IP<<3)) & (1<<i)) + for(int i = 3; i <= 10; i++) + { + if (BIT(m_irq_flag & (REG_IP << 3), i)) { irq = i; priority = 1; break; } + } } // low priority IRQ @@ -617,39 +618,40 @@ void lc8670_cpu_device::check_irqs() } else if (REG_IE & 0x80) { - for(int i=3; i<=10; i++) - if (m_irq_flag & (1<<i)) + for(int i = 3; i <= 10; i++) + { + if (BIT(m_irq_flag, i)) { irq = i; priority = 0; break; } + } } // IRQ with less priority of current interrupt are not executed until the end of the current interrupt routine if (irq != 0 && ((m_irq_lev & (1<<priority)) || (priority == 0 && (m_irq_lev & 0x06)) || (priority == 1 && (m_irq_lev & 0x04)))) { - if (LOG_IRQ) logerror("%s: interrupt %d (Priority=%d, Level=%d) delayed\n", tag(), irq, priority, m_irq_lev); + LOGMASKED(LOG_IRQ, "%s: interrupt %d (Priority=%d, Level=%d) delayed\n", tag(), irq, priority, m_irq_lev); irq = 0; } if (irq != 0) { - if (LOG_IRQ) logerror("%s: interrupt %d (Priority=%d, Level=%d) executed\n", tag(), irq, priority, m_irq_lev); + LOGMASKED(LOG_IRQ, "%s: interrupt %d (Priority=%d, Level=%d) executed\n", tag(), irq, priority, m_irq_lev); + standard_irq_callback(irq, m_pc); - m_irq_lev |= (1<<priority); + m_irq_lev |= (1 << priority); - push((m_pc>>0) & 0xff); - push((m_pc>>8) & 0xff); + push((uint8_t)m_pc); + push((uint8_t)(m_pc >> 8)); set_pc(s_irq_vectors[irq]); REG_PCON &= ~HALT_MODE; // interrupts resume from HALT state // clear the IRQ flag - m_irq_flag &= ~(1<<irq); - - standard_irq_callback(irq); + m_irq_flag &= ~(1 << irq); } } @@ -676,14 +678,14 @@ void lc8670_cpu_device::base_timer_tick() if (base_counter_h & 0x40) { - if (LOG_TIMERS) logerror("%s: base timer 0 overflow, IRQ: %d\n", tag(), BIT(REG_BTCR,0)); + LOGMASKED(LOG_TIMERS, "%s: base timer 0 overflow, IRQ: %d\n", tag(), BIT(REG_BTCR, 0)); REG_BTCR |= 0x02; if (REG_BTCR & 0x01) set_irq_flag(4); } bool bt1_req = false; - switch(REG_BTCR & 0x30) + switch (REG_BTCR & 0x30) { case 0x00: if (base_counter_l & 0x20) @@ -705,7 +707,7 @@ void lc8670_cpu_device::base_timer_tick() if (bt1_req) { - if (LOG_TIMERS) logerror("%s: base timer 1 overflow, IRQ: %d\n", tag(), BIT(REG_BTCR,3)); + LOGMASKED(LOG_TIMERS, "%s: base timer 1 overflow, IRQ: %d\n", tag(), BIT(REG_BTCR, 3)); REG_BTCR |= 0x08; if (REG_BTCR & 0x04) set_irq_flag(4); @@ -716,7 +718,7 @@ void lc8670_cpu_device::base_timer_tick() else update_port1(m_p1_data & 0xbf); - m_base_timer[0] = base_counter_l & 0xff; + m_base_timer[0] = (uint8_t)base_counter_l; m_base_timer[1] = base_counter_h & 0x3f; } } @@ -730,7 +732,7 @@ void lc8670_cpu_device::timer0_prescaler_tick() uint16_t prescaler = m_timer0_prescaler + 1; if (prescaler & 0x100) { - if (LOG_TIMERS) logerror("%s: timer0 prescaler overflow\n", tag()); + LOGMASKED(LOG_TIMERS, "%s: timer0 prescaler overflow\n", tag()); if ((REG_ISL & 0x30) == 0x30) base_timer_tick(); @@ -741,7 +743,7 @@ void lc8670_cpu_device::timer0_prescaler_tick() } else { - m_timer0_prescaler = prescaler & 0xff; + m_timer0_prescaler = (uint8_t)prescaler; } } @@ -762,7 +764,7 @@ void lc8670_cpu_device::timer0_tick(bool ext_line) if (timer0 & 0x10000) { - if (LOG_TIMERS) logerror("%s: timer0 long overflow, IRQ: %d\n", tag(), BIT(REG_T0CNT,3)); + LOGMASKED(LOG_TIMERS, "%s: timer0 long overflow, IRQ: %d\n", tag(), BIT(REG_T0CNT, 3)); m_timer0[0] = REG_T0LR; m_timer0[1] = REG_T0HR; REG_T0CNT |= 0x0a; @@ -771,8 +773,8 @@ void lc8670_cpu_device::timer0_tick(bool ext_line) } else { - m_timer0[0] = (timer0>>0) & 0xff; - m_timer0[1] = (timer0>>8) & 0xff; + m_timer0[0] = (uint8_t)timer0; + m_timer0[1] = (uint8_t)(timer0 >> 8); } } } @@ -785,7 +787,7 @@ void lc8670_cpu_device::timer0_tick(bool ext_line) if (timer0l & 0x100) { - if (LOG_TIMERS) logerror("%s: timer0 low overflow, IRQ: %d\n", tag(), BIT(REG_T0CNT,0)); + LOGMASKED(LOG_TIMERS, "%s: timer0 low overflow, IRQ: %d\n", tag(), BIT(REG_T0CNT, 0)); m_timer0[0] = REG_T0LR; REG_T0CNT |= 0x02; if (REG_T0CNT & 0x01) @@ -793,15 +795,15 @@ void lc8670_cpu_device::timer0_tick(bool ext_line) } else { - m_timer0[0] = timer0l & 0xff; + m_timer0[0] = (uint8_t)timer0l; } } - if ((REG_T0CNT & 0x80) && !ext_line) + if ((REG_T0CNT & 0x80) && !ext_line) { uint16_t timer0h = m_timer0[1] + 1; if (timer0h & 0x100) { - if (LOG_TIMERS) logerror("%s: timer0 high overflow, IRQ: %d\n", tag(), BIT(REG_T0CNT,3)); + LOGMASKED(LOG_TIMERS, "%s: timer0 high overflow, IRQ: %d\n", tag(), BIT(REG_T0CNT,3)); m_timer0[1] = REG_T0HR; REG_T0CNT |= 0x08; if (REG_T0CNT & 0x04) @@ -809,7 +811,7 @@ void lc8670_cpu_device::timer0_tick(bool ext_line) } else { - m_timer0[1] = timer0h & 0xff; + m_timer0[1] = (uint8_t)timer0h; } } } @@ -838,7 +840,7 @@ void lc8670_cpu_device::timer1_tick() if (timer1h & 0x100) { - if (LOG_TIMERS) logerror("%s: timer1 long overflow, IRQ: %d\n", tag(), BIT(REG_T1CNT,3)); + LOGMASKED(LOG_TIMERS, "%s: timer1 long overflow, IRQ: %d\n", tag(), BIT(REG_T1CNT, 3)); m_timer1[1] = REG_T1HR; REG_T1CNT |= 0x08; if (REG_T1CNT & 0x05) @@ -846,12 +848,12 @@ void lc8670_cpu_device::timer1_tick() } else { - m_timer1[1] = timer1h & 0xff; + m_timer1[1] = (uint8_t)timer1h; } } else { - m_timer1[0] = timer1l & 0xff; + m_timer1[0] = (uint8_t)timer1l; } } } @@ -867,7 +869,7 @@ void lc8670_cpu_device::timer1_tick() if (timer1l & 0x100) { - if (LOG_TIMERS) logerror("%s: timer1 low overflow, IRQ: %d\n", tag(), BIT(REG_T1CNT,0)); + LOGMASKED(LOG_TIMERS, "%s: timer1 low overflow, IRQ: %d\n", tag(), BIT(REG_T1CNT, 0)); m_timer1[0] = REG_T1LR; update_port1(m_p1_data & 0x7f); REG_T1CNT |= 0x02; @@ -876,7 +878,7 @@ void lc8670_cpu_device::timer1_tick() } else { - m_timer1[0] = timer1l & 0xff; + m_timer1[0] = (uint8_t)timer1l; } } if (REG_T1CNT & 0x80) @@ -885,7 +887,7 @@ void lc8670_cpu_device::timer1_tick() if (timer1h & 0x100) { - if (LOG_TIMERS) logerror("%s: timer1 high overflow, IRQ: %d\n", tag(), BIT(REG_T1CNT,3)); + LOGMASKED(LOG_TIMERS, "%s: timer1 high overflow, IRQ: %d\n", tag(), BIT(REG_T1CNT, 3)); m_timer1[1] = REG_T1HR; REG_T1CNT |= 0x08; if (REG_T1CNT & 0x04) @@ -893,7 +895,7 @@ void lc8670_cpu_device::timer1_tick() } else { - m_timer1[1] = timer1h & 0xff; + m_timer1[1] = (uint8_t)timer1h; } } } @@ -905,28 +907,28 @@ void lc8670_cpu_device::timer1_tick() // internal map handlers //************************************************************************** -READ8_MEMBER(lc8670_cpu_device::mram_r) +uint8_t lc8670_cpu_device::mram_r(offs_t offset) { - return m_mram[BIT(REG_PSW,1)*0x100 + offset]; + return m_mram[(BIT(REG_PSW, 1) << 8) + offset]; } -WRITE8_MEMBER(lc8670_cpu_device::mram_w) +void lc8670_cpu_device::mram_w(offs_t offset, uint8_t data) { - m_mram[BIT(REG_PSW,1)*0x100 + offset] = data; + m_mram[(BIT(REG_PSW, 1) << 8) + offset] = data; } -READ8_MEMBER(lc8670_cpu_device::xram_r) +uint8_t lc8670_cpu_device::xram_r(offs_t offset) { if (!(REG_VCCR & 0x40) || machine().side_effects_disabled()) // XRAM access enabled { - uint8_t * xram_bank = m_xram + (REG_XBNK & 0x03) * 0x60; + uint8_t *xram_bank = m_xram + (REG_XBNK & 0x03) * 0x60; - switch(REG_XBNK & 0x03) + switch (REG_XBNK & 0x03) { case 0: case 1: if ((offset & 0x0f) < 0x0c) - return xram_bank[(offset>>4) * 0x0c + (offset & 0x0f)]; + return xram_bank[(offset >> 4) * 0x0c + (offset & 0x0f)]; break; case 2: if (offset < 0x06) @@ -938,18 +940,18 @@ READ8_MEMBER(lc8670_cpu_device::xram_r) return 0xff; } -WRITE8_MEMBER(lc8670_cpu_device::xram_w) +void lc8670_cpu_device::xram_w(offs_t offset, uint8_t data) { if (!(REG_VCCR & 0x40) || machine().side_effects_disabled()) // XRAM access enabled { - uint8_t * xram_bank = m_xram + (REG_XBNK & 0x03) * 0x60; + uint8_t *xram_bank = m_xram + (REG_XBNK & 0x03) * 0x60; switch(REG_XBNK & 0x03) { case 0: case 1: if ((offset & 0x0f) < 0x0c) - xram_bank[(offset>>4) * 0x0c + (offset & 0x0f)] = data; + xram_bank[(offset >> 4) * 0x0c + (offset & 0x0f)] = data; break; case 2: if (offset < 0x06) @@ -959,7 +961,7 @@ WRITE8_MEMBER(lc8670_cpu_device::xram_w) } } -READ8_MEMBER(lc8670_cpu_device::regs_r) +uint8_t lc8670_cpu_device::regs_r(offs_t offset) { switch(offset) { @@ -972,19 +974,19 @@ READ8_MEMBER(lc8670_cpu_device::regs_r) case 0x1d: return m_timer1[1]; case 0x44: - return (REG_P1 & REG_P1DDR) | (m_io->read_byte(LC8670_PORT1) & (REG_P1DDR ^ 0xff)); + return (REG_P1 & REG_P1DDR) | (m_io.read_byte(LC8670_PORT1) & (REG_P1DDR ^ 0xff)); case 0x4c: - return (REG_P3 & REG_P3DDR) | (m_io->read_byte(LC8670_PORT3) & (REG_P3DDR ^ 0xff)); + return (REG_P3 & REG_P3DDR) | (m_io.read_byte(LC8670_PORT3) & (REG_P3DDR ^ 0xff)); case 0x5c: - return m_io->read_byte(LC8670_PORT7) | 0xf0; // 4-bit read-only port + return m_io.read_byte(LC8670_PORT7) | 0xf0; // 4-bit read-only port case 0x66: { - uint8_t data = m_vtrbf[((REG_VRMAD2<<8) | REG_VRMAD1) & 0x1ff]; + uint8_t data = m_vtrbf[((REG_VRMAD2 << 8) | REG_VRMAD1) & 0x1ff]; if (!machine().side_effects_disabled() && (REG_VSEL & 0x10)) { - uint16_t vrmad = (REG_VRMAD1 | (REG_VRMAD2<<8)) + 1; - REG_VRMAD1 = vrmad & 0xff; - REG_VRMAD2 = (vrmad >> 8) & 0x01; + uint16_t vrmad = ((REG_VRMAD1 | (REG_VRMAD2 << 8)) + 1) & 0x1ff; + REG_VRMAD1 = (uint8_t)vrmad; + REG_VRMAD2 = (uint8_t)(vrmad >> 8); } return data; } @@ -998,7 +1000,7 @@ READ8_MEMBER(lc8670_cpu_device::regs_r) return m_sfr[offset]; } -WRITE8_MEMBER(lc8670_cpu_device::regs_w) +void lc8670_cpu_device::regs_w(offs_t offset, uint8_t data) { switch(offset) { @@ -1040,18 +1042,18 @@ WRITE8_MEMBER(lc8670_cpu_device::regs_w) m_clock_changed = true; break; case 0x44: - m_io->write_byte(LC8670_PORT1, ((data | (m_p1_data & REG_P1FCR)) & REG_P1DDR) | (m_io->read_byte(LC8670_PORT1) & (REG_P1DDR ^ 0xff))); + m_io.write_byte(LC8670_PORT1, ((data | (m_p1_data & REG_P1FCR)) & REG_P1DDR) | (m_io.read_byte(LC8670_PORT1) & (REG_P1DDR ^ 0xff))); break; case 0x4c: - m_io->write_byte(LC8670_PORT3, (data & REG_P3DDR) | (m_io->read_byte(LC8670_PORT3) & (REG_P3DDR ^ 0xff))); + m_io.write_byte(LC8670_PORT3, (data & REG_P3DDR) | (m_io.read_byte(LC8670_PORT3) & (REG_P3DDR ^ 0xff))); break; case 0x66: m_vtrbf[((REG_VRMAD2<<8) | REG_VRMAD1) & 0x1ff] = data; if (!machine().side_effects_disabled() && (REG_VSEL & 0x10)) { - uint16_t vrmad = (REG_VRMAD1 | (REG_VRMAD2<<8)) + 1; - REG_VRMAD1 = vrmad & 0xff; - REG_VRMAD2 = (vrmad >> 8) & 0x01; + uint16_t vrmad = ((REG_VRMAD1 | (REG_VRMAD2 << 8)) + 1) & 0x1ff; + REG_VRMAD1 = (uint8_t)vrmad; + REG_VRMAD2 = (uint8_t)(vrmad >> 8); } break; case 0x7f: @@ -1075,7 +1077,7 @@ WRITE8_MEMBER(lc8670_cpu_device::regs_w) inline uint8_t lc8670_cpu_device::fetch() { - uint8_t data = m_cache->read_byte(m_pc); + uint8_t data = m_cache.read_byte(m_pc); set_pc(m_pc + 1); @@ -1084,12 +1086,12 @@ inline uint8_t lc8670_cpu_device::fetch() inline uint8_t lc8670_cpu_device::read_data(uint16_t offset) { - return m_data->read_byte(offset); + return m_data.read_byte(offset); } inline void lc8670_cpu_device::write_data(uint16_t offset, uint8_t data) { - m_data->write_byte(offset, data); + m_data.write_byte(offset, data); } inline uint8_t lc8670_cpu_device::read_data_latch(uint16_t offset) @@ -1115,7 +1117,7 @@ inline void lc8670_cpu_device::write_data_latch(uint16_t offset, uint8_t data) inline void lc8670_cpu_device::update_port1(uint8_t data) { m_p1_data = data; - m_io->write_byte(LC8670_PORT1, ((REG_P1 | (m_p1_data & REG_P1FCR)) & REG_P1DDR) | (m_io->read_byte(LC8670_PORT1) & (REG_P1DDR ^ 0xff))); + m_io.write_byte(LC8670_PORT1, ((REG_P1 | (m_p1_data & REG_P1FCR)) & REG_P1DDR) | (m_io.read_byte(LC8670_PORT1) & (REG_P1DDR ^ 0xff))); } inline void lc8670_cpu_device::set_pc(uint16_t new_pc) @@ -1144,7 +1146,7 @@ inline uint16_t lc8670_cpu_device::get_addr() if (mode > 0x01 && mode <= 0x03) addr = GET_D9; else if (mode > 0x03 && mode <= 0x07) - addr = read_data(GET_RI | ((REG_PSW>>1) & 0x0c)) | ((GET_RI & 0x02) ? 0x100 : 0x00); + addr = read_data(GET_RI | ((REG_PSW >> 1) & 0x0c)) | ((GET_RI & 0x02) ? 0x100 : 0x00); else fatalerror("%s: invalid get_addr in mode %x\n", machine().describe_context().c_str(), mode); @@ -1191,7 +1193,7 @@ inline void lc8670_cpu_device::change_clock_source() inline void lc8670_cpu_device::check_p_flag() { uint8_t p_plag = 0; - for(int i=0; i<8; i++) + for(int i = 0; i < 8; i++) p_plag ^= BIT(REG_A, i); if (p_plag) @@ -1204,7 +1206,7 @@ inline void lc8670_cpu_device::check_p3int() { if (REG_P3INT & 0x04) { - if ((m_io->read_byte(LC8670_PORT3) ^ 0xff) & (REG_P3DDR ^ 0xff) & REG_P3) + if ((m_io.read_byte(LC8670_PORT3) ^ 0xff) & (REG_P3DDR ^ 0xff) & REG_P3) { REG_P3INT |= 0x02; if (REG_P3INT & 0x01) @@ -1215,8 +1217,8 @@ inline void lc8670_cpu_device::check_p3int() inline void lc8670_cpu_device::set_irq_flag(int source) { - if (LOG_IRQ) logerror("%s: set interrupt flag: %d\n", tag(), source); - m_irq_flag |= 1<<source; + LOGMASKED(LOG_IRQ, "%s: set interrupt flag: %d\n", tag(), source); + m_irq_flag |= 1 << source; } int lc8670_cpu_device::decode_op(uint8_t op) @@ -1238,7 +1240,7 @@ int lc8670_cpu_device::decode_op(uint8_t op) break; } - return ((op>>4) & 0x0f) * 5 + idx; + return (op >> 4) * 5 + idx; } //************************************************************************** @@ -1270,8 +1272,8 @@ int lc8670_cpu_device::op_call() { uint16_t new_pc = GET_A12; - push((m_pc>>0) & 0xff); - push((m_pc>>8) & 0xff); + push((uint8_t)m_pc); + push((uint8_t)(m_pc >> 8)); set_pc((m_pc & 0xf000) | new_pc); @@ -1282,10 +1284,10 @@ int lc8670_cpu_device::op_call() int lc8670_cpu_device::op_callr() { uint16_t r16 = fetch(); - r16 |= fetch()<<8; + r16 |= fetch() << 8; - push((m_pc>>0) & 0xff); - push((m_pc>>8) & 0xff); + push((uint8_t)m_pc); + push((uint8_t)(m_pc >> 8)); set_pc(m_pc - 1 + r16); return 4; @@ -1294,7 +1296,7 @@ int lc8670_cpu_device::op_callr() int lc8670_cpu_device::op_brf() { uint16_t r16 = fetch(); - r16 |= fetch()<<8; + r16 |= fetch() << 8; set_pc(m_pc - 1 + r16); return 4; @@ -1309,11 +1311,11 @@ int lc8670_cpu_device::op_st() int lc8670_cpu_device::op_callf() { - uint16_t a16 = fetch()<<8; + uint16_t a16 = fetch() << 8; a16 |= fetch(); - push((m_pc>>0) & 0xff); - push((m_pc>>8) & 0xff); + push((uint8_t)m_pc); + push((uint8_t)(m_pc >> 8)); set_pc(a16); return 2; @@ -1321,7 +1323,7 @@ int lc8670_cpu_device::op_callf() int lc8670_cpu_device::op_jmpf() { - uint16_t a16 = fetch()<<8; + uint16_t a16 = fetch() << 8; a16 |= fetch(); set_pc(a16); @@ -1349,11 +1351,11 @@ int lc8670_cpu_device::op_jmp() int lc8670_cpu_device::op_mul() { - uint32_t res = REG_B * ((REG_A<<8) | REG_C); + uint32_t res = REG_B * ((REG_A << 8) | REG_C); - REG_A = (res>>8) & 0xff; - REG_B = (res>>16) & 0xff; - REG_C = (res>>0) & 0xff; + REG_A = (uint8_t)(res >> 8); + REG_B = (uint8_t)(res >> 16); + REG_C = (uint8_t)res; SET_OV(REG_B != 0 ? 1 : 0); SET_CY(0); @@ -1396,13 +1398,13 @@ int lc8670_cpu_device::op_div() if (REG_B != 0) { - uint16_t v = ((REG_A<<8) | REG_C); + uint16_t v = ((REG_A << 8) | REG_C); res = v / REG_B; mod = v % REG_B; - REG_A = (res>>8) & 0xff; - REG_C = (res>>0) & 0xff; - REG_B = mod & 0xff; + REG_A = (uint8_t)(res >> 8); + REG_C = (uint8_t)res; + REG_B = (uint8_t)mod; SET_OV(0); } else @@ -1446,10 +1448,10 @@ int lc8670_cpu_device::op_bne_ri() int lc8670_cpu_device::op_ldf() { - uint16_t addr = REG_TRL | (REG_TRH<<8); + uint16_t addr = REG_TRL | (REG_TRH << 8); m_bankswitch_func(REG_FPR & 0x01 ? 2 : 1); - REG_A = m_program->read_byte(addr); + REG_A = m_program.read_byte(addr); CHECK_P(); m_bankswitch_func(((REG_EXT & 0x01) ? 1 : (REG_EXT & 0x08) ? 0 : 2)); @@ -1458,10 +1460,10 @@ int lc8670_cpu_device::op_ldf() int lc8670_cpu_device::op_stf() { - uint16_t addr = REG_TRL | (REG_TRH<<8); + uint16_t addr = REG_TRL | (REG_TRH << 8); m_bankswitch_func(REG_FPR & 0x01 ? 2 : 1); - m_program->write_byte(addr, REG_A); + m_program.write_byte(addr, REG_A); m_bankswitch_func(((REG_EXT & 0x01) ? 1 : (REG_EXT & 0x08) ? 0 : 2)); return 2; @@ -1488,9 +1490,9 @@ int lc8670_cpu_device::op_bpc() uint8_t r8 = GET_R8; uint8_t data = read_data_latch(d9); - if (data & (1<<b3)) + if (BIT(data, b3)) { - write_data_latch(d9, data & ~(1<<b3)); + write_data_latch(d9, data & ~(1 << b3)); set_pc(m_pc + SIGNED(r8)); } @@ -1521,7 +1523,7 @@ int lc8670_cpu_device::op_bp() uint16_t d9 = GET_D9B3; uint8_t r8 = GET_R8; - if (read_data(d9) & (1<<b3)) + if (BIT(read_data(d9), b3)) set_pc(m_pc + SIGNED(r8)); return 2; @@ -1564,7 +1566,7 @@ int lc8670_cpu_device::op_add() SET_AC(((REG_A & 0x0f) + (data & 0x0f)) > 0x0f ? 1 : 0); SET_OV((REG_A & data) & (data ^ res) & 0x80 ? 1 : 0); - REG_A = res & 0xff; + REG_A = (uint8_t)res; CHECK_P(); return 1; @@ -1576,7 +1578,7 @@ int lc8670_cpu_device::op_bn() uint16_t d9 = GET_D9B3; uint8_t r8 = GET_R8; - if (!(read_data(d9) & (1<<b3))) + if (!BIT(read_data(d9), b3)) set_pc(m_pc + SIGNED(r8)); return 2; @@ -1599,7 +1601,7 @@ int lc8670_cpu_device::op_addc() SET_CY(res > 0xff ? 1 : 0); SET_AC(((REG_A & 0x0f) + (data & 0x0f) + GET_CY) > 0x0f ? 1 : 0); - SET_OV(((REG_A+GET_CY) & data) & (data ^ res) & 0x80 ? 1 : 0); + SET_OV(((REG_A + GET_CY) & data) & (data ^ res) & 0x80 ? 1 : 0); REG_A = res & 0xff; CHECK_P(); @@ -1609,7 +1611,7 @@ int lc8670_cpu_device::op_addc() int lc8670_cpu_device::op_ret() { - uint16_t new_pc = pop()<<8; + uint16_t new_pc = pop() << 8; new_pc |= pop(); set_pc(new_pc); @@ -1625,7 +1627,7 @@ int lc8670_cpu_device::op_sub() SET_AC(((REG_A & 0x0f) - (data & 0x0f)) < 0x00 ? 1 : 0); SET_OV((REG_A ^ data) & (data & res) & 0x80 ? 1 : 0); - REG_A = res & 0xff; + REG_A = (uint8_t)res; CHECK_P(); return 1; @@ -1636,7 +1638,7 @@ int lc8670_cpu_device::op_not1() uint16_t d9 = GET_D9B3; uint8_t data = read_data_latch(d9); - data ^= (1<<GET_B3); + data ^= (1 << GET_B3); write_data_latch(d9, data); return 1; @@ -1644,17 +1646,19 @@ int lc8670_cpu_device::op_not1() int lc8670_cpu_device::op_reti() { - uint16_t new_pc = pop()<<8; + uint16_t new_pc = pop() << 8; new_pc |= pop(); set_pc(new_pc); - if (LOG_IRQ) logerror("%s: RETI from level %d\n", machine().describe_context(), m_irq_lev); - for(int i=2; i>=0; i--) - if (m_irq_lev & (1<<i)) + LOGMASKED(LOG_IRQ, "%s: RETI from level %d\n", machine().describe_context(), m_irq_lev); + for(int i = 2; i >= 0; i--) + { + if (BIT(m_irq_lev, i)) { - m_irq_lev &= ~(1<<i); + m_irq_lev &= ~(1 << i); break; } + } m_after_reti = true; @@ -1670,7 +1674,7 @@ int lc8670_cpu_device::op_subc() SET_AC(((REG_A & 0x0f) - (data & 0x0f) - GET_CY) < 0x00 ? 1 : 0); SET_OV((REG_A ^ (data + GET_CY)) & (data & res) & 0x80 ? 1 : 0); - REG_A = res & 0xff; + REG_A = (uint8_t)res; CHECK_P(); return 1; @@ -1678,7 +1682,7 @@ int lc8670_cpu_device::op_subc() int lc8670_cpu_device::op_ror() { - REG_A = ((REG_A & 0x01) << 7) | (REG_A>>1); + REG_A = ((REG_A & 0x01) << 7) | (REG_A >> 1); CHECK_P(); return 1; @@ -1686,7 +1690,7 @@ int lc8670_cpu_device::op_ror() int lc8670_cpu_device::op_ldc() { - REG_A = m_program->read_byte(((REG_TRH<<8) | REG_TRL) + REG_A); + REG_A = m_program.read_byte(((REG_TRH << 8) | REG_TRL) + REG_A); CHECK_P(); return 2; @@ -1709,7 +1713,7 @@ int lc8670_cpu_device::op_clr1() uint16_t d9 = GET_D9B3; uint8_t data = read_data_latch(d9); - data &= ~(1<<GET_B3); + data &= ~(1 << GET_B3); write_data_latch(d9, data); return 1; @@ -1717,9 +1721,9 @@ int lc8670_cpu_device::op_clr1() int lc8670_cpu_device::op_rorc() { - uint8_t a = (REG_A>>1) | (GET_CY ? 0x80 : 0x00); + uint8_t a = (REG_A >> 1) | (GET_CY ? 0x80 : 0x00); - SET_CY(BIT(REG_A,0)); + SET_CY(BIT(REG_A, 0)); REG_A = a; CHECK_P(); @@ -1736,7 +1740,7 @@ int lc8670_cpu_device::op_or() int lc8670_cpu_device::op_rol() { - REG_A = ((REG_A & 0x80) >> 7) | (REG_A<<1); + REG_A = ((REG_A & 0x80) >> 7) | (REG_A << 1); CHECK_P(); return 1; @@ -1755,7 +1759,7 @@ int lc8670_cpu_device::op_set1() uint16_t d9 = GET_D9B3; uint8_t data = read_data_latch(d9); - data |= (1<<GET_B3); + data |= (1 << GET_B3); write_data_latch(d9, data); return 1; @@ -1763,9 +1767,9 @@ int lc8670_cpu_device::op_set1() int lc8670_cpu_device::op_rolc() { - uint8_t a = (REG_A<<1) | (GET_CY ? 0x01 : 0x00); + uint8_t a = (REG_A << 1) | (GET_CY ? 0x01 : 0x00); - SET_CY(BIT(REG_A,7)); + SET_CY(BIT(REG_A, 7)); REG_A = a; CHECK_P(); diff --git a/src/devices/cpu/lc8670/lc8670.h b/src/devices/cpu/lc8670/lc8670.h index c7d440d93bb..2f92c6c6e6c 100644 --- a/src/devices/cpu/lc8670/lc8670.h +++ b/src/devices/cpu/lc8670/lc8670.h @@ -60,12 +60,12 @@ public: uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); // internal map handlers - DECLARE_READ8_MEMBER(regs_r); - DECLARE_WRITE8_MEMBER(regs_w); - DECLARE_READ8_MEMBER(mram_r); - DECLARE_WRITE8_MEMBER(mram_w); - DECLARE_READ8_MEMBER(xram_r); - DECLARE_WRITE8_MEMBER(xram_w); + uint8_t regs_r(offs_t offset); + void regs_w(offs_t offset, uint8_t data); + uint8_t mram_r(offs_t offset); + void mram_w(offs_t offset, uint8_t data); + uint8_t xram_r(offs_t offset); + void xram_w(offs_t offset, uint8_t data); // configuration helpers void set_cpu_clock(clock_source source, uint32_t clock) { m_clocks[unsigned(source)] = clock; } @@ -73,27 +73,16 @@ public: template <typename T, typename U, typename V> void set_clock_sources(T &&sub_clock, U &&rc_clock, V &&cf_clock) { - set_cpu_clock(lc8670_cpu_device::clock_source::SUB, sub_clock); - set_cpu_clock(lc8670_cpu_device::clock_source::RC, rc_clock); - set_cpu_clock(lc8670_cpu_device::clock_source::CF, cf_clock); + set_cpu_clock(lc8670_cpu_device::clock_source::SUB, std::forward<T>(sub_clock)); + set_cpu_clock(lc8670_cpu_device::clock_source::RC, std::forward<U>(rc_clock)); + set_cpu_clock(lc8670_cpu_device::clock_source::CF, std::forward<V>(cf_clock)); } auto bank_cb() { return m_bankswitch_func.bind(); } - template <typename Object> void set_lcd_update_cb(Object &&cb) { m_lcd_update_func = std::forward<Object>(cb); } - void set_lcd_update_cb(lcd_update_delegate callback) { m_lcd_update_func = callback; } - template <class FunctionClass> void set_lcd_update_cb(const char *devname, - uint32_t (FunctionClass::*callback)(bitmap_ind16 &, const rectangle &, uint8_t*, bool, uint8_t), const char *name) - { - set_lcd_update_cb(lcd_update_delegate(callback, name, devname, static_cast<FunctionClass *>(nullptr))); - } - template <class FunctionClass> void set_lcd_update_cb( - uint32_t (FunctionClass::*callback)(bitmap_ind16 &, const rectangle &, uint8_t*, bool, uint8_t), const char *name) - { - set_lcd_update_cb(lcd_update_delegate(callback, name, nullptr, static_cast<FunctionClass *>(nullptr))); - } + template <typename... T> void set_lcd_update_cb(T &&... args) { m_lcd_update_func.set(std::forward<T>(args)...); } - void lc8670_internal_map(address_map &map); + void lc8670_internal_map(address_map &map) ATTR_COLD; protected: enum { @@ -102,14 +91,12 @@ protected: }; // device-level overrides - virtual void device_start() override; - virtual void device_reset() override; - virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override; + virtual void device_start() override ATTR_COLD; + virtual void device_reset() override ATTR_COLD; // device_execute_interface overrides - virtual uint32_t execute_min_cycles() const override { return 1; } - virtual uint32_t execute_max_cycles() const override { return 7; } - virtual uint32_t execute_input_lines() const override { return 4; } + virtual uint32_t execute_min_cycles() const noexcept override { return 1; } + virtual uint32_t execute_max_cycles() const noexcept override { return 7; } virtual void execute_run() override; virtual void execute_set_input(int inputnum, int state) override; @@ -123,6 +110,9 @@ protected: // device_disasm_interface overrides virtual std::unique_ptr<util::disasm_interface> create_disassembler() override; + TIMER_CALLBACK_MEMBER(base_timer_update); + TIMER_CALLBACK_MEMBER(clock_timer_update); + private: // helpers inline uint8_t fetch(); @@ -200,14 +190,12 @@ private: address_space_config m_data_config; address_space_config m_io_config; - address_space * m_program; // program space (ROM or flash) - address_space * m_data; // internal RAM/register - address_space * m_io; // I/O ports - memory_access_cache<0, 0, ENDIANNESS_BIG> *m_cache; + memory_access<16, 0, 0, ENDIANNESS_BIG>::cache m_cache; + memory_access<16, 0, 0, ENDIANNESS_BIG>::specific m_program; // program space (ROM or flash) + memory_access< 9, 0, 0, ENDIANNESS_BIG>::specific m_data; // internal RAM/register + memory_access< 8, 0, 0, ENDIANNESS_BIG>::specific m_io; // I/O ports // timers - static const device_timer_id BASE_TIMER = 1; - static const device_timer_id CLOCK_TIMER = 2; emu_timer * m_basetimer; emu_timer * m_clocktimer; diff --git a/src/devices/cpu/lc8670/lc8670dsm.cpp b/src/devices/cpu/lc8670/lc8670dsm.cpp index bdf8a88e8cc..5a27a0a8f47 100644 --- a/src/devices/cpu/lc8670/lc8670dsm.cpp +++ b/src/devices/cpu/lc8670/lc8670dsm.cpp @@ -107,7 +107,7 @@ void lc8670_disassembler::dasm_arg(uint8_t op, char *buffer, offs_t pc, int arg, break; case OP_R8: pc++; - // fall through + [[fallthrough]]; case OP_R8RI: buffer += sprintf(buffer, "%04x", (pc + 1 + opcodes.r8(pos) - (opcodes.r8(pos)&0x80 ? 0x100 : 0)) & 0xffff); pos++; |