diff options
Diffstat (limited to 'src/devices/cpu/dsp16')
-rw-r--r-- | src/devices/cpu/dsp16/dsp16.cpp | 91 | ||||
-rw-r--r-- | src/devices/cpu/dsp16/dsp16.h | 48 | ||||
-rw-r--r-- | src/devices/cpu/dsp16/dsp16dis.cpp | 2 | ||||
-rw-r--r-- | src/devices/cpu/dsp16/dsp16fe.cpp | 18 | ||||
-rw-r--r-- | src/devices/cpu/dsp16/dsp16fe.h | 8 |
5 files changed, 72 insertions, 95 deletions
diff --git a/src/devices/cpu/dsp16/dsp16.cpp b/src/devices/cpu/dsp16/dsp16.cpp index 5fbc4c2ad10..288c52d1fe8 100644 --- a/src/devices/cpu/dsp16/dsp16.cpp +++ b/src/devices/cpu/dsp16/dsp16.cpp @@ -32,7 +32,7 @@ There's a 15-word "cache" that the DSP can execute from without the cost of instruction fetches. There's an instruction to cache the - next N instructions and repeat them M times, and in instruction to + next N instructions and repeat them M times, and an instruction to execute the currently cached instructions M times. Interrupts are not serviced while executing from cache, and not all instructions can be cached. @@ -80,12 +80,9 @@ #include "dsp16core.ipp" #include "dsp16rc.h" -#include "debugger.h" - #include <functional> #include <limits> -#define LOG_GENERAL (1U << 0) #define LOG_INT (1U << 1) #define LOG_SIO (1U << 2) #define LOG_PIO (1U << 3) @@ -116,7 +113,7 @@ ALLOW_SAVE_TYPE(dsp16_device_base::phase); ALLOW_SAVE_TYPE(dsp16_device_base::flags); ALLOW_SAVE_TYPE(dsp16_device_base::sio_flags); -WRITE_LINE_MEMBER(dsp16_device_base::exm_w) +void dsp16_device_base::exm_w(int state) { if (bool(state) != bool(m_exm_in)) { @@ -130,7 +127,7 @@ WRITE_LINE_MEMBER(dsp16_device_base::exm_w) high-level passive parallel I/O handlers ***********************************************************************/ -READ16_MEMBER(dsp16_device_base::pio_r) +u16 dsp16_device_base::pio_r() { if (!pio_pods_active()) { @@ -148,7 +145,7 @@ READ16_MEMBER(dsp16_device_base::pio_r) } } -WRITE16_MEMBER(dsp16_device_base::pio_w) +void dsp16_device_base::pio_w(u16 data) { if (!pio_pids_active()) { @@ -180,13 +177,13 @@ dsp16_device_base::dsp16_device_base( , m_iack_cb(*this) , m_ick_cb(*this), m_ild_cb(*this) , m_do_cb(*this), m_ock_cb(*this), m_old_cb(*this), m_ose_cb(*this) - , m_pio_r_cb(*this), m_pio_w_cb(*this), m_pdb_w_cb(*this), m_psel_cb(*this), m_pids_cb(*this), m_pods_cb(*this) + , m_pio_r_cb(*this, 0U), m_pio_w_cb(*this), m_pdb_w_cb(*this), m_psel_cb(*this), m_pids_cb(*this), m_pods_cb(*this) , m_space_config{ { "rom", ENDIANNESS_BIG, 16, 16, -1, address_map_constructor(FUNC(dsp16_device_base::program_map), this) }, { "ram", ENDIANNESS_BIG, 16, yaau_bits, -1, std::move(data_map) }, { "exm", ENDIANNESS_BIG, 16, 16, -1 } } , m_yaau_bits(yaau_bits) - , m_workram(*this, "workram"), m_spaces{ nullptr, nullptr, nullptr }, m_pcache(nullptr), m_workram_mask(0U) + , m_workram(*this, "workram"), m_spaces{ nullptr, nullptr, nullptr }, m_workram_mask(0U) , m_drc_cache(CACHE_SIZE), m_core(nullptr, [] (core_state *core) { core->~core_state(); }), m_recompiler() , m_cache_mode(cache::NONE), m_phase(phase::PURGE), m_int_enable{ 0U, 0U }, m_flags(FLAGS_NONE), m_cache_ptr(0U), m_cache_limit(0U), m_cache_iterations(0U) , m_exm_in(1U), m_int_in(CLEAR_LINE), m_iack_out(1U) @@ -203,25 +200,6 @@ dsp16_device_base::dsp16_device_base( device_t implementation ***********************************************************************/ -void dsp16_device_base::device_resolve_objects() -{ - m_iack_cb.resolve_safe(); - - m_ick_cb.resolve_safe(); - m_ild_cb.resolve_safe(); - m_do_cb.resolve_safe(); - m_ock_cb.resolve_safe(); - m_old_cb.resolve_safe(); - m_ose_cb.resolve_safe(); - - m_pio_r_cb.resolve(); - m_pio_w_cb.resolve_safe(); - m_pdb_w_cb.resolve_safe(); - m_psel_cb.resolve_safe(); - m_pids_cb.resolve_safe(); - m_pods_cb.resolve_safe(); -} - void dsp16_device_base::device_start() { m_core.reset(reinterpret_cast<core_state *>(m_drc_cache.alloc_near(sizeof(core_state)))); @@ -231,7 +209,7 @@ void dsp16_device_base::device_start() m_spaces[AS_PROGRAM] = &space(AS_PROGRAM); m_spaces[AS_DATA] = &space(AS_DATA); m_spaces[AS_IO] = &space(AS_IO); - m_pcache = m_spaces[AS_PROGRAM]->cache<1, -1, ENDIANNESS_BIG>(); + m_spaces[AS_PROGRAM]->cache(m_pcache); m_workram_mask = u16((m_workram.bytes() >> 1) - 1); if (allow_drc()) @@ -363,7 +341,7 @@ void dsp16_device_base::device_reset() m_ose_cb(m_ose_out = 1U); // PIO reset outputs - m_pdb_w_cb(machine().dummy_space(), m_psel_out, 0xffffU, 0x0000U); + m_pdb_w_cb(m_psel_out, 0xffffU, 0x0000U); if (!m_pids_out) { LOGPIO("DSP16: de-asserting PIDS for reset\n"); @@ -442,7 +420,7 @@ void dsp16_device_base::execute_set_input(int inputnum, int state) m_ick_in = (ASSERT_LINE == state) ? 1U : 0U; } if (CLEAR_LINE != state) - standard_irq_callback(DSP16_ICK_LINE); + standard_irq_callback(DSP16_ICK_LINE, m_st_pcbase); break; case DSP16_ILD_LINE: if (sio_ild_active()) @@ -464,7 +442,7 @@ void dsp16_device_base::execute_set_input(int inputnum, int state) m_ock_in = (ASSERT_LINE == state) ? 1U : 0U; } if (CLEAR_LINE != state) - standard_irq_callback(DSP16_OCK_LINE); + standard_irq_callback(DSP16_OCK_LINE, m_st_pcbase); break; case DSP16_OLD_LINE: if (sio_old_active()) @@ -639,7 +617,7 @@ dsp16_disassembler::cpu::predicate dsp16_device_base::check_branch(offs_t pc) co return predicate::INDETERMINATE; } -template <offs_t Base> READ16_MEMBER(dsp16_device_base::external_memory_r) +template <offs_t Base> u16 dsp16_device_base::external_memory_r(offs_t offset, u16 mem_mask) { return m_spaces[AS_IO]->read_word(Base + offset, mem_mask); } @@ -660,7 +638,7 @@ void dsp16_device_base::program_map(address_map &map) template <bool Debugger, bool Caching> inline void dsp16_device_base::execute_some_rom() { - assert(bool(machine().debug_flags & DEBUG_FLAG_ENABLED) == Debugger); + assert(debugger_enabled() == Debugger); for (bool mode_change = false; !mode_change && m_core->icount_remaining(); m_core->decrement_icount()) { assert((cache::LOAD == m_cache_mode) == Caching); @@ -720,7 +698,7 @@ template <bool Debugger, bool Caching> inline void dsp16_device_base::execute_so { LOGINT("DSP16: asserting IACK (PC = %04X)\n", m_st_pcbase); m_iack_cb(m_iack_out = 0U); - standard_irq_callback(DSP16_INT_LINE); + standard_irq_callback(DSP16_INT_LINE, m_st_pcbase); } break; case FLAGS_IACK_CLEAR: @@ -854,7 +832,7 @@ template <bool Debugger, bool Caching> inline void dsp16_device_base::execute_so m_phase = phase::OP2; break; - case 0x0e: // do K { instr1...instrIN } # redo K + case 0x0e: // do K { instr1...instrNI } # redo K { u16 const ni(op_ni(op)); if (ni) @@ -1000,7 +978,6 @@ template <bool Debugger, bool Caching> inline void dsp16_device_base::execute_so case 0x1e: // Reserved throw emu_fatalerror("DSP16: reserved op %u (PC = %04X)\n", op >> 11, m_st_pcbase); - break; case 0x1f: // F1 ; y = Y ; x = *pt++[i] m_core->op_dau_ad(op) = m_core->dau_f1(op); @@ -1133,7 +1110,7 @@ template <bool Debugger, bool Caching> inline void dsp16_device_base::execute_so set_predicate(predicate); if (fetch_target) - *fetch_target = m_pcache->read_word(fetch_addr); + *fetch_target = m_pcache.read_word(fetch_addr); if (phase::OP1 == m_phase) { @@ -1150,7 +1127,7 @@ template <bool Debugger, bool Caching> inline void dsp16_device_base::execute_so template <bool Debugger> inline void dsp16_device_base::execute_some_cache() { - assert(bool(machine().debug_flags & DEBUG_FLAG_ENABLED) == Debugger); + assert(debugger_enabled() == Debugger); for (bool mode_change = false; !mode_change && m_core->icount_remaining(); m_core->decrement_icount()) { u16 const op(m_cache[m_cache_ptr]); @@ -1274,7 +1251,7 @@ template <bool Debugger> inline void dsp16_device_base::execute_some_cache() m_core->op_dau_ad(op) = d; if (last_instruction) { - m_rom_data = m_pcache->read_word(m_core->xaau_pt); + m_rom_data = m_pcache.read_word(m_core->xaau_pt); m_phase = phase::OP2; } else @@ -1289,7 +1266,7 @@ template <bool Debugger> inline void dsp16_device_base::execute_some_cache() m_core->op_dau_ad(op) = m_core->dau_f1(op); m_core->dau_temp = s16(m_core->dau_y >> 16); m_core->dau_set_y(yaau_read<Debugger>(op)); - m_rom_data = m_pcache->read_word(m_core->xaau_pt); + m_rom_data = m_pcache.read_word(m_core->xaau_pt); m_phase = phase::OP2; break; @@ -1298,7 +1275,7 @@ template <bool Debugger> inline void dsp16_device_base::execute_some_cache() m_core->dau_set_y(yaau_read<Debugger>(op)); if (last_instruction) { - m_rom_data = m_pcache->read_word(m_core->xaau_pt); + m_rom_data = m_pcache.read_word(m_core->xaau_pt); m_phase = phase::OP2; } else @@ -1384,7 +1361,7 @@ template <bool Debugger> inline void dsp16_device_base::execute_some_cache() // overlapped fetch of next instruction from ROM mode_change = true; m_cache_mode = cache::NONE; - m_cache[m_cache_ptr = 0] = m_pcache->read_word(m_core->xaau_pc); + m_cache[m_cache_ptr = 0] = m_pcache.read_word(m_core->xaau_pc); m_st_pcbase = m_core->xaau_pc; } else @@ -1420,7 +1397,7 @@ inline void dsp16_device_base::overlap_rom_data_read() case 0x19: // F1 ; y = a0 ; x = *pt++[i] case 0x1b: // F1 ; y = a1 ; x = *pt++[i] case 0x1f: // F1 ; y = Y ; x = *pt++[i] - m_rom_data = m_pcache->read_word(m_core->xaau_pt); + m_rom_data = m_pcache.read_word(m_core->xaau_pt); break; } } @@ -1536,8 +1513,8 @@ inline void dsp16_device_base::pio_step() assert(!m_pids_out); if (!--m_pio_pids_cnt) { - if (!m_pio_r_cb.isnull()) - m_pio_pdx_in = m_pio_r_cb(machine().dummy_space(), m_psel_out, 0xffffU); + if (!m_pio_r_cb.isunset()) + m_pio_pdx_in = m_pio_r_cb(m_psel_out, 0xffffU); m_pids_cb(m_pids_out = 1U); LOGPIO("DSP16: PIO read active edge PSEL = %u, PDX = %04X (PC = %04X)\n", m_psel_out, m_pio_pdx_in, m_st_pcbase); } @@ -1555,9 +1532,9 @@ inline void dsp16_device_base::pio_step() { LOGPIO("DSP16: PIO write active edge PSEL = %u, PDX = %04X (PC = %04X)\n", m_psel_out, m_pio_pdx_out, m_st_pcbase); m_pods_cb(1U); - m_pio_w_cb(machine().dummy_space(), m_psel_out, m_pio_pdx_out, 0xffffU); + m_pio_w_cb(m_psel_out, m_pio_pdx_out, 0xffffU); m_pods_out = 1U; - m_pdb_w_cb(machine().dummy_space(), m_psel_out, 0xffffU, 0x0000U); + m_pdb_w_cb(m_psel_out, 0xffffU, 0x0000U); } } else @@ -1601,7 +1578,7 @@ inline bool dsp16_device_base::op_interruptible(u16 op) return true; case 0x00: // goto JA case 0x01: - case 0x0e: // do K { instre1...instrNI } # redo K + case 0x0e: // do K { instr1...instrNI } # redo K case 0x10: // call JA case 0x11: case 0x18: // goto B @@ -1778,7 +1755,7 @@ s64 dsp16_device_base::dau_saturate(u16 a) const if (m_core->dau_auc_sat(a)) return m_core->dau_a[a]; else - return std::min<s64>(std::max<s64>(m_core->dau_a[a], std::numeric_limits<s32>::min()), std::numeric_limits<s32>::max()); + return std::clamp<s64>(m_core->dau_a[a], std::numeric_limits<s32>::min(), std::numeric_limits<s32>::max()); } inline bool dsp16_device_base::op_dau_con(u16 op, bool inc) @@ -2003,7 +1980,7 @@ void dsp16_device_base::pio_pioc_write(u16 value) if (!m_pods_out) { m_pods_cb(m_pods_out = 1U); // actually high-impedance - m_pdb_w_cb(machine().dummy_space(), m_psel_out, 0xffffU, 0x0000U); + m_pdb_w_cb(m_psel_out, 0xffffU, 0x0000U); } } } @@ -2066,7 +2043,7 @@ void dsp16_device_base::pio_pdx_write(u16 sel, u16 value) { assert(m_pods_out); m_pods_cb(m_pods_out = 0U); - m_pdb_w_cb(machine().dummy_space(), sel, value, 0xffffU); + m_pdb_w_cb(sel, value, 0xffffU); } m_pio_pods_cnt = pio_strobe() + 1; // decremented this cycle } @@ -2082,7 +2059,7 @@ dsp16_device::dsp16_device(machine_config const &mconfig, char const *tag, devic mconfig, DSP16, tag, owner, clock, 9, address_map_constructor(FUNC(dsp16_device::data_map), this)) - , m_rom(*this, DEVICE_SELF, 0x0800) + , m_rom(*this, DEVICE_SELF) { } @@ -2092,7 +2069,7 @@ void dsp16_device::external_memory_enable(address_space &space, bool enable) // this assumes internal ROM is mirrored above 2KiB, but actual hardware behaviour is unknown space.unmap_read(0x0000, 0xffff); if (enable) - space.install_read_handler(0x0000, 0xffff, read16_delegate(FUNC(dsp16_device::external_memory_r<0x0000>), this)); + space.install_read_handler(0x0000, 0xffff, read16s_delegate(*this, FUNC(dsp16_device::external_memory_r<0x0000>))); else space.install_rom(0x0000, 0x07ff, 0xf800, &m_rom[0]); } @@ -2114,7 +2091,7 @@ dsp16a_device::dsp16a_device(machine_config const &mconfig, char const *tag, dev mconfig, DSP16A, tag, owner, clock, 16, address_map_constructor(FUNC(dsp16a_device::data_map), this)) - , m_rom(*this, DEVICE_SELF, 0x1000) + , m_rom(*this, DEVICE_SELF) { } @@ -2123,12 +2100,12 @@ void dsp16a_device::external_memory_enable(address_space &space, bool enable) space.unmap_read(0x0000, 0xffff); if (enable) { - space.install_read_handler(0x0000, 0xffff, read16_delegate(FUNC(dsp16a_device::external_memory_r<0x0000>), this)); + space.install_read_handler(0x0000, 0xffff, read16s_delegate(*this, FUNC(dsp16a_device::external_memory_r<0x0000>))); } else { space.install_rom(0x0000, 0x0fff, &m_rom[0]); - space.install_read_handler(0x1000, 0xffff, read16_delegate(FUNC(dsp16a_device::external_memory_r<0x1000>), this)); + space.install_read_handler(0x1000, 0xffff, read16s_delegate(*this, FUNC(dsp16a_device::external_memory_r<0x1000>))); } } diff --git a/src/devices/cpu/dsp16/dsp16.h b/src/devices/cpu/dsp16/dsp16.h index 1f08a6ed6a0..f513e3fdceb 100644 --- a/src/devices/cpu/dsp16/dsp16.h +++ b/src/devices/cpu/dsp16/dsp16.h @@ -20,7 +20,7 @@ class dsp16_device_base : public cpu_device, protected dsp16_disassembler::cpu { public: - DECLARE_WRITE_LINE_MEMBER(exm_w); + void exm_w(int state); // interrupt output callbacks auto iack_cb() { return m_iack_cb.bind(); } @@ -44,24 +44,24 @@ public: auto pods_cb() { return m_pods_cb.bind(); } // interrupt outputs - DECLARE_READ_LINE_MEMBER(iack_r) { return m_iack_out; } + int iack_r() { return m_iack_out; } // serial outputs - DECLARE_READ_LINE_MEMBER(ick_r) { return sio_ick_active() ? m_sio_clk : 1; } - DECLARE_READ_LINE_MEMBER(ild_r) { return sio_ild_active() ? m_sio_ld : 1; } - DECLARE_READ_LINE_MEMBER(do_r) { return m_do_out; } - DECLARE_READ_LINE_MEMBER(ock_r) { return sio_ock_active() ? m_sio_clk : 1; } - DECLARE_READ_LINE_MEMBER(old_r) { return sio_old_active() ? m_sio_ld : 1; } - DECLARE_READ_LINE_MEMBER(ose_r) { return m_ose_out; } + int ick_r() { return sio_ick_active() ? m_sio_clk : 1; } + int ild_r() { return sio_ild_active() ? m_sio_ld : 1; } + int do_r() { return m_do_out; } + int ock_r() { return sio_ock_active() ? m_sio_clk : 1; } + int old_r() { return sio_old_active() ? m_sio_ld : 1; } + int ose_r() { return m_ose_out; } // high-level passive parallel I/O handlers - DECLARE_READ16_MEMBER(pio_r); - DECLARE_WRITE16_MEMBER(pio_w); + u16 pio_r(); + void pio_w(u16 data); // parallel I/O outputs - DECLARE_READ_LINE_MEMBER(psel_r) { return m_psel_out; } - DECLARE_READ_LINE_MEMBER(pids_r) { return m_pids_out; } - DECLARE_READ_LINE_MEMBER(pods_r) { return m_pods_out; } + int psel_r() { return m_psel_out; } + int pids_r() { return m_pids_out; } + int pods_r() { return m_pods_out; } protected: // construction/destruction @@ -75,15 +75,13 @@ protected: address_map_constructor &&data_map); // device_t implementation - virtual void device_resolve_objects() override; - virtual void device_start() override; - virtual void device_stop() override; - virtual void device_reset() override; + virtual void device_start() override ATTR_COLD; + virtual void device_stop() override ATTR_COLD; + virtual void device_reset() override ATTR_COLD; // device_execute_interface implementation - virtual u64 execute_clocks_to_cycles(u64 clocks) const override { return (clocks + 2 - 1) >> 1; } - virtual u64 execute_cycles_to_clocks(u64 cycles) const override { return cycles << 1; } - virtual u32 execute_input_lines() const override { return 5U; } + virtual u64 execute_clocks_to_cycles(u64 clocks) const noexcept override { return (clocks + 2 - 1) >> 1; } + virtual u64 execute_cycles_to_clocks(u64 cycles) const noexcept override { return cycles << 1; } virtual void execute_run() override; virtual void execute_set_input(int inputnum, int state) override; @@ -105,7 +103,7 @@ protected: // for specialisations to override virtual void external_memory_enable(address_space &space, bool enable) = 0; - template <offs_t Base> DECLARE_READ16_MEMBER(external_memory_r); + template <offs_t Base> u16 external_memory_r(offs_t offset, u16 mem_mask = ~0); private: // state registration indices @@ -181,7 +179,7 @@ private: using recompiler_ptr = std::unique_ptr<recompiler>; // internal address maps - void program_map(address_map &map); + void program_map(address_map &map) ATTR_COLD; // instruction execution template <bool Debugger, bool Caching> void execute_some_rom(); @@ -275,7 +273,7 @@ private: // memory system access required_shared_ptr<u16> m_workram; address_space *m_spaces[3]; - memory_access_cache<1, -1, ENDIANNESS_BIG> *m_pcache; + memory_access<16, 1, -1, ENDIANNESS_BIG>::cache m_pcache; u16 m_workram_mask; // recompiler stuff @@ -349,7 +347,7 @@ protected: virtual void external_memory_enable(address_space &space, bool enable) override; // internal address maps - void data_map(address_map &map); + void data_map(address_map &map) ATTR_COLD; private: required_region_ptr<u16> m_rom; @@ -367,7 +365,7 @@ protected: virtual void external_memory_enable(address_space &space, bool enable) override; // internal address maps - void data_map(address_map &map); + void data_map(address_map &map) ATTR_COLD; private: required_region_ptr<u16> m_rom; diff --git a/src/devices/cpu/dsp16/dsp16dis.cpp b/src/devices/cpu/dsp16/dsp16dis.cpp index 9abeb81f803..38457888fe3 100644 --- a/src/devices/cpu/dsp16/dsp16dis.cpp +++ b/src/devices/cpu/dsp16/dsp16dis.cpp @@ -92,6 +92,8 @@ offs_t dsp16_disassembler::disassemble(std::ostream &stream, offs_t pc, const da util::stream_format( stream, "if %1$s%2$s%3$s%4$s", con.text, controlled.nop ? "" : " ", controlled.text, comment); + if (!controlled.nop) + flags |= STEP_COND; } break; diff --git a/src/devices/cpu/dsp16/dsp16fe.cpp b/src/devices/cpu/dsp16/dsp16fe.cpp index 2e79371bdd2..406cf205433 100644 --- a/src/devices/cpu/dsp16/dsp16fe.cpp +++ b/src/devices/cpu/dsp16/dsp16fe.cpp @@ -30,7 +30,7 @@ bool dsp16_device_base::frontend::describe(opcode_desc &desc, opcode_desc const desc.length = 1U; desc.cycles = 1U; - u16 const op(m_host.m_pcache->read_word(desc.physpc)); + u16 const op(m_host.m_pcache.read_word(desc.physpc)); switch (op >> 11) { case 0x00: // goto JA @@ -219,9 +219,9 @@ bool dsp16_device_base::frontend::describe(opcode_desc &desc, opcode_desc const program fetch helpers ***********************************************************************/ -u16 dsp16_device_base::frontend::read_op(opcode_desc const &desc, u16 offset) const +u16 dsp16_device_base::frontend::read_op(opcode_desc const &desc, u16 offset) { - return m_host.m_pcache->read_word((desc.physpc & XAAU_I_EXT) | ((desc.physpc + offset) & XAAU_I_MASK)); + return m_host.m_pcache.read_word((desc.physpc & XAAU_I_EXT) | ((desc.physpc + offset) & XAAU_I_MASK)); } /*********************************************************************** @@ -564,9 +564,9 @@ bool dsp16_device_base::frontend::describe_do(opcode_desc &desc, u16 op) m_cache_cycles = cycles; m_cache_last_cycles = cycles + (romcycles - cachecycles); m_cache_flags = desc.flags & (OPFLAG_READS_MEMORY | OPFLAG_WRITES_MEMORY); - std::copy_n(desc.regin, ARRAY_LENGTH(desc.regin), m_cache_regin); - std::copy_n(desc.regout, ARRAY_LENGTH(desc.regout), m_cache_regout); - std::copy_n(desc.regreq, ARRAY_LENGTH(desc.regreq), m_cache_regreq); + std::copy_n(desc.regin, std::size(desc.regin), m_cache_regin); + std::copy_n(desc.regout, std::size(desc.regout), m_cache_regout); + std::copy_n(desc.regreq, std::size(desc.regreq), m_cache_regreq); m_cache_valid = true; desc.cycles += (2U - romcycles) + ((k - 1) * cycles) + (romcycles - cachecycles); return true; @@ -589,9 +589,9 @@ bool dsp16_device_base::frontend::describe_redo(opcode_desc &desc, u16 op) { desc.cycles += ((k - 1) * m_cache_cycles) + m_cache_last_cycles; desc.flags |= m_cache_flags; - std::copy_n(m_cache_regin, ARRAY_LENGTH(desc.regin), desc.regin); - std::copy_n(m_cache_regout, ARRAY_LENGTH(desc.regout), desc.regout); - std::copy_n(m_cache_regreq, ARRAY_LENGTH(desc.regreq), desc.regreq); + std::copy_n(m_cache_regin, std::size(desc.regin), desc.regin); + std::copy_n(m_cache_regout, std::size(desc.regout), desc.regout); + std::copy_n(m_cache_regreq, std::size(desc.regreq), desc.regreq); return true; } } diff --git a/src/devices/cpu/dsp16/dsp16fe.h b/src/devices/cpu/dsp16/dsp16fe.h index e61c383f2c8..8dc3b96700e 100644 --- a/src/devices/cpu/dsp16/dsp16fe.h +++ b/src/devices/cpu/dsp16/dsp16fe.h @@ -66,9 +66,9 @@ protected: private: // program fetch helpers - u16 read_op(opcode_desc const &desc, u16 offset) const; - u16 read_op(opcode_desc const &desc) const { return read_op(desc, 0U); } - u16 read_imm(opcode_desc const &desc) const { return read_op(desc, 1U); } + u16 read_op(opcode_desc const &desc, u16 offset); + u16 read_op(opcode_desc const &desc) { return read_op(desc, 0U); } + u16 read_imm(opcode_desc const &desc) { return read_op(desc, 1U); } // non-trivial instruction helpers bool describe_goto_b(opcode_desc &desc, u16 op); @@ -98,7 +98,7 @@ private: template <typename... T> static void flag_required_output_reg(opcode_desc &desc, T... reg) { flag_reg(desc.regreq, reg...); } // need access to host device for program fetch - dsp16_device_base const &m_host; + dsp16_device_base &m_host; // for making sweeping assumptions u32 m_cache_cycles = 0U, m_cache_last_cycles = 0U, m_cache_flags = 0U; |