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Diffstat (limited to 'src/devices/cpu/alto2/alto2cpu.h')
-rw-r--r--src/devices/cpu/alto2/alto2cpu.h81
1 files changed, 38 insertions, 43 deletions
diff --git a/src/devices/cpu/alto2/alto2cpu.h b/src/devices/cpu/alto2/alto2cpu.h
index e0fbc075895..d8817978ba8 100644
--- a/src/devices/cpu/alto2/alto2cpu.h
+++ b/src/devices/cpu/alto2/alto2cpu.h
@@ -5,15 +5,13 @@
* Xerox AltoII CPU core interface
*
*****************************************************************************/
-#ifndef MAME_DEVICES_CPU_ALTO2_H
-#define MAME_DEVICES_CPU_ALTO2_H
+#ifndef MAME_CPU_ALTO2_ALTO2CPU_H
+#define MAME_CPU_ALTO2_ALTO2CPU_H
#pragma once
#include "machine/diablo_hd.h"
-#include "debugger.h"
-
#define ALTO2_TAG "alto2"
/**
@@ -209,17 +207,16 @@ public:
protected:
//! device-level override for start
- virtual void device_start() override;
+ virtual void device_start() override ATTR_COLD;
//! device-level override for reset
- virtual void device_reset() override;
+ virtual void device_reset() override ATTR_COLD;
//! device-level override for post reset
void interface_post_reset() override;
//! device_execute_interface overrides
- virtual uint32_t execute_min_cycles() const override { return 1; }
- virtual uint32_t execute_max_cycles() const override { return 1; }
- virtual uint32_t execute_input_lines() const override { return 1; }
+ virtual uint32_t execute_min_cycles() const noexcept override { return 1; }
+ virtual uint32_t execute_max_cycles() const noexcept override { return 1; }
virtual void execute_run() override;
virtual void execute_set_input(int inputnum, int state) override;
@@ -227,7 +224,7 @@ protected:
virtual space_config_vector memory_space_config() const override;
//! device (P)ROMs
- virtual const tiny_rom_entry *device_rom_region() const override;
+ virtual const tiny_rom_entry *device_rom_region() const override ATTR_COLD;
//! device_state_interface overrides
virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
@@ -235,8 +232,6 @@ protected:
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
private:
- void fatal(int level, const char *format, ...);
-
devcb_read16 m_kb_read_callback;
devcb_write16 m_utilout_callback;
@@ -253,28 +248,28 @@ private:
uint32_t m_ucode_size; //!< Size of both, CROM and CRAM together
uint32_t m_sreg_banks; //!< Number of S register banks; derived from m_cram_config
- uint8_t* m_ucode_crom;
- std::unique_ptr<uint8_t[]> m_ucode_cram;
- uint8_t* m_const_data;
+ std::unique_ptr<uint32_t[]> m_ucode_crom;
+ std::unique_ptr<uint32_t[]> m_ucode_cram;
+ std::unique_ptr<uint16_t[]> m_const_data;
- void ucode_map(address_map &map);
- void const_map(address_map &map);
- void iomem_map(address_map &map);
+ void ucode_map(address_map &map) ATTR_COLD;
+ void const_map(address_map &map) ATTR_COLD;
+ void iomem_map(address_map &map) ATTR_COLD;
//! read microcode CROM or CRAM, depending on m_ucode_ram_base
- DECLARE_READ32_MEMBER ( crom_cram_r );
+ uint32_t crom_cram_r(offs_t offset);
//! write microcode CRAM, depending on m_ucode_ram_base (ignore writes to CROM)
- DECLARE_WRITE32_MEMBER( crom_cram_w );
+ void crom_cram_w(offs_t offset, uint32_t data);
//! read constants PROM
- DECLARE_READ16_MEMBER ( const_r );
+ uint16_t const_r(offs_t offset);
//! read i/o space RAM
- DECLARE_READ16_MEMBER ( ioram_r );
+ uint16_t ioram_r(offs_t offset);
//!< write i/o space RAM
- DECLARE_WRITE16_MEMBER( ioram_w );
+ void ioram_w(offs_t offset, uint16_t data);
int m_icount;
@@ -657,7 +652,7 @@ private:
* access it. Also both, address and data lines, are inverted.
* </PRE>
*/
- uint8_t* m_ctl2k_u3;
+ std::unique_ptr<uint8_t[]> m_ctl2k_u3;
/**
* @brief 2KCTL PROM u38; 82S23; 32x8 bit
@@ -706,7 +701,7 @@ private:
* B7 9 NEXT[06]'
* </PRE>
*/
- uint8_t* m_ctl2k_u38;
+ std::unique_ptr<uint8_t[]> m_ctl2k_u38;
//! output lines of the 2KCTL U38 PROM
enum {
@@ -778,22 +773,22 @@ private:
* depending on the current NEXT[01]' level.
* </PRE>
*/
- uint8_t* m_ctl2k_u76;
+ std::unique_ptr<uint8_t[]> m_ctl2k_u76;
/**
* @brief 3k CRAM PROM a37
*/
- uint8_t* m_cram3k_a37;
+ std::unique_ptr<uint8_t[]> m_cram3k_a37;
/**
* @brief memory addressing PROM a64
*/
- uint8_t* m_madr_a64;
+ std::unique_ptr<uint8_t[]> m_madr_a64;
/**
* @brief memory addressing PROM a65
*/
- uint8_t* m_madr_a65;
+ std::unique_ptr<uint8_t[]> m_madr_a65;
/**
* @brief unused PROM a90
@@ -808,7 +803,7 @@ private:
*
* I haven't found yet where KP3-KP5 are used
*/
- uint8_t* m_madr_a90;
+ std::unique_ptr<uint8_t[]> m_madr_a90;
/**
* @brief unused PROM a91
@@ -835,12 +830,12 @@ private:
* KE(6) KB(^L) KB(RTN) KB(") KB(/) KB(S3) KB(<-) KB(]) KB(\)
* KE(7) KB(S1) KB(DEL) KB(S2) KB(LF) KB(S4) KB(S5) KB(BW) KB(BS)
*/
- uint8_t* m_madr_a91;
+ std::unique_ptr<uint8_t[]> m_madr_a91;
/**
* @brief ALU function to 74181 operation lookup PROM
*/
- uint8_t* m_alu_a10;
+ std::unique_ptr<uint8_t[]> m_alu_a10;
//! output lines of the ALU a10 PROM
enum {
@@ -868,20 +863,20 @@ private:
void hard_reset(); //!< reset the various registers
void soft_reset(); //!< soft reset
- void bs_early_bad(); //! bs dummy early function
- void bs_late_bad(); //! bs dummy late function
+ [[noreturn]] void bs_early_bad(); //! bs dummy early function
+ [[noreturn]] void bs_late_bad(); //! bs dummy late function
- void f1_early_bad(); //! f1 dummy early function
- void f1_late_bad(); //! f1 dummy late function
+ [[noreturn]] void f1_early_bad(); //! f1 dummy early function
+ [[noreturn]] void f1_late_bad(); //! f1 dummy late function
- void f2_early_bad(); //! f2 dummy early function
- void f2_late_bad(); //! f2 dummy late function
+ [[noreturn]] void f2_early_bad(); //! f2 dummy early function
+ [[noreturn]] void f2_late_bad(); //! f2 dummy late function
- DECLARE_READ16_MEMBER( noop_r ); //!< read open bus (0177777)
- DECLARE_WRITE16_MEMBER( noop_w ); //!< write open bus
+ uint16_t noop_r (offs_t offset); //!< read open bus (0177777)
+ void noop_w(offs_t offset, uint16_t data); //!< write open bus
- DECLARE_READ16_MEMBER( bank_reg_r ); //!< read bank register in memory mapped I/O range
- DECLARE_WRITE16_MEMBER( bank_reg_w ); //!< write bank register in memory mapped I/O range
+ uint16_t bank_reg_r(offs_t offset); //!< read bank register in memory mapped I/O range
+ void bank_reg_w(offs_t offset, uint16_t data); //!< write bank register in memory mapped I/O range
void bs_early_read_r(); //!< bus source: drive bus by R register
void bs_early_load_r(); //!< bus source: load R places 0 on the BUS
@@ -937,4 +932,4 @@ private:
DECLARE_DEVICE_TYPE(ALTO2, alto2_cpu_device)
-#endif // MAME_DEVICES_CPU_ALTO2_H
+#endif // MAME_CPU_ALTO2_ALTO2CPU_H