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-rw-r--r--hash/apple2_flop_clcracked.xml30
-rw-r--r--hash/apple2_flop_misc.xml2
-rw-r--r--hash/apple2_flop_orig.xml135
-rw-r--r--hash/apple2gs_flop_clcracked.xml2
-rw-r--r--hash/apple2gs_flop_misc.xml2
-rw-r--r--hash/apple2gs_flop_orig.xml2
-rw-r--r--hash/sgi_mips.xml2
-rw-r--r--language/Greek/strings.po7
-rw-r--r--scripts/src/bus.lua2
-rw-r--r--src/devices/bus/ti99/peb/peribox.cpp5
-rw-r--r--src/devices/bus/ti99/peb/scsicard.cpp693
-rw-r--r--src/devices/bus/ti99/peb/scsicard.h135
-rw-r--r--src/devices/machine/wd_fdc.cpp39
-rw-r--r--src/mame/drivers/apple2.cpp8
-rw-r--r--src/mame/drivers/apple2e.cpp12
-rw-r--r--src/mame/drivers/apple2gs.cpp11
16 files changed, 1032 insertions, 55 deletions
diff --git a/hash/apple2_flop_clcracked.xml b/hash/apple2_flop_clcracked.xml
index 8720e6e7409..c310b5d9e17 100644
--- a/hash/apple2_flop_clcracked.xml
+++ b/hash/apple2_flop_clcracked.xml
@@ -4,7 +4,7 @@
license:CC0
-->
-<softwarelist name="apple2_flop_clcracked" description="Apple II cleanly cracked 5.25&quot; disks">
+<softwarelist name="apple2_flop_clcracked" description="Apple II cleanly cracked disks">
<!-- A 'cleanly cracked' disk is one that removes the copy
protection while not defacing the appearance or removing any
@@ -46396,4 +46396,32 @@ license:CC0
</part>
</software>
+ <software name="nmbrball">
+ <description>Numberball (cleanly cracked)</description>
+ <year>1994</year>
+ <publisher>Micrograms</publisher>
+ <info name="release" value="2021-11-10"/>
+ <!--"Numberball" is a 1994 educational game developed and distributed by Micrograms Publishing.-->
+
+ <part name="flop1" interface="floppy_5_25">
+ <dataarea name="flop" size="143360">
+ <rom name="numberball (4am crack).dsk" size="143360" crc="bd983ba9" sha1="73da61404aa405fd65616a957ef75ffc12f6af04"/>
+ </dataarea>
+ </part>
+ </software>
+
+ <software name="pfsfilea00">
+ <description>PFS:File (Version A.00) (cleanly cracked)</description>
+ <year>1983</year>
+ <publisher>Software Publishing Corporation</publisher>
+ <info name="release" value="2021-11-11"/>
+ <!--"PFS:File" is a 1983 productivity program developed and distributed by Software Publishing Corporation. This is version A.00. It is preserved here for the first time.-->
+
+ <part name="flop1" interface="floppy_5_25">
+ <dataarea name="flop" size="143360">
+ <rom name="pfs file va.00 (4am crack).dsk" size="143360" crc="49980399" sha1="14451182f9d319d2c08a7f7fd68aec10654299b1"/>
+ </dataarea>
+ </part>
+ </software>
+
</softwarelist>
diff --git a/hash/apple2_flop_misc.xml b/hash/apple2_flop_misc.xml
index cf4a5c3c168..b956d19d652 100644
--- a/hash/apple2_flop_misc.xml
+++ b/hash/apple2_flop_misc.xml
@@ -6,7 +6,7 @@ license:CC0
Generated by SLIST 0.2.1
-->
-<softwarelist name="apple2_flop_misc" description="Apple II 5.25&quot; miscellaneous disks">
+<softwarelist name="apple2_flop_misc" description="Apple II miscellaneous disks">
<software name="4080trkd">
<description>40 and 80 Track DOS</description>
diff --git a/hash/apple2_flop_orig.xml b/hash/apple2_flop_orig.xml
index c4a84947f91..55dd6439e6b 100644
--- a/hash/apple2_flop_orig.xml
+++ b/hash/apple2_flop_orig.xml
@@ -4,7 +4,7 @@
license:CC0
-->
-<softwarelist name="apple2_flop_orig" description="Apple II 5.25&quot; original disks">
+<softwarelist name="apple2_flop_orig" description="Apple II original disks">
<software name="agentusa">
<description>Agent USA</description>
@@ -17980,4 +17980,137 @@ license:CC0
</part>
</software>
+ <software name="wargle">
+ <description>Wargle!</description>
+ <year>1982</year>
+ <publisher>Hayden Book Company</publisher>
+ <info name="release" value="2021-10-30"/>
+ <sharedfeat name="compatibility" value="A2P,A2E,A2EE,A2C,A2GS"/>
+ <!-- It requires a 48K Apple II+ or later. -->
+ <!--"Wargle!" is a 1982 action game developed and distributed by Hayden Book Company. It requires a 48K Apple ][+ or later.-->
+
+ <part name="flop1" interface="floppy_5_25">
+ <dataarea name="flop" size="234778">
+ <rom name="wargle.woz" size="234778" crc="1206aa31" sha1="c2431e7f2cbda517edb71d4458fa0e85a36338fb"/>
+ </dataarea>
+ </part>
+ </software>
+
+ <software name="scruples">
+ <description>A Question of Scruples</description>
+ <year>1987</year>
+ <publisher>Leisure Genius</publisher>
+ <info name="release" value="2021-10-30"/>
+ <sharedfeat name="compatibility" value="A2P,A2E,A2EE,A2C,A2GS"/>
+ <!-- It requires a 48K Apple II+ or later. -->
+ <!--"A Question of Scruples" is a 1987 board game developed by Sentient Software and distributed by Leisure Genius. It requires a 48K Apple ][+ or later.-->
+
+ <part name="flop1" interface="floppy_5_25">
+ <dataarea name="flop" size="234838">
+ <rom name="a question of scruples - disk a (program disk).woz" size="234838" crc="8d6b5e39" sha1="fc05cbe47accd7359e439e7bab276e73253ab458"/>
+ </dataarea>
+ </part>
+ <part name="flop2" interface="floppy_5_25">
+ <dataarea name="flop" size="234840">
+ <rom name="a question of scruples - disk b (questions disk).woz" size="234840" crc="e06d7439" sha1="e79bb730be5b7c5455a34c5e1538fc10e24e37ef"/>
+ </dataarea>
+ </part>
+ </software>
+
+ <software name="jbird">
+ <description>J-Bird</description>
+ <year>1983</year>
+ <publisher>Orion Software</publisher>
+ <info name="release" value="2021-11-03"/>
+ <sharedfeat name="compatibility" value="A2,A2P,A2E,A2EE,A2C,A2GS"/>
+ <!-- It runs on any Apple II with 48K. -->
+ <!--"J-Bird" is a 1983 action game developed by Daryl Rotta and distributed by Orion Software. It runs on any Apple ][ with 48K.-->
+
+ <part name="flop1" interface="floppy_5_25">
+ <dataarea name="flop" size="234788">
+ <rom name="j-bird.woz" size="234788" crc="98debcd8" sha1="f22a533197f895a950cdb04965a20a09d073ca54"/>
+ </dataarea>
+ </part>
+ </software>
+
+ <software name="stardanc">
+ <description>Star Dance</description>
+ <year>1981</year>
+ <publisher>United Software of America</publisher>
+ <info name="release" value="2021-11-03"/>
+ <sharedfeat name="compatibility" value="A2,A2P,A2E,A2EE,A2C,A2GS"/>
+ <!-- It requires a 13-sector drive but otherwise runs on any Apple ][ with 48K. -->
+ <!--"Star Dance" is a 1981 action game developed by Gustavo Fernandez and distributed by United Software of America. It requires a 13-sector drive but otherwise runs on any Apple ][ with 48K.-->
+
+ <part name="flop1" interface="floppy_5_25">
+ <dataarea name="flop" size="101683">
+ <rom name="star dance.woz" size="101683" crc="61551723" sha1="fb89e011fff5dccc442362ace2b526d3a9a36816"/>
+ </dataarea>
+ </part>
+ </software>
+
+ <software name="dskorg26">
+ <description>Disk Organizer (Version 2.6)</description>
+ <year>1982</year>
+ <publisher>Sensible Software</publisher>
+ <info name="release" value="2021-11-03"/>
+ <sharedfeat name="compatibility" value="A2,A2P,A2E"/>
+ <!-- It requires an Apple ][, ][+, or unenhanced //e with 48K. -->
+ <!--"Disk Organizer" is a 1982 disk utility developed and distributed by Sensible Software. This is version 2.6. It requires an Apple ][, ][+, or unenhanced //e with 48K.-->
+
+ <part name="flop1" interface="floppy_5_25">
+ <dataarea name="flop" size="114981">
+ <rom name="disk organizer.woz" size="114981" crc="30895055" sha1="1dadfd95788019e35948f4e0889bfa3f22c58720"/>
+ </dataarea>
+ </part>
+ </software>
+
+ <software name="sdiskc38">
+ <description>Super Disk Copy (Version 3.8)</description>
+ <year>1981</year>
+ <publisher>Sensible Software</publisher>
+ <info name="release" value="2021-11-03"/>
+ <sharedfeat name="compatibility" value="A2,A2P,A2E,A2EE,A2C,A2GS"/>
+ <!-- It runs on any Apple II with 48K. -->
+ <!--"Super Disk Copy" is a 1981 disk utility developed and distributed by Sensible Software. This is version 3.8. It runs on any Apple ][ with 48K.-->
+
+ <part name="flop1" interface="floppy_5_25">
+ <dataarea name="flop" size="55072">
+ <rom name="super disk copy v3.8.woz" size="55072" crc="0981c164" sha1="cd957476e7ac4fe1dfded3dd9c1f9e8d3a75a4b8"/>
+ </dataarea>
+ </part>
+ </software>
+
+ <software name="nibaw2c3">
+ <description>Nibbles Away ][ (Version C3)</description>
+ <year>1983</year>
+ <publisher>COMPUTER:applications</publisher>
+ <info name="release" value="2021-11-04"/>
+ <sharedfeat name="compatibility" value="A2,A2P,A2E,A2EE,A2C,A2GS"/>
+ <!-- It runs on any Apple II with 48K. -->
+ <!--"Nibbles Away ][" is a 1983 disk utility developed and distributed by COMPUTER:applications. This is version C3. It runs on any Apple ][ with 48K.-->
+
+ <part name="flop1" interface="floppy_5_25">
+ <dataarea name="flop" size="146764">
+ <rom name="nibbles away ][.woz" size="146764" crc="db6d9e93" sha1="8729a7c7e69d74bb474a96e14a36a8b2fe0c085f"/>
+ </dataarea>
+ </part>
+ </software>
+
+ <software name="eddupl44">
+ <description>Essential Data Duplicator (Version 4.4)</description>
+ <year>1986</year>
+ <publisher>Utilico Microware</publisher>
+ <info name="release" value="2021-11-04"/>
+ <sharedfeat name="compatibility" value="A2,A2P,A2E,A2EE,A2C,A2GS"/>
+ <!-- It runs on any Apple II with 48K. -->
+ <!--"Essential Data Duplicator" is a 1986 disk utility developed by Donald A. Schnapp and distributed by Utilico Microware. This is version 4.4. It runs on any Apple ][ with 48K.-->
+
+ <part name="flop1" interface="floppy_5_25">
+ <dataarea name="flop" size="106863">
+ <rom name="essential data duplicator v4.4.woz" size="106863" crc="a50ae8ed" sha1="c3f6a000171af417c81af7d47c81dc7f1d2026f7"/>
+ </dataarea>
+ </part>
+ </software>
+
</softwarelist>
diff --git a/hash/apple2gs_flop_clcracked.xml b/hash/apple2gs_flop_clcracked.xml
index 614c96fc3bf..d09cb1fd0ad 100644
--- a/hash/apple2gs_flop_clcracked.xml
+++ b/hash/apple2gs_flop_clcracked.xml
@@ -4,7 +4,7 @@
license:CC0
-->
-<softwarelist name="apple2gs_flop_clcracked" description="Apple IIgs cleanly cracked 3.5&quot; disks">
+<softwarelist name="apple2gs_flop_clcracked" description="Apple IIgs cleanly cracked disks">
<software name="4thinchs">
<description>4th &amp; Inches (cleanly cracked)</description>
diff --git a/hash/apple2gs_flop_misc.xml b/hash/apple2gs_flop_misc.xml
index c0a7026456b..524b89e4945 100644
--- a/hash/apple2gs_flop_misc.xml
+++ b/hash/apple2gs_flop_misc.xml
@@ -5,7 +5,7 @@ license:CC0
Generated by SLIST 0.1
-->
-<softwarelist name="apple2gs_flop_misc" description="Apple IIgs 3.5&quot; miscellaneous disks">
+<softwarelist name="apple2gs_flop_misc" description="Apple IIgs miscellaneous disks">
<software name="1stltrwd">
<description>First Letters &amp; Words</description>
diff --git a/hash/apple2gs_flop_orig.xml b/hash/apple2gs_flop_orig.xml
index 169964ef020..d58adae75ca 100644
--- a/hash/apple2gs_flop_orig.xml
+++ b/hash/apple2gs_flop_orig.xml
@@ -4,7 +4,7 @@
license:CC0
-->
-<softwarelist name="apple2gs_flop_orig" description="Apple IIgs 3.5&quot; original disks">
+<softwarelist name="apple2gs_flop_orig" description="Apple IIgs original disks">
<software name="rastan">
<description>Rastan</description>
diff --git a/hash/sgi_mips.xml b/hash/sgi_mips.xml
index f54f63224d3..69757e78cec 100644
--- a/hash/sgi_mips.xml
+++ b/hash/sgi_mips.xml
@@ -1834,7 +1834,7 @@ license:CC0
</software>
<software name="tido_4_0_5epl">
- <description>Trusted IRIS Development Option 4.0.5 EPL"</description>
+ <description>Trusted IRIS Development Option 4.0.5 EPL</description>
<year>1995</year> <!-- 02/95 -->
<publisher>Silicon Graphics</publisher>
<part name="cdrom" interface="cdrom">
diff --git a/language/Greek/strings.po b/language/Greek/strings.po
index 1d0581dc13b..794d8f5968f 100644
--- a/language/Greek/strings.po
+++ b/language/Greek/strings.po
@@ -7633,10 +7633,3 @@ msgid ""
msgstr ""
"Δώστε ακολουθία ή πατήστε %s για ακύρωση\n"
"%s"
-
-#~ msgid "Device Mapping"
-#~ msgstr "Χαρτογράφηση Συσκευών"
-
-#~ msgctxt "input-name"
-#~ msgid "Write current timecode"
-#~ msgstr "Εγγραφή τρέχοντος χρονοκώδικα"
diff --git a/scripts/src/bus.lua b/scripts/src/bus.lua
index faec58fef07..5be5a3361fb 100644
--- a/scripts/src/bus.lua
+++ b/scripts/src/bus.lua
@@ -3506,6 +3506,8 @@ if (BUSES["TI99"]~=null) then
MAME_DIR .. "src/devices/bus/ti99/peb/pgram.h",
MAME_DIR .. "src/devices/bus/ti99/peb/samsmem.cpp",
MAME_DIR .. "src/devices/bus/ti99/peb/samsmem.h",
+ MAME_DIR .. "src/devices/bus/ti99/peb/scsicard.cpp",
+ MAME_DIR .. "src/devices/bus/ti99/peb/scsicard.h",
MAME_DIR .. "src/devices/bus/ti99/peb/sidmaster.cpp",
MAME_DIR .. "src/devices/bus/ti99/peb/sidmaster.h",
MAME_DIR .. "src/devices/bus/ti99/peb/spchsyn.cpp",
diff --git a/src/devices/bus/ti99/peb/peribox.cpp b/src/devices/bus/ti99/peb/peribox.cpp
index 059a40d8c28..3e2f518bdda 100644
--- a/src/devices/bus/ti99/peb/peribox.cpp
+++ b/src/devices/bus/ti99/peb/peribox.cpp
@@ -198,6 +198,7 @@ CRUCLK* 51||52 DBIN
#include "forti.h"
#include "pgram.h"
#include "sidmaster.h"
+#include "scsicard.h"
#define LOG_WARN (1U<<1) // Warnings
#define LOG_CONFIG (1U<<2) // Configuration
@@ -489,6 +490,7 @@ void ti99_peribox_slot_standard(device_slot_interface &device)
device.option_add("ddcc1", TI99_DDCC1);
device.option_add("forti", TI99_FORTI);
device.option_add("sidmaster", TI99_SIDMASTER);
+ device.option_add("whtscsi", TI99_WHTSCSI);
}
void peribox_device::device_add_mconfig(machine_config &config)
@@ -534,6 +536,7 @@ void ti99_peribox_slot_evpc(device_slot_interface &device)
device.option_add("ddcc1", TI99_DDCC1);
device.option_add("forti", TI99_FORTI);
device.option_add("sidmaster", TI99_SIDMASTER);
+ device.option_add("whtscsi", TI99_WHTSCSI);
}
void peribox_ev_device::device_add_mconfig(machine_config &config)
@@ -590,6 +593,7 @@ void ti99_peribox_slot_geneve(device_slot_interface &device)
device.option_add("ddcc1", TI99_DDCC1);
device.option_add("forti", TI99_FORTI);
device.option_add("sidmaster", TI99_SIDMASTER);
+ device.option_add("whtscsi", TI99_WHTSCSI);
}
void peribox_gen_device::device_add_mconfig(machine_config &config)
@@ -646,6 +650,7 @@ void ti99_peribox_slot_sgcpu(device_slot_interface &device)
device.option_add("ddcc1", TI99_DDCC1);
device.option_add("forti", TI99_FORTI);
device.option_add("sidmaster", TI99_SIDMASTER);
+ device.option_add("whtscsi", TI99_WHTSCSI);
}
void peribox_sg_device::device_add_mconfig(machine_config &config)
diff --git a/src/devices/bus/ti99/peb/scsicard.cpp b/src/devices/bus/ti99/peb/scsicard.cpp
new file mode 100644
index 00000000000..e84d5911f8e
--- /dev/null
+++ b/src/devices/bus/ti99/peb/scsicard.cpp
@@ -0,0 +1,693 @@
+// license:LGPL-2.1+
+// copyright-holders:Michael Zapf
+/****************************************************************************
+
+ SCSI adapter card
+ designed and realized by Western Horizon Technologies
+
+ Latest two revisions:
+ Rev F: using logic circuits and a PAL for decoding
+ Rev G: using a PLD custom chip
+
+ This is an emulation of the WHTech SCSI adapter. It has been modified over
+ the years in various ways, in particular to get it working with the Geneve
+ 9640, and to enable word transfers. This modification was only effective
+ on the Geneve because the TMS9995 uses an even/odd word transfer, while the
+ TI-99/4A console uses an odd/even word transfer (see datamux.cpp), hence
+ swapping the bytes from the controller. An additional SWPB operation would
+ have been required which would have slowed down the transfer, so there would
+ not have be a measurable performance gain. Accordingly, the DSR (firmware)
+ of the card does not activate word transfer.
+
+ Further modifications were done to enable block DMA transfer. This could
+ only be used with a new DSR (1.6) and a daughterboard to replace the
+ PLD circuit.
+
+ Note that the DSR is not used when the card is used with the Geneve, since
+ the Geneve operating system brings its own SCSI driver. Block mode can
+ be explicitly activated with PDMA ON, but for this version of the emulation,
+ this will lead to a lockup, so PDMA OFF must be ensured.
+
+ A clone card was designed by the System 99 user group (SNUG), called ASCSI,
+ which contained all modifications.
+
+
+ Components
+ ----------
+ ispLSI2064 PLD (Custom decoder chip) (Rev G)
+ 62256 RAM 32Kx8
+ 27512 EPROM 64Kx8
+ NEC 53C80 SCSI Controller
+ Dip switches
+
+
+ Memory map
+ ----------
+
+ CB5=0 (CRU bit 5)
+ 4000-4FDF: EPROM (1 of 8 banks @ 8K)
+ 4FE0-4FFF: Controller
+ 5000-5FFF: SRAM (if CB1=1) or EPROM (if CB1=0)
+
+ CB5=1:
+ 4000-4FFF: SRAM (if CB1=1) or EPROM (if CB1=0)
+ 5000-5FDF: EPROM (1 of 8 banks)
+ 5FE0-5FFF: Controller
+
+
+ DIP switches [1]
+ SW1: CRU base 0600 - 1f00
+ SW2: 0: Driver LOAD/Parity enable
+ 1: SCSI ID Bit 0 (6 or 7)
+ 2: Normally on
+ 3: Normally on
+ 4: Geneve mode
+
+ CRU mapping
+ -----------
+ Read Write
+ 0: SCSI IRQ 0: Card select
+ 1: SCSI DRQ 1: SRAM enable (hides EPROM)
+ 2: SCSI READY 2: SCSI DMA mode enable
+ 3-7: DIP SW2 3: SCSI EOP (End of process)
+ 4: Word transfer mode select
+ 5: Bank swap
+ 6: -
+ 7: -
+ 8-10: EPROM bank (10=MSB)
+ 11: -
+ 12-14: SRAM bank (14=MSB)
+ 15: -
+
+
+ I/O ports (4Fxx for CB5=0, 5Fxx for CB5=1)
+ ---------
+ Read Write
+ 4FE0 Current SCSI data 4FF0 Output data (PIO and DMA)
+ 4FE2 Initiator command 4FF2 Initiator command
+ 4FE4 Mode 4FF4 Mode
+ 4FE6 Target command 4FF6 Target command
+ 4FE8 Current SCSI bus status 4FF8 Select enable
+ 4FEA Bus and status 4FFA Start DMA send
+ 4FEC Input data (DMA) 4FFC Start DMA target receive
+ 4FEE Reset parity/interrupt 4FFE Start DMA initiator receive
+
+
+ Drive mappings:
+ SCS1 = SCSI ID 0
+ SCS2 = SCSI ID 1
+ ...
+ SCS8 = SCSI ID 7
+
+
+ Michael Zapf
+
+ References
+
+ [1] Western Horizon Technologies: SCSI Host Adapter Card / Hardware
+ Installation Manual
+
+ Acknowledgements
+
+ Thanks to Don O'Neil of WHT for providing the required schematics, ROM dumps,
+ and documentation
+
+*****************************************************************************/
+
+#include "emu.h"
+#include "scsicard.h"
+#include "bus/nscsi/devices.h"
+
+#define LOG_WARN (1U<<1)
+#define LOG_CRU (1U<<2)
+#define LOG_EPROM (1U<<3)
+#define LOG_RAM (1U<<4)
+#define LOG_CONTR (1U<<5)
+#define LOG_CB (1U<<6)
+#define LOG_READY (1U<<7)
+#define LOG_DMA (1U<<8)
+
+#define VERBOSE ( LOG_GENERAL | LOG_WARN )
+
+#include "logmacro.h"
+
+#define BUFFER "ram"
+#define PLD_TAG "pld"
+#define CONTR_TAG "scsibus:7:controller"
+#define SCSIBUS_TAG "scsibus"
+
+DEFINE_DEVICE_TYPE(TI99_WHTSCSI, bus::ti99::peb::whtech_scsi_card_device, "ti99_whtscsi", "Western Horizon Technologies SCSI host adapter")
+DEFINE_DEVICE_TYPE(WHTSCSI_PLD, bus::ti99::peb::whtscsi_pld_device, PLD_TAG, "WHTech SCSI PLD")
+
+namespace bus::ti99::peb {
+
+whtech_scsi_card_device::whtech_scsi_card_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
+ device_t(mconfig, TI99_WHTSCSI, tag, owner, clock),
+ device_ti99_peribox_card_interface(mconfig, *this),
+ m_buffer_ram(*this, BUFFER),
+ m_pld(*this, PLD_TAG),
+ m_controller(*this, CONTR_TAG),
+ m_scsibus(*this, SCSIBUS_TAG),
+ m_irq(false),
+ m_drq(false),
+ m_readyset(false)
+{
+}
+
+void whtech_scsi_card_device::setaddress_dbin(offs_t offset, int state)
+{
+ // Do not allow setaddress for debugger
+ if (machine().side_effects_disabled()) return;
+ m_address = offset;
+ if (in_dsr_space(offset, true) && m_pld->card_selected())
+ {
+ LOGMASKED(LOG_READY, "setadd %04x (%s)\n", offset & 0xffff, machine().describe_context());
+ operate_ready_line();
+ }
+}
+
+void whtech_scsi_card_device::operate_ready_line()
+{
+ m_pld->update_line_states(m_address, m_drq, m_irq);
+
+ // Clear or assert the outgoing READY line
+ bool newready = m_pld->ready();
+ if (newready != m_readyset)
+ {
+ LOGMASKED(LOG_READY, "READY line changed to %d\n", newready);
+ m_slot->set_ready(newready);
+ m_readyset = newready;
+ }
+}
+
+/*
+ Debugger access.
+*/
+void whtech_scsi_card_device::debug_read(offs_t offset, uint8_t* value)
+{
+ offs_t addrcopy = m_address;
+ m_address = offset;
+
+ if (m_pld->sram_cs())
+ {
+ *value = m_buffer_ram->pointer()[(m_address & 0x0fff) | (m_pld->sram_bank()<<12)];
+ }
+
+ if (m_pld->eprom_cs())
+ {
+ // EPROM selected
+ int base = (m_pld->eprom_bank()<<13);
+ *value = m_eprom[base | (m_address & 0x1fff)];
+ }
+ m_address = addrcopy;
+}
+
+/*
+ Debugger access.
+*/
+void whtech_scsi_card_device::debug_write(offs_t offset, uint8_t data)
+{
+ offs_t addrcopy = m_address;
+ m_address = offset;
+
+ if (m_pld->sram_cs())
+ {
+ m_buffer_ram->pointer()[(m_address & 0x0fff) | (m_pld->sram_bank()<<12)] = data;
+ }
+ m_address = addrcopy;
+}
+
+void whtech_scsi_card_device::readz(offs_t offset, uint8_t *value)
+{
+ if (machine().side_effects_disabled())
+ {
+ debug_read(offset, value);
+ return;
+ }
+
+ if (!m_pld->card_selected()) return;
+
+ if (in_dsr_space(offset, true)) LOGMASKED(LOG_READY, "rd %04x\n", offset & 0xffff);
+
+ if (m_pld->eprom_cs())
+ {
+ // Lines A0-A12 directly connected to the EPROM (chip pin order)
+ // Lines A13-A15 connected to PLD
+ int base = (m_pld->eprom_bank()<<13);
+ uint8_t* rom = &m_eprom[base | (m_address & 0x1fff)];
+ *value = *rom;
+
+ if (WORD_ALIGNED(m_address))
+ {
+ // Do logging by 16 bit words, as we typically have instructions in
+ // the eprom
+ uint16_t val = (*rom << 8) | (*(rom+1));
+ LOGMASKED(LOG_EPROM, "DSR: %04x (bank %d) -> %04x\n", m_address & 0xffff, m_pld->eprom_bank(), val);
+ }
+ }
+
+ if (m_pld->sram_cs())
+ {
+ // Lines A0-A11 directly connected to the SRAM (chip pin order)
+ // Lines A12-A14 connected to PLD
+ *value = m_buffer_ram->pointer()[(m_address & 0x0fff) | (m_pld->sram_bank()<<12)];
+ LOGMASKED(LOG_RAM, "RAM: %04x (bank %d) -> %02x\n", m_address & 0xffff, m_pld->sram_bank(), *value);
+ }
+
+ if (m_pld->scsi_cs())
+ {
+ // Only for addresses 4fe0-4fef
+ if ((m_address & 0x0010)==0x0000)
+ {
+ int reg = (m_address >> 1)&0x07;
+ // If we are in DMA mode, reading from register 6 means DMA read
+ if ((m_controller->read(2) & 0x02) && (reg == 6))
+ {
+ LOGMASKED(LOG_DMA, "CTR: DMA in (%s)\n", machine().describe_context());
+ *value = m_controller->dma_r();
+ LOGMASKED(LOG_DMA, "CTR: DMA -> %02x\n", *value);
+ }
+ else
+ {
+ *value = m_controller->read(reg);
+ LOGMASKED(LOG_CONTR, "CTR: Reg %d (%04x) -> %02x (%s)\n", reg, m_address & 0xffff, *value, machine().describe_context());
+ }
+ }
+ }
+}
+
+void whtech_scsi_card_device::write(offs_t offset, uint8_t data)
+{
+ if (machine().side_effects_disabled())
+ {
+ debug_write(offset, data);
+ return;
+ }
+
+ if (!m_pld->card_selected()) return;
+
+ if (in_dsr_space(offset, true)) LOGMASKED(LOG_READY, "wr %04x\n", offset & 0xffff);
+
+ if (m_pld->sram_cs())
+ {
+ // Lines A0-A11 directly connected to the SRAM (chip pin order)
+ // Lines A12-A14 connected to PLD
+ LOGMASKED(LOG_RAM, "RAM: %04x (bank %d) <- %02x\n", m_address & 0xffff, m_pld->sram_bank(), data);
+ m_buffer_ram->pointer()[(m_address & 0x0fff) | (m_pld->sram_bank()<<12)] = data;
+ }
+
+ if (m_pld->scsi_cs())
+ {
+ // Only for addresses 4ff0-4fff
+ if ((m_address & 0x0010)==0x0010)
+ {
+ int reg = (m_address >> 1)&0x07;
+
+ // If we are in DMA mode, writing to register 0 means DMA write
+ if ((m_controller->read(2) & 0x02) && (reg == 0))
+ {
+ LOGMASKED(LOG_DMA, "CTR: DMA out <- %02x (%s)\n", data, machine().describe_context());
+ m_controller->dma_w(data);
+ }
+ else
+ {
+ LOGMASKED(LOG_CONTR, "CTR: Reg %d (%04x) <- %02x (%s)\n", reg, m_address & 0xffff, data, machine().describe_context());
+ m_controller->write(reg, data);
+ }
+ }
+ }
+}
+
+/*
+ CRU read access
+*/
+void whtech_scsi_card_device::crureadz(offs_t offset, uint8_t *value)
+{
+ m_pld->crureadz(offset, value);
+}
+
+/*
+ CRU write access. The flags are kept in the PLD.
+*/
+void whtech_scsi_card_device::cruwrite(offs_t offset, uint8_t data)
+{
+ m_pld->cruwrite(offset, data);
+ operate_ready_line();
+}
+
+/*
+ Callbacks for the controller chip.
+*/
+WRITE_LINE_MEMBER( whtech_scsi_card_device::drq_w )
+{
+ LOGMASKED(LOG_CB, "DRQ pin from controller = %d\n", state);
+ bool drq = (state==ASSERT_LINE);
+ if (drq != m_drq)
+ {
+ m_drq = drq;
+ m_slot->set_inta((m_drq || m_irq)? ASSERT_LINE : CLEAR_LINE);
+ }
+ operate_ready_line();
+}
+
+WRITE_LINE_MEMBER( whtech_scsi_card_device::irq_w )
+{
+ LOGMASKED(LOG_CB, "IRQ pin from controller = %d\n", state);
+ bool irq = (state==ASSERT_LINE);
+ if (irq != m_irq)
+ {
+ m_irq = irq;
+ m_slot->set_inta((m_drq || m_irq)? ASSERT_LINE : CLEAR_LINE);
+ }
+ operate_ready_line();
+}
+
+void whtech_scsi_card_device::device_add_mconfig(machine_config &config)
+{
+ // RAM circuit
+ RAM(config, BUFFER).set_default_size("32K").set_default_value(0);
+
+ // PLD circuit
+ WHTSCSI_PLD(config, PLD_TAG, 0);
+
+ // SCSI bus
+ NSCSI_BUS(config, m_scsibus);
+ NSCSI_CONNECTOR(config, "scsibus:0", default_scsi_devices, nullptr, false);
+ NSCSI_CONNECTOR(config, "scsibus:1", default_scsi_devices, nullptr, false);
+ NSCSI_CONNECTOR(config, "scsibus:2", default_scsi_devices, nullptr, false);
+ NSCSI_CONNECTOR(config, "scsibus:3", default_scsi_devices, nullptr, false);
+ NSCSI_CONNECTOR(config, "scsibus:4", default_scsi_devices, nullptr, false);
+ NSCSI_CONNECTOR(config, "scsibus:5", default_scsi_devices, nullptr, false);
+ NSCSI_CONNECTOR(config, "scsibus:6", default_scsi_devices, nullptr, false);
+ NSCSI_CONNECTOR(config, "scsibus:7").option_set("controller", NCR53C80).machine_config([this](device_t *device) {
+ ncr53c80_device &adapter = downcast<ncr53c80_device &>(*device);
+ adapter.drq_handler().set(*this, FUNC(whtech_scsi_card_device::drq_w));
+ adapter.irq_handler().set(*this, FUNC(whtech_scsi_card_device::irq_w));
+ });
+}
+
+void whtech_scsi_card_device::device_start()
+{
+ m_eprom = memregion(TI99_DSRROM)->base();
+ save_item(NAME(m_address));
+ save_item(NAME(m_irq));
+ save_item(NAME(m_drq));
+ save_item(NAME(m_readyset));
+}
+
+void whtech_scsi_card_device::device_reset()
+{
+ m_cru_base = (ioport("SW1")->read()) << 8;
+ m_sw2 = ioport("SW2")->read();
+ m_drq = false;
+ m_irq = false;
+}
+
+int whtech_scsi_card_device::get_sw1()
+{
+ return m_cru_base;
+}
+
+int whtech_scsi_card_device::get_sw2()
+{
+ return m_sw2;
+}
+
+/*
+ The CRU address base for the card. According to [1], settings below
+ 1000 only make sense with an installed AT keyboard and ROM upgrade.
+*/
+INPUT_PORTS_START( whtscsi )
+ PORT_START("SW1")
+ PORT_DIPNAME(0x1f, 0x12, "SCSI card CRU base")
+ PORT_DIPSETTING(0x06, "0600")
+ PORT_DIPSETTING(0x07, "0700")
+ PORT_DIPSETTING(0x08, "0800")
+ PORT_DIPSETTING(0x09, "0900")
+ PORT_DIPSETTING(0x0a, "0a00")
+ PORT_DIPSETTING(0x0b, "0b00")
+ PORT_DIPSETTING(0x0c, "0c00")
+ PORT_DIPSETTING(0x0d, "0d00")
+ PORT_DIPSETTING(0x0e, "0e00")
+ PORT_DIPSETTING(0x0f, "0f00")
+ PORT_DIPSETTING(0x10, "1000")
+ PORT_DIPSETTING(0x11, "1100")
+ PORT_DIPSETTING(0x12, "1200") // Default setting
+ PORT_DIPSETTING(0x13, "1300")
+ PORT_DIPSETTING(0x14, "1400")
+ PORT_DIPSETTING(0x15, "1500")
+ PORT_DIPSETTING(0x16, "1600")
+ PORT_DIPSETTING(0x17, "1700")
+ PORT_DIPSETTING(0x18, "1800")
+ PORT_DIPSETTING(0x19, "1900")
+ PORT_DIPSETTING(0x1a, "1a00")
+ PORT_DIPSETTING(0x1b, "1b00")
+ PORT_DIPSETTING(0x1c, "1c00")
+ PORT_DIPSETTING(0x1d, "1d00")
+ PORT_DIPSETTING(0x1e, "1e00")
+ PORT_DIPSETTING(0x1f, "1f00")
+
+ PORT_START("SW2")
+ PORT_DIPNAME(0x01, 0x00, "Driver LOAD/Parity enable")
+ PORT_DIPSETTING(0x00, DEF_STR(Off))
+ PORT_DIPSETTING(0x01, DEF_STR(On))
+
+ // Currently, the controller is fixed to ID 7, according to device_add_mconfig,
+ // and we cannot relocate the card on the bus
+ PORT_DIPNAME(0x0e, 0x0e, "SCSI card ID")
+ // PORT_DIPSETTING(0x0c, "6")
+ PORT_DIPSETTING(0x0e, "7")
+ PORT_DIPNAME(0x10, 0x00, "Geneve mode")
+ PORT_DIPSETTING(0x00, DEF_STR(Off))
+ PORT_DIPSETTING(0x10, DEF_STR(On))
+INPUT_PORTS_END
+
+ROM_START( whtscsi )
+ ROM_REGION(0x10000, TI99_DSRROM, 0)
+ ROM_LOAD("scsidsr150.u6", 0x0000, 0x10000, CRC(6e067c22) SHA1(f8d8861863e6a17042428e94967fd4ffc4b9d1de)) /* HFDC disk DSR ROM */
+ROM_END
+
+
+const tiny_rom_entry *whtech_scsi_card_device::device_rom_region() const
+{
+ return ROM_NAME( whtscsi );
+}
+
+ioport_constructor whtech_scsi_card_device::device_input_ports() const
+{
+ return INPUT_PORTS_NAME(whtscsi);
+}
+
+// ========================================================================
+// PLD circuit on the board
+// ========================================================================
+
+whtscsi_pld_device::whtscsi_pld_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
+ : device_t(mconfig, WHTSCSI_PLD, tag, owner, clock),
+ m_board(nullptr),
+ m_selected(false),
+ m_sram_shadow(false),
+ m_dma_lock(false),
+ m_word_transfer(false),
+ m_bank_swapped(false),
+ m_readyout(true),
+ m_eprom_bank(0),
+ m_sram_bank(0)
+{
+}
+
+void whtscsi_pld_device::device_start()
+{
+ save_item(NAME(m_selected));
+ save_item(NAME(m_sram_shadow));
+ save_item(NAME(m_dma_lock));
+ save_item(NAME(m_word_transfer));
+ save_item(NAME(m_bank_swapped));
+ save_item(NAME(m_readyout));
+ save_item(NAME(m_eprom_bank));
+ save_item(NAME(m_sram_bank));
+}
+
+void whtscsi_pld_device::device_reset()
+{
+ m_selected = false;
+ m_sram_shadow = false;
+ m_readyout = true;
+ m_dma_lock = false;
+ m_word_transfer = false;
+ m_bank_swapped = false;
+ m_eprom_bank = 0;
+ m_sram_bank = 0;
+}
+
+/*
+ SRAM is accessible at 5000-5fff for bank_swapped=false, else at 4000-4fff.
+ Needs to be turned on with the flag sram_shadow.
+*/
+line_state whtscsi_pld_device::sram_cs()
+{
+ if (!m_sram_shadow) return CLEAR_LINE;
+ return (busen()
+ && (((m_board->m_address & 0x1000)==0) == m_bank_swapped))? ASSERT_LINE : CLEAR_LINE;
+}
+
+/*
+ EPROM is selected when we are in the correct address space and neither
+ SRAM nor the controller are selected.
+*/
+line_state whtscsi_pld_device::eprom_cs()
+{
+ return (busen()
+ && (sram_cs()==CLEAR_LINE)
+ && (scsi_cs()==CLEAR_LINE))? ASSERT_LINE : CLEAR_LINE;
+}
+
+/*
+ The controller is selected in the 4fe0-4ffe space, or in 5fe0-5ffe, depending
+ on the bank_swapped flag (4xxx for bank_swapped=false).
+ Also, for byte mode, only the even addresses are mapped. In word mode, the
+ controller shall be active for both even and odd address accesses. This is
+ only needed for DMA.
+*/
+line_state whtscsi_pld_device::scsi_cs()
+{
+ return (busen()
+ && ((m_board->m_address & 0x0fe0)==0x0fe0)
+ && (((m_board->m_address & 0x1000)!=0) == m_bank_swapped)
+ && (((m_board->m_address & 1)==0) || m_word_transfer))? ASSERT_LINE : CLEAR_LINE;
+}
+
+/*
+ Are we accessing the memory area 4000-5FFF, and this card has been turned on?
+*/
+bool whtscsi_pld_device::busen()
+{
+ return (((m_board->m_address & 0x7e000)==0x74000) && m_selected);
+}
+
+/*
+ CRU read access
+*/
+void whtscsi_pld_device::crureadz(offs_t offset, uint8_t *value)
+{
+ int crubase = m_board->get_sw1();
+
+ if ((offset & 0xff00)==crubase)
+ {
+ int bit = (offset >> 1) & 0x1f;
+ switch (bit)
+ {
+ case 0:
+ *value = m_board->m_irq? 1 : 0;
+ break;
+ case 1:
+ *value = m_board->m_drq? 1 : 0;
+ break;
+ case 2:
+ // READY; not available in the current 53C80 emulation
+ break;
+ case 3:
+ case 4:
+ case 5:
+ case 6:
+ case 7:
+ *value = ((m_board->get_sw2() & (1<<(bit-3)))!=0)? 1 : 0;
+ break;
+ default:
+ break;
+ }
+ // LOGMASKED(LOG_CRU, "CRU %04x -> %d\n", offset & 0xffff, *value);
+ }
+}
+
+/*
+ CRU write access
+*/
+void whtscsi_pld_device::cruwrite(offs_t offset, uint8_t data)
+{
+ int crubase = m_board->get_sw1();
+ if ((offset & 0xff00)==crubase)
+ {
+ LOGMASKED(LOG_CRU, "CRU %04x <- %d (%s)\n", offset & 0xffff, data, machine().describe_context());
+ int bit = (offset >> 1) & 0x1f;
+ switch (bit)
+ {
+ case 0: // card activation
+ LOGMASKED(LOG_CRU, "DSR %s\n", (data!=0)? "on" : "off");
+ m_selected = (data != 0);
+ break;
+ case 1: // SRAM shadow
+ LOGMASKED(LOG_CRU, "SRAM shadow %s\n", (data!=0)? "on" : "off");
+ m_sram_shadow = (data != 0);
+ break;
+ case 2: // DMA lock enable
+ LOGMASKED(LOG_CRU, "DMA lock %s\n", (data!=0)? "on" : "off");
+ m_dma_lock = (data != 0);
+ break;
+ case 3: // SCSI EOP
+ // signal_scsi_eop(data != 0);
+ LOGMASKED(LOG_CRU, "SCSI EOP %s\n", (data!=0)? "on" : "off");
+ break;
+ case 4:
+ LOGMASKED(LOG_CRU, "Word transfer %s\n", (data!=0)? "on" : "off");
+ m_word_transfer = (data != 0);
+ break;
+ case 5:
+ LOGMASKED(LOG_CRU, "Bank swap %s\n", (data!=0)? "on" : "off");
+ m_bank_swapped = (data != 0);
+ break;
+ case 6:
+ LOGMASKED(LOG_CRU, "Block mode %s (not implemented)\n", (data!=0)? "on" : "off");
+ break;
+ case 8:
+ case 9:
+ case 10:
+ if (data != 0)
+ m_eprom_bank = m_eprom_bank | (1<<(bit-8));
+ else
+ m_eprom_bank = m_eprom_bank & ~(1<<(bit-8));
+ break;
+ case 12:
+ case 13:
+ case 14:
+ if (data != 0)
+ m_sram_bank = m_sram_bank | (1<<(bit-12));
+ else
+ m_sram_bank = m_sram_bank & ~(1<<(bit-12));
+ break;
+ default:
+ break;
+ }
+ }
+}
+
+bool whtscsi_pld_device::ready()
+{
+ return m_readyout;
+}
+
+bool whtscsi_pld_device::card_selected()
+{
+ return m_selected;
+}
+
+/*
+ Updates the state of the READY output of the PLD. In the real device, the
+ SCSIDACK line is also updated, but this line is not used with the current
+ implementation of the 53C80.
+
+ READY is always asserted when an IRQ is pending or when we do not use DMA
+ Otherwise, READY is asserted when a DRQ is pending
+ When the DMA lock is active, and there is no DRQ yet, let the CPU wait
+*/
+void whtscsi_pld_device::update_line_states(int address, bool drq, bool irq)
+{
+ m_readyout = (irq || !m_dma_lock)? true : drq;
+}
+
+void whtscsi_pld_device::device_config_complete()
+{
+ m_board = static_cast<whtech_scsi_card_device*>(owner());
+}
+
+} // end namespace bus::ti99::peb
diff --git a/src/devices/bus/ti99/peb/scsicard.h b/src/devices/bus/ti99/peb/scsicard.h
new file mode 100644
index 00000000000..bc4576211d8
--- /dev/null
+++ b/src/devices/bus/ti99/peb/scsicard.h
@@ -0,0 +1,135 @@
+// license:LGPL-2.1+
+// copyright-holders:Michael Zapf
+/****************************************************************************
+
+ SCSI adapter card
+ See scsicard.cpp for documentation
+
+ Michael Zapf
+ November 2021
+
+*****************************************************************************/
+
+#ifndef MAME_BUS_TI99_PEB_SCSI_H
+#define MAME_BUS_TI99_PEB_SCSI_H
+
+#pragma once
+
+#include "peribox.h"
+#include "machine/ram.h"
+#include "machine/ncr5380.h"
+
+namespace bus::ti99::peb {
+class whtscsi_pld_device;
+
+class whtech_scsi_card_device : public device_t, public device_ti99_peribox_card_interface
+{
+ friend class whtscsi_pld_device;
+
+public:
+ whtech_scsi_card_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+ void readz(offs_t offset, uint8_t *value) override;
+ void write(offs_t offset, uint8_t data) override;
+ void setaddress_dbin(offs_t offset, int state) override;
+
+ void crureadz(offs_t offset, uint8_t *value) override;
+ void cruwrite(offs_t offset, uint8_t data) override;
+
+ DECLARE_WRITE_LINE_MEMBER( drq_w );
+ DECLARE_WRITE_LINE_MEMBER( irq_w );
+
+ void debug_read(offs_t offset, uint8_t* value);
+ void debug_write(offs_t offset, uint8_t data);
+
+private:
+ void device_start() override;
+ void device_reset() override;
+ void device_add_mconfig(machine_config &config) override;
+ ioport_constructor device_input_ports() const override;
+ const tiny_rom_entry *device_rom_region() const override;
+
+ // SCSI card on-board SRAM (32K)
+ required_device<ram_device> m_buffer_ram;
+
+ // Decoder PLD
+ required_device<whtscsi_pld_device> m_pld;
+
+ // SCSI controller chip
+ required_device<ncr53c80_device> m_controller;
+
+ // SCSI bus
+ required_device<nscsi_bus_device> m_scsibus;
+
+ // DSR ROM
+ uint8_t* m_eprom;
+
+ // Recent address
+ int m_address;
+
+ // Settings
+ int m_sw2;
+
+ // Latches for the lines
+ // Should be removed and accessor functions be added to ncr5380
+ bool m_irq;
+ bool m_drq;
+
+ // State of the READY line
+ bool m_readyset;
+
+ // Accessor functions for the PLD
+ int get_sw1();
+ int get_sw2();
+
+ // Determine the state of the READY line
+ void operate_ready_line();
+};
+
+class whtscsi_pld_device : public device_t
+{
+public:
+ whtscsi_pld_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
+
+ void crureadz(offs_t offset, uint8_t *value);
+ void cruwrite(offs_t offset, uint8_t data);
+
+ bool card_selected();
+
+ // Selector output lines of the PLD
+ line_state sram_cs();
+ line_state eprom_cs();
+ line_state scsi_cs();
+
+ int eprom_bank() { return m_eprom_bank; }
+ int sram_bank() { return m_sram_bank; }
+
+ bool ready();
+
+ void update_line_states(int address, bool drq, bool irq);
+
+private:
+ void device_start() override;
+ void device_reset() override;
+ void device_config_complete() override;
+
+ whtech_scsi_card_device* m_board;
+
+ bool busen();
+
+ // Flags
+ bool m_selected;
+ bool m_sram_shadow;
+ bool m_dma_lock;
+ bool m_word_transfer;
+ bool m_bank_swapped;
+ bool m_readyout;
+ int m_eprom_bank;
+ int m_sram_bank;
+};
+
+} // end namespace bus::ti99::peb
+
+DECLARE_DEVICE_TYPE_NS(TI99_WHTSCSI, bus::ti99::peb, whtech_scsi_card_device)
+DECLARE_DEVICE_TYPE_NS(WHTSCSI_PLD, bus::ti99::peb, whtscsi_pld_device)
+
+#endif // MAME_BUS_TI99_PEB_SCSI_H
diff --git a/src/devices/machine/wd_fdc.cpp b/src/devices/machine/wd_fdc.cpp
index 082a706bad3..29645a83489 100644
--- a/src/devices/machine/wd_fdc.cpp
+++ b/src/devices/machine/wd_fdc.cpp
@@ -614,8 +614,7 @@ void wd_fdc_device_base::read_sector_continue()
case SECTOR_READ:
LOGSTATE("SECTOR_READ\n");
- if(cur_live.crc)
- {
+ if(cur_live.crc) {
status |= S_CRC;
LOGCRC("CRC error in readsector %04X\n",cur_live.crc);
}
@@ -1024,14 +1023,11 @@ void wd_fdc_device_base::interrupt_start()
// This behavior is required by the RM nimbus driver, otherwise the forced interrupt
// at the end of a multiple sector write occasionally prevents the CRC byte being
// written, causing the disk to be corrupted.
- if (/*((main_state == READ_SECTOR) && (cur_live.state == READ_SECTOR_DATA)) ||*/
- ((main_state == WRITE_SECTOR) && (cur_live.state == WRITE_BYTE)))
- {
+ if(/*((main_state == READ_SECTOR) && (cur_live.state == READ_SECTOR_DATA)) ||*/
+ ((main_state == WRITE_SECTOR) && (cur_live.state == WRITE_BYTE))) {
delay_int = true;
return;
- }
- else
- {
+ } else {
delay_int = false;
}
@@ -1043,9 +1039,7 @@ void wd_fdc_device_base::interrupt_start()
status &= ~S_BUSY;
drop_drq();
motor_timeout = 0;
- }
- else
- {
+ } else {
// when a force interrupt command is issued and there is no
// currently running command, return the status type 1 bits
status_type_1 = true;
@@ -1059,14 +1053,13 @@ void wd_fdc_device_base::interrupt_start()
intrq_cb(intrq);
}
- if (spinup_on_interrupt) // see notes in FD1771 and WD1772 constructors, might be true for other FDC types as well.
- {
+ if(spinup_on_interrupt) { // see notes in FD1771 and WD1772 constructors, might be true for other FDC types as well.
motor_timeout = 0;
if (head_control)
set_hld();
- if (motor_control) {
+ if(motor_control) {
status |= S_MON | S_SPIN;
mon_cb(0);
@@ -1984,11 +1977,9 @@ void wd_fdc_device_base::live_run(attotime limit)
} else if(slot < sector_size+2) {
// CRC
- if(slot == sector_size+1)
- {
+ if(slot == sector_size+1) {
// act on delayed interrupt if active
-/* if (delay_int)
- {
+/* if(delay_int) {
interrupt_start();
return;
}
@@ -2209,11 +2200,9 @@ void wd_fdc_device_base::live_run(attotime limit)
cur_live.state = IDLE;
// Act on delayed interrupt if set.
- if (delay_int)
- {
+ if(delay_int)
interrupt_start();
- return;
- }
+
return;
}
@@ -2249,11 +2238,9 @@ void wd_fdc_device_base::live_run(attotime limit)
cur_live.state = IDLE;
// Act on delayed interrupt if set.
- if (delay_int)
- {
+ if(delay_int)
interrupt_start();
- return;
- }
+
return;
}
}
diff --git a/src/mame/drivers/apple2.cpp b/src/mame/drivers/apple2.cpp
index 6020af74499..f3449541fa7 100644
--- a/src/mame/drivers/apple2.cpp
+++ b/src/mame/drivers/apple2.cpp
@@ -1440,9 +1440,9 @@ void apple2_state::apple2_common(machine_config &config)
A2BUS_SLOT(config, "sl7", m_a2bus, apple2_cards, nullptr);
/* Set up the softlists: clean cracks priority, originals second, others last */
- SOFTWARE_LIST(config, "flop525_clean").set_original("apple2_flop_clcracked");
- SOFTWARE_LIST(config, "flop525_orig").set_compatible("apple2_flop_orig").set_filter("A2");
- SOFTWARE_LIST(config, "flop525_misc").set_compatible("apple2_flop_misc");
+ SOFTWARE_LIST(config, "flop_a2_clean").set_original("apple2_flop_clcracked");
+ SOFTWARE_LIST(config, "flop_a2_orig").set_compatible("apple2_flop_orig").set_filter("A2");
+ SOFTWARE_LIST(config, "flop_a2_misc").set_compatible("apple2_flop_misc");
SOFTWARE_LIST(config, "cass_list").set_original("apple2_cass");
//MCFG_SOFTWARE_LIST_ADD("cass_list", "apple2_cass")
@@ -1462,7 +1462,7 @@ void apple2_state::apple2(machine_config &config)
void apple2_state::apple2p(machine_config &config)
{
apple2_common(config);
- subdevice<software_list_device>("flop525_orig")->set_filter("A2P"); // Filter list to compatible disks for this machine.
+ subdevice<software_list_device>("flop_a2_orig")->set_filter("A2P"); // Filter list to compatible disks for this machine.
/* internal ram */
RAM(config, RAM_TAG).set_default_size("48K").set_extra_options("16K,32K,48K").set_default_value(0x00);
}
diff --git a/src/mame/drivers/apple2e.cpp b/src/mame/drivers/apple2e.cpp
index aa6eb6eb452..d0827ef01f1 100644
--- a/src/mame/drivers/apple2e.cpp
+++ b/src/mame/drivers/apple2e.cpp
@@ -4980,9 +4980,9 @@ void apple2e_state::apple2e(machine_config &config)
/* softlist config for baseline A2E
By default, filter lists where possible to compatible disks for A2E */
- SOFTWARE_LIST(config, "flop525_clean").set_original("apple2_flop_clcracked");
- SOFTWARE_LIST(config, "flop525_orig").set_compatible("apple2_flop_orig").set_filter("A2E");
- SOFTWARE_LIST(config, "flop525_misc").set_compatible("apple2_flop_misc");
+ SOFTWARE_LIST(config, "flop_a2_clean").set_original("apple2_flop_clcracked");
+ SOFTWARE_LIST(config, "flop_a2_orig").set_compatible("apple2_flop_orig").set_filter("A2E");
+ SOFTWARE_LIST(config, "flop_a2_misc").set_compatible("apple2_flop_misc");
CASSETTE(config, m_cassette);
m_cassette->set_default_state(CASSETTE_STOPPED);
@@ -5008,7 +5008,7 @@ void apple2e_state::mprof3(machine_config &config)
void apple2e_state::apple2ee(machine_config &config)
{
apple2e(config);
- subdevice<software_list_device>("flop525_orig")->set_filter("A2EE"); // Filter list to compatible disks for this machine.
+ subdevice<software_list_device>("flop_a2_orig")->set_filter("A2EE"); // Filter list to compatible disks for this machine.
M65C02(config.replace(), m_maincpu, 1021800);
m_maincpu->set_addrmap(AS_PROGRAM, &apple2e_state::apple2e_map);
@@ -5055,7 +5055,7 @@ void apple2e_state::apple2ep(machine_config &config)
void apple2e_state::apple2c(machine_config &config)
{
apple2ee(config);
- subdevice<software_list_device>("flop525_orig")->set_filter("A2C"); // Filter list to compatible disks for this machine.
+ subdevice<software_list_device>("flop_a2_orig")->set_filter("A2C"); // Filter list to compatible disks for this machine.
M65C02(config.replace(), m_maincpu, 1021800);
m_maincpu->set_addrmap(AS_PROGRAM, &apple2e_state::apple2c_map);
@@ -5350,7 +5350,7 @@ void apple2e_state::cec(machine_config &config)
A2BUS_DISKIING(config, "sl6", A2BUS_7M_CLOCK).set_onboard(m_a2bus);
- SOFTWARE_LIST(config, "flop525_cec").set_original("cecflop");
+ SOFTWARE_LIST(config, "flop_cec").set_original("cecflop");
// there is no aux slot, the "aux" side of the //e is used for additional ROM
config.device_remove("aux");
diff --git a/src/mame/drivers/apple2gs.cpp b/src/mame/drivers/apple2gs.cpp
index 87602c4e688..968eff0c08f 100644
--- a/src/mame/drivers/apple2gs.cpp
+++ b/src/mame/drivers/apple2gs.cpp
@@ -5035,11 +5035,12 @@ void apple2gs_state::apple2gs(machine_config &config)
applefdintf_device::add_35(config, m_floppy[2]);
applefdintf_device::add_35(config, m_floppy[3]);
- SOFTWARE_LIST(config, "flop35_list").set_original("apple2gs_flop_orig"); // Until we have clean cracks, use this as the default
- SOFTWARE_LIST(config, "flop35_misc").set_compatible("apple2gs_flop_misc"); // Legacy software list pre-June 2021 and defaced cracks
- SOFTWARE_LIST(config, "flop525_clean").set_compatible("apple2_flop_clcracked"); // No filter on clean cracks yet.
- SOFTWARE_LIST(config, "flop525_orig").set_compatible("apple2_flop_orig").set_filter("A2GS"); // Filter list to compatible disks for this machine.
- SOFTWARE_LIST(config, "flop525_misc").set_compatible("apple2_flop_misc");
+ SOFTWARE_LIST(config, "flop_gs_clean").set_original("apple2gs_flop_clcracked"); // GS-specific cleanly cracked disks
+ SOFTWARE_LIST(config, "flop_gs_orig").set_compatible("apple2gs_flop_orig"); // Original disks for GS
+ SOFTWARE_LIST(config, "flop_gs_misc").set_compatible("apple2gs_flop_misc"); // Legacy software list pre-June 2021 and defaced cracks
+ SOFTWARE_LIST(config, "flop_a2_clean").set_compatible("apple2_flop_clcracked"); // Apple II series cleanly cracked
+ SOFTWARE_LIST(config, "flop_a2_orig").set_compatible("apple2_flop_orig").set_filter("A2GS"); // Filter list to compatible disks for this machine.
+ SOFTWARE_LIST(config, "flop_a2_misc").set_compatible("apple2_flop_misc");
}
void apple2gs_state::apple2gsr1(machine_config &config)