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author Vas Crabb <vas@vastheman.com>2025-04-15 06:12:17 +1000
committer Vas Crabb <vas@vastheman.com>2025-04-15 06:12:17 +1000
commit5785f30e7f6dfce2f0bd3a80c55db0a7d44e709e (patch)
treeb5f5df982d2459f01ffaf840f9a9bd5bf9c3cf9c /src/osd/interface
parent9fd9257ac56b28ae6b2f9da267dd22bfebceb7f9 (diff)
Even more recompiler fixes:
* cpu/drcbearm64.cpp: Fixed ROLAND, ROLINS and CARRY clobbering the shift input when it's a a register. * cpu/drcbex86.cpp: Fixed DROLINS clobbering source in I0 and miscalculating flags when destination is I0. * cpu/uml.h: Removed assertion that's no longer valid. * cpu/drcbearm64.cpp: Added minimal operand swizzling to allow AND, OR and XOR to work without the simplifier. * cpu/drcbex64.cpp: Optimised shift operations slightly. * cpu/drcbec.cpp: Added stub implementations for TEST with no flag outputs to allow running with simplifier disabled. * cpu/drcbec.cpp: Implemented DREADM/DWRITEM with byte size access. * cpu/drcbec.cpp: Store pointer to address space directly in instruction stream. * cpu/drcbearm64.cpp: Removed some special cases for situations the simplifier deals with for ROLAND and ROLINS. * cpu/drcbec.cpp: Added some actual detail to error messages on encountering unexpected instructions.
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