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author cracyc <cracyc@users.noreply.github.com>2013-12-22 21:17:17 +0000
committer cracyc <cracyc@users.noreply.github.com>2013-12-22 21:17:17 +0000
commit452bae2722a623a444355075ebc159ce0370a08a (patch)
tree19138fa17f6b2bcbb098391996aa496e3140c441 /src/mess/machine
parent2279ff026a565b7802566a7dc7d33c883424b00c (diff)
(mess) mega Soviet clone patch [shattered]
- moves ec184*, iskr103* and mc1502 out of pc.c - moves CGA font upload support to a subclass - adds new drivers: poisk1, ec1847, pk88 - adds a skeleton of native iskr103* keyboard i8089: implement remaining instructions and support execution from "io" space. [Carl] (mess) isbc-215g: add intel isbc-215g hdd controller, read only for now [Carl] (mess) isbc: add hdd support to isbc2861 (nw)
Diffstat (limited to 'src/mess/machine')
-rw-r--r--src/mess/machine/genpc.c127
-rw-r--r--src/mess/machine/isa_cards.c1
-rw-r--r--src/mess/machine/isbc_215g.c323
-rw-r--r--src/mess/machine/isbc_215g.h63
-rw-r--r--src/mess/machine/kb_poisk1.h250
-rw-r--r--src/mess/machine/mc1502_fdc.c240
-rw-r--r--src/mess/machine/mc1502_fdc.h66
-rw-r--r--src/mess/machine/mc1502_rom.c74
-rw-r--r--src/mess/machine/mc1502_rom.h45
-rw-r--r--src/mess/machine/p1_fdc.c214
-rw-r--r--src/mess/machine/p1_fdc.h61
-rw-r--r--src/mess/machine/p1_hdc.c159
-rw-r--r--src/mess/machine/p1_hdc.h58
-rw-r--r--src/mess/machine/p1_rom.c79
-rw-r--r--src/mess/machine/p1_rom.h45
-rw-r--r--src/mess/machine/pc.c390
-rw-r--r--src/mess/machine/xsu_cards.c36
-rw-r--r--src/mess/machine/xsu_cards.h35
18 files changed, 1876 insertions, 390 deletions
diff --git a/src/mess/machine/genpc.c b/src/mess/machine/genpc.c
index 0666d716db9..66f09f662e0 100644
--- a/src/mess/machine/genpc.c
+++ b/src/mess/machine/genpc.c
@@ -879,3 +879,130 @@ WRITE8_MEMBER( ibm5150_mb_device::pc_ppi_portb_w )
m_ppi_clock_signal = ( m_ppi_keyb_clock ) ? 1 : 0;
m_pc_kbdc->clock_write_from_mb(m_ppi_clock_signal);
}
+
+//**************************************************************************
+// GLOBAL VARIABLES
+//**************************************************************************
+
+const device_type EC1841_MOTHERBOARD = &device_creator<ec1841_mb_device>;
+
+static MACHINE_CONFIG_FRAGMENT( ec1841_mb_config )
+ MCFG_FRAGMENT_ADD(ibm5160_mb_config)
+
+ MCFG_DEVICE_REMOVE("pc_kbdc")
+ MCFG_PC_KBDC_ADD("pc_kbdc", pc_kbdc_intf_5150)
+MACHINE_CONFIG_END
+
+
+//-------------------------------------------------
+// machine_config_additions - device-specific
+// machine configurations
+//-------------------------------------------------
+
+machine_config_constructor ec1841_mb_device::device_mconfig_additions() const
+{
+ return MACHINE_CONFIG_NAME( ec1841_mb_config );
+}
+
+static INPUT_PORTS_START( ec1841_mb )
+ PORT_START("DSW0") /* SA1 */
+ PORT_DIPNAME( 0xc0, 0x40, "Number of floppy drives")
+ PORT_DIPSETTING( 0x00, "1" )
+ PORT_DIPSETTING( 0x40, "2" )
+ PORT_DIPSETTING( 0x80, "3" )
+ PORT_DIPSETTING( 0xc0, "4" )
+ PORT_DIPNAME( 0x30, 0x20, "Graphics adapter")
+ PORT_DIPSETTING( 0x00, "Reserved" )
+ PORT_DIPSETTING( 0x10, "Color 40x25" )
+ PORT_DIPSETTING( 0x20, "Color 80x25" )
+ PORT_DIPSETTING( 0x30, "Monochrome" )
+ PORT_BIT( 0x08, 0x08, IPT_UNUSED )
+ /* BIOS does not support booting from QD floppies */
+ PORT_DIPNAME( 0x04, 0x04, "Floppy type")
+ PORT_DIPSETTING( 0x00, "80 tracks" )
+ PORT_DIPSETTING( 0x04, "40 tracks" )
+ PORT_DIPNAME( 0x02, 0x00, "8087 installed")
+ PORT_DIPSETTING( 0x00, DEF_STR(No) )
+ PORT_DIPSETTING( 0x02, DEF_STR(Yes) )
+ PORT_DIPNAME( 0x01, 0x01, "Boot from floppy")
+ PORT_DIPSETTING( 0x01, DEF_STR(Yes) )
+ PORT_DIPSETTING( 0x00, DEF_STR(No) )
+
+ PORT_START("SA2")
+ PORT_DIPNAME( 0x04, 0x04, "Speech synthesizer")
+ PORT_DIPSETTING( 0x00, "Installed" )
+ PORT_DIPSETTING( 0x04, "Not installed" )
+INPUT_PORTS_END
+
+//-------------------------------------------------
+// input_ports - device-specific input ports
+//-------------------------------------------------
+
+ioport_constructor ec1841_mb_device::device_input_ports() const
+{
+ return INPUT_PORTS_NAME( ec1841_mb );
+}
+
+//**************************************************************************
+// LIVE DEVICE
+//**************************************************************************
+
+//-------------------------------------------------
+// ec1841_mb_device - constructor
+//-------------------------------------------------
+
+ec1841_mb_device::ec1841_mb_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
+ : ibm5160_mb_device(mconfig, tag, owner, clock)
+{
+}
+
+void ec1841_mb_device::device_start()
+{
+ ibm5160_mb_device::device_start();
+}
+void ec1841_mb_device::device_reset()
+{
+ ibm5160_mb_device::device_reset();
+}
+
+// kbd interface is 5150-like but PB2 controls access to second bank of DIP switches (SA2).
+WRITE8_MEMBER( ec1841_mb_device::pc_ppi_portb_w )
+{
+ /* KB controller port B */
+ m_ppi_portb = data;
+ m_ppi_portc_switch_high = data & 0x04;
+ m_ppi_keyboard_clear = data & 0x80;
+ m_ppi_keyb_clock = data & 0x40;
+ m_pit8253->gate2_w(BIT(data, 0));
+ pc_speaker_set_spkrdata( data & 0x02 );
+
+ /* If PB7 is set clear the shift register and reset the IRQ line */
+ if ( m_ppi_keyboard_clear )
+ {
+ m_ppi_shift_register = 0;
+ m_ppi_shift_enable = 0;
+ m_pic8259->ir1_w(m_ppi_shift_enable);
+ }
+
+ m_pc_kbdc->data_write_from_mb(!m_ppi_shift_enable);
+ m_ppi_clock_signal = ( m_ppi_keyb_clock ) ? 1 : 0;
+ m_pc_kbdc->clock_write_from_mb(m_ppi_clock_signal);
+}
+
+READ8_MEMBER ( ec1841_mb_device::pc_ppi_portc_r )
+{
+ int timer2_output = m_pit8253->get_output(2);
+ int data=0xff;
+
+ data&=~0x80; // no parity error
+ data&=~0x40; // no error on expansion board
+
+ if (m_ppi_portc_switch_high)
+ {
+ data = (data & 0xf0) | (ioport("SA2")->read() & 0x0f);
+ }
+
+ data = ( data & ~0x20 ) | ( timer2_output ? 0x20 : 0x00 );
+
+ return data;
+}
diff --git a/src/mess/machine/isa_cards.c b/src/mess/machine/isa_cards.c
index bd69eb04162..7e88eda5d67 100644
--- a/src/mess/machine/isa_cards.c
+++ b/src/mess/machine/isa_cards.c
@@ -12,6 +12,7 @@
SLOT_INTERFACE_START( pc_isa8_cards )
SLOT_INTERFACE("mda", ISA8_MDA)
SLOT_INTERFACE("cga", ISA8_CGA)
+ SLOT_INTERFACE("cga_ec1841", ISA8_EC1841_0002)
SLOT_INTERFACE("ega", ISA8_EGA)
SLOT_INTERFACE("svga_et4k", ISA8_SVGA_ET4K)
SLOT_INTERFACE("com", ISA8_COM)
diff --git a/src/mess/machine/isbc_215g.c b/src/mess/machine/isbc_215g.c
new file mode 100644
index 00000000000..50b2f93b13d
--- /dev/null
+++ b/src/mess/machine/isbc_215g.c
@@ -0,0 +1,323 @@
+// license:BSD-3-Clause
+
+// TODO: multibus
+
+#include "isbc_215g.h"
+
+const device_type ISBC_215G = &device_creator<isbc_215g_device>;
+
+isbc_215g_device::isbc_215g_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
+ device_t(mconfig, ISBC_215G, "ISBC 215G Winchester Disk Controller", tag, owner, clock, "isbc_215g", __FILE__),
+ m_dmac(*this, "u84"),
+ m_hdd0(*this, "drive0"),
+ m_hdd1(*this, "drive1"),
+ m_out_irq_func(*this)
+{
+}
+
+void isbc_215g_device::find_sector()
+{
+ //sector id
+ // 0/6-7: sector type - 0-data, 1-alternate, 2-bad, 3-invalid
+ // 0/4-5: size - 128<<n
+ // 0/0-3: cyl high
+ // 1: cyl low
+ // 2: head
+ // 3: sector
+ UINT16 cyl = ((m_idcompare[0] & 0xf) << 8) | m_idcompare[1];
+ harddisk_image_device *drive = (m_drive ? m_hdd1 : m_hdd0);
+ UINT16 bps = 128 << ((m_idcompare[0] >> 4) & 3);
+
+ if(!m_geom[m_drive])
+ return;
+
+ if(m_cyl[m_drive] != cyl)
+ return;
+
+ if((m_idcompare[3] != m_head) || (m_head > m_geom[m_drive]->heads))
+ return;
+
+ if(m_idcompare[2] > m_geom[m_drive]->sectors)
+ return;
+
+ if(bps != m_geom[m_drive]->sectorbytes)
+ return;
+
+ if(m_idcompare[0] >> 6)
+ return;
+
+ m_idfound = true;
+ hard_disk_read(drive->get_hard_disk_file(), (cyl * m_geom[m_drive]->heads + m_head) * m_geom[m_drive]->sectors + m_idcompare[2], m_sector);
+ m_secoffset = 0;
+ return;
+}
+
+UINT16 isbc_215g_device::read_sector()
+{
+ UINT16 bps = 64 << ((m_idcompare[0] >> 4) & 3);
+ if(m_secoffset >= bps)
+ return 0;
+ return m_sector[m_secoffset++];
+}
+
+READ16_MEMBER(isbc_215g_device::io_r)
+{
+ UINT16 data = 0;
+ switch(offset)
+ {
+ case 0x00:
+ //read status
+ // 0: gnd
+ // 1: drive ready
+ // 2: seek done
+ // 3: sector sync found
+ // 4: fault
+ // 5: bus ack
+ // 6: sector id not found or bad ecc
+ // 7: timeout
+ // 8: sbx 1 present
+ // 9: sbx 1 int 0
+ // a: sbx 1 int 1
+ // b: sbx 1 opt 0
+ // c: sbx 1 opt 1
+ // d: illegal req/vendor 2
+ // e: drive req
+ // f: index latch
+ data |= (!m_idfound) << 6;
+ data |= m_index << 15;
+ break;
+ case 0x04:
+ //read status 2
+ // 0: sbx 2 present
+ // 1: sbx 2 int 0
+ // 2: sbx 2 int 1
+ // 3: sbx 2 opt 0
+ // 4: sbx 2 opt 1
+ // 5: vendor bit 0
+ // 6: track 0/busy
+ // 7: wp
+ data |= (!m_cyl[m_drive]) ? 0 : 0x40;
+ break;
+ case 0x08:
+ //cmd data bus
+ break;
+ case 0x0c:
+ // reset channel 2
+ if(space.debugger_access()) // reading this is bad
+ break;
+ m_dmac->sel_w(1);
+ m_dmac->ca_w(1);
+ m_dmac->ca_w(0);
+ m_dmac->sel_w(0);
+ break;
+ case 0x10:
+ //pit ch 0
+ break;
+ case 0x11:
+ //pit ch 1
+ break;
+ case 0x12:
+ //pit ch 2
+ break;
+ case 0x14:
+ //read buffer
+ if(m_rdgate && !m_amsrch && m_geom[m_drive])
+ data = read_sector();
+ break;
+ case 0x18:
+ //vendor bit 1,3-4
+ data |= 3<<4 | 2;
+ break;
+ default:
+ logerror("isbc_215g: invalid port read 0x80%02x\n", offset*2);
+ break;
+ }
+ return data;
+}
+
+WRITE16_MEMBER(isbc_215g_device::io_w)
+{
+ switch(offset)
+ {
+ case 0x00:
+ //control, 0x8002 doesn't set gates or search
+ // 0: wr gate
+ // 1: rd gate
+ // 2: address mark search
+ // 3: cmd bus enable
+ // 4: drive sel/head sel 2
+ // 5: safe/head sel 1
+ // 6: b ack
+ // 7: drive reg addr 0/step dir
+ // 8: drive reg addr 1
+ // 9: cmd/rd
+ // a: para/head sel 0
+ m_wrgate = data & 1;
+ m_rdgate = (data >> 1) & 1;
+ m_amsrch = (data >> 2) & 1;
+ if(m_wrgate && (m_rdgate || m_amsrch))
+ logerror("isbc_215g: both write gate and read gate and/or address search enabled\n");
+ else if(m_rdgate && m_amsrch)
+ find_sector();
+ else if(m_amsrch)
+ logerror("isbc_215g: address search without read gate\n");
+ case 0x01:
+ m_stepdir = (data & 0x80) ? 0 : 1;
+ break;
+ case 0x04:
+ //clear index and id latch
+ m_index = false;
+ m_idfound = false;
+ break;
+ case 0x08:
+ //cmd data bus/head sel
+ m_head = data & 3;
+ m_out_irq_func((data & 0x100) ? 1 : 0);
+ break;
+ case 0x0c:
+ //unit select
+ // 0: step/wr
+ // 1: sbx 1 opt 0/1
+ // 2: sbx 2 opt 0/1
+ // 3: unit select 0
+ // 4: unit select 1
+ // 5: extr 2
+ // 6: format
+ // 7: format wr gate
+ m_drive = (data >> 3) & 1; // st406 two drives only
+ break;
+ case 0x10:
+ //pit ch 0
+ break;
+ case 0x11:
+ //pit ch 1
+ break;
+ case 0x12:
+ //pit ch 2
+ break;
+ case 0x13:
+ //pit control
+ break;
+ case 0x14:
+ //write buffer
+ break;
+ case 0x18:
+ //sector id/format
+ m_idcompare[1] = data & 0xff;
+ m_idcompare[0] = data >> 8;
+ break;
+ case 0x1c:
+ //sector id low
+ m_idcompare[3] = data & 0xff;
+ m_idcompare[2] = data >> 8;
+ break;
+ default:
+ logerror("isbc_215g: invalid port write 0x80%02x\n", offset*2);
+ break;
+ }
+}
+
+READ16_MEMBER(isbc_215g_device::mem_r)
+{
+ // XXX: hack to permit debugger to disassemble rom
+ if(space.debugger_access() && (offset < 0x1fff))
+ return m_dmac->space(AS_IO).read_word_unaligned(offset*2);
+
+ switch(offset)
+ {
+ case 0x7fffb:
+ return 1;
+ case 0x7fffc:
+ return 0;
+ case 0x7fffd:
+ return m_wakeup;
+ default:
+ return m_maincpu_mem->read_word_unaligned(offset*2, mem_mask);
+ }
+}
+
+WRITE16_MEMBER(isbc_215g_device::mem_w)
+{
+ m_maincpu_mem->write_word_unaligned(offset*2, data, mem_mask);
+}
+
+static ADDRESS_MAP_START(isbc_215g_mem, AS_PROGRAM, 16, isbc_215g_device)
+ AM_RANGE(0x00000, 0xfffff) AM_READWRITE(mem_r, mem_w)
+ADDRESS_MAP_END
+
+static ADDRESS_MAP_START(isbc_215g_io, AS_IO, 16, isbc_215g_device)
+ AM_RANGE(0x0000, 0x3fff) AM_ROM AM_REGION("i8089", 0)
+ AM_RANGE(0x4000, 0x47ff) AM_MIRROR(0x3800) AM_RAM
+ AM_RANGE(0x8000, 0x8039) AM_MIRROR(0x3fc0) AM_READWRITE(io_r, io_w)
+ AM_RANGE(0xc070, 0xc08f) AM_DEVREADWRITE8("sbx1", isbx_slot_device, mcs0_r, mcs0_w, 0x00ff)
+ AM_RANGE(0xc0b0, 0xc0bf) AM_DEVREADWRITE8("sbx1", isbx_slot_device, mcs1_r, mcs1_w, 0x00ff)
+ AM_RANGE(0xc0d0, 0xc0df) AM_DEVREADWRITE8("sbx2", isbx_slot_device, mcs0_r, mcs0_w, 0x00ff)
+ AM_RANGE(0xc0e0, 0xc0ef) AM_DEVREADWRITE8("sbx2", isbx_slot_device, mcs1_r, mcs1_w, 0x00ff)
+ADDRESS_MAP_END
+
+static MACHINE_CONFIG_FRAGMENT( isbc_215g )
+ MCFG_CPU_ADD("u84", I8089, XTAL_15MHz / 3)
+ MCFG_CPU_PROGRAM_MAP(isbc_215g_mem)
+ MCFG_CPU_IO_MAP(isbc_215g_io)
+ MCFG_I8089_DATABUS_WIDTH(16)
+
+ MCFG_HARDDISK_ADD("drive0")
+ MCFG_HARDDISK_ADD("drive1")
+
+ MCFG_ISBX_SLOT_ADD("sbx1", 0, isbx_cards, NULL)
+ MCFG_ISBX_SLOT_ADD("sbx2", 0, isbx_cards, NULL)
+MACHINE_CONFIG_END
+
+machine_config_constructor isbc_215g_device::device_mconfig_additions() const
+{
+ return MACHINE_CONFIG_NAME( isbc_215g );
+}
+
+ROM_START( isbc_215g )
+ ROM_REGION( 0x4000, "i8089", ROMREGION_ERASEFF )
+ ROM_LOAD16_BYTE( "174581.001.bin", 0x0000, 0x2000, CRC(ccdbc7ab) SHA1(5c2ebdde1b0252124177221ba9cacdb6d925a24d))
+ ROM_LOAD16_BYTE( "174581.002.bin", 0x0001, 0x2000, CRC(6190fa67) SHA1(295dd4e75f699aaf93227cc4876cee8accae383a))
+ROM_END
+
+const rom_entry *isbc_215g_device::device_rom_region() const
+{
+ return ROM_NAME( isbc_215g );
+}
+
+void isbc_215g_device::device_reset()
+{
+ if(m_hdd0->get_hard_disk_file())
+ m_geom[0] = hard_disk_get_info(m_hdd0->get_hard_disk_file());
+ else
+ m_geom[0] = 0;
+ if(m_hdd1->get_hard_disk_file())
+ m_geom[1] = hard_disk_get_info(m_hdd1->get_hard_disk_file());
+ else
+ m_geom[1] = 0;
+}
+
+void isbc_215g_device::device_start()
+{
+ m_maincpu_mem = &machine().device<cpu_device>(m_maincpu_tag)->space(AS_PROGRAM);
+ m_cyl[0] = m_cyl[1] = 0;
+ m_idcompare[0] = m_idcompare[1] = m_idcompare[2] = m_idcompare[3] = 0;
+ m_index = false;
+ m_idfound = false;
+ m_drive = 0;
+ m_head = 0;
+ m_stepdir = false;
+ m_out_irq_func.resolve_safe();
+}
+
+WRITE8_MEMBER(isbc_215g_device::write)
+{
+ if(!offset)
+ {
+ if(!data && (m_reset == 2))
+ m_dmac->reset();
+ m_out_irq_func(0);
+ m_dmac->ca_w(data != 2);
+ m_dmac->ca_w(0);
+ m_reset = data;
+ }
+}
diff --git a/src/mess/machine/isbc_215g.h b/src/mess/machine/isbc_215g.h
new file mode 100644
index 00000000000..4231f3e714e
--- /dev/null
+++ b/src/mess/machine/isbc_215g.h
@@ -0,0 +1,63 @@
+// license:BSD-3-Clause
+
+#ifndef ISBC_215G_H_
+#define ISBC_215G_H_
+
+#include "emu.h"
+#include "cpu/i8089/i8089.h"
+#include "bus/isbx/isbx.h"
+#include "imagedev/harddriv.h"
+
+class isbc_215g_device : public device_t
+{
+public:
+ isbc_215g_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+
+ virtual machine_config_constructor device_mconfig_additions() const;
+ const rom_entry *device_rom_region() const;
+
+ DECLARE_WRITE8_MEMBER(write);
+ DECLARE_READ16_MEMBER(io_r);
+ DECLARE_WRITE16_MEMBER(io_w);
+ DECLARE_READ16_MEMBER(mem_r);
+ DECLARE_WRITE16_MEMBER(mem_w);
+
+ static void static_set_wakeup_addr(device_t &device, UINT32 wakeup) { downcast<isbc_215g_device &>(device).m_wakeup = wakeup; }
+ static void static_set_maincpu_tag(device_t &device, const char *maincpu_tag) { downcast<isbc_215g_device &>(device).m_maincpu_tag = maincpu_tag; }
+ template<class _Object> static devcb2_base &static_set_irq_callback(device_t &device, _Object object) { return downcast<isbc_215g_device &>(device).m_out_irq_func.set_callback(object); }
+
+protected:
+ virtual void device_start();
+ virtual void device_reset();
+
+private:
+ void find_sector();
+ UINT16 read_sector();
+
+ required_device<i8089_device> m_dmac;
+ required_device<harddisk_image_device> m_hdd0;
+ required_device<harddisk_image_device> m_hdd1;
+ devcb2_write_line m_out_irq_func;
+
+ int m_reset;
+ UINT16 m_wakeup, m_secoffset, m_sector[512];
+ const char *m_maincpu_tag;
+ address_space *m_maincpu_mem;
+ UINT16 m_cyl[2];
+ UINT8 m_idcompare[4], m_drive, m_head;
+ bool m_idfound, m_index, m_stepdir, m_wrgate, m_rdgate, m_amsrch;
+
+ const struct hard_disk_info* m_geom[2];
+};
+
+#define MCFG_ISBC_215_ADD(_tag, _wakeup, _maincpu_tag) \
+ MCFG_DEVICE_ADD(_tag, ISBC_215G, 0) \
+ isbc_215g_device::static_set_wakeup_addr(*device, _wakeup); \
+ isbc_215g_device::static_set_maincpu_tag(*device, _maincpu_tag);
+
+#define MCFG_ISBC_215_IRQ(_irq_line) \
+ devcb = &isbc_215g_device::static_set_irq_callback(*device, DEVCB2_##_irq_line);
+
+extern const device_type ISBC_215G;
+
+#endif /* ISBC_215G_H_ */
diff --git a/src/mess/machine/kb_poisk1.h b/src/mess/machine/kb_poisk1.h
new file mode 100644
index 00000000000..babf487b35f
--- /dev/null
+++ b/src/mess/machine/kb_poisk1.h
@@ -0,0 +1,250 @@
+/*
+ * Poisk-1 keyboard
+ *
+ * F4 - toggles key click
+ * RCtrl - toggles Latin/Cyrillic layout
+ * Keypad / - Pause key
+ * F11 - XXX
+ * F12 - XXX
+ */
+
+INPUT_PORTS_START( poisk1_keyboard_v89 )
+ PORT_START("Y1")
+ PORT_BIT( 0x001, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_CLOSEBRACE) PORT_CHAR(']') PORT_CHAR('}') // 0x55
+ PORT_BIT( 0x002, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad 5") PORT_CODE(KEYCODE_5_PAD)
+ PORT_BIT( 0x004, IP_ACTIVE_LOW, IPT_UNUSED )
+ PORT_BIT( 0x008, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("?56?") // 0x56
+ PORT_BIT( 0x010, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_SLASH) PORT_CHAR('/') PORT_CHAR('?')
+ PORT_BIT( 0x020, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Enter") PORT_CODE(KEYCODE_ENTER) PORT_CHAR('\r')
+ PORT_BIT( 0x040, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad 8") PORT_CODE(KEYCODE_8_PAD) PORT_CODE(KEYCODE_UP)
+ PORT_BIT( 0x080, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad 2") PORT_CODE(KEYCODE_2_PAD) PORT_CODE(KEYCODE_DOWN)
+/*-12*/ PORT_BIT( 0x100, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("?-12 - ?") /* PORT_CODE(KEYCODE_SLASH) PORT_CHAR('?') PORT_CHAR('/') */
+ PORT_BIT( 0x200, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_O) PORT_CHAR('o') PORT_CHAR('O')
+/*-11*/ PORT_BIT( 0x400, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("?-11 - %") /* PORT_CODE(KEYCODE_5) PORT_CHAR('5') PORT_CHAR('%') */
+ PORT_BIT( 0x800, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("F11") PORT_CODE(KEYCODE_F11) PORT_CHAR(UCHAR_MAMEKEY(F11))
+
+ PORT_START("Y2")
+/*-15*/ PORT_BIT( 0x001, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("?-15 - !") /* PORT_CODE(KEYCODE_1) PORT_CHAR('!') PORT_CHAR('1') */
+ PORT_BIT( 0x002, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad 4") PORT_CODE(KEYCODE_4_PAD) PORT_CODE(KEYCODE_LEFT)
+ PORT_BIT( 0x004, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad 0") PORT_CODE(KEYCODE_0_PAD) PORT_CODE(KEYCODE_INSERT) /* ??? */
+ PORT_BIT( 0x008, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("F7") PORT_CODE(KEYCODE_F7) PORT_CHAR(UCHAR_MAMEKEY(F7))
+/*-13*/ PORT_BIT( 0x010, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("?-13 - ;") /* PORT_CODE(KEYCODE_COLON) PORT_CHAR(';') PORT_CHAR(':') */
+ PORT_BIT( 0x020, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME(UTF8_LEFT) PORT_CODE(KEYCODE_BACKSPACE)
+ PORT_BIT( 0x040, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad 7") PORT_CODE(KEYCODE_7_PAD) PORT_CODE(KEYCODE_HOME)
+ PORT_BIT( 0x080, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad 1") PORT_CODE(KEYCODE_1_PAD) PORT_CODE(KEYCODE_END)
+/*-2*/ PORT_BIT( 0x100, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("?-2 - .") /* PORT_CODE(KEYCODE_STOP) PORT_CHAR('.') PORT_CHAR('>') */
+/*-3*/ PORT_BIT( 0x200, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("?-3 - _") /* PORT_CODE(KEYCODE_MINUS) PORT_CHAR('-') PORT_CHAR('_') */
+ PORT_BIT( 0x400, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_P) PORT_CHAR('p') PORT_CHAR('P')
+ PORT_BIT( 0x800, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_OPENBRACE) PORT_CHAR('[') PORT_CHAR('{') // 0x54
+
+ PORT_START("Y3")
+ PORT_BIT( 0x001, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_F) PORT_CHAR('f') PORT_CHAR('F')
+ PORT_BIT( 0x002, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad 9") PORT_CODE(KEYCODE_9_PAD) PORT_CODE(KEYCODE_PGUP)
+ PORT_BIT( 0x004, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad 3") PORT_CODE(KEYCODE_3_PAD) PORT_CODE(KEYCODE_PGDN)
+ PORT_BIT( 0x008, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_N) PORT_CHAR('n') PORT_CHAR('N')
+ PORT_BIT( 0x010, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_D) PORT_CHAR('d') PORT_CHAR('D')
+ PORT_BIT( 0x020, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_S) PORT_CHAR('s') PORT_CHAR('S')
+ PORT_BIT( 0x040, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_Z) PORT_CHAR('z') PORT_CHAR('Z')
+ PORT_BIT( 0x080, IP_ACTIVE_LOW, IPT_UNUSED )
+ PORT_BIT( 0x100, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_M) PORT_CHAR('m') PORT_CHAR('M')
+ PORT_BIT( 0x200, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_K) PORT_CHAR('k') PORT_CHAR('K')
+ PORT_BIT( 0x400, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_B) PORT_CHAR('b') PORT_CHAR('B')
+ PORT_BIT( 0x800, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_G) PORT_CHAR('g') PORT_CHAR('G')
+
+ PORT_START("Y4")
+ PORT_BIT( 0x001, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("F3") PORT_CODE(KEYCODE_F3) PORT_CHAR(UCHAR_MAMEKEY(F3))
+ PORT_BIT( 0x002, IP_ACTIVE_LOW, IPT_UNUSED )
+ PORT_BIT( 0x004, IP_ACTIVE_LOW, IPT_UNUSED )
+ PORT_BIT( 0x008, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("F6") PORT_CODE(KEYCODE_F6) PORT_CHAR(UCHAR_MAMEKEY(F6))
+ PORT_BIT( 0x010, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("F2") PORT_CODE(KEYCODE_F2) PORT_CHAR(UCHAR_MAMEKEY(F2))
+ PORT_BIT( 0x020, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("F1") PORT_CODE(KEYCODE_F1) PORT_CHAR(UCHAR_MAMEKEY(F1))
+/*-1*/ PORT_BIT( 0x040, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("?-1 - *") /* PORT_CODE(KEYCODE_8) PORT_CHAR('*') PORT_CHAR('8') */
+ PORT_BIT( 0x080, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Esc") PORT_CODE(KEYCODE_ESC) PORT_CHAR(UCHAR_MAMEKEY(ESC)) /* ??2 */
+/*-9*/ PORT_BIT( 0x100, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("?-9 - :") /* PORT_CODE(KEYCODE_COLON) PORT_CHAR(';') PORT_CHAR(':') */
+/*-10*/ PORT_BIT( 0x200, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("?-10 - ,") /* PORT_CODE(KEYCODE_COMMA) PORT_CHAR(',') PORT_CHAR('<') */
+ PORT_BIT( 0x400, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("F5") PORT_CODE(KEYCODE_F5) PORT_CHAR(UCHAR_MAMEKEY(F5))
+ PORT_BIT( 0x800, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("F4") PORT_CODE(KEYCODE_F4) PORT_CHAR(UCHAR_MAMEKEY(F4))
+
+ PORT_START("Y5")
+ PORT_BIT( 0x001, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_E) PORT_CHAR('e') PORT_CHAR('E')
+ PORT_BIT( 0x002, IP_ACTIVE_LOW, IPT_UNUSED )
+/*?*/ PORT_BIT( 0x004, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Ctrl") PORT_CODE(KEYCODE_RCONTROL) PORT_CHAR(UCHAR_MAMEKEY(RCONTROL))
+ PORT_BIT( 0x008, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_H) PORT_CHAR('h') PORT_CHAR('H')
+ PORT_BIT( 0x010, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_W) PORT_CHAR('w') PORT_CHAR('W')
+ PORT_BIT( 0x020, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_Q) PORT_CHAR('q') PORT_CHAR('Q')
+ PORT_BIT( 0x040, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_A) PORT_CHAR('a') PORT_CHAR('A')
+ PORT_BIT( 0x080, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Caps Lock") PORT_CODE(KEYCODE_CAPSLOCK) PORT_CHAR(UCHAR_MAMEKEY(CAPSLOCK)) /* ???? */
+ PORT_BIT( 0x100, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_J) PORT_CHAR('j') PORT_CHAR('J')
+ PORT_BIT( 0x200, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_I) PORT_CHAR('i') PORT_CHAR('I')
+ PORT_BIT( 0x400, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_T) PORT_CHAR('t') PORT_CHAR('T')
+ PORT_BIT( 0x800, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_R) PORT_CHAR('r') PORT_CHAR('R')
+
+ PORT_START("Y6")
+ PORT_BIT( 0x001, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Left Shift") PORT_CODE(KEYCODE_LSHIFT) PORT_CHAR(UCHAR_SHIFT_1)
+ PORT_BIT( 0x002, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad *") PORT_CODE(KEYCODE_ASTERISK) PORT_CHAR(UCHAR_MAMEKEY(ASTERISK))
+/*?*/ PORT_BIT( 0x004, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Alt") PORT_CODE(KEYCODE_RALT)
+ PORT_BIT( 0x008, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_C) PORT_CHAR('c') PORT_CHAR('C')
+ PORT_BIT( 0x010, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_X) PORT_CHAR('x') PORT_CHAR('X')
+ PORT_BIT( 0x020, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("?dc?") // 0xdc = SHIFT2
+ PORT_BIT( 0x040, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Rus/Lat") PORT_CODE(KEYCODE_RALT) // 0xdb = Rus/Lat
+ PORT_BIT( 0x080, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Right Shift") PORT_CODE(KEYCODE_RSHIFT) PORT_CHAR(UCHAR_SHIFT_1)
+ PORT_BIT( 0x100, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("F12") PORT_CODE(KEYCODE_F12) PORT_CHAR(UCHAR_MAMEKEY(F12))
+ PORT_BIT( 0x200, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("?59?") // 0x59
+ PORT_BIT( 0x400, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_V) PORT_CHAR('v') PORT_CHAR('V')
+ PORT_BIT( 0x800, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Space") PORT_CODE(KEYCODE_SPACE) PORT_CHAR(' ')
+
+ PORT_START("Y7")
+ PORT_BIT( 0x001, IP_ACTIVE_LOW, IPT_UNUSED )
+ PORT_BIT( 0x002, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("NumLock") PORT_CODE(KEYCODE_NUMLOCK)
+ PORT_BIT( 0x004, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad . Del") PORT_CODE(KEYCODE_DEL_PAD) PORT_CHAR(UCHAR_MAMEKEY(DEL_PAD))
+ PORT_BIT( 0x008, IP_ACTIVE_LOW, IPT_UNUSED )
+ PORT_BIT( 0x010, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_COLON) PORT_CHAR(';') PORT_CHAR(':')
+ PORT_BIT( 0x020, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("F10") PORT_CODE(KEYCODE_F10) PORT_CHAR(UCHAR_MAMEKEY(F10))
+ PORT_BIT( 0x040, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad +") PORT_CODE(KEYCODE_PLUS_PAD)
+ PORT_BIT( 0x080, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad 6") PORT_CODE(KEYCODE_6_PAD) PORT_CODE(KEYCODE_RIGHT)
+ PORT_BIT( 0x100, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_L) PORT_CHAR('l') PORT_CHAR('L')
+ PORT_BIT( 0x200, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("F8") PORT_CODE(KEYCODE_F8) PORT_CHAR(UCHAR_MAMEKEY(F8))
+ PORT_BIT( 0x400, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("?5a?") // 0x5a
+ PORT_BIT( 0x800, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("F9") PORT_CODE(KEYCODE_F9) PORT_CHAR(UCHAR_MAMEKEY(F9))
+
+ PORT_START("Y8")
+/*-6*/ PORT_BIT( 0x001, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("?-6 - -") /* PORT_CODE(KEYCODE_MINUS) PORT_CHAR('-') PORT_CHAR('_') */
+ PORT_BIT( 0x002, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad -") PORT_CODE(KEYCODE_MINUS_PAD)
+ PORT_BIT( 0x004, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Tab") PORT_CODE(KEYCODE_TAB) PORT_CHAR('\t') /* ??? */
+ PORT_BIT( 0x008, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_Y) PORT_CHAR('y') PORT_CHAR('Y')
+/*-7*/ PORT_BIT( 0x010, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("?-7 - )") /* PORT_CODE(KEYCODE_0) PORT_CHAR(')') PORT_CHAR('0') */
+ PORT_BIT( 0x020, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Scroll Lock")
+/*-4*/ PORT_BIT( 0x040, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("?-4 - (") /* PORT_CODE(KEYCODE_9) PORT_CHAR('(') PORT_CHAR('9') */
+ PORT_BIT( 0x080, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_BACKSLASH) PORT_CHAR('\\') PORT_CHAR('|')
+ PORT_BIT( 0x100, IP_ACTIVE_LOW, IPT_UNUSED )
+ PORT_BIT( 0x200, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_U) PORT_CHAR('u') PORT_CHAR('U')
+/*-5*/ PORT_BIT( 0x400, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("?-5 - \"") /* PORT_CODE(KEYCODE_QUOTE) PORT_CHAR('"') PORT_CHAR('\'') */
+/*-8*/ PORT_BIT( 0x800, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("?-8 - /") /* PORT_CODE(KEYCODE_SLASH) PORT_CHAR('/') PORT_CHAR('?') */
+
+#if 0
+ PORT_BIT( 0x004, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Delete") PORT_CODE(KEYCODE_DEL_PAD)
+ PORT_BIT( 0x800, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("* PrtSc") PORT_CODE(KEYCODE_PRTSCR)
+ PORT_BIT( 0x002, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_2) PORT_CHAR('2') PORT_CHAR('@')
+ PORT_BIT( 0x000, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_3) PORT_CHAR('3') PORT_CHAR('#')
+ PORT_BIT( 0x200, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_4) PORT_CHAR('4') PORT_CHAR('$')
+ PORT_BIT( 0x000, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_6) PORT_CHAR('6') PORT_CHAR('^')
+ PORT_BIT( 0x200, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_7) PORT_CHAR('7') PORT_CHAR('&')
+ PORT_BIT( 0x000, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_TILDE) PORT_CHAR('`') PORT_CHAR('~')
+ PORT_BIT( 0x000, IP_ACTIVE_LOW, IPT_KEYBOARD )
+#endif
+
+INPUT_PORTS_END
+
+INPUT_PORTS_START( poisk1_keyboard_v91 )
+ PORT_START("Y1")
+ PORT_BIT( 0x001, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_CLOSEBRACE) PORT_CHAR(']') PORT_CHAR('}')
+ PORT_BIT( 0x002, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad 5") PORT_CODE(KEYCODE_5_PAD)
+ PORT_BIT( 0x004, IP_ACTIVE_LOW, IPT_UNUSED )
+ PORT_BIT( 0x008, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME(";") PORT_CODE(KEYCODE_COLON) PORT_CHAR(';') PORT_CHAR(':')
+ PORT_BIT( 0x010, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("+ / CYRILLIC YO") PORT_CODE(KEYCODE_PLUS_PAD)
+ PORT_BIT( 0x020, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Enter") PORT_CODE(KEYCODE_ENTER) PORT_CHAR('\r')
+ PORT_BIT( 0x040, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad 8") PORT_CODE(KEYCODE_8_PAD) PORT_CODE(KEYCODE_UP)
+ PORT_BIT( 0x080, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad 2") PORT_CODE(KEYCODE_2_PAD) PORT_CODE(KEYCODE_DOWN)
+ PORT_BIT( 0x100, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME(")") PORT_CODE(KEYCODE_0) PORT_CHAR('0') PORT_CHAR(')')
+ PORT_BIT( 0x200, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_O) PORT_CHAR('o') PORT_CHAR('O')
+ PORT_BIT( 0x400, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("-") PORT_CODE(KEYCODE_MINUS) PORT_CHAR('-') PORT_CHAR('_')
+ PORT_BIT( 0x800, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("'") PORT_CODE(KEYCODE_QUOTE) PORT_CHAR('\'') PORT_CHAR('"')
+
+ PORT_START("Y2")
+ PORT_BIT( 0x001, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_EQUALS) PORT_CHAR('=') PORT_CHAR('+')
+ PORT_BIT( 0x002, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad 4") PORT_CODE(KEYCODE_4_PAD) PORT_CODE(KEYCODE_LEFT)
+ PORT_BIT( 0x004, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad 0") PORT_CODE(KEYCODE_0_PAD) PORT_CODE(KEYCODE_INSERT)
+ PORT_BIT( 0x008, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("F6") PORT_CODE(KEYCODE_F6) PORT_CHAR(UCHAR_MAMEKEY(F6))
+ PORT_BIT( 0x010, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_BACKSLASH) PORT_CHAR('\\') PORT_CHAR('|')
+ PORT_BIT( 0x020, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME(UTF8_LEFT) PORT_CODE(KEYCODE_BACKSPACE)
+ PORT_BIT( 0x040, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad 7") PORT_CODE(KEYCODE_7_PAD) PORT_CODE(KEYCODE_HOME)
+ PORT_BIT( 0x080, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad 1") PORT_CODE(KEYCODE_1_PAD) PORT_CODE(KEYCODE_END)
+ PORT_BIT( 0x100, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("*") PORT_CODE(KEYCODE_8) PORT_CHAR('8') PORT_CHAR('*')
+ PORT_BIT( 0x200, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("(") PORT_CODE(KEYCODE_9) PORT_CHAR('9') PORT_CHAR('(')
+ PORT_BIT( 0x400, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_P) PORT_CHAR('p') PORT_CHAR('P')
+ PORT_BIT( 0x800, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_OPENBRACE) PORT_CHAR('[') PORT_CHAR('{')
+
+ PORT_START("Y3")
+ PORT_BIT( 0x001, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_F) PORT_CHAR('f') PORT_CHAR('F')
+ PORT_BIT( 0x002, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad 9") PORT_CODE(KEYCODE_9_PAD) PORT_CODE(KEYCODE_PGUP)
+ PORT_BIT( 0x004, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad 3") PORT_CODE(KEYCODE_3_PAD) PORT_CODE(KEYCODE_PGDN)
+ PORT_BIT( 0x008, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_N) PORT_CHAR('n') PORT_CHAR('N')
+ PORT_BIT( 0x010, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_D) PORT_CHAR('d') PORT_CHAR('D')
+ PORT_BIT( 0x020, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_S) PORT_CHAR('s') PORT_CHAR('S')
+ PORT_BIT( 0x040, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_Z) PORT_CHAR('z') PORT_CHAR('Z')
+ PORT_BIT( 0x080, IP_ACTIVE_LOW, IPT_UNUSED )
+ PORT_BIT( 0x100, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_M) PORT_CHAR('m') PORT_CHAR('M')
+ PORT_BIT( 0x200, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_K) PORT_CHAR('k') PORT_CHAR('K')
+ PORT_BIT( 0x400, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_B) PORT_CHAR('b') PORT_CHAR('B')
+ PORT_BIT( 0x800, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_G) PORT_CHAR('g') PORT_CHAR('G')
+
+ PORT_START("Y4")
+ PORT_BIT( 0x001, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("F2") PORT_CODE(KEYCODE_F2) PORT_CHAR(UCHAR_MAMEKEY(F2))
+ PORT_BIT( 0x002, IP_ACTIVE_LOW, IPT_UNUSED )
+ PORT_BIT( 0x004, IP_ACTIVE_LOW, IPT_UNUSED )
+ PORT_BIT( 0x008, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("F5") PORT_CODE(KEYCODE_F5) PORT_CHAR(UCHAR_MAMEKEY(F5))
+ PORT_BIT( 0x010, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("F1") PORT_CODE(KEYCODE_F1) PORT_CHAR(UCHAR_MAMEKEY(F1))
+ PORT_BIT( 0x020, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Esc") PORT_CODE(KEYCODE_ESC) PORT_CHAR(UCHAR_MAMEKEY(ESC))
+ PORT_BIT( 0x040, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_TILDE) PORT_CHAR('`') PORT_CHAR('~')
+ PORT_BIT( 0x080, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Pause") PORT_CODE(KEYCODE_SLASH_PAD) PORT_CHAR(UCHAR_MAMEKEY(SLASH_PAD))
+ PORT_BIT( 0x100, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_6) PORT_CHAR('6') PORT_CHAR('^')
+ PORT_BIT( 0x200, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_7) PORT_CHAR('7') PORT_CHAR('&')
+ PORT_BIT( 0x400, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("F4") PORT_CODE(KEYCODE_F4) PORT_CHAR(UCHAR_MAMEKEY(F4))
+ PORT_BIT( 0x800, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("F3") PORT_CODE(KEYCODE_F3) PORT_CHAR(UCHAR_MAMEKEY(F3))
+
+ PORT_START("Y5")
+ PORT_BIT( 0x001, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_E) PORT_CHAR('e') PORT_CHAR('E')
+ PORT_BIT( 0x002, IP_ACTIVE_LOW, IPT_UNUSED )
+ PORT_BIT( 0x004, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Caps Lock") PORT_CODE(KEYCODE_CAPSLOCK) PORT_CHAR(UCHAR_MAMEKEY(CAPSLOCK))
+ PORT_BIT( 0x008, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_H) PORT_CHAR('h') PORT_CHAR('H')
+ PORT_BIT( 0x010, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_W) PORT_CHAR('w') PORT_CHAR('W')
+ PORT_BIT( 0x020, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_Q) PORT_CHAR('q') PORT_CHAR('Q')
+ PORT_BIT( 0x040, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_A) PORT_CHAR('a') PORT_CHAR('A')
+ PORT_BIT( 0x080, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("UKRAINIAN XXX") PORT_CODE(KEYCODE_F12) PORT_CHAR(UCHAR_MAMEKEY(F12))
+ PORT_BIT( 0x100, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_J) PORT_CHAR('j') PORT_CHAR('J')
+ PORT_BIT( 0x200, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_I) PORT_CHAR('i') PORT_CHAR('I')
+ PORT_BIT( 0x400, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_T) PORT_CHAR('t') PORT_CHAR('T')
+ PORT_BIT( 0x800, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_R) PORT_CHAR('r') PORT_CHAR('R')
+
+ PORT_START("Y6")
+ PORT_BIT( 0x001, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Left Shift") PORT_CODE(KEYCODE_LSHIFT) PORT_CHAR(UCHAR_SHIFT_1)
+ PORT_BIT( 0x002, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Right Ctrl/Cyril") PORT_CODE(KEYCODE_RCONTROL) PORT_CHAR(UCHAR_MAMEKEY(RCONTROL))
+ PORT_BIT( 0x004, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Left Ctrl") PORT_CODE(KEYCODE_LCONTROL) PORT_CHAR(UCHAR_MAMEKEY(LCONTROL))
+ PORT_BIT( 0x008, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_C) PORT_CHAR('c') PORT_CHAR('C')
+ PORT_BIT( 0x010, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_X) PORT_CHAR('x') PORT_CHAR('X')
+ PORT_BIT( 0x020, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Left Alt") PORT_CODE(KEYCODE_LALT)
+ PORT_BIT( 0x040, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Right Alt") PORT_CODE(KEYCODE_RALT)
+ PORT_BIT( 0x080, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Right Shift") PORT_CODE(KEYCODE_RSHIFT) PORT_CHAR(UCHAR_SHIFT_1)
+ PORT_BIT( 0x100, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME(".") PORT_CODE(KEYCODE_STOP) PORT_CHAR('.') PORT_CHAR('>')
+ PORT_BIT( 0x200, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME(",") PORT_CODE(KEYCODE_COMMA) PORT_CHAR(',') PORT_CHAR('<')
+ PORT_BIT( 0x400, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_V) PORT_CHAR('v') PORT_CHAR('V')
+ PORT_BIT( 0x800, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Space") PORT_CODE(KEYCODE_SPACE) PORT_CHAR(' ')
+
+ PORT_START("Y7")
+ PORT_BIT( 0x001, IP_ACTIVE_LOW, IPT_UNUSED )
+ PORT_BIT( 0x002, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("NumLock") PORT_CODE(KEYCODE_NUMLOCK)
+ PORT_BIT( 0x004, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad . Del") PORT_CODE(KEYCODE_DEL_PAD) PORT_CHAR(UCHAR_MAMEKEY(DEL_PAD))
+ PORT_BIT( 0x008, IP_ACTIVE_LOW, IPT_UNUSED )
+ PORT_BIT( 0x010, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("- / UKRAINIAN XXX") PORT_CODE(KEYCODE_MINUS_PAD)
+ PORT_BIT( 0x020, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("F9") PORT_CODE(KEYCODE_F9) PORT_CHAR(UCHAR_MAMEKEY(F9))
+ PORT_BIT( 0x040, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Scroll Lock")
+ PORT_BIT( 0x080, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Keypad 6") PORT_CODE(KEYCODE_6_PAD) PORT_CODE(KEYCODE_RIGHT)
+ PORT_BIT( 0x100, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_L) PORT_CHAR('l') PORT_CHAR('L')
+ PORT_BIT( 0x200, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("F7") PORT_CODE(KEYCODE_F7) PORT_CHAR(UCHAR_MAMEKEY(F7))
+ PORT_BIT( 0x400, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("/") PORT_CODE(KEYCODE_SLASH) PORT_CHAR('/') PORT_CHAR('?')
+ PORT_BIT( 0x800, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("F8") PORT_CODE(KEYCODE_F8) PORT_CHAR(UCHAR_MAMEKEY(F8))
+
+ PORT_START("Y8")
+ PORT_BIT( 0x001, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_3) PORT_CHAR('3') PORT_CHAR('#')
+ PORT_BIT( 0x002, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("* PrtSc") PORT_CODE(KEYCODE_ASTERISK) PORT_CHAR(UCHAR_MAMEKEY(ASTERISK))
+ PORT_BIT( 0x004, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("Tab") PORT_CODE(KEYCODE_TAB) PORT_CHAR('\t') /* ??? */
+ PORT_BIT( 0x008, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_Y) PORT_CHAR('y') PORT_CHAR('Y')
+ PORT_BIT( 0x010, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_2) PORT_CHAR('2') PORT_CHAR('@')
+ PORT_BIT( 0x020, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("F10") PORT_CODE(KEYCODE_F10) PORT_CHAR(UCHAR_MAMEKEY(F10))
+ PORT_BIT( 0x040, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("!") PORT_CODE(KEYCODE_1) PORT_CHAR('!') PORT_CHAR('1')
+ PORT_BIT( 0x080, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("UKRAINIAN XXX") PORT_CODE(KEYCODE_F11) PORT_CHAR(UCHAR_MAMEKEY(F11))
+ PORT_BIT( 0x100, IP_ACTIVE_LOW, IPT_UNUSED )
+ PORT_BIT( 0x200, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_U) PORT_CHAR('u') PORT_CHAR('U')
+ PORT_BIT( 0x400, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_NAME("%") PORT_CODE(KEYCODE_5) PORT_CHAR('5') PORT_CHAR('%')
+ PORT_BIT( 0x800, IP_ACTIVE_LOW, IPT_KEYBOARD ) PORT_CODE(KEYCODE_4) PORT_CHAR('4') PORT_CHAR('$')
+INPUT_PORTS_END
diff --git a/src/mess/machine/mc1502_fdc.c b/src/mess/machine/mc1502_fdc.c
new file mode 100644
index 00000000000..a8d9523386a
--- /dev/null
+++ b/src/mess/machine/mc1502_fdc.c
@@ -0,0 +1,240 @@
+// license:BSD-3-Clause
+// copyright-holders:XXX
+/**********************************************************************
+
+ Electronika MC 1502 FDC device
+
+ Copyright MESS Team.
+ Visit http://mamedev.org for licensing and usage restrictions.
+
+**********************************************************************/
+
+#include "mc1502_fdc.h"
+
+#include "cpu/i86/i86.h"
+#include "formats/dsk_dsk.h"
+#include "formats/pc_dsk.h"
+
+#define VERBOSE_DBG 0
+
+#define DBG_LOG(N,M,A) \
+ do { \
+ if(VERBOSE_DBG>=N) \
+ { \
+ if( M ) \
+ logerror("%11.6f: %-24s",machine().time().as_double(),(char*)M ); \
+ logerror A; \
+ } \
+ } while (0)
+
+
+//**************************************************************************
+// DEVICE DEFINITIONS
+//**************************************************************************
+
+const device_type MC1502_FDC = &device_creator<mc1502_fdc_device>;
+
+static DECLARE_READ8_DEVICE_HANDLER(mc1502_FDC_r);
+static DECLARE_WRITE8_DEVICE_HANDLER(mc1502_FDC_w);
+
+FLOPPY_FORMATS_MEMBER( mc1502_fdc_device::floppy_formats )
+ FLOPPY_PC_FORMAT,
+ FLOPPY_DSK_FORMAT
+FLOPPY_FORMATS_END
+
+static SLOT_INTERFACE_START( mc1502_floppies )
+ SLOT_INTERFACE( "525qd", FLOPPY_525_QD )
+SLOT_INTERFACE_END
+
+static MACHINE_CONFIG_FRAGMENT( mc1502_fdc )
+ MCFG_FD1793x_ADD("fdc", XTAL_16MHz / 16)
+ MCFG_FLOPPY_DRIVE_ADD("fdc:0", mc1502_floppies, "525qd", mc1502_fdc_device::floppy_formats)
+ MCFG_FLOPPY_DRIVE_ADD("fdc:1", mc1502_floppies, "525qd", mc1502_fdc_device::floppy_formats)
+MACHINE_CONFIG_END
+
+//-------------------------------------------------
+// ROM( mc1502_fdc )
+//-------------------------------------------------
+
+ROM_START( mc1502_fdc )
+ROM_END
+
+
+//-------------------------------------------------
+// machine_config_additions - device-specific
+// machine configurations
+//-------------------------------------------------
+
+machine_config_constructor mc1502_fdc_device::device_mconfig_additions() const
+{
+ return MACHINE_CONFIG_NAME( mc1502_fdc );
+}
+
+//-------------------------------------------------
+// rom_region - device-specific ROM region
+//-------------------------------------------------
+
+const rom_entry *mc1502_fdc_device::device_rom_region() const
+{
+ return ROM_NAME( mc1502_fdc );
+}
+
+
+//**************************************************************************
+// LIVE DEVICE
+//**************************************************************************
+
+TIMER_CALLBACK_MEMBER(mc1502_fdc_device::motor_callback)
+{
+ m_fdc->subdevice<floppy_connector>("0")->get_device()->mon_w(ASSERT_LINE);
+ m_fdc->subdevice<floppy_connector>("1")->get_device()->mon_w(ASSERT_LINE);
+ motor_on = 0;
+}
+
+UINT8 mc1502_fdc_device::mc1502_wd17xx_aux_r()
+{
+ UINT8 data;
+
+ data = 0;
+
+ return data;
+}
+
+void mc1502_fdc_device::mc1502_wd17xx_aux_w(UINT8 data)
+{
+ floppy_image_device *floppy0 = m_fdc->subdevice<floppy_connector>("0")->get_device();
+ floppy_image_device *floppy1 = m_fdc->subdevice<floppy_connector>("1")->get_device();
+ floppy_image_device *floppy = ((data & 0x10)?floppy1:floppy0);
+
+ // master reset
+ if((data & 1) == 0)
+ m_fdc->reset();
+
+ m_fdc->set_floppy(floppy);
+
+ // SIDE ONE
+ floppy->ss_w((data & 2)?1:0);
+
+ // bits 2, 3 -- motor on (drive 0, 1)
+ floppy0->mon_w(!(data & 4));
+ floppy1->mon_w(!(data & 8));
+
+ if (data & 12) {
+ motor_timer->adjust(attotime::from_msec( 3000 ));
+ motor_on = 1;
+ }
+
+}
+
+/*
+ * Accesses to this port block (halt the CPU until DRQ, INTRQ or MOTOR ON)
+ */
+UINT8 mc1502_fdc_device::mc1502_wd17xx_drq_r()
+{
+ cpu_device *maincpu = machine().device<cpu_device>("maincpu");
+
+ if (!m_fdc->drq_r() && !m_fdc->intrq_r()) {
+ // fake cpu wait by resetting PC one insn back
+ maincpu->set_state_int(I8086_IP, maincpu->state_int(I8086_IP) - 1);
+ maincpu->set_input_line(INPUT_LINE_HALT, ASSERT_LINE);
+ }
+
+ return m_fdc->drq_r();
+}
+
+UINT8 mc1502_fdc_device::mc1502_wd17xx_motor_r()
+{
+ return motor_on;
+}
+
+void mc1502_fdc_device::mc1502_fdc_irq_drq(bool state)
+{
+ cpu_device *maincpu = machine().device<cpu_device>("maincpu");
+
+ if(state)
+ maincpu->set_input_line(INPUT_LINE_HALT, CLEAR_LINE);
+}
+
+static READ8_DEVICE_HANDLER( mc1502_FDC_r )
+{
+ UINT8 data = 0xff;
+ mc1502_fdc_device *fdc = downcast<mc1502_fdc_device *>(device);
+
+ switch( offset )
+ {
+ case 0: data = fdc->mc1502_wd17xx_aux_r(); break;
+ case 8: data = fdc->mc1502_wd17xx_drq_r(); break;
+ case 10: data = fdc->mc1502_wd17xx_motor_r(); break;
+ }
+
+ return data;
+}
+
+static WRITE8_DEVICE_HANDLER( mc1502_FDC_w )
+{
+ mc1502_fdc_device *fdc = downcast<mc1502_fdc_device *>(device);
+
+ switch( offset )
+ {
+ case 0: fdc->mc1502_wd17xx_aux_w(data); break;
+ }
+}
+
+//-------------------------------------------------
+// mc1502_fdc_device - constructor
+//-------------------------------------------------
+
+mc1502_fdc_device::mc1502_fdc_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
+ device_t(mconfig, MC1502_FDC, "MC-1502 floppy", tag, owner, clock, "mc1502_fdc", __FILE__),
+ device_isa8_card_interface( mconfig, *this ),
+ m_fdc(*this, "fdc")
+{
+}
+
+#if 0
+ AM_RANGE(0x004c, 0x004c) AM_READWRITE(mc1502_wd17xx_aux_r, mc1502_wd17xx_aux_w)
+ AM_RANGE(0x004d, 0x004d) AM_READ(mc1502_wd17xx_motor_r)
+ AM_RANGE(0x004e, 0x004e) AM_READ(mc1502_wd17xx_drq_r) // blocking read!
+ AM_RANGE(0x0048, 0x004b) AM_DEVREADWRITE("vg93", fd1793_t, read, write)
+
+ AM_RANGE(0x0100, 0x0100) AM_READWRITE(mc1502_wd17xx_aux_r, mc1502_wd17xx_aux_w)
+ AM_RANGE(0x0108, 0x0108) AM_READ(mc1502_wd17xx_drq_r) // blocking read!
+ AM_RANGE(0x010a, 0x010a) AM_READ(mc1502_wd17xx_motor_r)
+ AM_RANGE(0x010c, 0x010f) AM_DEVREADWRITE("vg93", fd1793_t, read, write)
+#endif
+
+//-------------------------------------------------
+// device_start - device-specific startup
+//-------------------------------------------------
+
+void mc1502_fdc_device::device_start()
+{
+ set_isa_device();
+
+ // BIOS 5.0, 5.2
+ m_isa->install_device(0x010c, 0x010f, 0, 0,
+ READ8_DEVICE_DELEGATE(m_fdc, fd1793_t, read),
+ WRITE8_DEVICE_DELEGATE(m_fdc, fd1793_t, write) );
+ m_isa->install_device(this, 0x0100, 0x010b, 0, 0, FUNC(mc1502_FDC_r), FUNC(mc1502_FDC_w) );
+ // BIOS 5.31, 5.33
+/*
+ m_isa->install_device(0x010c, 0x010f, 0, 0,
+ READ8_DEVICE_DELEGATE(m_fdc, fd1793_t, read),
+ WRITE8_DEVICE_DELEGATE(m_fdc, fd1793_t, write) );
+ m_isa->install_device(this, 0x0100, 0x010b, 0, 0, FUNC(mc1502_FDC_r), FUNC(mc1502_FDC_w) );
+*/
+ m_fdc->setup_drq_cb(fd1793_t::line_cb(FUNC(mc1502_fdc_device::mc1502_fdc_irq_drq), this));
+ m_fdc->setup_intrq_cb(fd1793_t::line_cb(FUNC(mc1502_fdc_device::mc1502_fdc_irq_drq), this));
+
+ motor_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(mc1502_fdc_device::motor_callback),this));
+ motor_on = 0;
+}
+
+
+//-------------------------------------------------
+// device_reset - device-specific reset
+//-------------------------------------------------
+
+void mc1502_fdc_device::device_reset()
+{
+}
diff --git a/src/mess/machine/mc1502_fdc.h b/src/mess/machine/mc1502_fdc.h
new file mode 100644
index 00000000000..af5832e2d4c
--- /dev/null
+++ b/src/mess/machine/mc1502_fdc.h
@@ -0,0 +1,66 @@
+// license:BSD-3-Clause
+// copyright-holders:XXX
+/**********************************************************************
+
+ Electronika MC 1502 FDC device
+
+ Copyright MESS Team.
+ Visit http://mamedev.org for licensing and usage restrictions.
+
+**********************************************************************/
+
+#pragma once
+
+#ifndef __MC1502_FDC__
+#define __MC1502_FDC__
+
+#include "emu.h"
+
+#include "imagedev/flopdrv.h"
+#include "machine/isa.h"
+#include "machine/wd_fdc.h"
+
+//**************************************************************************
+// TYPE DEFINITIONS
+//**************************************************************************
+
+class mc1502_fdc_device : public device_t,
+ public device_isa8_card_interface
+{
+public:
+ // construction/destruction
+ mc1502_fdc_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+
+ // optional information overrides
+ virtual machine_config_constructor device_mconfig_additions() const;
+ virtual const rom_entry *device_rom_region() const;
+
+ DECLARE_FLOPPY_FORMATS( floppy_formats );
+ TIMER_CALLBACK_MEMBER( motor_callback );
+
+
+protected:
+ // device-level overrides
+ virtual void device_start();
+ virtual void device_reset();
+
+private:
+ required_device<fd1793_t> m_fdc;
+ int motor_on;
+ emu_timer *motor_timer;
+
+public:
+ void mc1502_wd17xx_aux_w(UINT8 data);
+ UINT8 mc1502_wd17xx_aux_r();
+ UINT8 mc1502_wd17xx_drq_r();
+ UINT8 mc1502_wd17xx_motor_r();
+ void mc1502_fdc_irq_drq(bool state);
+
+};
+
+
+// device type definition
+extern const device_type MC1502_FDC;
+
+
+#endif
diff --git a/src/mess/machine/mc1502_rom.c b/src/mess/machine/mc1502_rom.c
new file mode 100644
index 00000000000..6dfc16f7799
--- /dev/null
+++ b/src/mess/machine/mc1502_rom.c
@@ -0,0 +1,74 @@
+// license:BSD-3-Clause
+// copyright-holders:XXX
+/**********************************************************************
+
+ MC-1502 ROM cartridge device
+
+ Copyright MESS Team.
+ Visit http://mamedev.org for licensing and usage restrictions.
+
+**********************************************************************/
+
+#include "mc1502_rom.h"
+
+
+//**************************************************************************
+// DEVICE DEFINITIONS
+//**************************************************************************
+
+const device_type MC1502_ROM = &device_creator<mc1502_rom_device>;
+
+
+//-------------------------------------------------
+// ROM( mc1502_rom )
+//-------------------------------------------------
+
+ROM_START( mc1502_rom )
+ ROM_REGION( 0x8000, "mc1502_rom", 0 )
+ ROM_LOAD( "basic.rom", 0x00000, 0x8000, CRC(173d69fa) SHA1(003f872e12f00800e22ab6bbc009d36bfde67b9d))
+ROM_END
+
+
+//-------------------------------------------------
+// rom_region - device-specific ROM region
+//-------------------------------------------------
+
+const rom_entry *mc1502_rom_device::device_rom_region() const
+{
+ return ROM_NAME( mc1502_rom );
+}
+
+
+//**************************************************************************
+// LIVE DEVICE
+//**************************************************************************
+
+//-------------------------------------------------
+// mc1502_rom_device - constructor
+//-------------------------------------------------
+
+mc1502_rom_device::mc1502_rom_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
+ device_t(mconfig, MC1502_ROM, "MC-1502 ROM cart", tag, owner, clock, "mc1502_rom", __FILE__),
+ device_isa8_card_interface( mconfig, *this )
+{
+}
+
+
+//-------------------------------------------------
+// device_start - device-specific startup
+//-------------------------------------------------
+
+void mc1502_rom_device::device_start()
+{
+ set_isa_device();
+ m_isa->install_rom(this, 0xe8000, 0xeffff, 0, 0, "XXX", "mc1502_rom");
+}
+
+
+//-------------------------------------------------
+// device_reset - device-specific reset
+//-------------------------------------------------
+
+void mc1502_rom_device::device_reset()
+{
+}
diff --git a/src/mess/machine/mc1502_rom.h b/src/mess/machine/mc1502_rom.h
new file mode 100644
index 00000000000..a8fa2a2e771
--- /dev/null
+++ b/src/mess/machine/mc1502_rom.h
@@ -0,0 +1,45 @@
+// license:BSD-3-Clause
+// copyright-holders:XXX
+/**********************************************************************
+
+ MC-1502 ROM cartridge device
+
+ Copyright MESS Team.
+ Visit http://mamedev.org for licensing and usage restrictions.
+
+**********************************************************************/
+
+#pragma once
+
+#ifndef __MC1502_ROM__
+#define __MC1502_ROM__
+
+#include "emu.h"
+#include "machine/isa.h"
+
+//**************************************************************************
+// TYPE DEFINITIONS
+//**************************************************************************
+
+class mc1502_rom_device : public device_t,
+ public device_isa8_card_interface
+{
+public:
+ // construction/destruction
+ mc1502_rom_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+
+ // optional information overrides
+ virtual const rom_entry *device_rom_region() const;
+
+protected:
+ // device-level overrides
+ virtual void device_start();
+ virtual void device_reset();
+};
+
+
+// device type definition
+extern const device_type MC1502_ROM;
+
+
+#endif
diff --git a/src/mess/machine/p1_fdc.c b/src/mess/machine/p1_fdc.c
new file mode 100644
index 00000000000..ef24a4de48f
--- /dev/null
+++ b/src/mess/machine/p1_fdc.c
@@ -0,0 +1,214 @@
+// license:BSD-3-Clause
+// copyright-holders:XXX
+/**********************************************************************
+
+ Poisk-1 FDC device (model B504)
+
+ Copyright MESS Team.
+ Visit http://mamedev.org for licensing and usage restrictions.
+
+**********************************************************************/
+
+#include "p1_fdc.h"
+
+#include "cpu/i86/i86.h"
+#include "formats/dsk_dsk.h"
+#include "formats/pc_dsk.h"
+
+#define VERBOSE_DBG 0
+
+#define DBG_LOG(N,M,A) \
+ do { \
+ if(VERBOSE_DBG>=N) \
+ { \
+ if( M ) \
+ logerror("%11.6f: %-24s",machine().time().as_double(),(char*)M ); \
+ logerror A; \
+ } \
+ } while (0)
+
+
+//**************************************************************************
+// DEVICE DEFINITIONS
+//**************************************************************************
+
+const device_type P1_FDC = &device_creator<p1_fdc_device>;
+
+static DECLARE_READ8_DEVICE_HANDLER(p1_FDC_r);
+static DECLARE_WRITE8_DEVICE_HANDLER(p1_FDC_w);
+
+FLOPPY_FORMATS_MEMBER( p1_fdc_device::floppy_formats )
+ FLOPPY_PC_FORMAT,
+ FLOPPY_DSK_FORMAT
+FLOPPY_FORMATS_END
+
+static SLOT_INTERFACE_START( poisk1_floppies )
+ SLOT_INTERFACE( "525qd", FLOPPY_525_QD )
+SLOT_INTERFACE_END
+
+static MACHINE_CONFIG_FRAGMENT( fdc_b504 )
+ MCFG_FD1793x_ADD("fdc", XTAL_16MHz / 16)
+ MCFG_FLOPPY_DRIVE_ADD("fdc:0", poisk1_floppies, "525qd", p1_fdc_device::floppy_formats)
+ MCFG_FLOPPY_DRIVE_ADD("fdc:1", poisk1_floppies, "525qd", p1_fdc_device::floppy_formats)
+MACHINE_CONFIG_END
+
+//-------------------------------------------------
+// ROM( p1_fdc )
+//-------------------------------------------------
+
+ROM_START( p1_fdc )
+ ROM_REGION( 0x0800, "p1_fdc", 0 )
+ ROM_DEFAULT_BIOS("a302")
+ ROM_SYSTEM_BIOS(0, "normal", "B504 standard ROM")
+ ROMX_LOAD( "b_ngmd_n.rf2", 0x00000, 0x0800, CRC(967e172a) SHA1(95117c40fd9f624fee08ccf37f615b16ff249688), ROM_BIOS(1))
+ ROM_SYSTEM_BIOS(1, "a302", "v3.02") // Additional ROM BIOS v3.02 for DISKETTE service (c) Moscow 1991
+ ROMX_LOAD( "b_ngmd_t.rf2", 0x00000, 0x0800, CRC(630010b1) SHA1(50876fe4f5f4f32a242faa70f9154574cd315ec4), ROM_BIOS(2))
+ ROM_SYSTEM_BIOS(2, "ae304", "v3.04") // Additional enhanced ROM BIOS v3.04 for DISKETTE service (c) V.Rusakow Moscow 1992
+ ROMX_LOAD( "p_fdd_nm.bin", 0x00000, 0x0800, CRC(0b7f867d) SHA1(9fe7e0ab2242e50394d1162cf1a619b6f2994bfb), ROM_BIOS(3))
+ ROM_SYSTEM_BIOS(3, "ae308", "v3.08") // Additional enhanced ROM BIOS v3.08 for DISKETTE service (c) V.Rusakov Tarasovka 1992
+ ROMX_LOAD( "p_fdd_my.bin", 0x00000, 0x0800, CRC(da5d0eaf) SHA1(b188ba856bd28e4964a88feb0b0b2ba7eb320efc), ROM_BIOS(4))
+ROM_END
+
+
+//-------------------------------------------------
+// machine_config_additions - device-specific
+// machine configurations
+//-------------------------------------------------
+
+machine_config_constructor p1_fdc_device::device_mconfig_additions() const
+{
+ return MACHINE_CONFIG_NAME( fdc_b504 );
+}
+
+//-------------------------------------------------
+// rom_region - device-specific ROM region
+//-------------------------------------------------
+
+const rom_entry *p1_fdc_device::device_rom_region() const
+{
+ return ROM_NAME( p1_fdc );
+}
+
+
+//**************************************************************************
+// LIVE DEVICE
+//**************************************************************************
+
+UINT8 p1_fdc_device::p1_wd17xx_motor_r()
+{
+ DBG_LOG(1,"p1_fdc_motor_r",("R = $%02x\n", 0));
+ // XXX always on for now
+ return 0;
+}
+
+UINT8 p1_fdc_device::p1_wd17xx_aux_r()
+{
+ cpu_device *maincpu = machine().device<cpu_device>("maincpu");
+
+ if (!m_fdc->drq_r() && !m_fdc->intrq_r()) {
+ // fake cpu wait by resetting PC one insn back
+ maincpu->set_state_int(I8086_IP, maincpu->state_int(I8086_IP) - 2);
+ maincpu->set_input_line(INPUT_LINE_HALT, ASSERT_LINE);
+ }
+
+ return m_fdc->drq_r();
+}
+
+/*
+; D0 - DRIVE SELECT 0
+; D1 - DRIVE SELECT 1
+; D2 - MOTOR ON 0
+; D3 - MOTOR ON 1
+; D4 - SIDE (HEAD) SELECT
+; D5 - DOUBLE DENSITY
+; D6 - FDC RESET
+; D7 - NO USE
+*/
+void p1_fdc_device::p1_wd17xx_aux_w(int data)
+{
+ DBG_LOG(1,"p1_fdc_aux_w",("W $%02x\n", data));
+
+ floppy_image_device *floppy0 = m_fdc->subdevice<floppy_connector>("0")->get_device();
+ floppy_image_device *floppy1 = m_fdc->subdevice<floppy_connector>("1")->get_device();
+ floppy_image_device *floppy = ((data & 2)?floppy1:floppy0);
+
+ if(!BIT(data, 6))
+ m_fdc->reset();
+
+ m_fdc->set_floppy(floppy);
+
+ floppy->ss_w(BIT(data, 4));
+ m_fdc->dden_w(BIT(data, 5));
+
+ floppy0->mon_w(!(data & 4));
+ floppy1->mon_w(!(data & 8));
+}
+
+void p1_fdc_device::p1_fdc_irq_drq(bool state)
+{
+ cpu_device *maincpu = machine().device<cpu_device>("maincpu");
+
+ if(state)
+ maincpu->set_input_line(INPUT_LINE_HALT, CLEAR_LINE);
+}
+
+static READ8_DEVICE_HANDLER( p1_FDC_r )
+{
+ UINT8 data = 0xff;
+ p1_fdc_device *fdc = downcast<p1_fdc_device *>(device);
+
+ switch( offset )
+ {
+ case 0: data = fdc->p1_wd17xx_aux_r(); break;
+ case 2: data = fdc->p1_wd17xx_motor_r(); break;
+ }
+
+ return data;
+}
+
+static WRITE8_DEVICE_HANDLER( p1_FDC_w )
+{
+ p1_fdc_device *fdc = downcast<p1_fdc_device *>(device);
+
+ switch( offset )
+ {
+ case 0: fdc->p1_wd17xx_aux_w(data); break;
+ }
+}
+
+//-------------------------------------------------
+// p1_fdc_device - constructor
+//-------------------------------------------------
+
+p1_fdc_device::p1_fdc_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
+ device_t(mconfig, P1_FDC, "Poisk-1 floppy B504", tag, owner, clock, "p1_fdc", __FILE__),
+ device_isa8_card_interface( mconfig, *this ),
+ m_fdc(*this, "fdc")
+{
+}
+
+
+//-------------------------------------------------
+// device_start - device-specific startup
+//-------------------------------------------------
+
+void p1_fdc_device::device_start()
+{
+ set_isa_device();
+ m_isa->install_rom(this, 0xe0000, 0xe07ff, 0, 0, "XXX", "p1_fdc");
+ m_isa->install_device(0x00c0, 0x00c3, 0, 0,
+ READ8_DEVICE_DELEGATE(m_fdc, fd1793_t, read),
+ WRITE8_DEVICE_DELEGATE(m_fdc, fd1793_t, write) );
+ m_isa->install_device(this, 0x00c4, 0x00c7, 0, 0, FUNC(p1_FDC_r), FUNC(p1_FDC_w) );
+ m_fdc->setup_drq_cb(fd1793_t::line_cb(FUNC(p1_fdc_device::p1_fdc_irq_drq), this));
+ m_fdc->setup_intrq_cb(fd1793_t::line_cb(FUNC(p1_fdc_device::p1_fdc_irq_drq), this));
+}
+
+
+//-------------------------------------------------
+// device_reset - device-specific reset
+//-------------------------------------------------
+
+void p1_fdc_device::device_reset()
+{
+}
diff --git a/src/mess/machine/p1_fdc.h b/src/mess/machine/p1_fdc.h
new file mode 100644
index 00000000000..b6ad7457546
--- /dev/null
+++ b/src/mess/machine/p1_fdc.h
@@ -0,0 +1,61 @@
+// license:BSD-3-Clause
+// copyright-holders:XXX
+/**********************************************************************
+
+ Poisk-1 FDC device (model B504)
+
+ Copyright MESS Team.
+ Visit http://mamedev.org for licensing and usage restrictions.
+
+**********************************************************************/
+
+#pragma once
+
+#ifndef __P1_FDC__
+#define __P1_FDC__
+
+#include "emu.h"
+
+#include "imagedev/flopdrv.h"
+#include "machine/isa.h"
+#include "machine/wd_fdc.h"
+
+//**************************************************************************
+// TYPE DEFINITIONS
+//**************************************************************************
+
+class p1_fdc_device : public device_t,
+ public device_isa8_card_interface
+{
+public:
+ // construction/destruction
+ p1_fdc_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+
+ // optional information overrides
+ virtual machine_config_constructor device_mconfig_additions() const;
+ virtual const rom_entry *device_rom_region() const;
+
+ DECLARE_FLOPPY_FORMATS( floppy_formats );
+
+protected:
+ // device-level overrides
+ virtual void device_start();
+ virtual void device_reset();
+
+private:
+ required_device<fd1793_t> m_fdc;
+
+public:
+ void p1_wd17xx_aux_w(int data);
+ UINT8 p1_wd17xx_aux_r();
+ UINT8 p1_wd17xx_motor_r();
+ void p1_fdc_irq_drq(bool state);
+
+};
+
+
+// device type definition
+extern const device_type P1_FDC;
+
+
+#endif
diff --git a/src/mess/machine/p1_hdc.c b/src/mess/machine/p1_hdc.c
new file mode 100644
index 00000000000..3ea7f972a78
--- /dev/null
+++ b/src/mess/machine/p1_hdc.c
@@ -0,0 +1,159 @@
+// license:BSD-3-Clause
+// copyright-holders:XXX
+/**********************************************************************
+
+ Poisk-1 HDC device (model B942)
+
+ Copyright MESS Team.
+ Visit http://mamedev.org for licensing and usage restrictions.
+
+**********************************************************************/
+
+#include "p1_hdc.h"
+
+
+//**************************************************************************
+// MACROS / CONSTANTS
+//**************************************************************************
+
+#define VERBOSE_DBG 1
+
+#define DBG_LOG(N,M,A) \
+ do { \
+ if(VERBOSE_DBG>=N) \
+ { \
+ if( M ) \
+ logerror("%11.6f: %-24s",machine().time().as_double(),(char*)M ); \
+ logerror A; \
+ } \
+ } while (0)
+
+#define KM1809VG7_TAG "d17"
+
+
+//**************************************************************************
+// DEVICE DEFINITIONS
+//**************************************************************************
+
+const device_type P1_HDC = &device_creator<p1_hdc_device>;
+
+static WD2010_INTERFACE( hdc_intf )
+{
+ DEVCB_NULL,
+ DEVCB_NULL,
+ DEVCB_NULL,
+ DEVCB_NULL,
+ DEVCB_NULL,
+ DEVCB_NULL,
+ DEVCB_NULL,
+ DEVCB_NULL,
+ DEVCB_LINE_VCC,
+ DEVCB_LINE_VCC,
+ DEVCB_LINE_VCC,
+ DEVCB_LINE_VCC,
+ DEVCB_LINE_VCC
+};
+
+static MACHINE_CONFIG_FRAGMENT( hdc_b942 )
+ MCFG_WD2010_ADD(KM1809VG7_TAG, 5000000, hdc_intf) // XXX clock?
+
+ MCFG_HARDDISK_ADD("hard0")
+ MCFG_HARDDISK_ADD("hard1")
+MACHINE_CONFIG_END
+
+
+//-------------------------------------------------
+// ROM( p1_hdc )
+//-------------------------------------------------
+
+ROM_START( p1_hdc )
+ ROM_REGION( 0x0800, "p1_hdc", 0 )
+ ROM_DEFAULT_BIOS("v14")
+ ROM_SYSTEM_BIOS(0, "v11", "ver 1.1")
+ ROMX_LOAD( "b_hd_v11.rf2", 0x00000, 0x0800, CRC(a19c39b2) SHA1(57faa56b320abf801fedbed578cf97d253e5b777), ROM_BIOS(1))
+ ROM_SYSTEM_BIOS(1, "v12", "ver 1.2")
+ ROMX_LOAD( "p_hdd_nm.bin", 0x00000, 0x0800, CRC(d5f8e4cc) SHA1(5b533642df30958539715f87a7f25b0d66dd0861), ROM_BIOS(2))
+ ROM_SYSTEM_BIOS(2, "v14", "ver 1.4") // (c) `.lesnyh. , 1992
+ ROMX_LOAD( "b942_5mb.bin", 0x00000, 0x0800, CRC(a3cfa240) SHA1(0b0aa1ce839a957153bfbbe70310480ca9fe21b6), ROM_BIOS(3))
+ROM_END
+
+
+//-------------------------------------------------
+// machine_config_additions - device-specific
+// machine configurations
+//-------------------------------------------------
+
+machine_config_constructor p1_hdc_device::device_mconfig_additions() const
+{
+ return MACHINE_CONFIG_NAME( hdc_b942 );
+}
+
+
+//-------------------------------------------------
+// rom_region - device-specific ROM region
+//-------------------------------------------------
+
+const rom_entry *p1_hdc_device::device_rom_region() const
+{
+ return ROM_NAME( p1_hdc );
+}
+
+
+//**************************************************************************
+// LIVE DEVICE
+//**************************************************************************
+
+
+READ8_MEMBER(p1_hdc_device::p1_HDC_r)
+{
+ UINT8 data = 0x00;
+
+ switch (offset >> 8) {
+ case 8: data = m_hdc->read(space, offset & 255);
+ }
+ DBG_LOG(1,"hdc",("R $%04x == $%02x\n", offset, data));
+
+ return data;
+}
+
+WRITE8_MEMBER(p1_hdc_device::p1_HDC_w)
+{
+ DBG_LOG(1,"hdc",("W $%04x <- $%02x\n", offset, data));
+ switch (offset >> 8) {
+ case 8: m_hdc->write(space, offset & 255, data, 0);
+ }
+}
+
+//-------------------------------------------------
+// p1_hdc_device - constructor
+//-------------------------------------------------
+
+p1_hdc_device::p1_hdc_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
+ device_t(mconfig, P1_HDC, "Poisk-1 MFM disk B942", tag, owner, clock, "p1_hdc", __FILE__),
+ device_isa8_card_interface( mconfig, *this ),
+ m_hdc(*this, KM1809VG7_TAG)
+{
+}
+
+
+//-------------------------------------------------
+// device_start - device-specific startup
+//-------------------------------------------------
+
+void p1_hdc_device::device_start()
+{
+ set_isa_device();
+ m_isa->install_rom(this, 0xe2000, 0xe27ff, 0, 0, "XXX", "p1_hdc");
+ m_isa->install_memory(0xd0000, 0xd0fff, 0, 0,
+ READ8_DELEGATE(p1_hdc_device, p1_HDC_r),
+ WRITE8_DELEGATE(p1_hdc_device, p1_HDC_w) );
+}
+
+
+//-------------------------------------------------
+// device_reset - device-specific reset
+//-------------------------------------------------
+
+void p1_hdc_device::device_reset()
+{
+}
diff --git a/src/mess/machine/p1_hdc.h b/src/mess/machine/p1_hdc.h
new file mode 100644
index 00000000000..f626c3a31fd
--- /dev/null
+++ b/src/mess/machine/p1_hdc.h
@@ -0,0 +1,58 @@
+// license:BSD-3-Clause
+// copyright-holders:XXX
+/**********************************************************************
+
+ Poisk-1 HDC device (model B942)
+
+ Copyright MESS Team.
+ Visit http://mamedev.org for licensing and usage restrictions.
+
+**********************************************************************/
+
+#pragma once
+
+#ifndef __P1_HDC__
+#define __P1_HDC__
+
+#include "emu.h"
+
+#include "imagedev/harddriv.h"
+#include "machine/isa.h"
+#include "machine/wd2010.h"
+
+//**************************************************************************
+// TYPE DEFINITIONS
+//**************************************************************************
+
+class p1_hdc_device : public device_t,
+ public device_isa8_card_interface
+{
+public:
+ // construction/destruction
+ p1_hdc_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+
+ // optional information overrides
+ virtual machine_config_constructor device_mconfig_additions() const;
+ virtual const rom_entry *device_rom_region() const;
+
+protected:
+ // device-level overrides
+ virtual void device_start();
+ virtual void device_reset();
+
+private:
+ required_device<wd2010_device> m_hdc;
+
+ UINT8 m_ram[0x800];
+
+public:
+ DECLARE_READ8_MEMBER(p1_HDC_r);
+ DECLARE_WRITE8_MEMBER(p1_HDC_w);
+};
+
+
+// device type definition
+extern const device_type P1_HDC;
+
+
+#endif
diff --git a/src/mess/machine/p1_rom.c b/src/mess/machine/p1_rom.c
new file mode 100644
index 00000000000..4da8ca0f89d
--- /dev/null
+++ b/src/mess/machine/p1_rom.c
@@ -0,0 +1,79 @@
+// license:BSD-3-Clause
+// copyright-holders:XXX
+/**********************************************************************
+
+ Poisk-1 ROM cartridge device
+
+ Copyright MESS Team.
+ Visit http://mamedev.org for licensing and usage restrictions.
+
+**********************************************************************/
+
+#include "p1_rom.h"
+
+
+//**************************************************************************
+// DEVICE DEFINITIONS
+//**************************************************************************
+
+const device_type P1_ROM = &device_creator<p1_rom_device>;
+
+
+//-------------------------------------------------
+// ROM( p1_rom )
+//-------------------------------------------------
+
+ROM_START( p1_rom )
+ ROM_REGION( 0x2000, "p1_rom", 0 )
+ ROM_SYSTEM_BIOS(0, "ram", "Test 3 -- RAM test")
+ ROMX_LOAD( "p1_t_ram.rf4", 0x00000, 0x2000, CRC(e42f5a61) SHA1(ce2554eae8f0d2b6d482890dd198cf7e2d29c655), ROM_BIOS(1))
+ ROM_SYSTEM_BIOS(1, "io", "Test 4 -- I/O test")
+ ROMX_LOAD( "p1_t_i_o.rf4", 0x00000, 0x2000, CRC(18a781de) SHA1(7267970ee27e3ea1d972bee8e74b17bac1051619), ROM_BIOS(2))
+ ROM_SYSTEM_BIOS(2, "pls", "\"MB test\"")
+ ROMX_LOAD( "p1_t_pls.rf4", 0x00000, 0x2000, CRC(c8210ffb) SHA1(f2d1a6c90e4708bcc56186b2fb906fa852667084), ROM_BIOS(3))
+ROM_END
+
+
+//-------------------------------------------------
+// rom_region - device-specific ROM region
+//-------------------------------------------------
+
+const rom_entry *p1_rom_device::device_rom_region() const
+{
+ return ROM_NAME( p1_rom );
+}
+
+
+//**************************************************************************
+// LIVE DEVICE
+//**************************************************************************
+
+//-------------------------------------------------
+// p1_rom_device - constructor
+//-------------------------------------------------
+
+p1_rom_device::p1_rom_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
+ device_t(mconfig, P1_ROM, "Poisk-1 ROM cart", tag, owner, clock, "p1_rom", __FILE__),
+ device_isa8_card_interface( mconfig, *this )
+{
+}
+
+
+//-------------------------------------------------
+// device_start - device-specific startup
+//-------------------------------------------------
+
+void p1_rom_device::device_start()
+{
+ set_isa_device();
+ m_isa->install_rom(this, 0xc0000, 0xc1fff, 0, 0, "XXX", "p1_rom");
+}
+
+
+//-------------------------------------------------
+// device_reset - device-specific reset
+//-------------------------------------------------
+
+void p1_rom_device::device_reset()
+{
+}
diff --git a/src/mess/machine/p1_rom.h b/src/mess/machine/p1_rom.h
new file mode 100644
index 00000000000..022ba6a6c7c
--- /dev/null
+++ b/src/mess/machine/p1_rom.h
@@ -0,0 +1,45 @@
+// license:BSD-3-Clause
+// copyright-holders:XXX
+/**********************************************************************
+
+ Poisk-1 ROM cartridge device
+
+ Copyright MESS Team.
+ Visit http://mamedev.org for licensing and usage restrictions.
+
+**********************************************************************/
+
+#pragma once
+
+#ifndef __P1_ROM__
+#define __P1_ROM__
+
+#include "emu.h"
+#include "machine/isa.h"
+
+//**************************************************************************
+// TYPE DEFINITIONS
+//**************************************************************************
+
+class p1_rom_device : public device_t,
+ public device_isa8_card_interface
+{
+public:
+ // construction/destruction
+ p1_rom_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
+
+ // optional information overrides
+ virtual const rom_entry *device_rom_region() const;
+
+protected:
+ // device-level overrides
+ virtual void device_start();
+ virtual void device_reset();
+};
+
+
+// device type definition
+extern const device_type P1_ROM;
+
+
+#endif
diff --git a/src/mess/machine/pc.c b/src/mess/machine/pc.c
index e26f60fd427..c57d69d98f0 100644
--- a/src/mess/machine/pc.c
+++ b/src/mess/machine/pc.c
@@ -17,7 +17,6 @@
#include "machine/i8255.h"
#include "machine/ins8250.h"
-#include "machine/i8251.h"
#include "machine/mc146818.h"
#include "machine/pic8259.h"
@@ -66,87 +65,6 @@
} \
} while (0)
-/*
- * EC-1841 memory controller. The machine can hold four memory boards;
- * each board has a control register, its address is set by a DIP switch
- * on the board itself.
- *
- * Only one board should be enabled for read, and one for write.
- * Normally, this is the same board.
- *
- * Each board is divided into 4 banks, internally numbererd 0..3.
- * POST tests each board on startup, and an error (indicated by
- * I/O CH CK bus signal) causes it to disable failing bank(s) by writing
- * 'reconfiguration code' (inverted number of failing memory bank) to
- * the register.
-
- * bit 1-0 'reconfiguration code'
- * bit 2 enable read access
- * bit 3 enable write access
- */
-
-READ8_MEMBER(pc_state::ec1841_memboard_r)
-{
- pc_state *st = space.machine().driver_data<pc_state>();
- UINT8 data;
-
- data = offset % 4;
- if (data > m_memboards)
- data = 0xff;
- else
- data = st->m_memboard[data];
- DBG_LOG(1,"ec1841_memboard",("R (%d of %d) == %02X\n", offset, m_memboards, data ));
-
- return data;
-}
-
-WRITE8_MEMBER(pc_state::ec1841_memboard_w)
-{
- pc_state *st = space.machine().driver_data<pc_state>();
- address_space &program = st->m_maincpu->space(AS_PROGRAM);
- UINT8 current;
-
- current = st->m_memboard[offset];
-
- DBG_LOG(1,"ec1841_memboard",("W (%d of %d) <- %02X (%02X)\n", offset, m_memboards, data, current));
-
- if (offset > m_memboards) {
- return;
- }
-
- if (BIT(current, 2) && !BIT(data, 2)) {
- // disable read access
- program.unmap_read(0, 0x7ffff);
- DBG_LOG(1,"ec1841_memboard_w",("unmap_read(%d)\n", offset));
- }
-
- if (BIT(current, 3) && !BIT(data, 3)) {
- // disable write access
- program.unmap_write(0, 0x7ffff);
- DBG_LOG(1,"ec1841_memboard_w",("unmap_write(%d)\n", offset));
- }
-
- if (!BIT(current, 2) && BIT(data, 2)) {
- for(int i=0; i<4; i++)
- st->m_memboard[i] &= 0xfb;
- // enable read access
- membank("bank10")->set_base(m_ram->pointer() + offset*0x80000);
- program.install_read_bank(0, 0x7ffff, "bank10");
- DBG_LOG(1,"ec1841_memboard_w",("map_read(%d)\n", offset));
- }
-
- if (!BIT(current, 3) && BIT(data, 3)) {
- for(int i=0; i<4; i++)
- st->m_memboard[i] &= 0xf7;
- // enable write access
- membank("bank20")->set_base(m_ram->pointer() + offset*0x80000);
- program.install_write_bank(0, 0x7ffff, "bank20");
- DBG_LOG(1,"ec1841_memboard_w",("map_write(%d)\n", offset));
- }
-
- st->m_memboard[offset] = data;
-}
-
/*************************************************************************
*
* PC DMA stuff
@@ -421,51 +339,6 @@ const struct pit8253_interface pcjr_pit8253_config =
}
};
-/* MC1502 uses single XTAL for everything -- incl. CGA? check */
-
-const i8251_interface mc1502_i8251_interface =
-{
- /* XXX RxD data are accessible via PPI port C, bit 7 */
- DEVCB_NULL,
- DEVCB_NULL,
- DEVCB_NULL,
- DEVCB_DEVICE_LINE_MEMBER("pic8259", pic8259_device, ir7_w), /* default handler does nothing */
- DEVCB_DEVICE_LINE_MEMBER("pic8259", pic8259_device, ir7_w),
- DEVCB_NULL,
- DEVCB_NULL /* XXX SYNDET triggers NMI */
-};
-
-WRITE_LINE_MEMBER(pc_state::mc1502_pit8253_out1_changed)
-{
- machine().device<i8251_device>("upd8251")->txc_w(state);
- machine().device<i8251_device>("upd8251")->rxc_w(state);
-}
-
-WRITE_LINE_MEMBER(pc_state::mc1502_pit8253_out2_changed)
-{
- pc_speaker_set_input( state );
- m_cassette->output(state ? 1 : -1);
-}
-
-const struct pit8253_interface mc1502_pit8253_config =
-{
- {
- {
- XTAL_16MHz/12, /* heartbeat IRQ */
- DEVCB_NULL,
- DEVCB_DEVICE_LINE_MEMBER("pic8259", pic8259_device, ir0_w)
- }, {
- XTAL_16MHz/12, /* serial port */
- DEVCB_NULL,
- DEVCB_DRIVER_LINE_MEMBER(pc_state,mc1502_pit8253_out1_changed)
- }, {
- XTAL_16MHz/12, /* pio port c pin 4, and speaker polling enough */
- DEVCB_NULL,
- DEVCB_DRIVER_LINE_MEMBER(pc_state,mc1502_pit8253_out2_changed)
- }
- }
-};
-
/**********************************************************
*
* COM hardware
@@ -890,138 +763,6 @@ I8255_INTERFACE( pc_ppi8255_interface )
};
-static struct {
- UINT8 pulsing;
- UINT16 mask; /* input lines */
- emu_timer *keyb_signal_timer;
-} mc1502_keyb;
-
-
-/* check if any keys are pressed, raise IRQ1 if so */
-
-TIMER_CALLBACK_MEMBER(pc_state::mc1502_keyb_signal_callback)
-{
- UINT8 key = 0;
-
- key |= ioport("Y1")->read();
- key |= ioport("Y2")->read();
- key |= ioport("Y3")->read();
- key |= ioport("Y4")->read();
- key |= ioport("Y5")->read();
- key |= ioport("Y6")->read();
- key |= ioport("Y7")->read();
- key |= ioport("Y8")->read();
- key |= ioport("Y9")->read();
- key |= ioport("Y10")->read();
- key |= ioport("Y11")->read();
- key |= ioport("Y12")->read();
-// DBG_LOG(1,"mc1502_k_s_c",("= %02X (%d) %s\n", key, mc1502_keyb.pulsing,
-// (key || mc1502_keyb.pulsing) ? " will IRQ" : ""));
-
- /*
- If a key is pressed and we're not pulsing yet, start pulsing the IRQ1;
- keep pulsing while any key is pressed, and pulse one time after all keys
- are released.
- */
- if (key) {
- if (mc1502_keyb.pulsing < 2) {
- mc1502_keyb.pulsing += 2;
- }
- }
-
- if (mc1502_keyb.pulsing) {
- m_pic8259->ir1_w(mc1502_keyb.pulsing & 1);
- mc1502_keyb.pulsing--;
- }
-}
-
-WRITE8_MEMBER(pc_state::mc1502_ppi_porta_w)
-{
- m_centronics->write(space, 0, data);
-}
-
-WRITE8_MEMBER(pc_state::mc1502_ppi_portb_w)
-{
-// DBG_LOG(2,"mc1502_ppi_portb_w",("( %02X )\n", data));
- m_ppi_portb = data;
- machine().device<pit8253_device>("pit8253")->gate2_w(BIT(data, 0));
- pc_speaker_set_spkrdata(BIT(data, 1));
- m_centronics->strobe_w(BIT(data, 2));
- m_centronics->autofeed_w(BIT(data, 3));
- m_centronics->init_prime_w(BIT(data, 4));
-}
-
-READ8_MEMBER(pc_state::mc1502_kppi_portc_r)
-{
- UINT8 data = 0;
-
- data |= m_centronics->fault_r() << 4;
- data |= m_centronics->pe_r() << 5;
- data |= m_centronics->ack_r() << 6;
- data |= m_centronics->busy_r() << 7;
-
- return data;
-}
-
-READ8_MEMBER(pc_state::mc1502_ppi_portc_r)
-{
- int timer2_output = machine().device<pit8253_device>("pit8253")->get_output(2);
- int data = 0xff;
- double tap_val = m_cassette->input();
-
-// 0x80 -- serial RxD
-// 0x40 -- CASS IN, also loops back T2OUT (gated by CASWR)
- data = ( data & ~0x40 ) | ( tap_val < 0 ? 0x40 : 0x00 ) | ( (BIT(m_ppi_portb, 7) && timer2_output) ? 0x40 : 0x00 );
-// 0x20 -- T2OUT
- data = ( data & ~0x20 ) | ( timer2_output ? 0x20 : 0x00 );
-// 0x10 -- SNDOUT
- data = ( data & ~0x10 ) | ( (BIT(m_ppi_portb, 1) && timer2_output) ? 0x10 : 0x00 );
-
-// DBG_LOG(2,"mc1502_ppi_portc_r",("= %02X (tap_val %f t2out %d) at %s\n",
-// data, tap_val, timer2_output, machine().describe_context()));
- return data;
-}
-
-READ8_MEMBER(pc_state::mc1502_kppi_porta_r)
-{
- UINT8 key = 0;
-
- if (mc1502_keyb.mask & 0x0001) { key |= ioport("Y1")->read(); }
- if (mc1502_keyb.mask & 0x0002) { key |= ioport("Y2")->read(); }
- if (mc1502_keyb.mask & 0x0004) { key |= ioport("Y3")->read(); }
- if (mc1502_keyb.mask & 0x0008) { key |= ioport("Y4")->read(); }
- if (mc1502_keyb.mask & 0x0010) { key |= ioport("Y5")->read(); }
- if (mc1502_keyb.mask & 0x0020) { key |= ioport("Y6")->read(); }
- if (mc1502_keyb.mask & 0x0040) { key |= ioport("Y7")->read(); }
- if (mc1502_keyb.mask & 0x0080) { key |= ioport("Y8")->read(); }
- if (mc1502_keyb.mask & 0x0100) { key |= ioport("Y9")->read(); }
- if (mc1502_keyb.mask & 0x0200) { key |= ioport("Y10")->read(); }
- if (mc1502_keyb.mask & 0x0400) { key |= ioport("Y11")->read(); }
- if (mc1502_keyb.mask & 0x0800) { key |= ioport("Y12")->read(); }
- key ^= 0xff;
-// DBG_LOG(2,"mc1502_kppi_porta_r",("= %02X\n", key));
- return key;
-}
-
-WRITE8_MEMBER(pc_state::mc1502_kppi_portb_w)
-{
- mc1502_keyb.mask &= ~255;
- mc1502_keyb.mask |= data ^ 255;
- if (!BIT(data, 0))
- mc1502_keyb.mask |= 1 << 11;
- else
- mc1502_keyb.mask &= ~(1 << 11);
-// DBG_LOG(2,"mc1502_kppi_portb_w",("( %02X -> %04X )\n", data, mc1502_keyb.mask));
-}
-
-WRITE8_MEMBER(pc_state::mc1502_kppi_portc_w)
-{
- mc1502_keyb.mask &= ~(7 << 8);
- mc1502_keyb.mask |= ((data ^ 7) & 7) << 8;
-// DBG_LOG(2,"mc1502_kppi_portc_w",("( %02X -> %04X )\n", data, mc1502_keyb.mask));
-}
-
-
WRITE8_MEMBER(pc_state::pcjr_ppi_portb_w)
{
/* KB controller port B */
@@ -1105,26 +846,6 @@ I8255_INTERFACE( pcjr_ppi8255_interface )
DEVCB_NULL
};
-I8255_INTERFACE( mc1502_ppi8255_interface )
-{
- DEVCB_NULL,
- DEVCB_DRIVER_MEMBER(pc_state,mc1502_ppi_porta_w),
- DEVCB_NULL,
- DEVCB_DRIVER_MEMBER(pc_state,mc1502_ppi_portb_w),
- DEVCB_DRIVER_MEMBER(pc_state,mc1502_ppi_portc_r),
- DEVCB_NULL
-};
-
-I8255_INTERFACE( mc1502_ppi8255_interface_2 )
-{
- DEVCB_DRIVER_MEMBER(pc_state,mc1502_kppi_porta_r),
- DEVCB_NULL,
- DEVCB_NULL,
- DEVCB_DRIVER_MEMBER(pc_state,mc1502_kppi_portb_w),
- DEVCB_DRIVER_MEMBER(pc_state,mc1502_kppi_portc_r),
- DEVCB_DRIVER_MEMBER(pc_state,mc1502_kppi_portc_w)
-};
-
/**********************************************************
*
@@ -1247,71 +968,6 @@ READ8_MEMBER(pc_state::pcjx_port_1ff_r)
return 0x60; // expansion?
}
-/*
- * MC1502 uses a FD1793 clone instead of uPD765
- */
-
-READ8_MEMBER(pc_state::mc1502_wd17xx_aux_r)
-{
- UINT8 data;
-
- data = 0;
-
- return data;
-}
-
-WRITE8_MEMBER(pc_state::mc1502_wd17xx_aux_w)
-{
- fd1793_t *fdc = machine().device<fd1793_t>("vg93");
- floppy_image_device *floppy0 = machine().device<floppy_connector>("fd0")->get_device();
- floppy_image_device *floppy1 = machine().device<floppy_connector>("fd1")->get_device();
- floppy_image_device *floppy = ((data & 0x10)?floppy1:floppy0);
- fdc->set_floppy(floppy);
-
- // master reset
- if((data & 1) == 0)
- fdc->reset();
-
- // SIDE ONE
- floppy->ss_w((data & 2)?1:0);
-
- // bits 2, 3 -- motor on (drive 0, 1)
- floppy0->mon_w(!(data & 4));
- floppy1->mon_w(!(data & 8));
-}
-
-/*
- * Accesses to this port block (halt the CPU until DRQ, INTRQ or MOTOR ON)
- */
-READ8_MEMBER(pc_state::mc1502_wd17xx_drq_r)
-{
- fd1793_t *fdc = machine().device<fd1793_t>("vg93");
-
- if (!fdc->drq_r() && !fdc->intrq_r()) {
- /* fake cpu wait by resetting PC one insn back */
- m_maincpu->set_state_int(I8086_IP, m_maincpu->state_int(I8086_IP) - 1);
- m_maincpu->set_input_line(INPUT_LINE_HALT, ASSERT_LINE);
- }
-
- return fdc->drq_r();
-}
-
-void pc_state::mc1502_fdc_irq_drq(bool state)
-{
- if(state)
- m_maincpu->set_input_line(INPUT_LINE_HALT, CLEAR_LINE);
-}
-
-READ8_MEMBER(pc_state::mc1502_wd17xx_motor_r)
-{
- UINT8 data;
-
- /* fake motor being always on */
- data = 1;
-
- return data;
-}
-
WRITE8_MEMBER(pc_state::asst128_fdc_dor_w)
{
pc_fdc_xt_device *fdc = machine().device<pc_fdc_xt_device>("fdc");
@@ -1445,23 +1101,6 @@ DRIVER_INIT_MEMBER(pc_state,pcjr)
mess_init_pc_common(pcjr_set_keyb_int);
}
-DRIVER_INIT_MEMBER(pc_state,mc1502)
-{
- mess_init_pc_common(NULL);
-}
-
-DRIVER_INIT_MEMBER(pc_state,ec1841)
-{
- address_space &program = m_maincpu->space(AS_PROGRAM);
-
- program.install_read_bank(0, 0x7ffff, "bank10");
- program.install_write_bank(0, 0x7ffff, "bank20");
- membank( "bank10" )->set_base( m_ram->pointer() );
- membank( "bank20" )->set_base( m_ram->pointer() );
-
- pc_rtc_init();
-}
-
IRQ_CALLBACK_MEMBER(pc_state::pc_irq_callback)
{
@@ -1499,35 +1138,6 @@ MACHINE_RESET_MEMBER(pc_state,pc)
m_ppi_shift_enable = 0;
m_speaker->level_w(0);
-
- // ec1841-specific code
- m_memboards = m_ram->size()/(512*1024) - 1;
- if (m_memboards > 3)
- m_memboards = 3;
- memset(m_memboard,0,sizeof(m_memboard));
- // mark 1st board enabled
- m_memboard[0]=0xc;
-}
-
-
-MACHINE_START_MEMBER(pc_state,mc1502)
-{
- m_maincpu->set_irq_acknowledge_callback(device_irq_acknowledge_delegate(FUNC(pc_state::pc_irq_callback),this));
-
- /*
- Keyboard polling circuit holds IRQ1 high until a key is
- pressed, then it starts a timer that pulses IRQ1 low each
- 40ms (check) for 20ms (check) until all keys are released.
- Last pulse causes BIOS to write a 'break' scancode into port 60h.
- */
- m_pic8259->ir1_w(1);
- memset(&mc1502_keyb, 0, sizeof(mc1502_keyb));
- mc1502_keyb.keyb_signal_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(pc_state::mc1502_keyb_signal_callback),this));
- mc1502_keyb.keyb_signal_timer->adjust( attotime::from_msec(20), 0, attotime::from_msec(20) );
-
- fd1793_t *fdc = machine().device<fd1793_t>("vg93");
- fdc->setup_drq_cb(fd1793_t::line_cb(FUNC(pc_state::mc1502_fdc_irq_drq), this));
- fdc->setup_intrq_cb(fd1793_t::line_cb(FUNC(pc_state::mc1502_fdc_irq_drq), this));
}
diff --git a/src/mess/machine/xsu_cards.c b/src/mess/machine/xsu_cards.c
new file mode 100644
index 00000000000..25598454317
--- /dev/null
+++ b/src/mess/machine/xsu_cards.c
@@ -0,0 +1,36 @@
+/**********************************************************************
+
+ ISA bus cards for ex-USSR PC clones
+
+ license: MAME, GPL-2.0+
+ copyright-holders: XXX
+
+**********************************************************************/
+
+#include "xsu_cards.h"
+
+SLOT_INTERFACE_START( p1_isa8_cards )
+ SLOT_INTERFACE("rom", P1_ROM)
+ SLOT_INTERFACE("fdc", P1_FDC) // B504
+ SLOT_INTERFACE("hdc", P1_HDC) // B942
+/*
+ SLOT_INTERFACE("comlpt", P1_COMLPT) // B620
+ SLOT_INTERFACE("joy", P1_JOY) // B621
+ SLOT_INTERFACE("mouse", P1_MOUSE) // B943
+ SLOT_INTERFACE("lan", P1_LAN) // B944
+*/
+ SLOT_INTERFACE("pccom", ISA8_COM)
+ SLOT_INTERFACE("pclpt", ISA8_LPT)
+ SLOT_INTERFACE("xtide", ISA8_XTIDE)
+SLOT_INTERFACE_END
+
+SLOT_INTERFACE_START( mc1502_isa8_cards )
+ SLOT_INTERFACE("rom", MC1502_ROM)
+ SLOT_INTERFACE("fdc", MC1502_FDC)
+/*
+ SLOT_INTERFACE("hdc", MC1502_HDC)
+*/
+ SLOT_INTERFACE("pccom", ISA8_COM)
+ SLOT_INTERFACE("pclpt", ISA8_LPT)
+ SLOT_INTERFACE("xtide", ISA8_XTIDE)
+SLOT_INTERFACE_END
diff --git a/src/mess/machine/xsu_cards.h b/src/mess/machine/xsu_cards.h
new file mode 100644
index 00000000000..6e6918b7510
--- /dev/null
+++ b/src/mess/machine/xsu_cards.h
@@ -0,0 +1,35 @@
+/**********************************************************************
+
+ ISA bus cards for ex-USSR PC clones
+
+ license: MAME, GPL-2.0+
+ copyright-holders: XXX
+
+**********************************************************************/
+
+#pragma once
+
+#ifndef __XSU_CARDS_H__
+#define __XSU_CARDS_H__
+
+#include "emu.h"
+
+// storage
+#include "machine/mc1502_fdc.h"
+#include "machine/p1_fdc.h"
+#include "machine/p1_hdc.h"
+
+// misc
+#include "machine/mc1502_rom.h"
+#include "machine/p1_rom.h"
+
+// non-native
+#include "machine/isa_com.h"
+#include "machine/isa_xtide.h"
+#include "machine/pc_lpt.h"
+
+// supported devices
+SLOT_INTERFACE_EXTERN( p1_isa8_cards );
+SLOT_INTERFACE_EXTERN( mc1502_isa8_cards );
+
+#endif // __XSU_CARDS_H__