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author Michael Zapf <michael.zapf@mizapf.de>2013-11-03 14:39:45 +0000
committer Michael Zapf <michael.zapf@mizapf.de>2013-11-03 14:39:45 +0000
commit9ca0768eadda01d1c1d5d82b1ab6fafc9f1f2fc9 (patch)
tree8d296431f050f5f45dad7403447a822e1ddc018e /src/mess/drivers/cortex.c
parent59414e62a2de384310184099f4c99e356f147061 (diff)
Added compile switch for legacy / new CPU implementation.(nw)
Diffstat (limited to 'src/mess/drivers/cortex.c')
-rw-r--r--src/mess/drivers/cortex.c26
1 files changed, 26 insertions, 0 deletions
diff --git a/src/mess/drivers/cortex.c b/src/mess/drivers/cortex.c
index 2ae214ff03e..fb50940e2f6 100644
--- a/src/mess/drivers/cortex.c
+++ b/src/mess/drivers/cortex.c
@@ -22,8 +22,14 @@
****************************************************************************/
+#define MODERN 1
+
#include "emu.h"
+#if MODERN
#include "cpu/tms9900/tms9995.h"
+#else
+#include "cpu/tms9900/tms9900l.h"
+#endif
#include "video/tms9928a.h"
class cortex_state : public driver_device
@@ -71,9 +77,14 @@ void cortex_state::machine_reset()
{
UINT8* ROM = memregion("maincpu")->base();
memcpy(m_p_ram, ROM, 0x6000);
+#if MODERN
static_cast<tms9995_device*>(machine().device("maincpu"))->set_ready(ASSERT_LINE);
+#else
+ m_maincpu->reset();
+#endif
}
+#if MODERN
static TMS9995_CONFIG( cpuconf95 )
{
DEVCB_NULL, // external op
@@ -84,6 +95,14 @@ static TMS9995_CONFIG( cpuconf95 )
INTERNAL_RAM, // use internal RAM
NO_OVERFLOW_INT // The generally available versions of TMS9995 have a deactivated overflow interrupt
};
+#else
+static const struct tms9995reset_param cortex_processor_config =
+{
+ 0, /* disable automatic wait state generation */
+ 0, /* no IDLE callback */
+ 0 /* no MP9537 mask */
+};
+#endif
static TMS9928A_INTERFACE(cortex_tms9929a_interface)
{
@@ -94,7 +113,14 @@ static TMS9928A_INTERFACE(cortex_tms9929a_interface)
static MACHINE_CONFIG_START( cortex, cortex_state )
/* basic machine hardware */
/* TMS9995 CPU @ 12.0 MHz */
+#if MODERN
MCFG_TMS99xx_ADD("maincpu", TMS9995, 12000000, cortex_mem, cortex_io, cpuconf95)
+#else
+ MCFG_CPU_ADD("maincpu", TMS9995L, 12000000)
+ MCFG_CPU_CONFIG(cortex_processor_config)
+ MCFG_CPU_PROGRAM_MAP(cortex_mem)
+ MCFG_CPU_IO_MAP(cortex_io)
+#endif
/* video hardware */
MCFG_TMS9928A_ADD( "tms9928a", TMS9929A, cortex_tms9929a_interface )