diff options
author | 2016-05-26 21:29:41 +0200 | |
---|---|---|
committer | 2016-05-27 01:20:09 +0200 | |
commit | 02e3213897e592aca825c977c580b1395e441f57 (patch) | |
tree | 80518372cdb224bd8d0d85cc8f81bec48191fc50 /src/lib/netlist/macro | |
parent | fd62273a87b8fe43492e4a466ea97993b88904f8 (diff) |
Leading underscore massacre. (nw)
Diffstat (limited to 'src/lib/netlist/macro')
-rw-r--r-- | src/lib/netlist/macro/nlm_cd4xxx.h | 20 | ||||
-rw-r--r-- | src/lib/netlist/macro/nlm_opamp.h | 12 | ||||
-rw-r--r-- | src/lib/netlist/macro/nlm_other.h | 8 | ||||
-rw-r--r-- | src/lib/netlist/macro/nlm_ttl74xx.cpp | 18 | ||||
-rw-r--r-- | src/lib/netlist/macro/nlm_ttl74xx.h | 240 |
5 files changed, 149 insertions, 149 deletions
diff --git a/src/lib/netlist/macro/nlm_cd4xxx.h b/src/lib/netlist/macro/nlm_cd4xxx.h index ebfb58740b2..acc47f45d21 100644 --- a/src/lib/netlist/macro/nlm_cd4xxx.h +++ b/src/lib/netlist/macro/nlm_cd4xxx.h @@ -22,24 +22,24 @@ * Netlist Macros * ---------------------------------------------------------------------------*/ -#define CD4001_NOR(_name) \ - NET_REGISTER_DEV(CD4001_NOR, _name) +#define CD4001_NOR(name) \ + NET_REGISTER_DEV(CD4001_NOR, name) -#define CD4001_DIP(_name) \ - NET_REGISTER_DEV(CD4001_DIP, _name) +#define CD4001_DIP(name) \ + NET_REGISTER_DEV(CD4001_DIP, name) /* ---------------------------------------------------------------------------- * DIP only macros * ---------------------------------------------------------------------------*/ -#define CD4020_DIP(_name) \ - NET_REGISTER_DEV(CD4020_DIP, _name) +#define CD4020_DIP(name) \ + NET_REGISTER_DEV(CD4020_DIP, name) -#define CD4066_DIP(_name) \ - NET_REGISTER_DEV(CD4066_DIP, _name) +#define CD4066_DIP(name) \ + NET_REGISTER_DEV(CD4066_DIP, name) -#define CD4016_DIP(_name) \ - NET_REGISTER_DEV(CD4016_DIP, _name) +#define CD4016_DIP(name) \ + NET_REGISTER_DEV(CD4016_DIP, name) /* ---------------------------------------------------------------------------- * External declarations diff --git a/src/lib/netlist/macro/nlm_opamp.h b/src/lib/netlist/macro/nlm_opamp.h index c0d6a0b158f..f349f11911c 100644 --- a/src/lib/netlist/macro/nlm_opamp.h +++ b/src/lib/netlist/macro/nlm_opamp.h @@ -11,14 +11,14 @@ * Netlist Macros * ---------------------------------------------------------------------------*/ -#define MB3614_DIP(_name) \ - NET_REGISTER_DEV(MB3614_DIP, _name) +#define MB3614_DIP(name) \ + NET_REGISTER_DEV(MB3614_DIP, name) -#define LM324_DIP(_name) \ - NET_REGISTER_DEV(LM324_DIP, _name) +#define LM324_DIP(name) \ + NET_REGISTER_DEV(LM324_DIP, name) -#define LM358_DIP(_name) \ - NET_REGISTER_DEV(LM358_DIP, _name) +#define LM358_DIP(name) \ + NET_REGISTER_DEV(LM358_DIP, name) /* ---------------------------------------------------------------------------- * External declarations diff --git a/src/lib/netlist/macro/nlm_other.h b/src/lib/netlist/macro/nlm_other.h index 76f8dd781d5..bb73d0105d2 100644 --- a/src/lib/netlist/macro/nlm_other.h +++ b/src/lib/netlist/macro/nlm_other.h @@ -11,11 +11,11 @@ * Netlist Macros * ---------------------------------------------------------------------------*/ -#define MC14584B_GATE(_name) \ - NET_REGISTER_DEV(MC14584B_GATE, _name) +#define MC14584B_GATE(name) \ + NET_REGISTER_DEV(MC14584B_GATE, name) -#define MC14584B_DIP(_name) \ - NET_REGISTER_DEV(MC14584B_DIP, _name) +#define MC14584B_DIP(name) \ + NET_REGISTER_DEV(MC14584B_DIP, name) /* ---------------------------------------------------------------------------- diff --git a/src/lib/netlist/macro/nlm_ttl74xx.cpp b/src/lib/netlist/macro/nlm_ttl74xx.cpp index fc589231b19..25bf7573c03 100644 --- a/src/lib/netlist/macro/nlm_ttl74xx.cpp +++ b/src/lib/netlist/macro/nlm_ttl74xx.cpp @@ -9,7 +9,7 @@ /* * DM7400: Quad 2-Input NAND Gates * - * __ + * _ * Y = AB * +---+---++---+ * | A | B || Y | @@ -85,7 +85,7 @@ NETLIST_END() /* * DM7404: Hex Inverting Gates - * _ + * * Y = A * +---++---+ * | A || Y | @@ -162,7 +162,7 @@ NETLIST_END() /* * DM7410: Triple 3-Input NAND Gates - * ___ + * __ * Y = ABC * +---+---+---++---+ * | A | B | C || Y | @@ -266,7 +266,7 @@ NETLIST_END() /* * DM7420: Dual 4-Input NAND Gates * - * ____ + * ___ * Y = ABCD * +---+---+---+---++---+ * | A | B | C | D || Y | @@ -304,7 +304,7 @@ NETLIST_END() /* * DM7425: Dual 4-Input NOR Gates * - * _______ + * ______ * Y = A+B+C+D * +---+---+---+---+---++---+ * | A | B | C | D | X || Y | @@ -346,7 +346,7 @@ NETLIST_END() /* * DM7427: Triple 3-Input NOR Gates * - * _____ + * ____ * Y = A+B+C * +---+---+---++---+ * | A | B | C || Y | @@ -384,7 +384,7 @@ NETLIST_END() /* * DM7430: 8-Input NAND Gate * - * ________ + * _______ * Y = ABCDEFGH * +---+---+---+---+---+---+---+---++---+ * | A | B | C | D | E | F | G | H || Y | @@ -424,7 +424,7 @@ NETLIST_END() /* * DM7432: Quad 2-Input OR Gates * - * ___ + * __ * Y = A+B * +---+---++---+ * | A | B || Y | @@ -464,7 +464,7 @@ NETLIST_END() /* * DM7437: Quad 2-Input NAND Gates * - * __ + * _ * Y = AB * +---+---++---+ * | A | B || Y | diff --git a/src/lib/netlist/macro/nlm_ttl74xx.h b/src/lib/netlist/macro/nlm_ttl74xx.h index 541a9932fb5..2a29334487e 100644 --- a/src/lib/netlist/macro/nlm_ttl74xx.h +++ b/src/lib/netlist/macro/nlm_ttl74xx.h @@ -11,179 +11,179 @@ * Netlist Macros * ---------------------------------------------------------------------------*/ -#define TTL_7400_GATE(_name) \ - NET_REGISTER_DEV(TTL_7400_GATE, _name) +#define TTL_7400_GATE(name) \ + NET_REGISTER_DEV(TTL_7400_GATE, name) -#define TTL_7400_NAND(_name, _A, _B) \ - NET_REGISTER_DEV(TTL_7400_NAND, _name) \ - NET_CONNECT(_name, A, _A) \ - NET_CONNECT(_name, B, _B) +#define TTL_7400_NAND(name, cA, cB) \ + NET_REGISTER_DEV(TTL_7400_NAND, name) \ + NET_CONNECT(name, A, cA) \ + NET_CONNECT(name, B, cB) -#define TTL_7400_DIP(_name) \ - NET_REGISTER_DEV(TTL_7400_DIP, _name) +#define TTL_7400_DIP(name) \ + NET_REGISTER_DEV(TTL_7400_DIP, name) -#define TTL_7402_GATE(_name) \ - NET_REGISTER_DEV(TTL_7402_GATE, _name) +#define TTL_7402_GATE(name) \ + NET_REGISTER_DEV(TTL_7402_GATE, name) -#define TTL_7402_NOR(_name, _I1, _I2) \ - NET_REGISTER_DEV(TTL_7402_NOR, _name) \ - NET_CONNECT(_name, A, _I1) \ - NET_CONNECT(_name, B, _I2) +#define TTL_7402_NOR(name, cI1, cI2) \ + NET_REGISTER_DEV(TTL_7402_NOR, name) \ + NET_CONNECT(name, A, cI1) \ + NET_CONNECT(name, B, cI2) -#define TTL_7402_DIP(_name) \ - NET_REGISTER_DEV(TTL_7402_DIP, _name) +#define TTL_7402_DIP(name) \ + NET_REGISTER_DEV(TTL_7402_DIP, name) -#define TTL_7404_GATE(_name) \ - NET_REGISTER_DEV(TTL_7404_GATE, _name) +#define TTL_7404_GATE(name) \ + NET_REGISTER_DEV(TTL_7404_GATE, name) -#define TTL_7404_INVERT(_name, _A) \ - NET_REGISTER_DEV(TTL_7404_INVERT, _name) \ - NET_CONNECT(_name, A, _A) +#define TTL_7404_INVERT(name, cA) \ + NET_REGISTER_DEV(TTL_7404_INVERT, name) \ + NET_CONNECT(name, A, cA) -#define TTL_7404_DIP(_name) \ - NET_REGISTER_DEV(TTL_7404_DIP, _name) +#define TTL_7404_DIP(name) \ + NET_REGISTER_DEV(TTL_7404_DIP, name) -#define TTL_7408_GATE(_name) \ - NET_REGISTER_DEV(TTL_7408_GATE, _name) +#define TTL_7408_GATE(name) \ + NET_REGISTER_DEV(TTL_7408_GATE, name) -#define TTL_7408_AND(_name, _A, _B) \ - NET_REGISTER_DEV(TTL_7408_AND, _name) \ - NET_CONNECT(_name, A, _A) \ - NET_CONNECT(_name, B, _B) +#define TTL_7408_AND(name, cA, cB) \ + NET_REGISTER_DEV(TTL_7408_AND, name) \ + NET_CONNECT(name, A, cA) \ + NET_CONNECT(name, B, cB) -#define TTL_7408_DIP(_name) \ - NET_REGISTER_DEV(TTL_7408_DIP, _name) +#define TTL_7408_DIP(name) \ + NET_REGISTER_DEV(TTL_7408_DIP, name) -#define TTL_7410_GATE(_name) \ - NET_REGISTER_DEV(TTL_7410_GATE, _name) +#define TTL_7410_GATE(name) \ + NET_REGISTER_DEV(TTL_7410_GATE, name) -#define TTL_7410_NAND(_name, _I1, _I2, _I3) \ - NET_REGISTER_DEV(TTL_7410_NAND, _name) \ - NET_CONNECT(_name, A, _I1) \ - NET_CONNECT(_name, B, _I2) \ - NET_CONNECT(_name, C, _I3) +#define TTL_7410_NAND(name, cI1, cI2, cI3) \ + NET_REGISTER_DEV(TTL_7410_NAND, name) \ + NET_CONNECT(name, A, cI1) \ + NET_CONNECT(name, B, cI2) \ + NET_CONNECT(name, C, cI3) -#define TTL_7410_DIP(_name) \ - NET_REGISTER_DEV(TTL_7410_DIP, _name) +#define TTL_7410_DIP(name) \ + NET_REGISTER_DEV(TTL_7410_DIP, name) -#define TTL_7411_GATE(_name) \ - NET_REGISTER_DEV(TTL_7411_GATE, _name) +#define TTL_7411_GATE(name) \ + NET_REGISTER_DEV(TTL_7411_GATE, name) -#define TTL_7411_AND(_name, _I1, _I2, _I3) \ - NET_REGISTER_DEV(TTL_7411_AND, _name) \ - NET_CONNECT(_name, A, _I1) \ - NET_CONNECT(_name, B, _I2) \ - NET_CONNECT(_name, C, _I3) +#define TTL_7411_AND(name, cI1, cI2, cI3) \ + NET_REGISTER_DEV(TTL_7411_AND, name) \ + NET_CONNECT(name, A, cI1) \ + NET_CONNECT(name, B, cI2) \ + NET_CONNECT(name, C, cI3) -#define TTL_7411_DIP(_name) \ - NET_REGISTER_DEV(TTL_7411_DIP, _name) +#define TTL_7411_DIP(name) \ + NET_REGISTER_DEV(TTL_7411_DIP, name) -#define TTL_7416_GATE(_name) \ - NET_REGISTER_DEV(TTL_7416_GATE, _name) +#define TTL_7416_GATE(name) \ + NET_REGISTER_DEV(TTL_7416_GATE, name) -#define TTL_7416_DIP(_name) \ - NET_REGISTER_DEV(TTL7416_DIP, _name) +#define TTL_7416_DIP(name) \ + NET_REGISTER_DEV(TTL7416_DIP, name) -#define TTL_7420_GATE(_name) \ - NET_REGISTER_DEV(TTL_7420_GATE, _name) +#define TTL_7420_GATE(name) \ + NET_REGISTER_DEV(TTL_7420_GATE, name) -#define TTL_7420_NAND(_name, _I1, _I2, _I3, _I4) \ - NET_REGISTER_DEV(TTL_7420_NAND, _name) \ - NET_CONNECT(_name, A, _I1) \ - NET_CONNECT(_name, B, _I2) \ - NET_CONNECT(_name, C, _I3) \ - NET_CONNECT(_name, D, _I4) +#define TTL_7420_NAND(name, cI1, cI2, cI3, cI4) \ + NET_REGISTER_DEV(TTL_7420_NAND, name) \ + NET_CONNECT(name, A, cI1) \ + NET_CONNECT(name, B, cI2) \ + NET_CONNECT(name, C, cI3) \ + NET_CONNECT(name, D, cI4) -#define TTL_7420_DIP(_name) \ - NET_REGISTER_DEV(TTL_7420_DIP, _name) +#define TTL_7420_DIP(name) \ + NET_REGISTER_DEV(TTL_7420_DIP, name) -#define TTL_7425_GATE(_name) \ - NET_REGISTER_DEV(TTL_7425_GATE, _name) +#define TTL_7425_GATE(name) \ + NET_REGISTER_DEV(TTL_7425_GATE, name) -#define TTL_7425_NOR(_name, _I1, _I2, _I3, _I4) \ - NET_REGISTER_DEV(TTL_7425_NOR, _name) \ - NET_CONNECT(_name, A, _I1) \ - NET_CONNECT(_name, B, _I2) \ - NET_CONNECT(_name, C, _I3) \ - NET_CONNECT(_name, D, _I4) +#define TTL_7425_NOR(name, cI1, cI2, cI3, cI4) \ + NET_REGISTER_DEV(TTL_7425_NOR, name) \ + NET_CONNECT(name, A, cI1) \ + NET_CONNECT(name, B, cI2) \ + NET_CONNECT(name, C, cI3) \ + NET_CONNECT(name, D, cI4) -#define TTL_7425_DIP(_name) \ - NET_REGISTER_DEV(TTL_7425_DIP, _name) +#define TTL_7425_DIP(name) \ + NET_REGISTER_DEV(TTL_7425_DIP, name) -#define TTL_7427_GATE(_name) \ - NET_REGISTER_DEV(TTL_7427_GATE, _name) +#define TTL_7427_GATE(name) \ + NET_REGISTER_DEV(TTL_7427_GATE, name) -#define TTL_7427_NOR(_name, _I1, _I2, _I3) \ - NET_REGISTER_DEV(TTL_7427_NOR, _name) \ - NET_CONNECT(_name, A, _I1) \ - NET_CONNECT(_name, B, _I2) \ - NET_CONNECT(_name, C, _I3) +#define TTL_7427_NOR(name, cI1, cI2, cI3) \ + NET_REGISTER_DEV(TTL_7427_NOR, name) \ + NET_CONNECT(name, A, cI1) \ + NET_CONNECT(name, B, cI2) \ + NET_CONNECT(name, C, cI3) -#define TTL_7427_DIP(_name) \ - NET_REGISTER_DEV(TTL_7427_DIP, _name) +#define TTL_7427_DIP(name) \ + NET_REGISTER_DEV(TTL_7427_DIP, name) -#define TTL_7430_GATE(_name) \ - NET_REGISTER_DEV(TTL_7430_GATE, _name) +#define TTL_7430_GATE(name) \ + NET_REGISTER_DEV(TTL_7430_GATE, name) -#define TTL_7430_NAND(_name, _I1, _I2, _I3, _I4, _I5, _I6, _I7, _I8) \ - NET_REGISTER_DEV(TTL_7430_NAND, _name) \ - NET_CONNECT(_name, A, _I1) \ - NET_CONNECT(_name, B, _I2) \ - NET_CONNECT(_name, C, _I3) \ - NET_CONNECT(_name, D, _I4) \ - NET_CONNECT(_name, E, _I5) \ - NET_CONNECT(_name, F, _I6) \ - NET_CONNECT(_name, G, _I7) \ - NET_CONNECT(_name, H, _I8) +#define TTL_7430_NAND(name, cI1, cI2, cI3, cI4, cI5, cI6, cI7, cI8) \ + NET_REGISTER_DEV(TTL_7430_NAND, name) \ + NET_CONNECT(name, A, cI1) \ + NET_CONNECT(name, B, cI2) \ + NET_CONNECT(name, C, cI3) \ + NET_CONNECT(name, D, cI4) \ + NET_CONNECT(name, E, cI5) \ + NET_CONNECT(name, F, cI6) \ + NET_CONNECT(name, G, cI7) \ + NET_CONNECT(name, H, cI8) -#define TTL_7430_DIP(_name) \ - NET_REGISTER_DEV(TTL_7430_DIP, _name) +#define TTL_7430_DIP(name) \ + NET_REGISTER_DEV(TTL_7430_DIP, name) -#define TTL_7432_GATE(_name) \ - NET_REGISTER_DEV(TTL_7432_OR, _name) +#define TTL_7432_GATE(name) \ + NET_REGISTER_DEV(TTL_7432_OR, name) -#define TTL_7432_OR(_name, _I1, _I2) \ - NET_REGISTER_DEV(TTL_7432_OR, _name) \ - NET_CONNECT(_name, A, _I1) \ - NET_CONNECT(_name, B, _I2) +#define TTL_7432_OR(name, cI1, cI2) \ + NET_REGISTER_DEV(TTL_7432_OR, name) \ + NET_CONNECT(name, A, cI1) \ + NET_CONNECT(name, B, cI2) -#define TTL_7432_DIP(_name) \ - NET_REGISTER_DEV(TTL_7432_DIP, _name) +#define TTL_7432_DIP(name) \ + NET_REGISTER_DEV(TTL_7432_DIP, name) -#define TTL_7437_GATE(_name) \ - NET_REGISTER_DEV(TTL_7437_GATE, _name) +#define TTL_7437_GATE(name) \ + NET_REGISTER_DEV(TTL_7437_GATE, name) -#define TTL_7437_NAND(_name, _A, _B) \ - NET_REGISTER_DEV(TTL_7437_NAND, _name) \ - NET_CONNECT(_name, A, _A) \ - NET_CONNECT(_name, B, _B) +#define TTL_7437_NAND(name, cA, cB) \ + NET_REGISTER_DEV(TTL_7437_NAND, name) \ + NET_CONNECT(name, A, cA) \ + NET_CONNECT(name, B, cB) -#define TTL_7437_DIP(_name) \ - NET_REGISTER_DEV(TTL_7437_DIP, _name) +#define TTL_7437_DIP(name) \ + NET_REGISTER_DEV(TTL_7437_DIP, name) -#define TTL_7486_GATE(_name) \ - NET_REGISTER_DEV(TTL_7486_GATE, _name) +#define TTL_7486_GATE(name) \ + NET_REGISTER_DEV(TTL_7486_GATE, name) -#define TTL_7486_XOR(_name, _A, _B) \ - NET_REGISTER_DEV(TTL_7486_XOR, _name) \ - NET_CONNECT(_name, A, _A) \ - NET_CONNECT(_name, B, _B) +#define TTL_7486_XOR(name, cA, cB) \ + NET_REGISTER_DEV(TTL_7486_XOR, name) \ + NET_CONNECT(name, A, cA) \ + NET_CONNECT(name, B, cB) -#define TTL_7486_DIP(_name) \ - NET_REGISTER_DEV(TTL_7486_DIP, _name) +#define TTL_7486_DIP(name) \ + NET_REGISTER_DEV(TTL_7486_DIP, name) /* ---------------------------------------------------------------------------- * External declarations |