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author Aaron Giles <aaron@aarongiles.com>2009-04-23 05:44:35 +0000
committer Aaron Giles <aaron@aarongiles.com>2009-04-23 05:44:35 +0000
commit4b7dd3cd0de9a22407105730d933383bc78f96a6 (patch)
treee1fbbbdcfb4ed542b18885e5264aa170b4798111 /src/emu
parent662888441baea03b0674057786c40f587b8ccc1a (diff)
Cleanups and version bump for 0.131.mame0131
Diffstat (limited to 'src/emu')
-rw-r--r--src/emu/cpu/tlcs900/900tbl.c48
-rw-r--r--src/emu/cpu/tlcs900/dasm900.c34
-rw-r--r--src/emu/video/tms9927.c40
3 files changed, 61 insertions, 61 deletions
diff --git a/src/emu/cpu/tlcs900/900tbl.c b/src/emu/cpu/tlcs900/900tbl.c
index c745f684ce1..743a7c0551f 100644
--- a/src/emu/cpu/tlcs900/900tbl.c
+++ b/src/emu/cpu/tlcs900/900tbl.c
@@ -226,7 +226,7 @@ INLINE UINT32 *get_reg32_current( tlcs900_state *cpustate, UINT8 reg )
return &cpustate->xiz.d;
/* XSP */
- case 7:
+ case 7:
/* TODO: Add selector for user/system stack pointer */
return &cpustate->xssp.d;
}
@@ -1165,18 +1165,18 @@ INLINE UINT32 div16( tlcs900_state *cpustate, UINT32 a, UINT16 b )
return ( a << 16 ) | ( ( a >> 16 ) ^ 0xffff );
}
-// if ( a >= ( 0x02000000 * b ) ) {
-// UINT32 diff = a - ( 0x02000000 * b );
-// UINT32 range = 0x1000000 - b;
+// if ( a >= ( 0x02000000 * b ) ) {
+// UINT32 diff = a - ( 0x02000000 * b );
+// UINT32 range = 0x1000000 - b;
//
-// result = ldiv( diff, range );
-// result.quot = 0x1ffffff - result.quot;
-// result.rem = result.rem + b;
-// }
-// else
-// {
+// result = ldiv( diff, range );
+// result.quot = 0x1ffffff - result.quot;
+// result.rem = result.rem + b;
+// }
+// else
+// {
result = ldiv( a, b );
-// }
+// }
if ( result.quot > 0xffff )
cpustate->sr.b.l |= FLAG_VF;
@@ -3851,7 +3851,7 @@ static void _ZCF(tlcs900_state *cpustate)
}
-typedef struct
+typedef struct
{
void (*opfunc)(tlcs900_state *cpustate);
int operand1;
@@ -4161,7 +4161,7 @@ static const tlcs900inst mnemonic_80[256] =
{ _ANDBMI, _M, _I8, 7 }, { _XORBMI, _M, _I8, 7 }, { _ORBMI, _M, _I8, 7 }, { _CPBMI, _M, _I8, 6 },
/* 40 - 5F */
- { _MULBRM, _MC16, _M, 18}, { _MULBRM, _MC16, _M, 18 }, { _MULBRM, _MC16, _M, 18 }, { _MULBRM, _MC16, _M, 18 },
+ { _MULBRM, _MC16, _M, 18}, { _MULBRM, _MC16, _M, 18 }, { _MULBRM, _MC16, _M, 18 }, { _MULBRM, _MC16, _M, 18 },
{ _MULBRM, _MC16, _M, 18}, { _MULBRM, _MC16, _M, 18 }, { _MULBRM, _MC16, _M, 18 }, { _MULBRM, _MC16, _M, 18 },
{ _MULSBRM, _MC16, _M, 18 }, { _MULSBRM, _MC16, _M, 18 }, { _MULSBRM, _MC16, _M, 18 }, { _MULSBRM, _MC16, _M, 18 },
{ _MULSBRM, _MC16, _M, 18 }, { _MULSBRM, _MC16, _M, 18 }, { _MULSBRM, _MC16, _M, 18 }, { _MULSBRM, _MC16, _M, 18 },
@@ -4245,7 +4245,7 @@ static const tlcs900inst mnemonic_88[256] =
{ _ANDBMI, _M, _I8, 7 }, { _XORBMI, _M, _I8, 7 }, { _ORBMI, _M, _I8, 7 }, { _CPBMI, _M, _I8, 6 },
/* 40 - 5F */
- { _MULBRM, _MC16, _M, 18 }, { _MULBRM, _MC16, _M, 18 }, { _MULBRM, _MC16, _M, 18 }, { _MULBRM, _MC16, _M, 18 },
+ { _MULBRM, _MC16, _M, 18 }, { _MULBRM, _MC16, _M, 18 }, { _MULBRM, _MC16, _M, 18 }, { _MULBRM, _MC16, _M, 18 },
{ _MULBRM, _MC16, _M, 18 }, { _MULBRM, _MC16, _M, 18 }, { _MULBRM, _MC16, _M, 18 }, { _MULBRM, _MC16, _M, 18 },
{ _MULSBRM, _MC16, _M, 18 }, { _MULSBRM, _MC16, _M, 18 }, { _MULSBRM, _MC16, _M, 18 }, { _MULSBRM, _MC16, _M, 18 },
{ _MULSBRM, _MC16, _M, 18 }, { _MULSBRM, _MC16, _M, 18 }, { _MULSBRM, _MC16, _M, 18 }, { _MULSBRM, _MC16, _M, 18 },
@@ -4329,7 +4329,7 @@ static const tlcs900inst mnemonic_90[256] =
{ _ANDWMI, _M, _I16, 8 }, { _XORWMI, _M, _I16, 8 }, { _ORWMI, _M, _I16, 8 }, { _CPWMI, _M, _I16, 6 },
/* 40 - 5F */
- { _MULWRM, _C32, _M, 26 }, { _MULWRM, _C32, _M, 26 }, { _MULWRM, _C32, _M, 26 }, { _MULWRM, _C32, _M, 26 },
+ { _MULWRM, _C32, _M, 26 }, { _MULWRM, _C32, _M, 26 }, { _MULWRM, _C32, _M, 26 }, { _MULWRM, _C32, _M, 26 },
{ _MULWRM, _C32, _M, 26 }, { _MULWRM, _C32, _M, 26 }, { _MULWRM, _C32, _M, 26 }, { _MULWRM, _C32, _M, 26 },
{ _MULSWRM, _C32, _M, 26 }, { _MULSWRM, _C32, _M, 26 }, { _MULSWRM, _C32, _M, 26 }, { _MULSWRM, _C32, _M, 26 },
{ _MULSWRM, _C32, _M, 26 }, { _MULSWRM, _C32, _M, 26 }, { _MULSWRM, _C32, _M, 26 }, { _MULSWRM, _C32, _M, 26 },
@@ -4413,7 +4413,7 @@ static const tlcs900inst mnemonic_98[256] =
{ _ANDWMI, _M, _I16, 8 }, { _XORWMI, _M, _I16, 8 }, { _ORWMI, _M, _I16, 8 }, { _CPWMI, _M, _I16, 6 },
/* 40 - 5F */
- { _MULWRM, _C32, _M, 26 }, { _MULWRM, _C32, _M, 26 }, { _MULWRM, _C32, _M, 26 }, { _MULWRM, _C32, _M, 26 },
+ { _MULWRM, _C32, _M, 26 }, { _MULWRM, _C32, _M, 26 }, { _MULWRM, _C32, _M, 26 }, { _MULWRM, _C32, _M, 26 },
{ _MULWRM, _C32, _M, 26 }, { _MULWRM, _C32, _M, 26 }, { _MULWRM, _C32, _M, 26 }, { _MULWRM, _C32, _M, 26 },
{ _MULSWRM, _C32, _M, 26 }, { _MULSWRM, _C32, _M, 26 }, { _MULSWRM, _C32, _M, 26 }, { _MULSWRM, _C32, _M, 26 },
{ _MULSWRM, _C32, _M, 26 }, { _MULSWRM, _C32, _M, 26 }, { _MULSWRM, _C32, _M, 26 }, { _MULSWRM, _C32, _M, 26 },
@@ -4623,7 +4623,7 @@ static const tlcs900inst mnemonic_b0[256] =
/* C0 - DF */
{ _CHGBIM, _I3, _M, 8 }, { _CHGBIM, _I3, _M, 8 }, { _CHGBIM, _I3, _M, 8 }, { _CHGBIM, _I3, _M, 8 },
{ _CHGBIM, _I3, _M, 8 }, { _CHGBIM, _I3, _M, 8 }, { _CHGBIM, _I3, _M, 8 }, { _CHGBIM, _I3, _M, 8 },
- { _BITBIM, _I3, _M, 8 }, { _BITBIM, _I3, _M, 8 }, { _BITBIM, _I3, _M, 8 }, { _BITBIM, _I3, _M, 8 },
+ { _BITBIM, _I3, _M, 8 }, { _BITBIM, _I3, _M, 8 }, { _BITBIM, _I3, _M, 8 }, { _BITBIM, _I3, _M, 8 },
{ _BITBIM, _I3, _M, 8 }, { _BITBIM, _I3, _M, 8 }, { _BITBIM, _I3, _M, 8 }, { _BITBIM, _I3, _M, 8 },
{ _JPM, _CC, _M, 4 }, { _JPM, _CC, _M, 4 }, { _JPM, _CC, _M, 4 }, { _JPM, _CC, _M, 4 },
{ _JPM, _CC, _M, 4 }, { _JPM, _CC, _M, 4 }, { _JPM, _CC, _M, 4 }, { _JPM, _CC, _M, 4 },
@@ -4707,7 +4707,7 @@ static const tlcs900inst mnemonic_b8[256] =
/* C0 - DF */
{ _CHGBIM, _I3, _M, 8 }, { _CHGBIM, _I3, _M, 8 }, { _CHGBIM, _I3, _M, 8 }, { _CHGBIM, _I3, _M, 8 },
{ _CHGBIM, _I3, _M, 8 }, { _CHGBIM, _I3, _M, 8 }, { _CHGBIM, _I3, _M, 8 }, { _CHGBIM, _I3, _M, 8 },
- { _BITBIM, _I3, _M, 8 }, { _BITBIM, _I3, _M, 8 }, { _BITBIM, _I3, _M, 8 }, { _BITBIM, _I3, _M, 8 },
+ { _BITBIM, _I3, _M, 8 }, { _BITBIM, _I3, _M, 8 }, { _BITBIM, _I3, _M, 8 }, { _BITBIM, _I3, _M, 8 },
{ _BITBIM, _I3, _M, 8 }, { _BITBIM, _I3, _M, 8 }, { _BITBIM, _I3, _M, 8 }, { _BITBIM, _I3, _M, 8 },
{ _JPM, _CC, _M, 4 }, { _JPM, _CC, _M, 4 }, { _JPM, _CC, _M, 4 }, { _JPM, _CC, _M, 4 },
{ _JPM, _CC, _M, 4 }, { _JPM, _CC, _M, 4 }, { _JPM, _CC, _M, 4 }, { _JPM, _CC, _M, 4 },
@@ -4749,7 +4749,7 @@ static const tlcs900inst mnemonic_c0[256] =
{ _ANDBMI, _M, _I8, 7 }, { _XORBMI, _M, _I8, 7 }, { _ORBMI, _M, _I8, 7 }, { _CPBMI, _M, _I8, 6 },
/* 40 - 5F */
- { _MULBRM, _MC16, _M, 18 }, { _MULBRM, _MC16, _M, 18 }, { _MULBRM, _MC16, _M, 18 }, { _MULBRM, _MC16, _M, 18 },
+ { _MULBRM, _MC16, _M, 18 }, { _MULBRM, _MC16, _M, 18 }, { _MULBRM, _MC16, _M, 18 }, { _MULBRM, _MC16, _M, 18 },
{ _MULBRM, _MC16, _M, 18 }, { _MULBRM, _MC16, _M, 18 }, { _MULBRM, _MC16, _M, 18 }, { _MULBRM, _MC16, _M, 18 },
{ _MULSBRM, _MC16, _M, 18 }, { _MULSBRM, _MC16, _M, 18 }, { _MULSBRM, _MC16, _M, 18 }, { _MULSBRM, _MC16, _M, 18 },
{ _MULSBRM, _MC16, _M, 18 }, { _MULSBRM, _MC16, _M, 18 }, { _MULSBRM, _MC16, _M, 18 }, { _MULSBRM, _MC16, _M, 18 },
@@ -4858,7 +4858,7 @@ static const tlcs900inst mnemonic_c8[256] =
{ _LDBRR, _C8, _R, 4 }, { _LDBRR, _C8, _R, 4 }, { _LDBRR, _C8, _R, 4 }, { _LDBRR, _C8, _R, 4 },
{ _LDBRR, _C8, _R, 4 }, { _LDBRR, _C8, _R, 4 }, { _LDBRR, _C8, _R, 4 }, { _LDBRR, _C8, _R, 4 },
{ _ADCBRR, _C8, _R, 4 }, { _ADCBRR, _C8, _R, 4 }, { _ADCBRR, _C8, _R, 4 }, { _ADCBRR, _C8, _R, 4 },
- { _ADCBRR, _C8, _R, 4 }, { _ADCBRR, _C8, _R, 4 }, { _ADCBRR, _C8, _R, 4 }, { _ADCBRR, _C8, _R, 4 },
+ { _ADCBRR, _C8, _R, 4 }, { _ADCBRR, _C8, _R, 4 }, { _ADCBRR, _C8, _R, 4 }, { _ADCBRR, _C8, _R, 4 },
{ _LDBRR, _R, _C8, 4 }, { _LDBRR, _R, _C8, 4 }, { _LDBRR, _R, _C8, 4 }, { _LDBRR, _R, _C8, 4 },
{ _LDBRR, _R, _C8, 4 }, { _LDBRR, _R, _C8, 4 }, { _LDBRR, _R, _C8, 4 }, { _LDBRR, _R, _C8, 4 },
@@ -4917,7 +4917,7 @@ static const tlcs900inst mnemonic_d0[256] =
{ _ANDWMI, _M, _I16, 8 }, { _XORWMI, _M, _I16, 8 }, { _ORWMI, _M, _I16, 8 }, { _CPWMI, _M, _I16, 6 },
/* 40 - 5F */
- { _MULWRM, _C32, _M, 26 }, { _MULWRM, _C32, _M, 26 }, { _MULWRM, _C32, _M, 26 }, { _MULWRM, _C32, _M, 26 },
+ { _MULWRM, _C32, _M, 26 }, { _MULWRM, _C32, _M, 26 }, { _MULWRM, _C32, _M, 26 }, { _MULWRM, _C32, _M, 26 },
{ _MULWRM, _C32, _M, 26 }, { _MULWRM, _C32, _M, 26 }, { _MULWRM, _C32, _M, 26 }, { _MULWRM, _C32, _M, 26 },
{ _MULSWRM, _C32, _M, 26 }, { _MULSWRM, _C32, _M, 26 }, { _MULSWRM, _C32, _M, 26 }, { _MULSWRM, _C32, _M, 26 },
{ _MULSWRM, _C32, _M, 26 }, { _MULSWRM, _C32, _M, 26 }, { _MULSWRM, _C32, _M, 26 }, { _MULSWRM, _C32, _M, 26 },
@@ -5026,7 +5026,7 @@ static const tlcs900inst mnemonic_d8[256] =
{ _LDWRR, _C16, _R, 4 }, { _LDWRR, _C16, _R, 4 }, { _LDWRR, _C16, _R, 4 }, { _LDWRR, _C16, _R, 4 },
{ _LDWRR, _C16, _R, 4 }, { _LDWRR, _C16, _R, 4 }, { _LDWRR, _C16, _R, 4 }, { _LDWRR, _C16, _R, 4 },
{ _ADCWRR, _C16, _R, 4 }, { _ADCWRR, _C16, _R, 4 }, { _ADCWRR, _C16, _R, 4 }, { _ADCWRR, _C16, _R, 4 },
- { _ADCWRR, _C16, _R, 4 }, { _ADCWRR, _C16, _R, 4 }, { _ADCWRR, _C16, _R, 4 }, { _ADCWRR, _C16, _R, 4 },
+ { _ADCWRR, _C16, _R, 4 }, { _ADCWRR, _C16, _R, 4 }, { _ADCWRR, _C16, _R, 4 }, { _ADCWRR, _C16, _R, 4 },
{ _LDWRR, _R, _C16, 4 }, { _LDWRR, _R, _C16, 4 }, { _LDWRR, _R, _C16, 4 }, { _LDWRR, _R, _C16, 4 },
{ _LDWRR, _R, _C16, 4 }, { _LDWRR, _R, _C16, 4 }, { _LDWRR, _R, _C16, 4 }, { _LDWRR, _R, _C16, 4 },
@@ -5194,7 +5194,7 @@ static const tlcs900inst mnemonic_e8[256] =
{ _LDLRR, _C32, _R, 4 }, { _LDLRR, _C32, _R, 4 }, { _LDLRR, _C32, _R, 4 }, { _LDLRR, _C32, _R, 4 },
{ _LDLRR, _C32, _R, 4 }, { _LDLRR, _C32, _R, 4 }, { _LDLRR, _C32, _R, 4 }, { _LDLRR, _C32, _R, 4 },
{ _ADCLRR, _C32, _R, 7 }, { _ADCLRR, _C32, _R, 7 }, { _ADCLRR, _C32, _R, 7 }, { _ADCLRR, _C32, _R, 7 },
- { _ADCLRR, _C32, _R, 7 }, { _ADCLRR, _C32, _R, 7 }, { _ADCLRR, _C32, _R, 7 }, { _ADCLRR, _C32, _R, 7 },
+ { _ADCLRR, _C32, _R, 7 }, { _ADCLRR, _C32, _R, 7 }, { _ADCLRR, _C32, _R, 7 }, { _ADCLRR, _C32, _R, 7 },
{ _LDLRR, _R, _C32, 4 }, { _LDLRR, _R, _C32, 4 }, { _LDLRR, _R, _C32, 4 }, { _LDLRR, _R, _C32, 4 },
{ _LDLRR, _R, _C32, 4 }, { _LDLRR, _R, _C32, 4 }, { _LDLRR, _R, _C32, 4 }, { _LDLRR, _R, _C32, 4 },
@@ -5295,7 +5295,7 @@ static const tlcs900inst mnemonic_f0[256] =
/* C0 - DF */
{ _CHGBIM, _I3, _M, 8 }, { _CHGBIM, _I3, _M, 8 }, { _CHGBIM, _I3, _M, 8 }, { _CHGBIM, _I3, _M, 8 },
{ _CHGBIM, _I3, _M, 8 }, { _CHGBIM, _I3, _M, 8 }, { _CHGBIM, _I3, _M, 8 }, { _CHGBIM, _I3, _M, 8 },
- { _BITBIM, _I3, _M, 4 }, { _BITBIM, _I3, _M, 4 }, { _BITBIM, _I3, _M, 4 }, { _BITBIM, _I3, _M, 4 },
+ { _BITBIM, _I3, _M, 4 }, { _BITBIM, _I3, _M, 4 }, { _BITBIM, _I3, _M, 4 }, { _BITBIM, _I3, _M, 4 },
{ _BITBIM, _I3, _M, 4 }, { _BITBIM, _I3, _M, 4 }, { _BITBIM, _I3, _M, 4 }, { _BITBIM, _I3, _M, 4 },
{ _JPM, _CC, _M, 4 }, { _JPM, _CC, _M, 4 }, { _JPM, _CC, _M, 4 }, { _JPM, _CC, _M, 4 },
{ _JPM, _CC, _M, 4 }, { _JPM, _CC, _M, 4 }, { _JPM, _CC, _M, 4 }, { _JPM, _CC, _M, 4 },
diff --git a/src/emu/cpu/tlcs900/dasm900.c b/src/emu/cpu/tlcs900/dasm900.c
index e9202274070..97bc94585a4 100644
--- a/src/emu/cpu/tlcs900/dasm900.c
+++ b/src/emu/cpu/tlcs900/dasm900.c
@@ -88,7 +88,7 @@ enum e_operand
};
-typedef struct
+typedef struct
{
int mnemonic;
int operand1;
@@ -119,7 +119,7 @@ static const tlcs900inst mnemonic_80[256] =
{ _AND, _M, _I8 }, { _XOR, _M, _I8 }, { _OR, _M, _I8 }, { _CP, _M, _I8 },
/* 40 - 5F */
- { _MUL, _MC16, _M }, { _MUL, _MC16, _M }, { _MUL, _MC16, _M }, { _MUL, _MC16, _M },
+ { _MUL, _MC16, _M }, { _MUL, _MC16, _M }, { _MUL, _MC16, _M }, { _MUL, _MC16, _M },
{ _MUL, _MC16, _M }, { _MUL, _MC16, _M }, { _MUL, _MC16, _M }, { _MUL, _MC16, _M },
{ _MULS, _MC16, _M }, { _MULS, _MC16, _M }, { _MULS, _MC16, _M }, { _MULS, _MC16, _M },
{ _MULS, _MC16, _M }, { _MULS, _MC16, _M }, { _MULS, _MC16, _M }, { _MULS, _MC16, _M },
@@ -203,7 +203,7 @@ static const tlcs900inst mnemonic_88[256] =
{ _AND, _M, _I8 }, { _XOR, _M, _I8 }, { _OR, _M, _I8 }, { _CP, _M, _I8 },
/* 40 - 5F */
- { _MUL, _MC16, _M }, { _MUL, _MC16, _M }, { _MUL, _MC16, _M }, { _MUL, _MC16, _M },
+ { _MUL, _MC16, _M }, { _MUL, _MC16, _M }, { _MUL, _MC16, _M }, { _MUL, _MC16, _M },
{ _MUL, _MC16, _M }, { _MUL, _MC16, _M }, { _MUL, _MC16, _M }, { _MUL, _MC16, _M },
{ _MULS, _MC16, _M }, { _MULS, _MC16, _M }, { _MULS, _MC16, _M }, { _MULS, _MC16, _M },
{ _MULS, _MC16, _M }, { _MULS, _MC16, _M }, { _MULS, _MC16, _M }, { _MULS, _MC16, _M },
@@ -287,7 +287,7 @@ static const tlcs900inst mnemonic_90[256] =
{ _AND, _M, _I16 }, { _XOR, _M, _I16 }, { _OR, _M, _I16 }, { _CP, _M, _I16 },
/* 40 - 5F */
- { _MUL, _C32, _M }, { _MUL, _C32, _M }, { _MUL, _C32, _M }, { _MUL, _C32, _M },
+ { _MUL, _C32, _M }, { _MUL, _C32, _M }, { _MUL, _C32, _M }, { _MUL, _C32, _M },
{ _MUL, _C32, _M }, { _MUL, _C32, _M }, { _MUL, _C32, _M }, { _MUL, _C32, _M },
{ _MULS, _C32, _M }, { _MULS, _C32, _M }, { _MULS, _C32, _M }, { _MULS, _C32, _M },
{ _MULS, _C32, _M }, { _MULS, _C32, _M }, { _MULS, _C32, _M }, { _MULS, _C32, _M },
@@ -371,7 +371,7 @@ static const tlcs900inst mnemonic_98[256] =
{ _AND, _M, _I16 }, { _XOR, _M, _I16 }, { _OR, _M, _I16 }, { _CP, _M, _I16 },
/* 40 - 5F */
- { _MUL, _C32, _M }, { _MUL, _C32, _M }, { _MUL, _C32, _M }, { _MUL, _C32, _M },
+ { _MUL, _C32, _M }, { _MUL, _C32, _M }, { _MUL, _C32, _M }, { _MUL, _C32, _M },
{ _MUL, _C32, _M }, { _MUL, _C32, _M }, { _MUL, _C32, _M }, { _MUL, _C32, _M },
{ _MULS, _C32, _M }, { _MULS, _C32, _M }, { _MULS, _C32, _M }, { _MULS, _C32, _M },
{ _MULS, _C32, _M }, { _MULS, _C32, _M }, { _MULS, _C32, _M }, { _MULS, _C32, _M },
@@ -581,7 +581,7 @@ static const tlcs900inst mnemonic_b0[256] =
/* C0 - DF */
{ _CHG, _I3, _M }, { _CHG, _I3, _M }, { _CHG, _I3, _M }, { _CHG, _I3, _M },
{ _CHG, _I3, _M }, { _CHG, _I3, _M }, { _CHG, _I3, _M }, { _CHG, _I3, _M },
- { _BIT, _I3, _M }, { _BIT, _I3, _M }, { _BIT, _I3, _M }, { _BIT, _I3, _M },
+ { _BIT, _I3, _M }, { _BIT, _I3, _M }, { _BIT, _I3, _M }, { _BIT, _I3, _M },
{ _BIT, _I3, _M }, { _BIT, _I3, _M }, { _BIT, _I3, _M }, { _BIT, _I3, _M },
{ _JP, _CC, _M }, { _JP, _CC, _M }, { _JP, _CC, _M }, { _JP, _CC, _M },
{ _JP, _CC, _M }, { _JP, _CC, _M }, { _JP, _CC, _M }, { _JP, _CC, _M },
@@ -665,7 +665,7 @@ static const tlcs900inst mnemonic_b8[256] =
/* C0 - DF */
{ _CHG, _I3, _M }, { _CHG, _I3, _M }, { _CHG, _I3, _M }, { _CHG, _I3, _M },
{ _CHG, _I3, _M }, { _CHG, _I3, _M }, { _CHG, _I3, _M }, { _CHG, _I3, _M },
- { _BIT, _I3, _M }, { _BIT, _I3, _M }, { _BIT, _I3, _M }, { _BIT, _I3, _M },
+ { _BIT, _I3, _M }, { _BIT, _I3, _M }, { _BIT, _I3, _M }, { _BIT, _I3, _M },
{ _BIT, _I3, _M }, { _BIT, _I3, _M }, { _BIT, _I3, _M }, { _BIT, _I3, _M },
{ _JP, _CC, _M }, { _JP, _CC, _M }, { _JP, _CC, _M }, { _JP, _CC, _M },
{ _JP, _CC, _M }, { _JP, _CC, _M }, { _JP, _CC, _M }, { _JP, _CC, _M },
@@ -707,7 +707,7 @@ static const tlcs900inst mnemonic_c0[256] =
{ _AND, _M, _I8 }, { _XOR, _M, _I8 }, { _OR, _M, _I8 }, { _CP, _M, _I8 },
/* 40 - 5F */
- { _MUL, _MC16, _M }, { _MUL, _MC16, _M }, { _MUL, _MC16, _M }, { _MUL, _MC16, _M },
+ { _MUL, _MC16, _M }, { _MUL, _MC16, _M }, { _MUL, _MC16, _M }, { _MUL, _MC16, _M },
{ _MUL, _MC16, _M }, { _MUL, _MC16, _M }, { _MUL, _MC16, _M }, { _MUL, _MC16, _M },
{ _MULS, _MC16, _M }, { _MULS, _MC16, _M }, { _MULS, _MC16, _M }, { _MULS, _MC16, _M },
{ _MULS, _MC16, _M }, { _MULS, _MC16, _M }, { _MULS, _MC16, _M }, { _MULS, _MC16, _M },
@@ -817,7 +817,7 @@ static const tlcs900inst mnemonic_c8[256] =
{ _LD, _C8, _R }, { _LD, _C8, _R }, { _LD, _C8, _R }, { _LD, _C8, _R },
{ _LD, _C8, _R }, { _LD, _C8, _R }, { _LD, _C8, _R }, { _LD, _C8, _R },
{ _ADC, _C8, _R }, { _ADC, _C8, _R }, { _ADC, _C8, _R }, { _ADC, _C8, _R },
- { _ADC, _C8, _R }, { _ADC, _C8, _R }, { _ADC, _C8, _R }, { _ADC, _C8, _R },
+ { _ADC, _C8, _R }, { _ADC, _C8, _R }, { _ADC, _C8, _R }, { _ADC, _C8, _R },
{ _LD, _R, _C8 }, { _LD, _R, _C8 }, { _LD, _R, _C8 }, { _LD, _R, _C8 },
{ _LD, _R, _C8 }, { _LD, _R, _C8 }, { _LD, _R, _C8 }, { _LD, _R, _C8 },
@@ -876,7 +876,7 @@ static const tlcs900inst mnemonic_d0[256] =
{ _AND, _M, _I16 }, { _XOR, _M, _I16 }, { _OR, _M, _I16 }, { _CP, _M, _I16 },
/* 40 - 5F */
- { _MUL, _C32, _M }, { _MUL, _C32, _M }, { _MUL, _C32, _M }, { _MUL, _C32, _M },
+ { _MUL, _C32, _M }, { _MUL, _C32, _M }, { _MUL, _C32, _M }, { _MUL, _C32, _M },
{ _MUL, _C32, _M }, { _MUL, _C32, _M }, { _MUL, _C32, _M }, { _MUL, _C32, _M },
{ _MULS, _C32, _M }, { _MULS, _C32, _M }, { _MULS, _C32, _M }, { _MULS, _C32, _M },
{ _MULS, _C32, _M }, { _MULS, _C32, _M }, { _MULS, _C32, _M }, { _MULS, _C32, _M },
@@ -985,7 +985,7 @@ static const tlcs900inst mnemonic_d8[256] =
{ _LD, _C16, _R }, { _LD, _C16, _R }, { _LD, _C16, _R }, { _LD, _C16, _R },
{ _LD, _C16, _R }, { _LD, _C16, _R }, { _LD, _C16, _R }, { _LD, _C16, _R },
{ _ADC, _C16, _R }, { _ADC, _C16, _R }, { _ADC, _C16, _R }, { _ADC, _C16, _R },
- { _ADC, _C16, _R }, { _ADC, _C16, _R }, { _ADC, _C16, _R }, { _ADC, _C16, _R },
+ { _ADC, _C16, _R }, { _ADC, _C16, _R }, { _ADC, _C16, _R }, { _ADC, _C16, _R },
{ _LD, _R, _C16 }, { _LD, _R, _C16 }, { _LD, _R, _C16 }, { _LD, _R, _C16 },
{ _LD, _R, _C16 }, { _LD, _R, _C16 }, { _LD, _R, _C16 }, { _LD, _R, _C16 },
@@ -1153,7 +1153,7 @@ static const tlcs900inst mnemonic_e8[256] =
{ _LD, _C32, _R }, { _LD, _C32, _R }, { _LD, _C32, _R }, { _LD, _C32, _R },
{ _LD, _C32, _R }, { _LD, _C32, _R }, { _LD, _C32, _R }, { _LD, _C32, _R },
{ _ADC, _C32, _R }, { _ADC, _C32, _R }, { _ADC, _C32, _R }, { _ADC, _C32, _R },
- { _ADC, _C32, _R }, { _ADC, _C32, _R }, { _ADC, _C32, _R }, { _ADC, _C32, _R },
+ { _ADC, _C32, _R }, { _ADC, _C32, _R }, { _ADC, _C32, _R }, { _ADC, _C32, _R },
{ _LD, _R, _C32 }, { _LD, _R, _C32 }, { _LD, _R, _C32 }, { _LD, _R, _C32 },
{ _LD, _R, _C32 }, { _LD, _R, _C32 }, { _LD, _R, _C32 }, { _LD, _R, _C32 },
@@ -1254,7 +1254,7 @@ static const tlcs900inst mnemonic_f0[256] =
/* C0 - DF */
{ _CHG, _I3, _M }, { _CHG, _I3, _M }, { _CHG, _I3, _M }, { _CHG, _I3, _M },
{ _CHG, _I3, _M }, { _CHG, _I3, _M }, { _CHG, _I3, _M }, { _CHG, _I3, _M },
- { _BIT, _I3, _M }, { _BIT, _I3, _M }, { _BIT, _I3, _M }, { _BIT, _I3, _M },
+ { _BIT, _I3, _M }, { _BIT, _I3, _M }, { _BIT, _I3, _M }, { _BIT, _I3, _M },
{ _BIT, _I3, _M }, { _BIT, _I3, _M }, { _BIT, _I3, _M }, { _BIT, _I3, _M },
{ _JP, _CC, _M }, { _JP, _CC, _M }, { _JP, _CC, _M }, { _JP, _CC, _M },
{ _JP, _CC, _M }, { _JP, _CC, _M }, { _JP, _CC, _M }, { _JP, _CC, _M },
@@ -1948,7 +1948,7 @@ CPU_DISASSEMBLE( tlcs900 )
case _CR32:
imm = oprom[ pos++ ];
switch( imm )
- {
+ {
case 0x00:
dst += sprintf( dst, " DMAS0" );
break;
@@ -1965,7 +1965,7 @@ CPU_DISASSEMBLE( tlcs900 )
dst += sprintf( dst, " DMAD0" );
break;
case 0x14:
- dst += sprintf( dst, " DMAD1" );
+ dst += sprintf( dst, " DMAD1" );
break;
case 0x18:
dst += sprintf( dst, " DMAD2" );
@@ -1976,7 +1976,7 @@ CPU_DISASSEMBLE( tlcs900 )
default:
dst += sprintf( dst, " unknown" );
break;
- }
+ }
break;
case _D8:
@@ -2148,7 +2148,7 @@ CPU_DISASSEMBLE( tlcs900 )
dst += sprintf( dst, ",DMAD0" );
break;
case 0x14:
- dst += sprintf( dst, ",DMAD1" );
+ dst += sprintf( dst, ",DMAD1" );
break;
case 0x18:
dst += sprintf( dst, ",DMAD2" );
diff --git a/src/emu/video/tms9927.c b/src/emu/video/tms9927.c
index 461ebf0b739..ff1608561c2 100644
--- a/src/emu/video/tms9927.c
+++ b/src/emu/video/tms9927.c
@@ -86,7 +86,7 @@ static void generic_access(const device_config *device, offs_t offset)
if (tms->selfload != NULL)
{
int cur;
-
+
for (cur = 0; cur < 7; cur++)
tms9927_w(device, cur, tms->selfload[cur]);
for (cur = 0; cur < 1; cur++)
@@ -94,12 +94,12 @@ static void generic_access(const device_config *device, offs_t offset)
}
else
popmessage("tms9927: self-load initiated with no PROM!");
-
+
/* processor self-load waits with reset enabled;
- non-processor just goes ahead */
+ non-processor just goes ahead */
tms->reset = (offset == 0x07);
break;
-
+
case 0x0a: /* Reset */
if (!tms->reset)
{
@@ -107,13 +107,13 @@ static void generic_access(const device_config *device, offs_t offset)
tms->reset = TRUE;
}
break;
-
+
case 0x0b: /* Up scroll */
mame_printf_debug("Up scroll\n");
video_screen_update_now(tms->screen);
tms->start_datarow = (tms->start_datarow + 1) % DATA_ROWS_PER_FRAME(tms);
break;
-
+
case 0x0e: /* Start timing chain */
if (tms->reset)
{
@@ -129,7 +129,7 @@ mame_printf_debug("Up scroll\n");
WRITE8_DEVICE_HANDLER( tms9927_w )
{
tms9927_state *tms = get_safe_token(device);
-
+
switch (offset)
{
case 0x00: /* HORIZONTAL CHARACTER COUNT */
@@ -142,7 +142,7 @@ WRITE8_DEVICE_HANDLER( tms9927_w )
tms->reg[offset] = data;
recompute_parameters(tms, FALSE);
break;
-
+
case 0x0c: /* LOAD CURSOR CHARACTER ADDRESS */
case 0x0d: /* LOAD CURSOR ROW ADDRESS */
mame_printf_debug("Cursor address changed\n");
@@ -160,13 +160,13 @@ mame_printf_debug("Cursor address changed\n");
READ8_DEVICE_HANDLER( tms9927_r )
{
tms9927_state *tms = get_safe_token(device);
-
+
switch (offset)
{
case 0x08: /* READ CURSOR CHARACTER ADDRESS */
case 0x09: /* READ CURSOR ROW ADDRESS */
return tms->reg[offset - 0x08 + 7];
-
+
default:
generic_access(device, offset);
break;
@@ -194,7 +194,7 @@ int tms9927_cursor_bounds(const device_config *device, rectangle *bounds)
tms9927_state *tms = get_safe_token(device);
int cursorx = CURSOR_CHAR_ADDRESS(tms);
int cursory = CURSOR_ROW_ADDRESS(tms);
-
+
bounds->min_x = cursorx * tms->hpixels_per_column;
bounds->max_x = bounds->min_x + tms->hpixels_per_column - 1;
bounds->min_y = cursory * SCANS_PER_DATA_ROW(tms);
@@ -209,24 +209,24 @@ static void recompute_parameters(tms9927_state *tms, int postload)
UINT16 offset_hpix, offset_vpix;
attoseconds_t refresh;
rectangle visarea;
-
+
if (tms->intf == NULL || tms->reset)
return;
/* compute the screen sizes */
tms->total_hpix = HCOUNT(tms) * tms->hpixels_per_column;
tms->total_vpix = SCAN_LINES_PER_FRAME(tms);
-
+
/* determine the visible area, avoid division by 0 */
tms->visible_hpix = CHARS_PER_DATA_ROW(tms) * tms->hpixels_per_column;
tms->visible_vpix = (LAST_DISP_DATA_ROW(tms) + 1) * SCANS_PER_DATA_ROW(tms);
-
+
/* determine the horizontal/vertical offsets */
offset_hpix = HSYNC_DELAY(tms) * tms->hpixels_per_column;
offset_vpix = VERTICAL_DATA_START(tms);
mame_printf_debug("TMS9937: Total = %dx%d, Visible = %dx%d, Offset=%dx%d, Skew=%d\n", tms->total_hpix, tms->total_vpix, tms->visible_hpix, tms->visible_vpix, offset_hpix, offset_vpix, SKEW_BITS(tms));
-
+
/* see if it all makes sense */
tms->valid_config = TRUE;
if (tms->visible_hpix > tms->total_hpix || tms->visible_vpix > tms->total_vpix)
@@ -234,11 +234,11 @@ static void recompute_parameters(tms9927_state *tms, int postload)
tms->valid_config = FALSE;
logerror("tms9927: invalid visible size (%dx%d) versus total size (%dx%d)\n", tms->visible_hpix, tms->visible_vpix, tms->total_hpix, tms->total_vpix);
}
-
+
/* update */
if (!tms->valid_config)
return;
-
+
/* create a visible area */
/* fix me: how do the offsets fit in here? */
visarea.min_x = 0;
@@ -247,7 +247,7 @@ static void recompute_parameters(tms9927_state *tms, int postload)
visarea.max_y = tms->visible_vpix - 1;
refresh = HZ_TO_ATTOSECONDS(tms->clock) * tms->total_hpix * tms->total_vpix;
-
+
video_screen_configure(tms->screen, tms->total_hpix, tms->total_vpix, &visarea, refresh);
}
@@ -260,7 +260,7 @@ static DEVICE_START( tms9927 )
/* validate arguments */
assert(device != NULL);
assert(device->tag != NULL);
-
+
tms->intf = (const tms9927_interface *)device->static_config;
if (tms->intf != NULL)
@@ -275,7 +275,7 @@ static DEVICE_START( tms9927 )
/* get the screen device */
tms->screen = devtag_get_device(device->machine, tms->intf->screen_tag);
assert(tms->screen != NULL);
-
+
/* get the self-load PROM */
if (tms->intf->selfload_region != NULL)
{