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author Aaron Giles <aaron@aarongiles.com>2008-04-03 07:57:25 +0000
committer Aaron Giles <aaron@aarongiles.com>2008-04-03 07:57:25 +0000
commit31336e491e1280636e44cb68de3f6f9e3091261c (patch)
treee0932c6dbaec5354d0034526cf28e9a8646db14c /src/emu
parentefbe64428a6f906768333dc49f44cf5e37ac0c34 (diff)
Cleanups and version bump to 0.124u1.mame0124u1
Diffstat (limited to 'src/emu')
-rw-r--r--src/emu/cpu/cop400/410ops.c626
-rw-r--r--src/emu/cpu/cop400/420ops.c162
-rw-r--r--src/emu/cpu/cop400/cop410.c10
-rw-r--r--src/emu/cpu/cop400/cop420.c22
-rw-r--r--src/emu/debug/debugcpu.c2
-rw-r--r--src/emu/inptport.c2
-rw-r--r--src/emu/input.c2
-rw-r--r--src/emu/input.h6
-rw-r--r--src/emu/machine/6840ptm.c2
-rw-r--r--src/emu/machine/pit8253.c20
-rw-r--r--src/emu/machine/pit8253.h4
-rw-r--r--src/emu/machine/scsicd.c2
-rw-r--r--src/emu/memory.c2
-rw-r--r--src/emu/sound/disc_flt.c2
-rw-r--r--src/emu/sound/discrete.c4
-rw-r--r--src/emu/sound/discrete.h30
-rw-r--r--src/emu/video/cdp1869.c14
17 files changed, 456 insertions, 456 deletions
diff --git a/src/emu/cpu/cop400/410ops.c b/src/emu/cpu/cop400/410ops.c
index 3e1aeef34d3..c02d24fd1f7 100644
--- a/src/emu/cpu/cop400/410ops.c
+++ b/src/emu/cpu/cop400/410ops.c
@@ -52,7 +52,7 @@
static TIMER_CALLBACK(cop410_serial_tick)
{
int cpunum = param;
-
+
cpuintrf_push_context(cpunum);
if (BIT(EN, 0))
@@ -81,7 +81,7 @@ static TIMER_CALLBACK(cop410_serial_tick)
}
else
{
- /* SIO is a shift register */
+ /* SIO is a shift register */
// serial output
@@ -140,17 +140,17 @@ INSTRUCTION(illegal)
/*
- Mnemonic: ASC
-
- Hex Code: 30
- Binary: 0 0 1 1 0 0 0 0
+ Mnemonic: ASC
+
+ Hex Code: 30
+ Binary: 0 0 1 1 0 0 0 0
- Data Flow: A + C + RAM(B) -> A
- Carry -> C
+ Data Flow: A + C + RAM(B) -> A
+ Carry -> C
- Skip Conditions: Carry
+ Skip Conditions: Carry
- Description: Add with Carry, Skip on Carry
+ Description: Add with Carry, Skip on Carry
*/
@@ -172,35 +172,35 @@ INSTRUCTION(asc)
/*
- Mnemonic: ADD
-
- Hex Code: 31
- Binary: 0 0 1 1 0 0 0 1
+ Mnemonic: ADD
+
+ Hex Code: 31
+ Binary: 0 0 1 1 0 0 0 1
- Data Flow: A + RAM(B) -> A
+ Data Flow: A + RAM(B) -> A
- Description: Add RAM to A
+ Description: Add RAM to A
*/
INSTRUCTION(add)
{
- A = (A + RAM_R(B)) & 0x0F;
+ A = (A + RAM_R(B)) & 0x0F;
}
/*
- Mnemonic: AISC
-
- Operand: y
- Hex Code: 5-
- Binary: 0 1 0 1 y3 y2 y1 y0
+ Mnemonic: AISC
- Data Flow: A + y -> A
+ Operand: y
+ Hex Code: 5-
+ Binary: 0 1 0 1 y3 y2 y1 y0
- Skip Conditions: Carry
+ Data Flow: A + y -> A
- Description: Add Immediate, Skip on Carry (y != 0)
+ Skip Conditions: Carry
+
+ Description: Add Immediate, Skip on Carry (y != 0)
*/
@@ -219,14 +219,14 @@ INSTRUCTION(aisc)
/*
- Mnemonic: CLRA
-
- Hex Code: 00
- Binary: 0 0 0 0 0 0 0 0
+ Mnemonic: CLRA
+
+ Hex Code: 00
+ Binary: 0 0 0 0 0 0 0 0
- Data Flow: 0 -> A
+ Data Flow: 0 -> A
- Description: Clear A
+ Description: Clear A
*/
@@ -237,14 +237,14 @@ INSTRUCTION(clra)
/*
- Mnemonic: COMP
-
- Hex Code: 40
- Binary: 0 1 0 0 0 0 0 0
+ Mnemonic: COMP
+
+ Hex Code: 40
+ Binary: 0 1 0 0 0 0 0 0
- Data Flow: ~A -> A
+ Data Flow: ~A -> A
- Description: Ones Complement of A to A
+ Description: Ones Complement of A to A
*/
@@ -255,12 +255,12 @@ INSTRUCTION(comp)
/*
- Mnemonic: NOP
-
- Hex Code: 44
- Binary: 0 1 0 0 0 1 0 0
+ Mnemonic: NOP
- Description: No Operation
+ Hex Code: 44
+ Binary: 0 1 0 0 0 1 0 0
+
+ Description: No Operation
*/
@@ -271,14 +271,14 @@ INSTRUCTION(nop)
/*
- Mnemonic: RC
-
- Hex Code: 32
- Binary: 0 0 1 1 0 0 1 0
+ Mnemonic: RC
+
+ Hex Code: 32
+ Binary: 0 0 1 1 0 0 1 0
- Data Flow: "0" -> C
+ Data Flow: "0" -> C
- Description: Reset C
+ Description: Reset C
*/
@@ -289,14 +289,14 @@ INSTRUCTION(rc)
/*
- Mnemonic: SC
-
- Hex Code: 22
- Binary: 0 0 1 0 0 0 1 0
+ Mnemonic: SC
+
+ Hex Code: 22
+ Binary: 0 0 1 0 0 0 1 0
- Data Flow: "1" -> C
+ Data Flow: "1" -> C
- Description: Set C
+ Description: Set C
*/
@@ -307,14 +307,14 @@ INSTRUCTION(sc)
/*
- Mnemonic: XOR
-
- Hex Code: 02
- Binary: 0 0 0 0 0 0 1 0
+ Mnemonic: XOR
- Data Flow: A ^ RAM(B) -> A
+ Hex Code: 02
+ Binary: 0 0 0 0 0 0 1 0
- Description: Exclusive-OR RAM with A
+ Data Flow: A ^ RAM(B) -> A
+
+ Description: Exclusive-OR RAM with A
*/
@@ -327,14 +327,14 @@ INSTRUCTION(xor)
/*
- Mnemonic: JID
-
- Hex Code: FF
- Binary: 1 1 1 1 1 1 1 1
+ Mnemonic: JID
+
+ Hex Code: FF
+ Binary: 1 1 1 1 1 1 1 1
- Data Flow: ROM(PC9:8,A,M) -> PC7:0
+ Data Flow: ROM(PC9:8,A,M) -> PC7:0
- Description: Jump Indirect
+ Description: Jump Indirect
*/
@@ -346,15 +346,15 @@ INSTRUCTION(jid)
/*
- Mnemonic: JMP
-
- Operand: a
- Hex Code: 6- --
- Binary: 0 1 1 0 0 0 a9 a8 a7 a6 a5 a4 a3 a2 a1 a0
+ Mnemonic: JMP
- Data Flow: a -> PC
+ Operand: a
+ Hex Code: 6- --
+ Binary: 0 1 1 0 0 0 a9 a8 a7 a6 a5 a4 a3 a2 a1 a0
- Description: Jump
+ Data Flow: a -> PC
+
+ Description: Jump
*/
@@ -367,21 +367,21 @@ INSTRUCTION(jmp)
/*
- Mnemonic: JP
-
- Operand: a
- Hex Code: --
- Binary: 1 a6 a5 a4 a3 a2 a1 a0
- (pages 2,3 only)
+ Mnemonic: JP
+
+ Operand: a
+ Hex Code: --
+ Binary: 1 a6 a5 a4 a3 a2 a1 a0
+ (pages 2,3 only)
- 1 1 a5 a4 a3 a2 a1 a0
- (all other pages)
+ 1 1 a5 a4 a3 a2 a1 a0
+ (all other pages)
- Data Flow: a -> PC6:0
+ Data Flow: a -> PC6:0
- a -> PC5:0
+ a -> PC5:0
- Description: Jump within Page
+ Description: Jump within Page
*/
@@ -410,16 +410,16 @@ INSTRUCTION(jp)
/*
- Mnemonic: JSR
-
- Operand: a
- Hex Code: 6- --
- Binary: 0 1 1 0 1 0 a9 a8 a7 a6 a5 a4 a3 a2 a1 a0
+ Mnemonic: JSR
+
+ Operand: a
+ Hex Code: 6- --
+ Binary: 0 1 1 0 1 0 a9 a8 a7 a6 a5 a4 a3 a2 a1 a0
- Data Flow: PC + 1 -> SA -> SB -> SC
- a -> PC
+ Data Flow: PC + 1 -> SA -> SB -> SC
+ a -> PC
- Description: Jump to Subroutine
+ Description: Jump to Subroutine
*/
@@ -433,14 +433,14 @@ INSTRUCTION(jsr)
/*
- Mnemonic: RET
-
- Hex Code: 48
- Binary: 0 1 0 0 1 0 0 0
+ Mnemonic: RET
- Data Flow: SC -> SB -> SA -> PC
+ Hex Code: 48
+ Binary: 0 1 0 0 1 0 0 0
- Description: Return from Subroutine
+ Data Flow: SC -> SB -> SA -> PC
+
+ Description: Return from Subroutine
*/
@@ -451,16 +451,16 @@ INSTRUCTION(ret)
/*
- Mnemonic: RETSK
-
- Hex Code: 49
- Binary: 0 1 0 0 1 0 0 1
+ Mnemonic: RETSK
+
+ Hex Code: 49
+ Binary: 0 1 0 0 1 0 0 1
- Data Flow: SC -> SB -> SA -> PC
+ Data Flow: SC -> SB -> SA -> PC
- Skip Conditions: Always Skip on Return
+ Skip Conditions: Always Skip on Return
- Description: Return from Subroutine then Skip
+ Description: Return from Subroutine then Skip
*/
@@ -474,15 +474,15 @@ INSTRUCTION(retsk)
/*
- Mnemonic: CAMQ
-
- Hex Code: 33 3C
- Binary: 0 0 1 1 0 0 1 1 0 0 1 1 1 1 0 0
+ Mnemonic: CAMQ
- Data Flow: A -> Q7:4
- RAM(B) -> Q3:0
+ Hex Code: 33 3C
+ Binary: 0 0 1 1 0 0 1 1 0 0 1 1 1 1 0 0
- Description: Copy A, RAM to Q
+ Data Flow: A -> Q7:4
+ RAM(B) -> Q3:0
+
+ Description: Copy A, RAM to Q
*/
@@ -493,16 +493,16 @@ INSTRUCTION(camq)
/*
- Mnemonic: LD
-
- Operand: r
- Hex Code: -5
- Binary: 0 0 r1 r0 0 1 0 1
+ Mnemonic: LD
+
+ Operand: r
+ Hex Code: -5
+ Binary: 0 0 r1 r0 0 1 0 1
- Data Flow: RAM(B) -> A
- Br ^ r -> Br
+ Data Flow: RAM(B) -> A
+ Br ^ r -> Br
- Description: Load RAM into A, Exclusive-OR Br with r
+ Description: Load RAM into A, Exclusive-OR Br with r
*/
@@ -516,15 +516,15 @@ INSTRUCTION(ld)
/*
- Mnemonic: LQID
-
- Hex Code: BF
- Binary: 1 0 1 1 1 1 1 1
+ Mnemonic: LQID
+
+ Hex Code: BF
+ Binary: 1 0 1 1 1 1 1 1
- Data Flow: ROM(PC9:8,A,M) -> Q
- SB -> SC
+ Data Flow: ROM(PC9:8,A,M) -> Q
+ SB -> SC
- Description: Load Q Indirect
+ Description: Load Q Indirect
*/
@@ -538,29 +538,29 @@ INSTRUCTION(lqid)
/*
- Mnemonic: RMB
-
- Operand: 0
- 1
- 2
- 3
+ Mnemonic: RMB
- Hex Code: 4C
- 45
- 42
- 43
+ Operand: 0
+ 1
+ 2
+ 3
- Binary: 0 1 0 0 1 1 0 0
- 0 1 0 0 0 1 0 1
- 0 1 0 0 0 0 1 0
- 0 1 0 0 0 0 1 1
+ Hex Code: 4C
+ 45
+ 42
+ 43
- Data Flow: 0 -> RAM(B)0
- 0 -> RAM(B)1
- 0 -> RAM(B)2
- 0 -> RAM(B)3
+ Binary: 0 1 0 0 1 1 0 0
+ 0 1 0 0 0 1 0 1
+ 0 1 0 0 0 0 1 0
+ 0 1 0 0 0 0 1 1
- Description: Reset RAM Bit
+ Data Flow: 0 -> RAM(B)0
+ 0 -> RAM(B)1
+ 0 -> RAM(B)2
+ 0 -> RAM(B)3
+
+ Description: Reset RAM Bit
*/
@@ -571,29 +571,29 @@ INSTRUCTION(rmb3) { RAM_W(B, RAM_R(B) & 0x7); }
/*
- Mnemonic: SMB
-
- Operand: 0
- 1
- 2
- 3
+ Mnemonic: SMB
+
+ Operand: 0
+ 1
+ 2
+ 3
- Hex Code: 4D
- 47
- 46
- 4B
+ Hex Code: 4D
+ 47
+ 46
+ 4B
- Binary: 0 1 0 0 1 1 0 1
- 0 1 0 0 0 1 1 1
- 0 1 0 0 0 1 1 0
- 0 1 0 0 1 0 1 1
+ Binary: 0 1 0 0 1 1 0 1
+ 0 1 0 0 0 1 1 1
+ 0 1 0 0 0 1 1 0
+ 0 1 0 0 1 0 1 1
- Data Flow: 1 -> RAM(B)0
- 1 -> RAM(B)1
- 1 -> RAM(B)2
- 1 -> RAM(B)3
+ Data Flow: 1 -> RAM(B)0
+ 1 -> RAM(B)1
+ 1 -> RAM(B)2
+ 1 -> RAM(B)3
- Description: Set RAM Bit
+ Description: Set RAM Bit
*/
@@ -604,16 +604,16 @@ INSTRUCTION(smb3) { RAM_W(B, RAM_R(B) | 0x8); }
/*
- Mnemonic: STII
-
- Operand: y
- Hex Code: 7-
- Binary: 0 1 1 1 y3 y2 y1 y0
+ Mnemonic: STII
- Data Flow: y -> RAM(B)
- Bd + 1 -> Bd
+ Operand: y
+ Hex Code: 7-
+ Binary: 0 1 1 1 y3 y2 y1 y0
- Description: Store Memory Immediate and Increment Bd
+ Data Flow: y -> RAM(B)
+ Bd + 1 -> Bd
+
+ Description: Store Memory Immediate and Increment Bd
*/
@@ -630,16 +630,16 @@ INSTRUCTION(stii)
/*
- Mnemonic: X
-
- Operand: r
- Hex Code: -6
- Binary: 0 0 r1 r0 0 1 1 0
+ Mnemonic: X
+
+ Operand: r
+ Hex Code: -6
+ Binary: 0 0 r1 r0 0 1 1 0
- Data Flow: RAM(B) <-> A
- Br ^ r -> Br
+ Data Flow: RAM(B) <-> A
+ Br ^ r -> Br
- Description: Exchange RAM with A, Exclusive-OR Br with r
+ Description: Exchange RAM with A, Exclusive-OR Br with r
*/
@@ -656,15 +656,15 @@ INSTRUCTION(x)
/*
- Mnemonic: XAD
-
- Operand: r,d
- Hex Code: 23 --
- Binary: 0 0 1 0 0 0 1 1 1 0 r1 r0 d3 d2 d1 d0
+ Mnemonic: XAD
+
+ Operand: r,d
+ Hex Code: 23 --
+ Binary: 0 0 1 0 0 0 1 1 1 0 r1 r0 d3 d2 d1 d0
- Data Flow: RAM(r,d) <-> A
+ Data Flow: RAM(r,d) <-> A
- Description: Exchange A with RAM pointed to directly by r,d
+ Description: Exchange A with RAM pointed to directly by r,d
*/
@@ -680,19 +680,19 @@ INSTRUCTION(xad)
/*
- Mnemonic: XDS
-
- Operand: r
- Hex Code: -7
- Binary: 0 0 r1 r0 0 1 1 1
+ Mnemonic: XDS
- Data Flow: RAM(B) <-> A
- Bd - 1 -> Bd
- Br ^ r -> Br
+ Operand: r
+ Hex Code: -7
+ Binary: 0 0 r1 r0 0 1 1 1
- Skip Conditions: Bd decrements past 0
+ Data Flow: RAM(B) <-> A
+ Bd - 1 -> Bd
+ Br ^ r -> Br
- Description: Exchange RAM with A and Decrement Bd, Exclusive-OR Br with r
+ Skip Conditions: Bd decrements past 0
+
+ Description: Exchange RAM with A and Decrement Bd, Exclusive-OR Br with r
*/
@@ -715,19 +715,19 @@ INSTRUCTION(xds)
/*
- Mnemonic: XIS
-
- Operand: r
- Hex Code: -4
- Binary: 0 0 r1 r0 0 1 0 0
+ Mnemonic: XIS
+
+ Operand: r
+ Hex Code: -4
+ Binary: 0 0 r1 r0 0 1 0 0
- Data Flow: RAM(B) <-> A
- Bd + 1 -> Bd
- Br ^ r -> Br
+ Data Flow: RAM(B) <-> A
+ Bd + 1 -> Bd
+ Br ^ r -> Br
- Skip Conditions: Bd increments past 15
+ Skip Conditions: Bd increments past 15
- Description: Exchange RAM with A and Increment Bd, Exclusive-OR Br with r
+ Description: Exchange RAM with A and Increment Bd, Exclusive-OR Br with r
*/
@@ -752,14 +752,14 @@ INSTRUCTION(xis)
/*
- Mnemonic: CAB
-
- Hex Code: 50
- Binary: 0 1 0 1 0 0 0 0 0
+ Mnemonic: CAB
- Data Flow: A -> Bd
+ Hex Code: 50
+ Binary: 0 1 0 1 0 0 0 0 0
- Description: Copy A to Bd
+ Data Flow: A -> Bd
+
+ Description: Copy A to Bd
*/
@@ -770,14 +770,14 @@ INSTRUCTION(cab)
/*
- Mnemonic: CBA
-
- Hex Code: 4E
- Binary: 0 1 0 0 1 1 1 0
+ Mnemonic: CBA
+
+ Hex Code: 4E
+ Binary: 0 1 0 0 1 1 1 0
- Data Flow: Bd -> A
+ Data Flow: Bd -> A
- Description: Copy Bd to A
+ Description: Copy Bd to A
*/
@@ -788,20 +788,20 @@ INSTRUCTION(cba)
/*
- Mnemonic: LBI
-
- Operand: r,d
- Hex Code: --
- 33 --
+ Mnemonic: LBI
+
+ Operand: r,d
+ Hex Code: --
+ 33 --
- Binary: 0 0 r1 r0 d3 d2 d1 d0 (d-1)
- 0 0 1 1 0 0 1 1 1 0 r1 r0 d3 d2 d1 d0
+ Binary: 0 0 r1 r0 d3 d2 d1 d0 (d-1)
+ 0 0 1 1 0 0 1 1 1 0 r1 r0 d3 d2 d1 d0
- Data Flow: r,d -> B
+ Data Flow: r,d -> B
- Skip Conditions: Skip until not a LBI
+ Skip Conditions: Skip until not a LBI
- Description: Load B Immediate with r,d
+ Description: Load B Immediate with r,d
*/
@@ -821,15 +821,15 @@ INSTRUCTION(lbi)
/*
- Mnemonic: LEI
-
- Operand: y
- Hex Code: 33 6-
- Binary: 0 0 1 1 0 0 1 1 0 1 1 0 y3 y2 y1 y0
+ Mnemonic: LEI
- Data Flow: y -> EN
+ Operand: y
+ Hex Code: 33 6-
+ Binary: 0 0 1 1 0 0 1 1 0 1 1 0 y3 y2 y1 y0
- Description: Load EN Immediate
+ Data Flow: y -> EN
+
+ Description: Load EN Immediate
*/
@@ -849,32 +849,32 @@ INSTRUCTION(lei)
/*
- Mnemonic: SKC
-
- Hex Code: 20
- Binary: 0 0 1 0 0 0 0 0
+ Mnemonic: SKC
+
+ Hex Code: 20
+ Binary: 0 0 1 0 0 0 0 0
- Skip Conditions: C = "1"
+ Skip Conditions: C = "1"
- Description: Skip if C is True
+ Description: Skip if C is True
*/
INSTRUCTION(skc)
{
- if (C == 1) skip = 1;
+ if (C == 1) skip = 1;
}
/*
- Mnemonic: SKE
-
- Hex Code: 21
- Binary: 0 0 1 0 0 0 0 1
+ Mnemonic: SKE
- Skip Conditions: A = RAM(B)
+ Hex Code: 21
+ Binary: 0 0 1 0 0 0 0 1
- Description: Skip if A Equals RAM
+ Skip Conditions: A = RAM(B)
+
+ Description: Skip if A Equals RAM
*/
@@ -885,14 +885,14 @@ INSTRUCTION(ske)
/*
- Mnemonic: SKGZ
-
- Hex Code: 33 21
- Binary: 00 0 1 1 0 0 1 1 0 0 1 0 0 0 0 1
+ Mnemonic: SKGZ
+
+ Hex Code: 33 21
+ Binary: 00 0 1 1 0 0 1 1 0 0 1 0 0 0 0 1
- Skip Conditions: G3:0 = 0
+ Skip Conditions: G3:0 = 0
- Description: Skip if G is Zero (all 4 bits)
+ Description: Skip if G is Zero (all 4 bits)
*/
@@ -903,21 +903,21 @@ INSTRUCTION(skgz)
/*
- Mnemonic: SKGBZ
-
- Hex Code: 33 01
- 33 11
- 33 03
- 33 13
-
- Binary:
+ Mnemonic: SKGBZ
+
+ Hex Code: 33 01
+ 33 11
+ 33 03
+ 33 13
- Skip Conditions: G0 = 0
- G1 = 0
- G2 = 0
- G3 = 0
+ Binary:
- Description: Skip if G Bit is Zero
+ Skip Conditions: G0 = 0
+ G1 = 0
+ G2 = 0
+ G3 = 0
+
+ Description: Skip if G Bit is Zero
*/
@@ -933,21 +933,21 @@ INSTRUCTION(skgbz3) { skgbz(3); }
/*
- Mnemonic: SKMBZ
-
- Hex Code: 01
- 11
- 03
- 13
+ Mnemonic: SKMBZ
+
+ Hex Code: 01
+ 11
+ 03
+ 13
- Binary:
+ Binary:
- Skip Conditions: RAM(B)0 = 0
- RAM(B)0 = 1
- RAM(B)0 = 2
- RAM(B)0 = 3
+ Skip Conditions: RAM(B)0 = 0
+ RAM(B)0 = 1
+ RAM(B)0 = 2
+ RAM(B)0 = 3
- Description: Skip if RAM Bit is Zero
+ Description: Skip if RAM Bit is Zero
*/
@@ -965,14 +965,14 @@ INSTRUCTION(skmbz3) { skmbz(3); }
/*
- Mnemonic: ING
-
- Hex Code: 33 2A
- Binary:
+ Mnemonic: ING
- Data Flow: G -> A
+ Hex Code: 33 2A
+ Binary:
- Description: Input G Ports to A
+ Data Flow: G -> A
+
+ Description: Input G Ports to A
*/
@@ -983,15 +983,15 @@ INSTRUCTION(ing)
/*
- Mnemonic: INL
-
- Hex Code: 33 2E
- Binary:
+ Mnemonic: INL
+
+ Hex Code: 33 2E
+ Binary:
- Data Flow: L7:4 -> RAM(B)
- L3:0 -> A
+ Data Flow: L7:4 -> RAM(B)
+ L3:0 -> A
- Description: Input L Ports to RAM,A
+ Description: Input L Ports to RAM,A
*/
@@ -1005,14 +1005,14 @@ INSTRUCTION(inl)
/*
- Mnemonic: OBD
-
- Hex Code: 33 3E
- Binary:
+ Mnemonic: OBD
+
+ Hex Code: 33 3E
+ Binary:
- Data Flow: Bd -> D
+ Data Flow: Bd -> D
- Description: Output Bd to D Outputs
+ Description: Output Bd to D Outputs
*/
@@ -1023,14 +1023,14 @@ INSTRUCTION(obd)
/*
- Mnemonic: OMG
-
- Hex Code: 33 3A
- Binary:
+ Mnemonic: OMG
- Data Flow: RAM(B) -> G
+ Hex Code: 33 3A
+ Binary:
- Description: Output RAM to G Ports
+ Data Flow: RAM(B) -> G
+
+ Description: Output RAM to G Ports
*/
@@ -1041,15 +1041,15 @@ INSTRUCTION(omg)
/*
- Mnemonic: XAS
-
- Hex Code: 4F
- Binary: 0 1 0 0 1 1 1 1
+ Mnemonic: XAS
+
+ Hex Code: 4F
+ Binary: 0 1 0 0 1 1 1 1
- Data Flow: A <-> SIO
- C -> SK
+ Data Flow: A <-> SIO
+ C -> SK
- Description: Exchange A with SIO
+ Description: Exchange A with SIO
*/
diff --git a/src/emu/cpu/cop400/420ops.c b/src/emu/cpu/cop400/420ops.c
index 2fd351a2c3c..9dc6645d25d 100644
--- a/src/emu/cpu/cop400/420ops.c
+++ b/src/emu/cpu/cop400/420ops.c
@@ -23,14 +23,14 @@
/*
- Mnemonic: ADT
-
- Hex Code: 4A
- Binary: 0 1 0 0 1 0 1 0
+ Mnemonic: ADT
- Data Flow: A + 10 -> A
+ Hex Code: 4A
+ Binary: 0 1 0 0 1 0 1 0
- Description: Add Ten to A
+ Data Flow: A + 10 -> A
+
+ Description: Add Ten to A
*/
@@ -41,17 +41,17 @@ INSTRUCTION(adt)
/*
- Mnemonic: CASC
-
- Hex Code: 10
- Binary: 0 0 0 1 0 0 0 0
+ Mnemonic: CASC
+
+ Hex Code: 10
+ Binary: 0 0 0 1 0 0 0 0
- Data Flow: ~A + RAM(B) + C -> A
- Carry -> C
+ Data Flow: ~A + RAM(B) + C -> A
+ Carry -> C
- Skip Conditions: Carry
+ Skip Conditions: Carry
- Description: Complement and Add with Carry, Skip on Carry
+ Description: Complement and Add with Carry, Skip on Carry
*/
@@ -75,14 +75,14 @@ INSTRUCTION(casc)
/*
- Mnemonic: RET
-
- Hex Code: 48
- Binary: 0 1 0 0 1 0 0 0
+ Mnemonic: RET
- Data Flow: SC -> SB -> SA -> PC
+ Hex Code: 48
+ Binary: 0 1 0 0 1 0 0 0
- Description: Return from Subroutine, restore Skip logic
+ Data Flow: SC -> SB -> SA -> PC
+
+ Description: Return from Subroutine, restore Skip logic
*/
@@ -96,15 +96,15 @@ INSTRUCTION(cop420_ret)
/*
- Mnemonic: CQMA
-
- Hex Code: 33 2C
- Binary: 0 0 1 1 0 0 1 1 0 0 1 0 1 1 0 0
+ Mnemonic: CQMA
+
+ Hex Code: 33 2C
+ Binary: 0 0 1 1 0 0 1 1 0 0 1 0 1 1 0 0
- Data Flow: Q7:4 -> RAM(B)
- Q3:0 -> A
+ Data Flow: Q7:4 -> RAM(B)
+ Q3:0 -> A
- Description: Copy Q to RAM, A
+ Description: Copy Q to RAM, A
*/
@@ -116,22 +116,22 @@ INSTRUCTION(cqma)
/*
- Mnemonic: LDD
-
- Operand: r, d
- Hex Code: 23 --
- Binary: 0 0 1 0 0 0 1 1 0 0 r1 r0 d3 d2 d1 d0
+ Mnemonic: LDD
- Data Flow: RAM(r,d) -> A
+ Operand: r, d
+ Hex Code: 23 --
+ Binary: 0 0 1 0 0 0 1 1 0 0 r1 r0 d3 d2 d1 d0
- Description: Load A with RAM pointed to directly by r,d
+ Data Flow: RAM(r,d) -> A
+
+ Description: Load A with RAM pointed to directly by r,d
*/
INSTRUCTION(ldd)
{
UINT8 rd = opcode & 0x3f;
-
+
A = RAM_R(rd);
}
@@ -139,14 +139,14 @@ INSTRUCTION(ldd)
/*
- Mnemonic: XABR
-
- Hex Code: 12
- Binary: 0 0 0 1 0 0 1 0
+ Mnemonic: XABR
+
+ Hex Code: 12
+ Binary: 0 0 0 1 0 0 1 0
- Data Flow: A <-> Br(0,0 -> A3,A2)
+ Data Flow: A <-> Br(0,0 -> A3,A2)
- Description: Exchange A with Br
+ Description: Exchange A with Br
*/
@@ -163,14 +163,14 @@ INSTRUCTION(xabr)
/*
- Mnemonic: SKT
-
- Hex Code: 41
- Binary: 0 1 0 0 0 0 0 1
+ Mnemonic: SKT
- Skip Conditions: A time-base counter carry has occurred since last test
+ Hex Code: 41
+ Binary: 0 1 0 0 0 0 0 1
- Description: Skip on Timer
+ Skip Conditions: A time-base counter carry has occurred since last test
+
+ Description: Skip on Timer
*/
@@ -187,14 +187,14 @@ INSTRUCTION(skt)
/*
- Mnemonic: ININ
-
- Hex Code: 33 28
- Binary:
+ Mnemonic: ININ
+
+ Hex Code: 33 28
+ Binary:
- Data Flow: IN -> A
+ Data Flow: IN -> A
- Description: Input IN Inputs to A
+ Description: Input IN Inputs to A
*/
@@ -205,16 +205,16 @@ INSTRUCTION(inin)
/*
- Processor: COP402M
+ Processor: COP402M
- Mnemonic: ININ
-
- Hex Code: 33 28
- Binary:
+ Mnemonic: ININ
- Data Flow: IN -> A, A1 = "1"
+ Hex Code: 33 28
+ Binary:
- Description: Input IN Inputs to A
+ Data Flow: IN -> A, A1 = "1"
+
+ Description: Input IN Inputs to A
*/
@@ -225,36 +225,36 @@ INSTRUCTION(cop402m_inin)
/*
- Mnemonic: INIL
-
- Hex Code: 33 29
- Binary:
+ Mnemonic: INIL
+
+ Hex Code: 33 29
+ Binary:
- Data Flow: IL3,"1","0",IL0 -> A
+ Data Flow: IL3,"1","0",IL0 -> A
- Description: Input IL Latches to A
+ Description: Input IL Latches to A
*/
INSTRUCTION(inil)
{
// NOT PROPERLY IMPLEMENTED
-
+
A = (IN_IN() & 0x09) | 0x04;
}
/*
- Processor: COP421
+ Processor: COP421
+
+ Mnemonic: INIL
- Mnemonic: INIL
-
- Hex Code: 33 29
- Binary:
+ Hex Code: 33 29
+ Binary:
- Data Flow: "0",CKO,"0","0" -> A
+ Data Flow: "0",CKO,"0","0" -> A
- Description: Input CKO to A
+ Description: Input CKO to A
*/
@@ -267,15 +267,15 @@ INSTRUCTION(cop421_inil)
/*
- Mnemonic: OGI
-
- Operand: y
- Hex Code: 33 5-
- Binary: 0 0 1 1 0 0 1 1 0 1 0 1 y3 y2 y1 y0
+ Mnemonic: OGI
+
+ Operand: y
+ Hex Code: 33 5-
+ Binary: 0 0 1 1 0 0 1 1 0 1 0 1 y3 y2 y1 y0
- Data Flow: y -> G
+ Data Flow: y -> G
- Description: Output to G Ports Immediate
+ Description: Output to G Ports Immediate
*/
diff --git a/src/emu/cpu/cop400/cop410.c b/src/emu/cpu/cop400/cop410.c
index 85d22bc1859..05185849622 100644
--- a/src/emu/cpu/cop400/cop410.c
+++ b/src/emu/cpu/cop400/cop410.c
@@ -13,8 +13,8 @@
TODO:
- - remove LBIops
- - JP/JSR/JSRP
+ - remove LBIops
+ - JP/JSR/JSRP
*/
@@ -326,7 +326,7 @@ static int cop410_execute(int cycles)
cop410_ICount -= opcode_map[opcode].cycles;
}
PC += InstLen[opcode];
-
+
skip = 0;
}
}
@@ -439,8 +439,8 @@ void cop410_get_info(UINT32 state, cpuinfo *info)
#endif /* ENABLE_DEBUGGER */
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cop410_ICount; break;
-/* case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM:
- info->internal_map8 = address_map_cop410_internal_rom; break;*/
+/* case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM:
+ info->internal_map8 = address_map_cop410_internal_rom; break;*/
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_DATA:
info->internal_map8 = address_map_cop410_internal_ram; break;
diff --git a/src/emu/cpu/cop400/cop420.c b/src/emu/cpu/cop400/cop420.c
index 48c2a4296d3..cff9a762be4 100644
--- a/src/emu/cpu/cop400/cop420.c
+++ b/src/emu/cpu/cop400/cop420.c
@@ -13,8 +13,8 @@
TODO:
- - remove LBIops
- - INIL
+ - remove LBIops
+ - INIL
*/
@@ -366,9 +366,9 @@ static int cop420_execute(int cycles)
if (skipLBI == 0)
{
int inst_cycles = opcode_map[opcode].cycles;
-
+
PC++;
-
+
(*(opcode_map[opcode].function))(opcode);
cop420_ICount -= inst_cycles;
@@ -419,7 +419,7 @@ static int cop420_execute(int cycles)
cop420_ICount -= opcode_map[opcode].cycles;
}
PC += InstLen[opcode];
-
+
skip = 0;
}
}
@@ -534,8 +534,8 @@ void cop420_get_info(UINT32 state, cpuinfo *info)
#endif /* ENABLE_DEBUGGER */
case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &cop420_ICount; break;
-/* case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM:
- info->internal_map8 = address_map_cop420_internal_rom; break;*/
+/* case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_PROGRAM:
+ info->internal_map8 = address_map_cop420_internal_rom; break;*/
case CPUINFO_PTR_INTERNAL_MEMORY_MAP + ADDRESS_SPACE_DATA:
info->internal_map8 = address_map_cop420_internal_ram; break;
@@ -597,7 +597,7 @@ void cop422_get_info(UINT32 state, cpuinfo *info)
}
void cop402_get_info(UINT32 state, cpuinfo *info)
-{
+{
// COP402 is a ROMless version of the COP420
switch (state)
@@ -615,7 +615,7 @@ void cop402_get_info(UINT32 state, cpuinfo *info)
}
void cop444_get_info(UINT32 state, cpuinfo *info)
-{
+{
// COP444 is functionally equivalent to COP420, but with twice the RAM/ROM
switch (state)
@@ -635,7 +635,7 @@ void cop444_get_info(UINT32 state, cpuinfo *info)
}
void cop445_get_info(UINT32 state, cpuinfo *info)
-{
+{
// COP445 is a 24-pin package version of the COP444, lacking the IN ports
switch (state)
@@ -652,7 +652,7 @@ void cop445_get_info(UINT32 state, cpuinfo *info)
}
void cop404_get_info(UINT32 state, cpuinfo *info)
-{
+{
// COP404 is a ROMless version of the COP444
switch (state)
diff --git a/src/emu/debug/debugcpu.c b/src/emu/debug/debugcpu.c
index 9ca8e278108..7ff14e6e603 100644
--- a/src/emu/debug/debugcpu.c
+++ b/src/emu/debug/debugcpu.c
@@ -1327,7 +1327,7 @@ static void check_watchpoints(int cpunum, int spacenum, int type, offs_t address
int bus_size = info->space[spacenum].databytes;
while (address_offset < bus_size && (mem_mask & 0xff) == 0)
- {
+ {
address_offset++;
value_to_write >>= 8;
mem_mask >>= 8;
diff --git a/src/emu/inptport.c b/src/emu/inptport.c
index bfbba7e57a9..284d5476247 100644
--- a/src/emu/inptport.c
+++ b/src/emu/inptport.c
@@ -2000,7 +2000,7 @@ static void input_port_detokenize(input_port_init_params *param, const input_por
port = input_port_initialize(param, type, modify_tag, mask, defval);
seq_index[0] = seq_index[1] = seq_index[2] = 0;
break;
-
+
case INPUT_TOKEN_SPECIAL_ONOFF:
TOKEN_UNGET_UINT32(ipt);
TOKEN_GET_UINT32_UNPACK3(ipt, entrytype, 8, hasdiploc, 1, strindex, 23);
diff --git a/src/emu/input.c b/src/emu/input.c
index b192f6177ce..24b49a88edb 100644
--- a/src/emu/input.c
+++ b/src/emu/input.c
@@ -314,7 +314,7 @@ static const code_string_table itemid_token_table[] =
{ ITEM_ID_BUTTON16, "BUTTON16" },
{ ITEM_ID_START, "START" },
{ ITEM_ID_SELECT, "SELECT" },
-
+
/* Hats */
{ ITEM_ID_HAT1UP, "HAT1UP" },
{ ITEM_ID_HAT1DOWN, "HAT1DOWN" },
diff --git a/src/emu/input.h b/src/emu/input.h
index d8bc0c07dc8..73bae31305c 100644
--- a/src/emu/input.h
+++ b/src/emu/input.h
@@ -288,7 +288,7 @@ enum _input_item_id
ITEM_ID_ADD_SWITCH14,
ITEM_ID_ADD_SWITCH15,
ITEM_ID_ADD_SWITCH16,
-
+
ITEM_ID_ADD_ABSOLUTE1,
ITEM_ID_ADD_ABSOLUTE2,
ITEM_ID_ADD_ABSOLUTE3,
@@ -305,7 +305,7 @@ enum _input_item_id
ITEM_ID_ADD_ABSOLUTE14,
ITEM_ID_ADD_ABSOLUTE15,
ITEM_ID_ADD_ABSOLUTE16,
-
+
ITEM_ID_ADD_RELATIVE1,
ITEM_ID_ADD_RELATIVE2,
ITEM_ID_ADD_RELATIVE3,
@@ -322,7 +322,7 @@ enum _input_item_id
ITEM_ID_ADD_RELATIVE14,
ITEM_ID_ADD_RELATIVE15,
ITEM_ID_ADD_RELATIVE16,
-
+
/* generic other IDs */
ITEM_ID_OTHER_SWITCH,
ITEM_ID_OTHER_AXIS_ABSOLUTE,
diff --git a/src/emu/machine/6840ptm.c b/src/emu/machine/6840ptm.c
index f5ea53ea2e6..7669052ceb3 100644
--- a/src/emu/machine/6840ptm.c
+++ b/src/emu/machine/6840ptm.c
@@ -251,7 +251,7 @@ INLINE void update_interrupts(int which)
((currptr->status_reg & 0x02) && (currptr->control_reg[1] & 0x40)) ||
((currptr->status_reg & 0x04) && (currptr->control_reg[2] & 0x40));
-// if (new_state != currptr->IRQ)
+// if (new_state != currptr->IRQ)
{
currptr->IRQ = new_state;
diff --git a/src/emu/machine/pit8253.c b/src/emu/machine/pit8253.c
index f4ff14e5d52..a54d6edda14 100644
--- a/src/emu/machine/pit8253.c
+++ b/src/emu/machine/pit8253.c
@@ -1097,21 +1097,21 @@ static void common_start( const device_config *device, int device_type ) {
pit8253_t *pit8253 = get_safe_token(device);
char unique_tag[30];
int timerno;
-
+
pit8253->config = device->static_config;
pit8253->device_type = device_type;
-
+
/* register for state saving */
state_save_combine_module_and_tag(unique_tag, device_tags[device_type], device->tag);
-
+
for (timerno = 0; timerno < MAX_TIMER; timerno++)
{
struct pit8253_timer *timer = get_timer(pit8253,timerno);
-
+
timer->clockin = pit8253->config->timer[timerno].clockin;
timer->output_changed = pit8253->config->timer[timerno].output_changed;
timer->frequency_changed = pit8253->config->timer[timerno].frequency_changed;
-
+
if (timer->output_changed == NULL)
timer->outputtimer = NULL;
else
@@ -1126,7 +1126,7 @@ static void common_start( const device_config *device, int device_type ) {
timer->freqtimer = timer_alloc(frequency_changed, (void *)device);
timer_adjust_oneshot(timer->freqtimer, attotime_never, timerno);
}
-
+
/* set up state save values */
state_save_register_item(unique_tag, timerno, timer->clockin);
state_save_register_item(unique_tag, timerno, timer->control);
@@ -1150,8 +1150,8 @@ static void common_start( const device_config *device, int device_type ) {
state_save_register_item(unique_tag, timerno, timer->last_updated.attoseconds);
}
}
-
-
+
+
static DEVICE_START( pit8253 ) {
common_start( device, TYPE_PIT8253 );
}
@@ -1170,8 +1170,8 @@ static DEVICE_RESET( pit8253 ) {
{
struct pit8253_timer *timer = get_timer(pit,i);
/* According to Intel's 8254 docs, the state of a timer is undefined
- until the first mode control word is written. Here we define this
- undefined behaviour */
+ until the first mode control word is written. Here we define this
+ undefined behaviour */
timer->control = timer->status = 0x30;
timer->rmsb = timer->wmsb = 0;
timer->count = timer->value = timer->latch = 0;
diff --git a/src/emu/machine/pit8253.h b/src/emu/machine/pit8253.h
index 189140229cb..b2d68d5b454 100644
--- a/src/emu/machine/pit8253.h
+++ b/src/emu/machine/pit8253.h
@@ -29,8 +29,8 @@ struct pit8253_config
pit8253_output_changed_func output_changed;
/* If specified, this gets called whenever the frequency of the output for this
- timer changes. */
- pit8253_frequency_changed_func frequency_changed;
+ timer changes. */
+ pit8253_frequency_changed_func frequency_changed;
} timer[3];
};
diff --git a/src/emu/machine/scsicd.c b/src/emu/machine/scsicd.c
index d2e1e7bc1b5..0aa1c2986c9 100644
--- a/src/emu/machine/scsicd.c
+++ b/src/emu/machine/scsicd.c
@@ -735,7 +735,7 @@ static int scsicd_dispatch(int operation, void *file, INT64 intparm, void *ptrpa
case SCSIOP_READ_DATA:
scsicd_read_data( file, ptrparm, intparm );
return 0;
-
+
case SCSIOP_WRITE_DATA:
scsicd_write_data( file, ptrparm, intparm );
return 0;
diff --git a/src/emu/memory.c b/src/emu/memory.c
index 33ac74fa4fa..677b8f75ddc 100644
--- a/src/emu/memory.c
+++ b/src/emu/memory.c
@@ -736,7 +736,7 @@ static void address_map_detokenize(address_map *map, const addrmap_token *tokens
while (entrytype != ADDRMAP_TOKEN_END)
{
const char *tag;
-
+
/* unpack the token from the first entry */
TOKEN_GET_UINT32_UNPACK1(tokens, entrytype, 8);
switch (entrytype)
diff --git a/src/emu/sound/disc_flt.c b/src/emu/sound/disc_flt.c
index b8a2cc6b47a..d332596d330 100644
--- a/src/emu/sound/disc_flt.c
+++ b/src/emu/sound/disc_flt.c
@@ -1136,7 +1136,7 @@ static void dst_rcfilter_sw_reset(node_description *node)
{
struct dst_rcfilter_sw_context *context = node->context;
int i;
-
+
for (i=0;i<4;i++)
context->vCap[i] = 0;
node->output[0] = 0;
diff --git a/src/emu/sound/discrete.c b/src/emu/sound/discrete.c
index 6cd59e96eea..bb5ec8a9149 100644
--- a/src/emu/sound/discrete.c
+++ b/src/emu/sound/discrete.c
@@ -330,7 +330,7 @@ static void *discrete_start(int sndindex, int clock, const void *config)
if (NODE_CHILD_NODE_NUM(intf[info->node_count].node) > 0)
fatalerror("discrete_start() - Child node number on NODE_%02d", NODE_INDEX(intf[info->node_count].node) );
-
+
}
info->node_count++;
discrete_log("discrete_start() - Sanity check counted %d nodes", info->node_count);
@@ -671,7 +671,7 @@ static void find_input_nodes(discrete_info *info, discrete_sound_block *block_li
if (NODE_CHILD_NODE_NUM(inputnode) >= node_ref->module.num_output)
fatalerror("discrete_start - Node NODE_%02d referenced non existent output %d on node NODE_%02d", NODE_INDEX(node->node), NODE_CHILD_NODE_NUM(inputnode), NODE_INDEX(inputnode));
-
+
node->input[inputnum] = &(node_ref->output[NODE_CHILD_NODE_NUM(inputnode)]); // Link referenced node out to input
node->input_is_node |= 1 << inputnum; // Bit flag if input is node
}
diff --git a/src/emu/sound/discrete.h b/src/emu/sound/discrete.h
index bfb04d37cb2..f0b74ae583e 100644
--- a/src/emu/sound/discrete.h
+++ b/src/emu/sound/discrete.h
@@ -41,16 +41,16 @@
* does not do individual device emulation, but instead does a function
* emulation. So you will need to convert the schematic design into
* a logic block representation.
- *
+ *
* There is the possibility to support multiple outputs per module.
* In this case, NODE_XXX is the default ouput. Alternative outputs may
* be accessed by using NODE_XXX_YY where 00<=Y<08.
- *
+ *
* You may also access nodes with a macros:
- *
+ *
* NODE_XXX = NODE_SUB(XXX, 0)
- * NODE_XXX = NODE(XXX)
- * NODE_XXX_YY = NODE_SUB(XXX, YY) with YY != 00
+ * NODE_XXX = NODE(XXX)
+ * NODE_XXX_YY = NODE_SUB(XXX, YY) with YY != 00
*
* One node point may feed a number of inputs, for example you could
* connect the output of a DISCRETE_SINEWAVE to the AMPLITUDE input
@@ -2596,11 +2596,11 @@
*
***********************************************************************
*
- * DISCRETE_RCFILTER_SW - Multiple switchable RC filters
+ * DISCRETE_RCFILTER_SW - Multiple switchable RC filters
*
- * R
- * INPUT >-----------ZZZZ-+-------+----......-----> Output
- * | |
+ * R
+ * INPUT >-----------ZZZZ-+-------+----......-----> Output
+ * | |
* +-+ +-+
* SWITCH > Bit 0 ---->F1 | | F2 | |
* '-' ^ '-'
@@ -2611,7 +2611,7 @@
* | |
* GND GND
*
- *
+ *
* Declaration syntax
*
* DISCRETE_RCFILTER_SW(name of node,
@@ -2624,11 +2624,11 @@
* C3 in Farads,
* C4 in Farads)
*
- * This is a typical filter circuit in circusc or scramble.
- * Switches are usually CD4066 with a "open" resistance of
+ * This is a typical filter circuit in circusc or scramble.
+ * Switches are usually CD4066 with a "open" resistance of
* typical 470 Ohms at 5V.
* This circuit supports up to 4 filters.
- *
+ *
* EXAMPLES: see circusc
*
***********************************************************************
@@ -3690,7 +3690,7 @@ typedef struct _discrete_inverter_osc_desc discrete_inverter_osc_desc;
NODE_ ## _x ## _01, NODE_ ## _x ## _02, NODE_ ## _x ## _03, NODE_ ## _x ## _04, \
NODE_ ## _x ## _05, NODE_ ## _x ## _06, NODE_ ## _x ## _07
-enum {
+enum {
NODE0_DEF(0), NODE0_DEF(1), NODE0_DEF(2), NODE0_DEF(3), NODE0_DEF(4), NODE0_DEF(5), NODE0_DEF(6), NODE0_DEF(7), NODE0_DEF(8), NODE0_DEF(9),
NODE_DEF(10), NODE_DEF(11), NODE_DEF(12), NODE_DEF(13), NODE_DEF(14), NODE_DEF(15), NODE_DEF(16), NODE_DEF(17), NODE_DEF(18), NODE_DEF(19),
NODE_DEF(20), NODE_DEF(21), NODE_DEF(22), NODE_DEF(23), NODE_DEF(24), NODE_DEF(25), NODE_DEF(26), NODE_DEF(27), NODE_DEF(28), NODE_DEF(29),
@@ -3731,7 +3731,7 @@ enum {
#if DISCRETE_MAX_NODE_OUTPUTS == 8
#define NODE_CHILD_NODE_NUM(_x) ((_x) & 7)
#define NODE_DEFAULT_NODE(_x) ((_x) & ~7)
-#define NODE_INDEX(_x) (((_x) - NODE_START)>>3)
+#define NODE_INDEX(_x) (((_x) - NODE_START)>>3)
#else
#error "DISCRETE_MAX_NODE_OUTPUTS != 8"
#endif
diff --git a/src/emu/video/cdp1869.c b/src/emu/video/cdp1869.c
index 82563f3ab20..2c648b6eda9 100644
--- a/src/emu/video/cdp1869.c
+++ b/src/emu/video/cdp1869.c
@@ -10,10 +10,10 @@
TODO:
- connect to sound system when possible
- - white noise
- - scanline based update
- - fix flashing spaceship in destryer/altair
- - fix flashing player in draco
+ - white noise
+ - scanline based update
+ - fix flashing spaceship in destryer/altair
+ - fix flashing player in draco
*/
@@ -104,7 +104,7 @@ static void update_prd_changed_timer(cdp1869_t *cdp1869)
start = CDP1869_SCANLINE_PREDISPLAY_START_PAL;
end = CDP1869_SCANLINE_PREDISPLAY_END_PAL;
}
-
+
if (scanline < start)
{
next_scanline = start;
@@ -460,7 +460,7 @@ WRITE8_DEVICE_HANDLER( cdp1869_out5_w )
cdp1869->wnamp = (word & 0x0f00) >> 8;
cdp1869->wnfreq = (word & 0x7000) >> 12;
cdp1869->wnoff = BIT(word, 15);
-
+
// fork out to CDP1869 sound core
cdp1869_set_wnamp(0, cdp1869->wnamp);
cdp1869_set_wnfreq(0, cdp1869->wnfreq);
@@ -794,7 +794,7 @@ static DEVICE_START( cdp1869 )
assert(cdp1869->screen != NULL);
// allocate timers
-
+
if (cdp1869->intf->on_prd_changed != NULL)
{
cdp1869->prd_changed_timer = timer_alloc(prd_changed_tick, (void *)device);