diff options
author | 2009-11-08 17:24:39 +0000 | |
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committer | 2009-11-08 17:24:39 +0000 | |
commit | 9cffc02d91b21b1a2fb3dabf2a79e8c6a303035f (patch) | |
tree | 322b0691f60cd1b267fd13d0b1784315c754eea2 /src/emu/machine/z80dma.h | |
parent | a149d0af3a091951b49af34b5464a8fc47363cea (diff) |
Refactored Z80 DMA to use devcb.
Diffstat (limited to 'src/emu/machine/z80dma.h')
-rw-r--r-- | src/emu/machine/z80dma.h | 92 |
1 files changed, 69 insertions, 23 deletions
diff --git a/src/emu/machine/z80dma.h b/src/emu/machine/z80dma.h index caee5162b70..c67c22bb4e3 100644 --- a/src/emu/machine/z80dma.h +++ b/src/emu/machine/z80dma.h @@ -1,11 +1,43 @@ -/********************************************************************** +/*************************************************************************** - Z80 DMA interface and emulation + Zilog Z80 DMA Direct Memory Access Controller emulation - **********************************************************************/ + Copyright Nicola Salmoria and the MAME Team. + Visit http://mamedev.org for licensing and usage restrictions. -#ifndef Z80DMA_H -#define Z80DMA_H +**************************************************************************** + _____ _____ + A5 1 |* \_/ | 40 A6 + A4 2 | | 39 A7 + A3 3 | | 38 IEI + A2 4 | | 37 _INT/_PULSE + A1 5 | | 36 IEO + A0 6 | | 35 D0 + CLK 7 | | 34 D1 + _WR 8 | | 33 D2 + _RD 9 | | 32 D3 + _IORQ 10 | Z8410 | 31 D4 + +5V 11 | | 30 GND + _MREQ 12 | | 29 D5 + _BAO 13 | | 28 D6 + _BAI 14 | | 27 D7 + _BUSREQ 15 | | 26 _M1 + _CE/_WAIT 16 | | 25 RDY + A15 17 | | 24 A8 + A14 18 | | 23 A9 + A13 19 | | 22 A10 + A12 20 |_____________| 21 A11 + +***************************************************************************/ + +#ifndef __Z80DMA__ +#define __Z80DMA__ + +#include "devcb.h" + +/*************************************************************************** + MACROS / CONSTANTS +***************************************************************************/ #define Z80DMA DEVICE_GET_INFO_NAME(z80dma) @@ -13,32 +45,46 @@ MDRV_DEVICE_ADD(_tag, Z80DMA, _clock) \ MDRV_DEVICE_CONFIG(_config) +#define Z80DMA_INTERFACE(_name) \ + const z80dma_interface (_name) = + +/*************************************************************************** + TYPE DEFINITIONS +***************************************************************************/ + typedef struct _z80dma_interface z80dma_interface; struct _z80dma_interface { - /* CPU to halt when DMA is active */ - const char *cputag; + devcb_write_line out_busreq_func; + devcb_write_line out_int_func; + devcb_write_line out_bao_func; - /* accessors to main memory */ - read8_device_func memory_read; - write8_device_func memory_write; + /* memory accessors */ + devcb_read8 in_mreq_func; + devcb_write8 out_mreq_func; - /* port accesors */ - read8_device_func portA_read; - write8_device_func portA_write; - read8_device_func portB_read; - write8_device_func portB_write; - - /* interrupt callback - not implemented */ - void (*irq_cb)(const device_config *device, int state); + /* I/O accessors */ + devcb_read8 in_iorq_func; + devcb_write8 out_iorq_func; }; -/* device interface */ -DEVICE_GET_INFO( z80dma ); +/*************************************************************************** + PROTOTYPES +***************************************************************************/ +/* register access */ READ8_DEVICE_HANDLER( z80dma_r ); -WRITE8_DEVICE_HANDLER( z80dma_w); +WRITE8_DEVICE_HANDLER( z80dma_w ); + +/* ready */ +WRITE_LINE_DEVICE_HANDLER( z80dma_rdy_w ); -WRITE8_DEVICE_HANDLER( z80dma_rdy_w ); +/* wait */ +WRITE_LINE_DEVICE_HANDLER( z80dma_wait_w ); + +/* bus acknowledge in */ +WRITE_LINE_DEVICE_HANDLER( z80dma_bai_w ); + +DEVICE_GET_INFO( z80dma ); -#endif /* Z80_H */ +#endif |