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author Curt Coder <curtcoder@mail.com>2009-11-08 14:26:53 +0000
committer Curt Coder <curtcoder@mail.com>2009-11-08 14:26:53 +0000
commit9186e3c5496305bf37526d1926fe7f0308ec6673 (patch)
tree2fdf77d4568a791f4acb26ce565c363cab2bd21e /src/emu/machine/8237dma.c
parentff9e79ecea0a76919201e036f1f55f21b4ea316e (diff)
Refactored i8237 DMA to use devcb.
Diffstat (limited to 'src/emu/machine/8237dma.c')
-rw-r--r--src/emu/machine/8237dma.c390
1 files changed, 218 insertions, 172 deletions
diff --git a/src/emu/machine/8237dma.c b/src/emu/machine/8237dma.c
index 9477eca96a5..ee3d5502057 100644
--- a/src/emu/machine/8237dma.c
+++ b/src/emu/machine/8237dma.c
@@ -23,7 +23,7 @@
#include "8237dma.h"
-/* States that the dma8237 device can be in */
+/* States that the i8237 device can be in */
typedef enum {
DMA8237_SI, /* Idle state */
DMA8237_S0, /* HRQ has been triggered, waiting to receive HLDA */
@@ -47,15 +47,21 @@ typedef enum {
} dma8237_state;
-typedef struct dma8237 dma8237_t;
-
-struct dma8237
+typedef struct _i8237_t i8237_t;
+struct _i8237_t
{
- const struct dma8237_interface *intf;
+ devcb_resolved_write_line out_hrq_func;
+ devcb_resolved_write_line out_eop_func;
+ devcb_resolved_read8 in_memr_func;
+ devcb_resolved_write8 out_memw_func;
+
emu_timer *timer;
struct
{
+ devcb_resolved_read8 in_ior_func;
+ devcb_resolved_write8 out_iow_func;
+ devcb_resolved_write_line out_dack_func;
UINT16 base_address;
UINT16 base_count;
UINT16 address;
@@ -103,11 +109,11 @@ struct dma8237
/* ----------------------------------------------------------------------- */
-INLINE dma8237_t *get_safe_token(const device_config *device) {
+INLINE i8237_t *get_safe_token(const device_config *device) {
assert( device != NULL );
assert( device->token != NULL );
- assert( device->type == DEVICE_GET_INFO_NAME(dma8237) );
- return ( dma8237_t *) device->token;
+ assert( device->type == I8237 );
+ return ( i8237_t *) device->token;
}
@@ -116,16 +122,16 @@ INLINE dma8237_t *get_safe_token(const device_config *device) {
INLINE void dma8237_do_read( const device_config *device )
{
- dma8237_t *dma8237 = get_safe_token( device );
- int channel = dma8237->service_channel;
+ i8237_t *i8237 = get_safe_token( device );
+ int channel = i8237->service_channel;
- switch( DMA_MODE_OPERATION( dma8237->chan[ channel ].mode ) )
+ switch( DMA_MODE_OPERATION( i8237->chan[ channel ].mode ) )
{
case DMA8237_WRITE_TRANSFER:
- dma8237->temporary_data = dma8237->intf->channel_read_func[ channel ]( device );
+ i8237->temporary_data = devcb_call_read8(&i8237->chan[channel].in_ior_func, 0);
break;
case DMA8237_READ_TRANSFER:
- dma8237->temporary_data = dma8237->intf->memory_read_func( device, channel, dma8237->chan[ channel ].address );
+ i8237->temporary_data = devcb_call_read8(&i8237->in_memr_func, i8237->chan[ channel ].address);
break;
case DMA8237_VERIFY_TRANSFER:
case DMA8237_ILLEGAL_TRANSFER:
@@ -136,16 +142,16 @@ INLINE void dma8237_do_read( const device_config *device )
INLINE void dma8237_do_write( const device_config *device )
{
- dma8237_t *dma8237 = get_safe_token( device );
- int channel = dma8237->service_channel;
+ i8237_t *i8237 = get_safe_token( device );
+ int channel = i8237->service_channel;
- switch( DMA_MODE_OPERATION( dma8237->chan[ channel ].mode ) )
+ switch( DMA_MODE_OPERATION( i8237->chan[ channel ].mode ) )
{
case DMA8237_WRITE_TRANSFER:
- dma8237->intf->memory_write_func( device, channel, dma8237->chan[ channel ].address, dma8237->temporary_data );
+ devcb_call_write8(&i8237->out_memw_func, i8237->chan[ channel ].address, i8237->temporary_data);
break;
case DMA8237_READ_TRANSFER:
- dma8237->intf->channel_write_func[channel]( device, dma8237->temporary_data );
+ devcb_call_write8(&i8237->chan[channel].out_iow_func, 0, i8237->temporary_data);
break;
case DMA8237_VERIFY_TRANSFER:
case DMA8237_ILLEGAL_TRANSFER:
@@ -156,46 +162,46 @@ INLINE void dma8237_do_write( const device_config *device )
INLINE void dma8237_advance( const device_config *device )
{
- dma8237_t *dma8237 = get_safe_token( device );
- int channel = dma8237->service_channel;
- int mode = dma8237->chan[channel].mode;
+ i8237_t *i8237 = get_safe_token( device );
+ int channel = i8237->service_channel;
+ int mode = i8237->chan[channel].mode;
switch ( DMA_MODE_OPERATION( mode ) )
{
case DMA8237_VERIFY_TRANSFER:
case DMA8237_WRITE_TRANSFER:
case DMA8237_READ_TRANSFER:
- dma8237->chan[channel].high_address_changed = 0;
+ i8237->chan[channel].high_address_changed = 0;
if ( DMA_MODE_DIRECTION( mode ) )
{
- dma8237->chan[channel].address -= 1;
- if ( ( dma8237->chan[channel].address & 0xFF ) == 0xFF )
- dma8237->chan[channel].high_address_changed = 1;
+ i8237->chan[channel].address -= 1;
+ if ( ( i8237->chan[channel].address & 0xFF ) == 0xFF )
+ i8237->chan[channel].high_address_changed = 1;
}
else
{
- dma8237->chan[channel].address += 1;
- if ( ( dma8237->chan[channel].address & 0xFF ) == 0x00 )
- dma8237->chan[channel].high_address_changed = 1;
+ i8237->chan[channel].address += 1;
+ if ( ( i8237->chan[channel].address & 0xFF ) == 0x00 )
+ i8237->chan[channel].high_address_changed = 1;
}
- dma8237->chan[channel].count--;
+ i8237->chan[channel].count--;
- if ( dma8237->chan[channel].count == 0xFFFF )
+ if ( i8237->chan[channel].count == 0xFFFF )
{
/* Set TC bit for this channel */
- dma8237->status |= ( 0x01 << channel );
+ i8237->status |= ( 0x01 << channel );
if ( DMA_MODE_AUTO_INIT( mode ) )
{
- dma8237->chan[channel].address = dma8237->chan[channel].base_address;
- dma8237->chan[channel].count = dma8237->chan[channel].base_count;
- dma8237->chan[channel].high_address_changed = 1;
+ i8237->chan[channel].address = i8237->chan[channel].base_address;
+ i8237->chan[channel].count = i8237->chan[channel].base_count;
+ i8237->chan[channel].high_address_changed = 1;
}
else
{
- dma8237->mask |= ( 0x01 << channel );
+ i8237->mask |= ( 0x01 << channel );
}
}
break;
@@ -205,39 +211,49 @@ INLINE void dma8237_advance( const device_config *device )
}
+static void set_dack(i8237_t *i8237, int channel)
+{
+ int i;
+
+ for (i = 0; i < 4; i++)
+ {
+ int state = (i == channel) ^ BIT(i8237->command, 7);
+
+ devcb_call_write_line(&i8237->chan[i].out_dack_func, state);
+ }
+}
static TIMER_CALLBACK( dma8237_timerproc )
{
const device_config *device = (const device_config *)ptr;
- dma8237_t *dma8237 = get_safe_token(device);
+ i8237_t *i8237 = get_safe_token(device);
/* Check if operation is disabled */
- if ( dma8237->command & 0x04 )
+ if ( i8237->command & 0x04 )
return;
- switch ( dma8237->state ) {
+ switch ( i8237->state ) {
case DMA8237_SI:
/* Make sure EOP is high */
- if ( ! dma8237->eop )
+ if ( ! i8237->eop )
{
- dma8237->eop = 1;
- if ( dma8237->intf->out_eop_func )
- dma8237->intf->out_eop_func( device, 0, dma8237->eop ? ASSERT_LINE : CLEAR_LINE );
+ i8237->eop = 1;
+ devcb_call_write_line(&i8237->out_eop_func, i8237->eop ? ASSERT_LINE : CLEAR_LINE);
}
/* Check if a new DMA request has been received. */
{
/* Bit 6 of the command register determines whether the DREQ signals are active
high or active low. */
- UINT16 pending_request = ( ( dma8237->command & 0x40 ) ? ~dma8237->drq : dma8237->drq ) & ~dma8237->mask;
+ UINT16 pending_request = ( ( i8237->command & 0x40 ) ? ~i8237->drq : i8237->drq ) & ~i8237->mask;
if ( pending_request & 0x0f )
{
int i, channel, prio_channel = 0;
/* Determine the channel that should be serviced */
- channel = ( dma8237->command & 0x10 ) ? dma8237->last_service_channel : 3;
+ channel = ( i8237->command & 0x10 ) ? i8237->last_service_channel : 3;
for ( i = 0; i < 4; i++ )
{
if ( pending_request & ( 1 << channel ) )
@@ -246,17 +262,17 @@ static TIMER_CALLBACK( dma8237_timerproc )
}
/* Store the channel we will be servicing and go to the next state */
- dma8237->service_channel = prio_channel;
- dma8237->last_service_channel = prio_channel;
- dma8237->hrq = 1;
- dma8237->intf->hrq_changed( device, dma8237->hrq );
- dma8237->state = DMA8237_S0;
+ i8237->service_channel = prio_channel;
+ i8237->last_service_channel = prio_channel;
+ i8237->hrq = 1;
+ devcb_call_write_line(&i8237->out_hrq_func, i8237->hrq);
+ i8237->state = DMA8237_S0;
- timer_enable( dma8237->timer, 1 );
+ timer_enable( i8237->timer, 1 );
}
else
{
- timer_enable( dma8237->timer, 0 );
+ timer_enable( i8237->timer, 0 );
}
}
break;
@@ -264,41 +280,44 @@ static TIMER_CALLBACK( dma8237_timerproc )
case DMA8237_S0:
/* S0 is the first of the DMA service. We have requested a hold but are waiting
for confirmation. */
- if ( dma8237->hlda )
+ if ( i8237->hlda )
{
- if ( dma8237->command & 0x01 )
+ if ( i8237->command & 0x01 )
{
/* Memory-to-memory transfers */
- dma8237->state = DMA8237_S11;
+ i8237->state = DMA8237_S11;
}
else
{
/* Regular transfers */
- dma8237->state = DMA8237_S1;
+ i8237->state = DMA8237_S1;
}
}
break;
case DMA8237_S1: /* Output A8-A15 */
- dma8237->state = DMA8237_S2;
+ i8237->state = DMA8237_S2;
break;
case DMA8237_S2: /* Output A7-A0 */
+ /* set DACK */
+ set_dack(i8237, i8237->service_channel);
+
/* Check for compressed timing */
- if ( dma8237->command & 0x08 )
- dma8237->state = DMA8237_S4;
+ if ( i8237->command & 0x08 )
+ i8237->state = DMA8237_S4;
else
- dma8237->state = DMA8237_S3;
+ i8237->state = DMA8237_S3;
break;
case DMA8237_S3: /* Initiate read */
dma8237_do_read( device );
- dma8237->state = DMA8237_S4;
+ i8237->state = DMA8237_S4;
break;
case DMA8237_S4: /* Perform read/write */
/* Perform read when in compressed timing mode */
- if ( dma8237->command & 0x08 )
+ if ( i8237->command & 0x08 )
dma8237_do_read( device );
/* Perform write */
@@ -308,66 +327,68 @@ static TIMER_CALLBACK( dma8237_timerproc )
dma8237_advance( device );
{
- int channel = dma8237->service_channel;
+ int channel = i8237->service_channel;
- switch( DMA_MODE_TRANSFERMODE( dma8237->chan[channel].mode ) )
+ switch( DMA_MODE_TRANSFERMODE( i8237->chan[channel].mode ) )
{
case DMA8237_DEMAND_MODE:
/* Check for terminal count or EOP signal or DREQ begin de-asserted */
- if ( ( dma8237->status & ( 0x01 << channel ) ) || ! dma8237->eop || ! ( dma8237->drq & ( 0x01 << channel ) ) )
+ if ( ( i8237->status & ( 0x01 << channel ) ) || ! i8237->eop || ! ( i8237->drq & ( 0x01 << channel ) ) )
{
- dma8237->hrq = 0;
- dma8237->hlda = 0;
- dma8237->intf->hrq_changed( device, dma8237->hrq );
- dma8237->state = DMA8237_SI;
+ i8237->hrq = 0;
+ i8237->hlda = 0;
+ devcb_call_write_line(&i8237->out_hrq_func, i8237->hrq);
+ i8237->state = DMA8237_SI;
}
else
{
- dma8237->state = dma8237->chan[channel].high_address_changed ? DMA8237_S1 : DMA8237_S2;
+ i8237->state = i8237->chan[channel].high_address_changed ? DMA8237_S1 : DMA8237_S2;
}
break;
case DMA8237_SINGLE_MODE:
- dma8237->hrq = 0;
- dma8237->hlda = 0;
- dma8237->intf->hrq_changed( device, dma8237->hrq );
- dma8237->state = DMA8237_SI;
+ i8237->hrq = 0;
+ i8237->hlda = 0;
+ devcb_call_write_line(&i8237->out_hrq_func, i8237->hrq);
+ i8237->state = DMA8237_SI;
break;
case DMA8237_BLOCK_MODE:
/* Check for terminal count or EOP signal */
- if ( ( dma8237->status & ( 0x01 << channel ) ) || ! dma8237->eop )
+ if ( ( i8237->status & ( 0x01 << channel ) ) || ! i8237->eop )
{
- dma8237->hrq = 0;
- dma8237->hlda = 0;
- dma8237->intf->hrq_changed( device, dma8237->hrq );
- dma8237->state = DMA8237_SI;
+ i8237->hrq = 0;
+ i8237->hlda = 0;
+ devcb_call_write_line(&i8237->out_hrq_func, i8237->hrq);
+ i8237->state = DMA8237_SI;
}
else
{
- dma8237->state = dma8237->chan[channel].high_address_changed ? DMA8237_S1 : DMA8237_S2;
+ i8237->state = i8237->chan[channel].high_address_changed ? DMA8237_S1 : DMA8237_S2;
}
break;
case DMA8237_CASCADE_MODE:
- if ( ! ( dma8237->drq & ( 0x01 << channel ) ) )
+ if ( ! ( i8237->drq & ( 0x01 << channel ) ) )
{
- dma8237->hrq = 0;
- dma8237->hlda = 0;
- dma8237->intf->hrq_changed( device, dma8237->hrq );
- dma8237->state = DMA8237_SI;
+ i8237->hrq = 0;
+ i8237->hlda = 0;
+ devcb_call_write_line(&i8237->out_hrq_func, i8237->hrq);
+ i8237->state = DMA8237_SI;
}
break;
}
/* Check if EOP output needs to be asserted */
- if ( dma8237->status & ( 0x01 << channel ) )
+ if ( i8237->status & ( 0x01 << channel ) )
{
- dma8237->eop = 0;
- if ( dma8237->intf->out_eop_func )
- dma8237->intf->out_eop_func( device, channel, dma8237->eop ? ASSERT_LINE : CLEAR_LINE );
+ i8237->eop = 0;
+ devcb_call_write_line(&i8237->out_eop_func, i8237->eop ? ASSERT_LINE : CLEAR_LINE);
}
}
+
+ /* clear DACK */
+ set_dack(i8237, -1);
break;
case DMA8237_S11: /* Output A8-A15 */
@@ -381,9 +402,9 @@ static TIMER_CALLBACK( dma8237_timerproc )
/* ----------------------------------------------------------------------- */
-READ8_DEVICE_HANDLER( dma8237_r )
+READ8_DEVICE_HANDLER( i8237_r )
{
- dma8237_t *dma8237 = get_safe_token(device);
+ i8237_t *i8237 = get_safe_token(device);
UINT8 data = 0xFF;
offset &= 0x0F;
@@ -394,8 +415,8 @@ READ8_DEVICE_HANDLER( dma8237_r )
case 4:
case 6:
/* DMA address register */
- data = dma8237->chan[offset / 2].address >> (dma8237->msb ? 8 : 0);
- dma8237->msb ^= 1;
+ data = i8237->chan[offset / 2].address >> (i8237->msb ? 8 : 0);
+ i8237->msb ^= 1;
break;
case 1:
@@ -403,26 +424,26 @@ READ8_DEVICE_HANDLER( dma8237_r )
case 5:
case 7:
/* DMA count register */
- data = dma8237->chan[offset / 2].count >> (dma8237->msb ? 8 : 0);
- dma8237->msb ^= 1;
+ data = i8237->chan[offset / 2].count >> (i8237->msb ? 8 : 0);
+ i8237->msb ^= 1;
break;
case 8:
/* DMA status register */
- data = (UINT8) dma8237->status;
+ data = (UINT8) i8237->status;
/* TC bits are cleared on a status read */
- dma8237->status &= 0xF0;
+ i8237->status &= 0xF0;
break;
case 10:
/* DMA mask register */
- data = dma8237->mask;
+ data = i8237->mask;
break;
case 13:
/* DMA master clear */
- data = dma8237->temp;
+ data = i8237->temp;
break;
case 9: /* DMA write request register */
@@ -439,14 +460,14 @@ READ8_DEVICE_HANDLER( dma8237_r )
-WRITE8_DEVICE_HANDLER( dma8237_w )
+WRITE8_DEVICE_HANDLER( i8237_w )
{
- dma8237_t *dma8237 = get_safe_token(device);
+ i8237_t *i8237 = get_safe_token(device);
int channel;
offset &= 0x0F;
- logerror("dma8237_w: offset = %02x, data = %02x\n", offset, data );
+ logerror("i8237_w: offset = %02x, data = %02x\n", offset, data );
switch(offset) {
case 0:
@@ -455,17 +476,17 @@ WRITE8_DEVICE_HANDLER( dma8237_w )
case 6:
/* DMA address register */
channel = offset / 2;
- if (dma8237->msb)
+ if (i8237->msb)
{
- dma8237->chan[channel].base_address = ( dma8237->chan[channel].base_address & 0x00FF ) | ( data << 8 );
- dma8237->chan[channel].address = ( dma8237->chan[channel].address & 0x00FF ) | ( data << 8 );
+ i8237->chan[channel].base_address = ( i8237->chan[channel].base_address & 0x00FF ) | ( data << 8 );
+ i8237->chan[channel].address = ( i8237->chan[channel].address & 0x00FF ) | ( data << 8 );
}
else
{
- dma8237->chan[channel].base_address = ( dma8237->chan[channel].base_address & 0xFF00 ) | data;
- dma8237->chan[channel].address = ( dma8237->chan[channel].address & 0xFF00 ) | data;
+ i8237->chan[channel].base_address = ( i8237->chan[channel].base_address & 0xFF00 ) | data;
+ i8237->chan[channel].address = ( i8237->chan[channel].address & 0xFF00 ) | data;
}
- dma8237->msb ^= 1;
+ i8237->msb ^= 1;
break;
case 1:
@@ -474,23 +495,23 @@ WRITE8_DEVICE_HANDLER( dma8237_w )
case 7:
/* DMA count register */
channel = offset / 2;
- if (dma8237->msb)
+ if (i8237->msb)
{
- dma8237->chan[channel].base_count = ( dma8237->chan[channel].base_count & 0x00FF ) | ( data << 8 );
- dma8237->chan[channel].count = ( dma8237->chan[channel].count & 0x00FF ) | ( data << 8 );
+ i8237->chan[channel].base_count = ( i8237->chan[channel].base_count & 0x00FF ) | ( data << 8 );
+ i8237->chan[channel].count = ( i8237->chan[channel].count & 0x00FF ) | ( data << 8 );
}
else
{
- dma8237->chan[channel].base_count = ( dma8237->chan[channel].base_count & 0xFF00 ) | data;
- dma8237->chan[channel].count = ( dma8237->chan[channel].count & 0xFF00 ) | data;
+ i8237->chan[channel].base_count = ( i8237->chan[channel].base_count & 0xFF00 ) | data;
+ i8237->chan[channel].count = ( i8237->chan[channel].count & 0xFF00 ) | data;
}
- dma8237->msb ^= 1;
+ i8237->msb ^= 1;
break;
case 8:
/* DMA command register */
- dma8237->command = data;
- timer_enable( dma8237->timer, ( dma8237->command & 0x04 ) ? 0 : 1 );
+ i8237->command = data;
+ timer_enable( i8237->timer, ( i8237->command & 0x04 ) ? 0 : 1 );
break;
case 9:
@@ -498,13 +519,13 @@ WRITE8_DEVICE_HANDLER( dma8237_w )
channel = DMA_MODE_CHANNEL(data);
if ( data & 0x04 )
{
- dma8237->drq |= 0x01 << channel;
- timer_enable( dma8237->timer, ( dma8237->command & 0x04 ) ? 0 : 1 );
+ i8237->drq |= 0x01 << channel;
+ timer_enable( i8237->timer, ( i8237->command & 0x04 ) ? 0 : 1 );
}
else
{
- dma8237->status &= ~ ( 0x10 << channel );
- dma8237->drq &= ~ ( 0x01 << channel );
+ i8237->status &= ~ ( 0x10 << channel );
+ i8237->drq &= ~ ( 0x01 << channel );
}
break;
@@ -512,132 +533,157 @@ WRITE8_DEVICE_HANDLER( dma8237_w )
/* DMA mask register */
channel = DMA_MODE_CHANNEL(data);
if (data & 0x04)
- dma8237->mask |= 0x11 << channel;
+ i8237->mask |= 0x11 << channel;
else
- dma8237->mask &= ~(0x11 << channel);
+ i8237->mask &= ~(0x11 << channel);
break;
case 11:
/* DMA mode register */
channel = DMA_MODE_CHANNEL(data);
- dma8237->chan[channel].mode = data;
+ i8237->chan[channel].mode = data;
/* Apparently mode writes also clear the TC bit(?) */
- dma8237->status &= ~ ( 1 << channel );
+ i8237->status &= ~ ( 1 << channel );
break;
case 12:
/* DMA clear byte pointer flip-flop */
- dma8237->temp = data;
- dma8237->msb = 0;
+ i8237->temp = data;
+ i8237->msb = 0;
break;
case 13:
/* DMA master clear */
- dma8237->msb = 0;
- dma8237->mask = 0x0f;
- dma8237->state = DMA8237_SI;
- dma8237->status &= 0xF0;
+ i8237->msb = 0;
+ i8237->mask = 0x0f;
+ i8237->state = DMA8237_SI;
+ i8237->status &= 0xF0;
break;
case 14:
/* DMA clear mask register */
- dma8237->mask &= ~data;
- dma8237->mask = 0;
+ i8237->mask &= ~data;
+ i8237->mask = 0;
break;
case 15:
/* DMA write mask register */
- dma8237->mask = data & 0x0f;
+ i8237->mask = data & 0x0f;
break;
}
}
-void dma8237_drq_write(const device_config *device, int channel, int state)
+static void dma8237_drq_write(const device_config *device, int channel, int state)
{
- dma8237_t *dma8237 = get_safe_token( device );
+ i8237_t *i8237 = get_safe_token( device );
if (state)
- dma8237->drq |= ( 0x01 << channel );
+ i8237->drq |= ( 0x01 << channel );
else
- dma8237->drq &= ~( 0x01 << channel );
+ i8237->drq &= ~( 0x01 << channel );
- timer_enable( dma8237->timer, ( dma8237->command & 0x04 ) ? 0 : 1 );
+ timer_enable( i8237->timer, ( i8237->command & 0x04 ) ? 0 : 1 );
}
+WRITE_LINE_DEVICE_HANDLER( i8237_hlda_w )
+{
+ i8237_t *i8237 = get_safe_token( device );
+
+ i8237->hlda = state;
+}
-void dma8237_set_hlda(const device_config *device, int state)
+WRITE_LINE_DEVICE_HANDLER( i8237_ready_w )
{
- dma8237_t *dma8237 = get_safe_token( device );
+}
+
+WRITE_LINE_DEVICE_HANDLER( i8237_dreq0_w ) { dma8237_drq_write(device, 0, state); }
+WRITE_LINE_DEVICE_HANDLER( i8237_dreq1_w ) { dma8237_drq_write(device, 1, state); }
+WRITE_LINE_DEVICE_HANDLER( i8237_dreq2_w ) { dma8237_drq_write(device, 2, state); }
+WRITE_LINE_DEVICE_HANDLER( i8237_dreq3_w ) { dma8237_drq_write(device, 3, state); }
- dma8237->hlda = state;
+WRITE_LINE_DEVICE_HANDLER( i8237_eop_w )
+{
}
/******************* Unfortunate hacks *******************/
-void dma8237_run_transfer(const device_config *device, int channel)
+void i8237_run_transfer(const device_config *device, int channel)
{
- dma8237_t *dma8237 = get_safe_token(device);
+ i8237_t *i8237 = get_safe_token(device);
- dma8237->status |= 0x10 << channel; /* reset DMA running flag */
+ i8237->status |= 0x10 << channel; /* reset DMA running flag */
popmessage("dma8237_run_transfer(): please do not use me anymore\n");
- dma8237->status &= ~(0x10 << channel);
- dma8237->status |= (0x01 << channel);
+ i8237->status &= ~(0x10 << channel);
+ i8237->status |= (0x01 << channel);
}
-static DEVICE_START( dma8237 ) {
- dma8237_t *dma8237 = get_safe_token(device);
+static DEVICE_START( i8237 ) {
+ i8237_t *i8237 = get_safe_token(device);
+ i8237_interface *intf = (i8237_interface *)device->static_config;
+ int i;
+
+ /* resolve callbacks */
+ devcb_resolve_write_line(&i8237->out_hrq_func, &intf->out_hrq_func, device);
+ devcb_resolve_write_line(&i8237->out_eop_func, &intf->out_eop_func, device);
+ devcb_resolve_read8(&i8237->in_memr_func, &intf->in_memr_func, device);
+ devcb_resolve_write8(&i8237->out_memw_func, &intf->out_memw_func, device);
- dma8237->intf = (struct dma8237_interface *)device->static_config;
+ for (i = 0; i < 4; i++)
+ {
+ devcb_resolve_read8(&i8237->chan[i].in_ior_func, &intf->in_ior_func[i], device);
+ devcb_resolve_write8(&i8237->chan[i].out_iow_func, &intf->out_iow_func[i], device);
+ devcb_resolve_write_line(&i8237->chan[i].out_dack_func, &intf->out_dack_func[i], device);
+ }
}
-static DEVICE_RESET( dma8237 ) {
- dma8237_t *dma8237 = get_safe_token(device);
+static DEVICE_RESET( i8237 ) {
+ i8237_t *i8237 = get_safe_token(device);
- dma8237->status = 0x0F;
- dma8237->timer = timer_alloc(device->machine, dma8237_timerproc, (void *)device);
- dma8237->eop = 1;
- dma8237->state = DMA8237_SI;
- dma8237->last_service_channel = 3;
+ i8237->status = 0x0F;
+ i8237->timer = timer_alloc(device->machine, dma8237_timerproc, (void *)device);
+ i8237->eop = 1;
+ i8237->state = DMA8237_SI;
+ i8237->last_service_channel = 3;
- dma8237->mask = 0x00;
- dma8237->status = 0x0F;
- dma8237->hrq = 0;
- dma8237->hlda = 0;
- dma8237->chan[0].mode = 0;
- dma8237->chan[1].mode = 0;
- dma8237->chan[2].mode = 0;
- dma8237->chan[3].mode = 0;
+ i8237->mask = 0x00;
+ i8237->status = 0x0F;
+ i8237->hrq = 0;
+ i8237->hlda = 0;
+ i8237->chan[0].mode = 0;
+ i8237->chan[1].mode = 0;
+ i8237->chan[2].mode = 0;
+ i8237->chan[3].mode = 0;
- timer_adjust_periodic(dma8237->timer,
- ATTOTIME_IN_HZ(dma8237->intf->bus_speed),
+ timer_adjust_periodic(i8237->timer,
+ ATTOTIME_IN_HZ(device->clock),
0,
- ATTOTIME_IN_HZ(dma8237->intf->bus_speed));
+ ATTOTIME_IN_HZ(device->clock));
}
-DEVICE_GET_INFO( dma8237 ) {
+DEVICE_GET_INFO( i8237 ) {
switch ( state ) {
/* --- the following bits of info are returned as 64-bit signed integers --- */
- case DEVINFO_INT_TOKEN_BYTES: info->i = sizeof(dma8237_t); break;
+ case DEVINFO_INT_TOKEN_BYTES: info->i = sizeof(i8237_t); break;
case DEVINFO_INT_INLINE_CONFIG_BYTES: info->i = 0; break;
case DEVINFO_INT_CLASS: info->i = DEVICE_CLASS_PERIPHERAL; break;
/* --- the following bits of info are returned as pointers to data or functions --- */
- case DEVINFO_FCT_START: info->start = DEVICE_START_NAME(dma8237); break;
+ case DEVINFO_FCT_START: info->start = DEVICE_START_NAME(i8237); break;
case DEVINFO_FCT_STOP: /* nothing */ break;
- case DEVINFO_FCT_RESET: info->reset = DEVICE_RESET_NAME(dma8237); break;
+ case DEVINFO_FCT_RESET: info->reset = DEVICE_RESET_NAME(i8237); break;
/* --- the following bits of info are returned as NULL-terminated strings --- */
- case DEVINFO_STR_NAME: strcpy(info->s, "Intel DMA8237"); break;
- case DEVINFO_STR_FAMILY: strcpy(info->s, "DMA8237"); break;
+ case DEVINFO_STR_NAME: strcpy(info->s, "Intel 8237"); break;
+ case DEVINFO_STR_FAMILY: strcpy(info->s, "Intel 8080"); break;
case DEVINFO_STR_VERSION: strcpy(info->s, "1.01"); break;
case DEVINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
case DEVINFO_STR_CREDITS: strcpy(info->s, "Copyright the MAME and MESS Teams"); break;