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author ksherlock <ksherlock@gmail.com>2021-07-08 21:38:52 -0400
committer GitHub <noreply@github.com>2021-07-09 11:38:52 +1000
commita9fefd83636dfdc104a83f7f0cfaec08f87a35e0 (patch)
tree3874332782011821821f98fb893e17fb081861f3 /src/emu/emumem_heun.cpp
parent6ffc98289c9466cb01941c05a5b3088ac022a0b6 (diff)
-bus/a2bus: Added //SHH SYSTEME LANceGS Card. (#8264)
-machine/smc91c9x.cpp adjustments: * Reset should disable promiscuous mode. * RCR - handle promiscuous changes, adjust soft reset handling. * EPH_STATUS should be LINK_OK by default (previous code wouldn't set LINK_OK unless RX_EN is set but LANceGS won't set RX_EN unless LINK_OK is set). * B0_BANK bits 4-8 are unspecified in the documentation but LANceGS expects a 3 (used in Card detection logic). * MIR values depend on device type and resets when the mmu resets. * Reading/writing the data register needs to be aware of 8-bit I/O. * Calculate FCS. * Removed WMS OUI filtering hack.
Diffstat (limited to 'src/emu/emumem_heun.cpp')
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